Power device power-on and power-off timing control device and method

Abstract

The present invention provides a power device power-up and power-down timing control device and method. The device includes: a driver and a switch tube; a first end of the driver connected to the first end of the switch tube; a second end of the driver connected to the gate of the power device; and a second end of the switch tube connected to the drain of the power device. The driver is configured to output a gate voltage to the gate of the power device based on a negative voltage inputted by a first power supply upon receiving an enable signal; and after a first target time, output a first voltage to the first end of the switch tube based on a positive voltage inputted by a second power supply; and the switch tube is configured to output a drain voltage to the drain of the power device via the second end of the switch tube when the first voltage meets a target condition. The power device power-up and power-down timing control device and method provided by the present invention can improve the reliability of power device power-up and power-down timing control.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a power-on and power-off timing control device and method. Background Art

[0002] With the development of 5G technology, power amplifiers, as core components of wireless communication systems, have a direct impact on their overall performance. Gallium nitride power transistors (GaN) can achieve higher output power density, wider bandwidth, and higher efficiency, and are widely used in 5G communication systems.

[0003] Most RF GaN power devices are depletion-mode HEMT devices. When powering on, a negative voltage must be applied to the gate before any drain voltage is applied to cut off the device to ensure that no current flows through the device when the drain voltage is applied. The sequence is exactly the opposite when powering off, otherwise the power device may be damaged.

[0004] In existing technology, discrete components are typically used. A voltage comparator module detects whether negative voltage is active. If negative voltage is active, it outputs an enable signal to a power controller (such as the MAX881 or LM3881). The power controller then outputs a switch control signal, and only then is the drain voltage output to the drain of the power amplifier tube. This circuit is complex and unreliable. Summary of the Invention

[0005] The present invention provides a power-on and power-off timing control device and method for solving the defect of low reliability of power-on and power-off of power devices in the prior art, thereby simplifying the circuit and improving the reliability of power-on and power-off.

[0006] The present invention provides a power-on and power-off timing control device for a power device, comprising a driver and a switch tube;

[0007] The first end of the driver is connected to the first end of the switch tube; the second end of the driver is used to connect to the gate of the power device; the second end of the switch tube is used to connect to the drain of the power device;

[0008] The driver is configured to output a gate voltage to the gate of the power device based on a negative voltage of a first power supply input when an enable signal is received; and output a first voltage to the first terminal of the switch tube based on a positive voltage of a second power supply input after a first target time.

[0009] The switch tube is used to output a drain voltage to the drain of the power device through the second end of the switch tube when the first voltage meets a target condition.

[0010] According to the present invention, a power-on and power-off timing control device for a power device further includes a first branch;

[0011] The first end of the first branch is used to be connected to the drain of the power device; the second end of the first branch is used to be grounded;

[0012] The first branch is configured to discharge the residual voltage of the power device by connecting to the second end of the first branch when the enable signal is not synchronously received;

[0013] The driver is further configured to, when not receiving the enable signal, not output the first voltage to the first end of the switch tube; and not output the gate voltage to the gate of the power device after a second target time.

[0014] The switch tube is further configured to not output the drain voltage to the drain of the power device when the first voltage is 0.

[0015] According to the present invention, a power-on and power-off timing control device for a power device further includes a second branch;

[0016] The first end of the second branch is used to connect to the gate of the power device; the second end of the second branch is used to connect to an external power supply;

[0017] The second branch is used to transmit the target negative voltage input by the external power supply to the gate of the power device, so that the gate voltage of the power device is the same as the target negative voltage.

[0018] According to a power-on and power-off timing control device provided by the present invention, the first branch further includes:

[0019] The third end of the first branch is used to be grounded through a resistor;

[0020] The first branch is further configured to perform electrostatic protection on the power device by connecting to the third end of the first branch when the enable signal is synchronously received.

[0021] According to a power-on and power-off timing control device of a power device provided by the present invention, the first branch includes a relay.

[0022] According to a power-on and power-off timing control device of a power device provided by the present invention, the switch tube is a MOS tube, and the first end, the second end and the third end of the switch tube correspond to the gate, the source and the drain of the MOS tube respectively.

[0023] According to a power-on and power-off timing control device of a power device provided by the present invention, the target condition includes that the voltage between the first and second ends of the switch tube is greater than the voltage between the third and second ends of the switch tube.

[0024] The present invention also provides a method for controlling power-on and power-off timing of a power device, wherein a first end of a driver is connected to a first end of a switch tube, a second end of the driver is connected to a gate of the power device, and a second end of the switch tube is connected to a drain of the power device. The method comprises:

[0025] The driver outputs a gate voltage to the gate of the power device based on the negative voltage of the first power supply input when receiving the enable signal;

[0026] The driver outputs a first voltage to the first end of the switch tube based on the positive voltage of the second power supply input after a first target time;

[0027] When the first voltage meets a target condition, the switch tube outputs a drain voltage to the drain of the power device through the second end of the switch tube.

[0028] According to a method for controlling power-on and power-off timing of a power device provided by the present invention, a first end of a first branch is connected to a drain of the power device, and a second end of the first branch is grounded. The method further includes:

[0029] When the first branch does not synchronously receive the enable signal, the first branch discharges the residual voltage of the power device by connecting to the second end of the first branch;

[0030] and the driver does not output the first voltage to the first end of the switch tube when not receiving the enable signal;

[0031] The driver does not output the gate voltage to the gate of the power device after a second target time;

[0032] When the first voltage is 0, the switch tube does not output the drain voltage to the drain of the power device.

[0033] According to a method for controlling power-on and power-off timing of a power device provided by the present invention, a first end of the second branch is connected to the gate of the power device, and a second end of the second branch is connected to an external power supply. The method further includes:

[0034] The second branch transmits the target negative voltage input by the external power supply to the gate of the power device, so that the gate voltage of the power device is the same as the target negative voltage.

[0035] The power-on and power-off timing control device and method provided by the present invention process the negative gate voltage of the power device based on the driver, and turn on the switch tube after a first target time through the driver, and apply pressure to the drain of the power device through the turned-on switch tube, which can improve the reliability of the power-on and power-off timing control of the power device. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the present invention or the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0037] Figure 1 It is a structural schematic diagram of the power-on and power-off timing control device provided by the present invention;

[0038] Figure 2 This is a schematic diagram of the circuit structure of the power-on and power-off timing control device provided by the present invention;

[0039] Figure 3 This is a schematic diagram of the relationship between the dead time and the resistance value of the power-on and power-off timing control device of the power device provided by the present invention;

[0040] Figure 4 It is a flow chart of the power-on and power-off timing control method of a power device provided by the present invention;

[0041] Figure 5 It is a flow chart of the power-on timing control method of a power device provided by the present invention;

[0042] Figure 6 It is a flow chart of the power-off timing control method of a power device provided by the present invention. DETAILED DESCRIPTION

[0043] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0044] Figure 1 Schematic diagram of the structure of the power on and off timing control device of the power device provided by the present invention. Figure 1 As shown, the power-on and power-off timing control device provided by the embodiment of the present invention includes a driver 110 and a switch tube 120.

[0045] It should be noted that the control object of the power-on and power-off timing control device is the power device, wherein the power device includes a gate and a drain.

[0046] The gate is the electrode that acts as an electrical isolation element in a power device. The gate is charged by an external power source, and the power device turns on only when the gate's capacitive voltage exceeds a preset threshold.

[0047] The drain electrode is the electrode that acts as an emitter in a power device. It is used to output the voltage difference between the drain and gate of the power device.

[0048] Specifically, the power-on and power-off timing control device of the power device includes a driver 110 and a switch tube 120 .

[0049] The driver 110 is used to drive the gate of the power device. The driver 110 is used to drive the power device to conduct current and to shut down. The embodiment of the present invention does not specifically limit the driver.

[0050] Exemplarily, the driver 110 may be a device including a power supply that can generate positive and negative voltages. Before the power device is powered on, a negative voltage may be provided to the gate of the power device to make the conductive channel disappear (or be in an off state), and then a positive voltage may be provided to the drain of the power device to conduct the current in the power device. When the power device is powered off, it is necessary to first stop providing a positive voltage to the drain of the power device, and then stop providing a negative voltage to the gate of the power device.

[0051] The driver 110 may also be an independently provided integrated development board, which performs the above-mentioned power-on and power-off control on the power device by connecting a device capable of generating a positive voltage and a negative voltage.

[0052] Preferably, the driver 110 is a high-speed FET driver with a function of adjusting dead time.

[0053] The driver 110 is grounded through resistors of different resistance values, so as to achieve a delay of a corresponding duration in the control timing under the control of the resistors.

[0054] The driver 110 processes the positive voltage received from the external power supply and outputs it from the HSGPU terminal and the HSGPD terminal respectively; and processes the negative voltage received from the external power supply and outputs it from the LSGPU terminal and the LSGPD terminal respectively.

[0055] The switch 120 is a device that switches the circuit on and off. The switch 120 switches the circuit on when receiving a voltage output from the high-voltage side of the driver 110 and switches the circuit off when not receiving a voltage output from the high-voltage side of the driver 110.

[0056] The first end of the driver 110 is connected to the first end of the switch tube 120; the second end of the driver is used to connect to the gate of the power device; and the second end of the switch tube is used to connect to the drain of the power device.

[0057] It should be noted that the first end of the driver refers to the high-voltage side output end of the driver 110. Exemplarily, the first end of the driver includes the HSGPU end and the HSGPD end of the driver 110.

[0058] The second end of the driver refers to the low-voltage side output end of the driver 110. Exemplarily, the second end of the driver includes the LSGPU end and the LSGPD end of the driver 110.

[0059] The first end of the switch tube refers to the end of the switch tube 120 connected to the high-voltage side output end of the driver 110 .

[0060] The second end of the switch tube refers to the end of the switch tube 120 connected to the drain of the power device.

[0061] The embodiment of the present invention does not specifically limit the type of the switching tube and the corresponding motor terminal.

[0062] For example, the switch tube may be a triode, the first end of the switch tube is a pin connected to the high-voltage side output end of the driver 110 , and the second end of the switch tube is a pin connected to the drain of the power device.

[0063] The switch tube may be a metal oxide semiconductor field effect transistor (MOS FET), the first end of the switch tube is the gate of the MOS FET, and the second end of the switch tube is the source of the MOS FET.

[0064] Specifically, the connection relationship between the power-on and power-off timing control device of the power device and the power device is that the high-voltage side output end of the driver 110 is connected to the first end of the switch tube 120, and the second end of the switch tube 120 is connected to the drain of the power device, so that when the switch tube 120 is turned on, a complete loop is formed in which the driver 110 outputs a positive voltage to the drain of the power device via the switch tube 120.

[0065] The low-voltage side output terminal of the driver 110 is connected to the gate of the power device, so as to form a complete loop in which the driver 110 outputs a negative voltage to the gate of the power device.

[0066] Preferably, the HSGPU terminal and the HSGPD terminal of the driver 110 are respectively connected to the gate of the switch tube 120 via at least one resistor. The resistance between the HSGPU terminal and the gate of the switch tube 120 is greater than that between the HSGPD terminal and the gate of the switch tube 120.

[0067] The LSGPU terminal and the LSGPD terminal of the driver 110 are connected to the gate of the power device via at least one resistor, wherein the resistance between the LSGPU terminal and the gate of the power device is smaller than that between the LSGPD terminal and the gate of the power device.

[0068] Driver 110 is used to output a gate voltage to the gate of the power device based on the negative voltage of the first power input when an enable signal is received; and output a first voltage to the first end of the switch tube based on the positive voltage of the second power input after a first target time.

[0069] It should be noted that the enable signal is a trigger signal of the driver 110. The enable signal is used to trigger the driver 110 to execute corresponding power-on timing control when the power device is powered on.

[0070] The first power supply is a power processing unit independently provided outside the driver 110. The first power supply is used to provide a negative voltage.

[0071] The second power supply refers to a power processing unit independently provided outside the driver 110 and is different from the first power supply. The second power supply is used to provide a positive voltage to the gate of the power device.

[0072] The first target time refers to the dead time in power-up sequencing. As the driver receives the enable signal, it can delay by the first target time under the control of the corresponding resistor. The first target time is used to apply pressure to different electrodes of the power device at different times during power-up sequencing.

[0073] Illustratively, during the power-on process, after the gate of the power device is pressurized, the drain of the power device is pressurized after a first target time has passed.

[0074] Specifically, after receiving the enable signal, the driver applies a negative voltage to the gate of the power device through the low-voltage side output terminal of the driver 110 according to the negative voltage provided by the first power supply.

[0075] After a negative voltage is applied to the gate voltage of the power device, after a first target time, a first voltage is output to the gate of the switch tube 120 through the high-side output terminal of the driver 110 based on the positive voltage provided by the second power supply.

[0076] The first voltage is the positive voltage applied by the high-voltage output terminal of the driver 110 to the gate of the switch 120. The first voltage is used to keep the switch on. After the switch is turned on, the external power supply applies pressure to the drain of the switch to generate a voltage that also applies pressure to the drain of the power device.

[0077] The switch tube 120 is used to output a drain voltage to the drain of the power device through the second end of the switch tube when the first voltage meets the target condition.

[0078] It should be noted that the target condition refers to a condition that can determine whether the switch is in the on state. For example, the target condition can be that the gate voltage of the switch is greater than the source voltage. The target condition can also be that the voltage difference between the gate and source of the switch is greater than the voltage difference between the drain and source of the switch. This embodiment of the present invention does not specifically limit this.

[0079] Specifically, the switch tube makes a judgment based on its gate voltage (ie, the first voltage) in combination with the target condition.

[0080] If the gate voltage in the switching tube meets the target condition, it means that the switching tube is in the on state. After the external power supply applies pressure to the drain of the switching tube, a voltage is generated, and pressure is applied to the drain of the power device through the source of the switching tube.

[0081] If the gate voltage in the switch tube does not meet the target condition, it means that the switch tube is not in the on state and the source of the switch tube cannot apply pressure to the drain of the power device.

[0082] The following example illustrates a specific implementation method of a power-on and power-off timing control device for performing power-on timing control.

[0083] For example, when the driver is enabled, the voltages output from the LSGPU terminal and the LSGPD terminal are divided and combined by different resistor combinations to generate a negative gate voltage -Vgs, which is supplied to the gate of the power device.

[0084] At this time, after the gate of the power device completes the negative gate voltage -Vgs power supply, under the control of the delay resistor corresponding to the power-on, after the first target time ends, the voltage output by the HSGPU end and the HSGPD end are divided and combined by different resistor combinations to generate a positive voltage Vg. This voltage will be used to turn on the switch tube. At this time, the voltage VDD is supplied to the drain of the power device through the switch tube. The return connection of VD and HSS ensures that HSG / Vg increases with the increase of the drain voltage, so as to ensure that the switch tube is always in the on state, thereby completing the power-on control of the power device.

[0085] The embodiment of the present invention processes the negative gate voltage of the power device based on the driver, and turns on the switch tube after the first target time through the driver, and applies pressure to the drain of the power device through the turned-on switch tube, which can improve the reliability of the power-on and power-off timing control of the power device.

[0086] Based on the content of any of the above embodiments, the power-on and power-off timing control device further includes a first branch.

[0087] The first end of the first branch is used to be connected to the drain of the power device; the second end of the first branch is used to be grounded.

[0088] It should be noted that the enable signal of the driver 110 synchronously triggers the first branch.

[0089] The first branch refers to a device that discharges the power device when no enable signal is received (the power device is powered off).

[0090] The first end of the first branch refers to a circuit end connected to the drain of the power device.

[0091] The second end of the first branch refers to a circuit end connected to the ground.

[0092] Specifically, the connection relationship between the power-on and power-off timing control device of the power device and the first branch is that the first end of the first branch is connected to the drain of the power device, and the second end of the first branch is connected to the ground, so as to form a complete loop in which the power device is grounded through the first branch.

[0093] The first branch is used to discharge the residual voltage of the power device by connecting to the second end of the first branch when the enable signal is not synchronously received.

[0094] Specifically, when the first branch does not synchronously receive the enable signal, the second end of the first branch is connected to the ground, so that the first branch discharges the residual voltage on the drain of the power device through a complete loop.

[0095] Preferably, when the first branch does not synchronously receive the enable signal, the second end of the first branch is connected to ground, so that the first branch discharges the residual voltage on the drain of the power device through the first resistor in the complete loop. The first resistor has a relatively small resistance value to enable rapid discharge while protecting the circuit.

[0096] The driver 110 is further configured to not output the first voltage to the first end of the switch tube when the enable signal is not received; and not output the gate voltage to the gate of the power device after the second target time.

[0097] It should be noted that the second target time refers to the dead time in the power-off sequence control. Because the driver does not receive the enable signal, it can be delayed by the second target time under the control of the corresponding resistor. The second target time is used to apply pressure to different electrodes of the power device at different times during the power-off sequence control.

[0098] Illustratively, during the power-off process, after the drain voltage of the power device is removed, the gate voltage of the power device is removed after a second target time.

[0099] Figure 3 This is a schematic diagram of the relationship between the dead time and the resistance value of the power-on and power-off timing control device of the power device provided by the present invention. Figure 3 As shown, both the first target time and the second target time can be approximately calculated based on the fitting relationship between the resistance and the extension time. The embodiment of the present invention does not specifically limit the fitting relationship.

[0100] For example, the fitting relationship expression between resistance and extension time is:

[0101] t=0.0898R+0.7683

[0102] Where R is the resistance value of the resistor in KΩ. t is the extension time in nanoseconds.

[0103] Then the first target time t1 = 0.0898*R9 + 0.7683, and the second target time t2 = 0.0898*R8 + 0.7683.

[0104] Specifically, when the driver does not receive the enable signal, the high-voltage side output terminal of the driver does not output the first voltage to the first terminal of the switch tube, so that the drain of the power device does not receive the applied voltage.

[0105] At the same time, since the drain of the power device no longer receives new voltage when powered off, there is still residual voltage. Therefore, when the driver does not receive the enable signal, the first branch does not receive the enable signal synchronously, and the residual voltage of the power device can be discharged to ground through the connected first branch.

[0106] After the application of voltage to the drain of the power device stops, the low-voltage side output terminal of the driver does not apply voltage to the gate of the power device after a second target time has passed.

[0107] The switch tube 120 is further configured to not output a drain voltage to the drain of the power device when the first voltage is zero.

[0108] Specifically, when the voltage received by the gate of the switch tube is 0, since the first voltage does not meet the target condition, that is, the switch tube is in the off state, it is impossible to apply pressure to the drain of the power device by connecting to the external power supply.

[0109] The following example illustrates a specific implementation method of a power-off timing control device for controlling power-off timing.

[0110] For example, when the enable signal of the driver is removed, the high-voltage side output is turned off, Vg is removed, and the switch tube is also turned off at the same time, and then the drain voltage of the power device is removed, and the residual voltage of the drain of the power device is quickly discharged to the ground through the first resistor.

[0111] After the drain voltage of the power device is removed, the low-voltage side output supplying power to the power device gate is turned off only after the second target time has elapsed, controlled by the delay control resistor corresponding to power-off. The controllable delay function ensures that the negative gate voltage remains before the drain voltage is removed.

[0112] In this embodiment of the present invention, a driver shuts down the drain voltage of a power device and connects it to ground via a first branch to discharge any residual drain voltage. By shutting down the negative gate voltage to the power device after a second target time, the driver improves the reliability of the power-on and power-off timing control of the power device.

[0113] Based on the content of any of the above embodiments, the power-on and power-off timing control device further includes a second branch.

[0114] The first end of the second branch is used to be connected to the gate of the power device; the second end of the second branch is used to be connected to an external power supply.

[0115] It should be noted that the second branch refers to a device that adjusts the negative gate voltage of the power device when receiving an enable signal (the power device is powered on).

[0116] The first end of the second branch refers to a circuit end connected to the gate of the power device.

[0117] The second end of the second branch refers to a circuit end connected to an external power source.

[0118] An external power supply is a power supply device that provides negative voltage. It is used to provide the target negative voltage value for adjusting power devices.

[0119] Specifically, the connection relationship between the power-on and power-off timing control device of the power device and the second branch is that the first end of the second branch is connected to the gate of the power device, and the second end of the second branch is connected to the external power supply, so as to form a complete loop in which the power device is connected to the external power supply through the second branch.

[0120] The second branch is used to transmit the target negative voltage input by the external power supply to the gate of the power device, so that the gate voltage of the power device is the same as the target negative voltage.

[0121] It should be noted that the target negative voltage refers to the target value for adjusting the negative gate voltage of the power device.

[0122] Specifically, the second branch obtains a target negative voltage from an external power source and outputs a voltage to the gate of the power device.

[0123] The power timing control device for the power device combines the target negative voltage with the negative gate voltage generated by the driver 110 and the voltage divider resistor in parallel, so that the negative gate voltage generated in parallel is the same as the target negative voltage value set by the external power supply.

[0124] Preferably, the second branch obtains the target negative voltage -VGS1 through an external power supply for adjustment. After the driver is enabled, the voltages output by the LSGPU end and the LSGPD end are combined after voltage division by different resistor combinations, and then the -VGS1 is voltage-divided through the connected resistors so that the -Vgs generated in parallel is equal to -VGS1.

[0125] The embodiment of the present invention is based on the second branch and adjusts the negative gate voltage of the power device through an external power supply, thereby improving the reliability of power-on and power-off timing control of the power device.

[0126] Based on the content of any of the above embodiments, the first branch further includes: a third end of the first branch, which is used to be grounded through a resistor.

[0127] It should be noted that the third end of the first branch refers to a circuit end connected to the ground. Different from the first end of the first branch, a second resistor with a larger resistance is set at the third end of the first branch.

[0128] Specifically, the connection relationship between the power-on and power-off timing control device of the power device and the first branch is that the first end of the first branch is connected to the drain of the power device, and the third end of the first branch is grounded through a resistor with a very large resistance, so as to form a complete loop of the power device grounded through the first branch and the second resistor.

[0129] The first branch is further configured to provide electrostatic protection to the power device by connecting to the third end of the first branch when the enable signal is synchronously received.

[0130] Specifically, when the first branch synchronously receives the enable signal, a second resistor with a very large resistance is connected in series to the third end of the first branch and connected to the ground, so that the first branch performs electrostatic protection on the gate voltage of the power device through a complete loop.

[0131] Preferably, when the first branch synchronously receives the enable signal, a resistor with a very high resistance is connected in series with the third end of the first branch and connected to ground, so that the first branch provides electrostatic protection for the gate voltage on the gate of the power device through the second resistor (or a resistor combination including the second resistor) in the complete loop. The second resistor has a very high resistance value so that static electricity in the gate of the power device is dissipated, neutralized, humidified, shielded, and grounded.

[0132] In the embodiment of the present invention, when a driver applies a voltage to the gate of a power device, a large resistor is connected in series in the first branch to the ground, thereby neutralizing the voltage on the gate of the power device, thereby improving the reliability of the power-on and power-off timing control of the power device.

[0133] Based on the content of any of the above embodiments, the first branch includes a relay.

[0134] Specifically, when the relay synchronization does not receive the enable signal, the first terminal and the second terminal of the relay are connected directly to the ground, so that the residual voltage on the drain of the power device is discharged through the first resistor in the complete loop.

[0135] When the relay synchronously receives the enable signal, the first end and the third end of the relay are connected, and a resistor with a very large resistance is connected in series to the ground, so that the gate voltage of the power device is electrostatically protected through the first resistor and the second resistor in the complete loop.

[0136] The embodiment of the present invention is based on a relay and performs discharge or electrostatic protection on a power device in different controls, thereby improving the reliability of power-on and power-off sequence control of the power device.

[0137] Based on the content of any of the above embodiments, the switch tube 120 is a MOS tube, and the first end, the second end, and the third end of the switch tube correspond to the gate, the source, and the drain of the MOS tube, respectively.

[0138] Specifically, the switch tube 120 is a MOS tube.

[0139] MOS transistors can be divided into two categories according to the different doping types of the transistor substrate and source and drain.

[0140] One type is N-metal-oxide-semiconductor (NMOS), which has the characteristic of being turned on when Vgs is greater than a certain value. It is suitable for use when the source is grounded (low-end drive) as long as the gate voltage reaches 4V or 10V.

[0141] The other type is P-type metal-oxide-semiconductor (PMOS), which is characterized by being turned on when Vgs is less than a certain value and is suitable for use when the source is connected to VCC (high-end drive).

[0142] Preferably, the switch tube 120 is a high-power N-channel MOS tube (ie, NMOS).

[0143] The first end, the second end and the third end of the switch tube correspond to the gate, the source and the drain of the NMOS tube respectively.

[0144] The embodiment of the present invention is based on a MOS tube, which is turned on or off in different control modes, thereby improving the reliability of power-on and power-off timing control of a power device.

[0145] Based on the content of any of the above embodiments, the target condition includes that the voltage between the first terminal and the second terminal of the switch tube is greater than the voltage between the third terminal and the second terminal of the switch tube.

[0146] Specifically, the switch tube 120 makes a judgment based on the first voltage received by the gate and the target condition.

[0147] If the voltage difference between the gate voltage and the source voltage of the NMOS tube is greater than the voltage difference between the drain voltage and the source voltage of the NMOS tube, it means that the switch tube is in the on state. After the external power supply applies pressure to the drain of the NMOS tube, a voltage is generated, and pressure is applied to the drain of the power device through the source of the NMOS tube.

[0148] If the voltage difference between the gate voltage and the source voltage of the NMOS tube is less than or equal to the voltage difference between the drain voltage and the source voltage of the NMOS tube, it means that the switch tube is not in the on state and the source of the NMOS tube cannot apply pressure to the drain of the power device.

[0149] Conventional timing control implemented using a power controller suffers from the problem of uncontrollable timing intervals between processing the gate voltage and processing the drain voltage. Therefore, when the drain voltage is removed, the drain voltage discharges slowly due to the uF-level capacitance typically found in the drain supply arm. Consequently, the gate voltage is completely removed while some drain voltage remains. This damages the power device and reduces reliability.

[0150] Figure 2 This is a schematic diagram of the circuit structure of the power-on and power-off timing control device provided by the present invention. Figure 2 As shown, after the power device, the power-on and power-off timing control device of the power device and the external power supply are connected in circuit, the specific implementation method of the power-on and power-off timing control device of the power device to achieve power-on and power-off control is as follows:

[0151] In the circuit, the first power source is the power processing unit U4, and the second power source is the power processing unit U2. U2 and U4 can generate a positive voltage VCC2 and a negative voltage -VCC1 of appropriate magnitude.

[0152] The high side bias (HSB) and high side source (HSS) of the driver U1 are connected to U2 respectively, so as to realize external setting and feedback of the positive voltage VCC2 obtained by the driver U1.

[0153] The low-side bias (LSB) and low-side source (LSS) of the driver U1 are connected to U4 respectively to realize external setting and feedback of the negative voltage -VCC1 obtained by the driver U1.

[0154] Driver U1's RDHL terminal is grounded via resistor R8, and its RDLH terminal is grounded via resistor R9. When driver U1's IN port receives an enable signal, resistor R9 controls the power-on delay according to the corresponding dead time. If driver U1's IN port does not receive an enable signal, resistor R8 controls the power-off delay according to the corresponding dead time. This allows driver U1 to control the dead time.

[0155] The HSGPU and HSGPD terminals of the driver 110 output a high-side voltage, and the LSGPU and LSGPD terminals of the driver 110 output a low-side voltage, and the high-side voltage and the low-side voltage will not be high at the same time.

[0156] During the power-on and power-off timing control device's control of the power device, if the driver U1 receives an enable signal, the power-on timing control of the power device U3 is performed. The specific implementation process is as follows:

[0157] After driver U1 receives the negative voltage from U4, it supplies a negative voltage to the gate of power device U3 from its low-voltage output. Simultaneously, relay K1 receives the enable signal and switches to the high-resistance R15 terminal, providing electrostatic protection via resistors R14 and R15.

[0158] Under the control of delay resistor R9, after the first target time has elapsed, a positive voltage is supplied from the high-voltage output terminal to the gate of switch Q1, so that after Q1 is connected, the positive voltage can be transmitted to the drain of power device U3. In this way, after the gate of power device U3 is pressurized and the first target time has elapsed, pressure is applied to the drain of power device U3, thereby completing power-on control.

[0159] If the driver U1 does not receive the enable signal, the power device U3 is powered off sequentially. The specific implementation process is as follows:

[0160] Driver U1 no longer receives the positive and negative voltages from U2 and U4. It first removes the voltage from the high-voltage output terminal to switch Q1, turning it off and removing the drain voltage VDD from Q1. Simultaneously, relay K1, having failed to receive the enable signal, switches to ground, quickly dissipating the voltage through the smaller resistor R14.

[0161] The resistance of resistor R8 is slightly greater than that of resistor R9, meaning the second target time is slightly greater than the first target time. This ensures that while the negative voltage at the low-voltage output of driver U1 is removed, the residual voltage at the drain of power device U3 is discharged by relay K1. Only then is the drain voltage of power device U3 removed.

[0162] Under the control of delay resistor R8, after the second target time has passed, the low-voltage output terminal no longer provides a negative voltage to the gate of power device U3. This allows the voltage on the drain of power device U3 to be removed and any residual voltage to be discharged. After the second target time has passed, the voltage on the gate of power device U3 is removed, completing power-off control.

[0163] The embodiment of the present invention turns on or off the power supply in different control modes based on target conditions, thereby improving the reliability of power-on and power-off timing control of the power device.

[0164] Figure 4 FIG. 1 is a flow chart of the power-on and power-off timing control method of the power device provided by the present invention. Figure 4 As shown, based on the contents of any of the above embodiments, the first end of the driver is connected to the first end of the switching tube, the second end of the driver is connected to the gate of the power device, and the second end of the switching tube is connected to the drain of the power device. The method includes: step 401, when the driver receives an enable signal, the driver outputs a gate voltage to the gate of the power device based on the negative voltage of the first power supply input.

[0165] It should be noted that the execution subject of the power-on and power-off timing control method of the power device provided by the present invention may be a power-on and power-off timing control device of the power device, or may be a circuit including the power-on and power-off timing control device of the power device.

[0166] Specifically, in step 401 , after receiving the enable signal, the driver applies a negative voltage to the gate of the power device through the low-voltage side output terminal of the driver 110 according to the negative voltage provided by U4 .

[0167] Step 402: After a first target time, the driver outputs a first voltage to a first terminal of the switch tube based on a positive voltage inputted by a second power supply.

[0168] Specifically, in step 402, after the driver applies a negative voltage to the gate voltage of the power device, after a first target time, the first voltage is output to the gate of the switch tube 120 through the high-voltage side output terminal of the driver 110 based on the positive voltage provided by U2.

[0169] The first voltage is the positive voltage applied by the high-voltage output terminal of the driver 110 to the gate of the switch 120. The first voltage is used to keep the switch on. After the switch is turned on, the external power supply applies pressure to the drain of the switch to generate a voltage that also applies pressure to the drain of the power device.

[0170] Step 403: When the first voltage meets the target condition, the switch tube outputs a drain voltage to the drain of the power device through the second end of the switch tube.

[0171] Specifically, in step 403, the switch tube makes a judgment based on its gate voltage (ie, the first voltage) in combination with the target condition.

[0172] If the gate voltage in the switching tube meets the target condition, it means that the switching tube is in the on state. After the external power supply applies pressure to the drain of the switching tube, a voltage is generated, and pressure is applied to the drain of the power device through the source of the switching tube.

[0173] If the gate voltage in the switch tube does not meet the target condition, it means that the switch tube is not in the on state and the source of the switch tube cannot apply pressure to the drain of the power device.

[0174] Figure 5 FIG. 1 is a flow chart of the power-on timing control method of the power device provided by the present invention. Figure 5 As shown, based on Figure 2 The circuit structure diagram of the power-on and power-off timing control device of the power device shown in the figure illustrates a specific implementation method of the power-on timing control method of the power-on and power-off timing control device of the power device.

[0175] In step 501 , U2 and U4 output positive voltage and negative voltage to the driver respectively.

[0176] Step 502: Driver U1 receives an enable signal.

[0177] Step 503: Relay K1 synchronously receives the enable signal and turns the switch to the high-resistance R15 terminal.

[0178] Step 504 : The low-voltage side output terminal of the driver U1 generates a negative gate voltage to supply to the gate of the power device U3 .

[0179] Step 505 : Under the control of the delay resistor R9 , the driver U1 outputs a positive voltage to the switch tube Q1 after a first target time.

[0180] Step 506 : The switch tube Q1 is turned on, and VDD is supplied to the drain of the power device U3 .

[0181] The embodiment of the present invention processes the negative gate voltage of the power device based on the driver, and turns on the switch tube after the first target time through the driver, and applies pressure to the drain of the power device through the turned-on switch tube, which can improve the reliability of the power-on and power-off timing control of the power device.

[0182] Based on the contents of any of the above embodiments, the first end of the first branch is connected to the drain of the power device, and the second end of the first branch is grounded. The method also includes: when the first branch does not synchronously receive an enable signal, the residual voltage of the power device is discharged by connecting the second end of the first branch.

[0183] Specifically, when the first branch does not synchronously receive the enable signal, the second end of the first branch is connected to the ground, so that the first branch discharges the residual voltage on the drain of the power device through a complete loop.

[0184] Preferably, when the first branch does not synchronously receive the enable signal, the second end of the first branch is connected to ground, so that the first branch discharges the residual voltage on the drain of the power device through the resistor R14 in the complete loop. Resistor R14 has a relatively small resistance value to enable rapid discharge while protecting the circuit.

[0185] Furthermore, when the driver does not receive the enable signal, it does not output the first voltage to the first end of the switch tube.

[0186] Specifically, when the driver does not receive the enable signal, the high-voltage side output terminal of the driver U1 does not output the first voltage to the first terminal of the switch tube, so that the drain of the power device does not receive the applied voltage.

[0187] The driver stops outputting a gate voltage to the gate of the power device after the second target time.

[0188] Specifically, after the driver U1 stops applying voltage to the drain of the power device, after a second target time has passed, the low-voltage side output terminal of the driver U1 does not apply voltage to the gate of the power device.

[0189] When the first voltage is 0, the switch tube does not output a drain voltage to the drain of the power device.

[0190] Specifically, when the voltage received by the gate of the switch tube is 0, since the first voltage does not meet the target condition, that is, the switch tube is in the off state, it is impossible to apply pressure to the drain of the power device by connecting to the external power supply.

[0191] Figure 6 FIG. 1 is a flow chart of the power-off timing control method of the power device provided by the present invention. Figure 6 As shown, based on Figure 2 The circuit structure diagram of the power-on and power-off timing control device of the power device shown in the figure illustrates a specific implementation method of the power-off timing control method of the power-on and power-off timing control device of the power device.

[0192] Step 601: The enable signal of the driver U1 is removed.

[0193] Step 602: The high-side output of the driver U1 is turned off.

[0194] Step 603: The switch tube Q1 is also turned off at the same time.

[0195] Step 604 : The drain voltage of the power device U3 is removed.

[0196] Step 605 : The residual voltage on the drain of the power device U3 is quickly discharged by connecting to the ground through the resistor R14 .

[0197] Step 606 : Under the control of the delay resistor R8 , the driver U1 turns off the low-voltage side output that supplies power to the gate of the power device after the second target time has elapsed.

[0198] In this embodiment of the present invention, a driver shuts down the drain voltage of a power device and connects it to ground via a first branch to discharge any residual drain voltage. By shutting down the negative gate voltage to the power device after a second target time, the driver improves the reliability of the power-on and power-off timing control of the power device.

[0199] Based on the contents of any of the above embodiments, the first end of the second branch is connected to the gate of the power device, and the second end of the second branch is connected to the external power supply. The method also includes: the second branch transmits the target negative voltage input by the external power supply to the gate of the power device, so that the gate voltage of the power device is the same as the target negative voltage.

[0200] Specifically, the second branch obtains a target negative voltage from an external power source and outputs a voltage to the gate of the power device.

[0201] The power-on and power-off timing control device of the power device connects the target negative voltage in parallel with the negative gate voltage generated by the driver and the voltage divider resistor, so that the negative gate voltage generated after parallel connection is the same as the target negative voltage value set by the external power supply.

[0202] Preferably, the second branch obtains the target negative voltage -VGS1 through an external power supply for adjustment. After the driver is enabled, the negative gate voltage is generated after reasonable voltage division by resistors R10 and R11. The -VGS1 is then divided by resistor R13, and the -Vgs generated in parallel is equal to -VGS1.

[0203] The embodiment of the present invention is based on the second branch and adjusts the negative gate voltage of the power device through an external power supply, thereby improving the reliability of power-on and power-off timing control of the power device.

[0204] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.

[0205] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, or of course, by hardware. Based on this understanding, the essence of the above technical solution or the part that contributes to the existing technology can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or certain parts of the embodiments.

[0206] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A power-on and power-off timing control device for a power device, characterized in that: Including driver and switch tube; The first end of the driver is connected to the first end of the switch tube; the second end of the driver is used to connect to the gate of the power device; the second end of the switch tube is used to connect to the drain of the power device; The driver is configured to output a gate voltage to the gate of the power device based on a negative voltage of a first power supply input when an enable signal is received; and output a first voltage to the first terminal of the switch tube based on a positive voltage of a second power supply input after a first target time. The switch tube is configured to output a drain voltage to the drain of the power device through the second end of the switch tube when the first voltage meets a target condition; Also includes a second branch; The first end of the second branch is used to connect to the gate of the power device; the second end of the second branch is used to connect to an external power supply; The second branch is used to transmit the target negative voltage input by the external power supply to the gate of the power device, so that the gate voltage of the power device is the same as the target negative voltage.

2. The power-on and power-off timing control device of a power device according to claim 1, characterized in that: Also includes the first branch; The first end of the first branch is used to be connected to the drain of the power device; the second end of the first branch is used to be grounded; The first branch is configured to discharge the residual voltage of the power device by connecting to the second end of the first branch when the enable signal is not synchronously received; The driver is further configured to, when not receiving the enable signal, not output the first voltage to the first end of the switch tube; and not output the gate voltage to the gate of the power device after a second target time. The switch tube is further configured to not output the drain voltage to the drain of the power device when the first voltage is 0.

3. The power-on and power-off timing control device of a power device according to claim 2, characterized in that: The first branch further includes: The third end of the first branch is used to be grounded through a resistor; The first branch is further configured to perform electrostatic protection on the power device by connecting to the third end of the first branch when the enable signal is synchronously received.

4. The power-on and power-off timing control device of a power device according to claim 2, characterized in that: The first branch includes a relay.

5. The power-on and power-off timing control device of a power device according to claim 1, characterized in that: The switch tube is a MOS tube, and the first end, the second end and the third end of the switch tube correspond to the gate, the source and the drain of the MOS tube respectively.

6. The power-on and power-off timing control device of a power device according to claim 5, characterized in that: The target condition includes that a voltage between the first terminal and the second terminal of the switch tube is greater than a voltage between the third terminal and the second terminal of the switch tube.

7. A method for controlling power-on and power-off timing of a power device, characterized in that: A first end of the driver is connected to a first end of the switch tube, a second end of the driver is connected to a gate of a power device, and a second end of the switch tube is connected to a drain of the power device. The method includes: The driver outputs a gate voltage to the gate of the power device based on the negative voltage of the first power supply input when receiving the enable signal; The driver outputs a first voltage to the first end of the switch tube based on the positive voltage of the second power supply input after a first target time; When the first voltage meets the target condition, the switch tube outputs a drain voltage to the drain of the power device through the second end of the switch tube; A first end of the second branch is connected to the gate of the power device, and a second end of the second branch is connected to an external power supply. The method further includes: The second branch transmits the target negative voltage input by the external power supply to the gate of the power device, so that the gate voltage of the power device is the same as the target negative voltage.

8. The method for controlling power-on and power-off timing of a power device according to claim 7, wherein: A first end of the first branch is connected to the drain of the power device, a second end of the first branch is grounded, and the method further includes: When the first branch does not synchronously receive the enable signal, the first branch discharges the residual voltage of the power device by connecting to the second end of the first branch; and the driver does not output the first voltage to the first end of the switch tube when not receiving the enable signal; The driver does not output the gate voltage to the gate of the power device after a second target time; When the first voltage is 0, the switch tube does not output the drain voltage to the drain of the power device.

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