A method for preparing an InAlAs avalanche photodetector based on secondary epitaxy

Abstract

The invention discloses a preparation method of an InAlAs avalanche photodetector based on secondary epitaxy, comprising the following steps: sequentially growing a buffer layer, an absorption layer, a bandwidth gradient layer, a charge control layer, a multiplication layer, an etching cutoff layer and a cap layer on a substrate; then etching the cap layer to form a central collector region and an electric field protection ring surrounding the central collector region, and stopping the etching at the upper surface of the etching cutoff layer; then performing secondary epitaxy to generate an InP barrier layer in the etched region, and then forming a ring-shaped SiO2 isolation layer on the InP barrier layer outside the electric field protection ring, and then depositing an optical anti-reflection film, and opening a metal contact window on the optical anti-reflection film above the n-type InP central collector region; then using photoresist to form an upper electrode and a metal bonding plate, the upper electrode contacts the central collector region through the metal contact window, and an optical incident window is provided on the upper electrode, and the optical incident window is above the central collector region.

Description

Technical Field

[0001] The invention belongs to the technical field of photoelectric detectors, and in particular relates to a method for preparing an InAlAs avalanche photoelectric detector based on secondary epitaxy. Background Art

[0002] The working principle of the avalanche photodetector is to use the pin junction under a high reverse bias electric field. Photons are incident on the i region to cause electrons to jump from the valence band to the conduction band, forming electron-hole pairs. Under the action of the strong electric field, the electron-hole pairs are accelerated, collide with other atoms, and generate additional electron-hole pairs and continue to occur. Since the incidence of fewer photons or even a single photon can trigger the avalanche multiplication process and cause macroscopic current changes, the avalanche photodetector has extremely high sensitivity and detection efficiency, and has very high application prospects in the field of weak light detection and even single photon detection. Compared with traditional silicon-based photodetectors, avalanche photodetectors based on III-V compound semiconductors have higher sensitivity and can perform near-infrared weak light three-dimensional imaging with wavelengths of 1um and above, and have important applications in biochemistry, quantum communication, lidar and other fields.

[0003] Most of the existing avalanche photodetectors are based on a structure with separate absorption layer and multiplication layer (SCAM), in which narrow-bandwidth InGaAs (P) material is used as the light absorption layer and high-bandwidth InP or InAlAs material is used as the multiplication layer. This structure can effectively improve the breakdown voltage of the detector and reduce the tunneling dark current. Among them, compared with InP, the avalanche photodetector using InAlAs material as the multiplication layer has higher photon detection sensitivity, lower noise and lower temperature dependence. However, in the existing avalanche photodetector structure, due to the large bandwidth gap between the absorption layer and the multiplication layer, it is easy to cause photogenerated carriers to accumulate at the interface between the two, thereby reducing the response rate. In addition, the existing avalanche photodetector preparation methods are mainly divided into two types: (1) Table type: The active area is corroded into a cylindrical table, and the upper and lower electrodes are made on the top and bottom of the table respectively to achieve electrical isolation of the p and n regions of the detector. This preparation method can effectively reduce the parasitic capacitance of the detector, thereby improving its response speed, but its process flow is complicated, especially the side walls of the mesa require a special passivation process, and it is easy to cause the dark current of the mesa side walls to increase and the mesa side walls to breakdown, affecting the performance and reliability of the detector; (2) Planar diffusion type: A P-type metal contact layer is formed in a specific area by Zn diffusion, and the undiffused area is semi-insulating or weakly n-type, so that the electrical isolation of the p and n areas of the detector can be achieved without the need for mesa etching. Since mesa etching is not required, this preparation method can reduce the process complexity to a certain extent, and reduce the problems of sidewall leakage current and sidewall breakdown caused by mesa etching. However, Zn diffusion is a process that is difficult to control accurately and has a large degree of variability. The instability of the Zn diffusion process causes inconsistency in the detector and reduces the yield in production. Summary of the invention

[0004] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a method for preparing an InAlAs avalanche photodetector based on secondary epitaxy.

[0005] The present invention is achieved through the following technical solutions:

[0006] A method for preparing an InAlAs avalanche photodetector based on secondary epitaxy comprises the following steps:

[0007] Step 1: Grow a p-type InP buffer layer, In 0.53 Ga 0.47 As absorption layer, In 1-x- y Al x Ga y As bandwidth graded layer, p-type In 0.52 Al 0.48As charge control layer, In 0.52 Al 0.48 As multiplication layer, In x Ga 1-x As y P 1-y Etching the stop layer and the n-type InP cap layer;

[0008] Step 2: Use SiO2 patterned hard mask to etch the n-type InP cap layer by etching. The remaining n-type InP cap layer forms an n-type InP central collector region and an n-type InP electric field protection ring surrounding the n-type InP central collector region. The etching stops at In x Ga 1-x As y P 1-y The upper surface of the cut-off layer is etched; the n-type InP central collector region is circular and located in the middle region, and the n-type InP electric field protection ring surrounds the periphery of the n-type InP central collector region and there is a gap between the two;

[0009] Step 3: using the same SiO2 hard mask pattern as in step 2, a secondary epitaxial InP barrier layer is generated in the etched area described in step 2; after the secondary epitaxy, the SiO2 hard mask is etched away by an etching method to obtain a flat surface, that is, the surfaces of the n-type InP central collector region, the n-type InP electric field protection ring and the secondary epitaxial InP barrier layer are made flush;

[0010] Step 4: depositing a SiO2 layer on the flat surface of the n-type InP central collector region, the n-type InP electric field guard ring and the InP barrier layer obtained in step 3, and then etching away the SiO2 in a part of the region using a photoresist patterned mask, so that a ring-shaped SiO2 isolation layer is formed on the InP barrier layer outside the n-type InP electric field guard ring;

[0011] Step 5: depositing an optical anti-reflection film on the surface of the n-type InP central collector region, the n-type InP electric field protection ring, the InP barrier layer and the SiO2 isolation layer, and opening an annular metal contact window on the optical anti-reflection film above the n-type InP central collector region by etching;

[0012] Step 6: Use photoresist to form the upper electrode metal and metal wire bonding plate pattern, evaporate metal and perform metal stripping to obtain the patterned upper electrode and metal wire bonding plate; the upper electrode contacts the n-type InP central collector region through the metal contact window described in step 5, and anneals to form an ohmic contact; the metal wire bonding plate is located directly above the SiO2 isolation layer; the upper electrode has an optical incident window, and the optical incident window is above the n-type InP central collector region;

[0013] Step 7: After thinning and polishing the back side of the p-type InP substrate, prepare a back electrode on its lower surface and anneal to form an ohmic contact.

[0014] In the above technical solution, the thickness of the p-type InP buffer layer is 0.1-1um, which is used to better match the p-type InP substrate and In 0.53 Ga 0.47 The difference in lattice constants between As absorption layers due to different growth conditions ensures the growth quality of the epitaxial layer.

[0015] In the above technical solution, the In 0.53 Ga 0.47 The thickness of the As absorption layer is 1-5um, and the background doping concentration is less than 1×10 15 / cm 3 This layer is the photogenerated carrier generation layer, and its design purpose is to absorb as much photon energy of 1.0 to 1.7 um as possible.

[0016] In the above technical solution, the In 1-x-y Al x Ga y As bandwidth gradient layer includes N layers of component gradient In 1-x- y Al x Ga y As layer, N is greater than 1, preferably 3 layers, the bandwidth of each layer is between 0.75eV-1.35eV, In 1-x-y Al x Ga y As The bandwidth of each layer of the bandwidth gradient layer increases from bottom to top, from In 0.53 Ga 0.47 The bandwidth of the As absorption layer gradually changes to p-type In 0.52 Al 0.48 The bandwidth of the As charge control layer can effectively reduce the accumulation of photogenerated carriers at the interface.

[0017] In the above technical solution, the p-type In 0.52 Al 0.48 The As charge control layer thickness is 200-500nm and the doping concentration is 6×10 16 / cm 3 The thickness and doping concentration of this layer determine the starting voltage of the detector avalanche effect.

[0018] In the above technical solution, the In 0.52 Al 0.48 The As multiplication layer thickness is 300-800nm, and the background doping concentration is less than 1×10 15 / cm 3 .

[0019] In the above technical solution, the In x Ga 1-x As y P 1-y The thickness of the corrosion cutoff layer is 10-40nm, the bandwidth is 1.25eV, and the In x Ga 1-x As y P 1-y Corrosion cut-off layer to avoid In 0.52 Al 0.48 The As multiplication layer is exposed to air after corrosion and oxidized, which reduces the surface defect density and thus reduces the dark current generated by surface recombination.

[0020] In the above technical solution, the n-type InP electric field guard ring is annular, and the number of the n-type InP electric field guard ring is one or more. If there are multiple n-type InP electric field guard rings, there should also be intervals between the n-type InP electric field guard rings.

[0021] In the above technical solution, the InP barrier layer is semi-insulating or weakly p-type, and forms a reverse-biased PN junction barrier with the adjacent n-type InP central collector region and n-type InP electric field guard ring, thereby achieving electrical insulation between the collector region and other regions.

[0022] In the above technical solution, the thickness of the SiO2 isolation layer is 500nm to 1500nm.

[0023] In the above technical solution, the secondary epitaxy can be performed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

[0024] The advantages and beneficial effects of the present invention are:

[0025] 1. Use In 1-x-y Al x Ga y As bandwidth transition layer, it realizes In 0.53 Ga 0.47 As absorber layer and In 0.52 Al 0.48 The smooth transition of bandwidth between As charge control layers reduces the accumulation of photogenerated carriers and improves the response speed of the detector.

[0026] 2. The n-type InP cap layer is patterned and etched, and the remaining InP cap layer forms a central collector region and an electric field guard ring surrounding the central collector region. The central collector region is used to form an ohmic contact with the upper electrode and also acts as a window layer. The electric field guard ring can effectively reduce the electric field strength at the edge of the collector region, reduce the probability of the detector edge being broken down, and reduce the tunneling dark current at the edge.x Ga 1-x As y P 1-y Corrosion cut-off layer to avoid In 0.52 Al 0.48 After corrosion, the As material is exposed to air and oxidized, which reduces the surface defect density and thus reduces the dark current generated by surface recombination.

[0027] 3. Use selective secondary epitaxy to fill the corroded area with InP. The secondary epitaxial InP barrier layer is semi-insulating or weakly p-type, and forms a reverse-biased PN junction barrier with the remaining part of the adjacent n-type InP cap layer to achieve electrical insulation between the collector area and other areas; in addition, the secondary epitaxial InP barrier layer and the corroded material are both InP substrates, so they are homogeneous epitaxy, so the secondary epitaxy has high crystal quality, reduces the interface defect density, and can effectively reduce leakage current.

[0028] 4. The epitaxial structure adopts a p-type inverted structure with n-type on top, avoiding the use of Zn diffusion process. 0.52 Al 0.48 As charge control layer and In 0.52 Al 0.48 The thickness and doping of the As multiplication layer are precisely controlled by the first epitaxial growth, so there is no problem of detector inconsistency caused by the instability of the Zn diffusion process in the diffusion detector preparation method. At the same time, the detector prepared by the preparation method described in the present invention is a planar structure, and there is no problem of mesa sidewall leakage current and easy breakdown caused by the mesa structure preparation method.

[0029] 5. A 500nm to 1500nm thick SiO2 isolation layer is added between the upper electrode metal bonding plate and the secondary epitaxial InP barrier layer, which effectively reduces the capacitance between the metal bonding plate and the InP barrier layer and improves the response speed of the detector.

[0030] 6. The upper electrode and the metal bonding plate are deposited and patterned at the same time, which simplifies the process flow, saves precious metal consumption, and reduces production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a flow chart of the preparation of the InAlAs avalanche photodetector based on secondary epitaxy of the present invention.

[0032] Figure 2 is a typical IV curve diagram of the avalanche photodetector of the present invention.

[0033] Figure 3 It is a typical CV curve diagram of the avalanche photodetector of the present invention.

[0034] in:

[0035] 1: p-type InP substrate,

[0036] 2: p-type InP buffer layer,

[0037] 3:In 0.53 Ga 0.47 As absorption layer,

[0038] 4: In 1-x-y Al x Ga y As bandwidth gradient layer,

[0039] 5: p-type In 0.52 Al 0.48 As charge control layer,

[0040] 6:In 0.52 Al 0.48 As multiplication layer,

[0041] 7:In x Ga 1-x As y P 1-y Corrosion cut-off layer,

[0042] 8: n-type InP cap layer,

[0043] 9: n-type InP central collector region,

[0044] 10: n-type InP electric field protection ring,

[0045] 11: InP barrier layer,

[0046] 12: SiO2 isolation layer,

[0047] 13: Optical anti-reflection film,

[0048] 14: Metal contact window of optical anti-reflection film,

[0049] 15: upper electrode, 15.1: metal wire bonding board,

[0050] 16: Optical incident window of the upper electrode,

[0051] 17: Back electrode.

[0052] For ordinary technicians in this field, other relevant drawings can be obtained based on the above drawings without any creative work. DETAILED DESCRIPTION

[0053] In order to enable those skilled in the art to better understand the technical solution of the present invention, the technical solution of the present invention is further described below in conjunction with specific embodiments.

[0054] Embodiment 1

[0055] like Figure 1 As shown, a method for preparing an InAlAs avalanche photodetector based on secondary epitaxy comprises the following steps:

[0056] Step 1: sequentially grow a p-type InP buffer layer 2, In 0.53 Ga 0.47 As absorption layer 3, In 1-x-y Al x Ga y As bandwidth gradient layer 4, p-type In 0.52 Al 0.48 As charge control layer 5, In 0.52 Al 0.48 As multiplication layer 6, In x Ga 1-x As y P 1-y The stop layer 7 and the n-type InP cap layer 8 are etched.

[0057] Step 2: Using SiO2 patterned hard mask, the n-type InP cap layer 8 is etched in a specific area by etching. The remaining n-type InP cap layer forms an n-type InP central collector region 9 and an n-type InP electric field protection ring 10 surrounding the n-type InP central collector region. The etching stops at the InP x Ga 1-x As y P 1-y The upper surface of the cut-off layer 7 is etched; the n-type InP central collector region 9 is circular, 1um thick, and located in the middle region; the n-type InP electric field protection ring 10 surrounds the periphery of the n-type InP central collector region 9 and there is a gap between the two; the number of n-type InP electric field protection rings 10 can be one or more (in this embodiment, the number of n-type InP electric field protection rings is one); if there are multiple n-type InP electric field protection rings 10, there must also be a gap between each n-type InP electric field protection ring 10. The secondary epitaxial InP barrier layer is semi-insulating or weakly p-type, and forms a reverse-biased PN junction barrier with the remaining part of the adjacent n-type InP cap layer to achieve electrical insulation between the collector region and other regions; in addition, the secondary epitaxial InP barrier layer and the etched material are both InP substrates, so they belong to homogeneous epitaxy, so the secondary epitaxial crystal quality is high, the defect density of the interface is reduced, and the leakage current can be effectively reduced.

[0058] Step 3: Using the same SiO2 hard mask pattern as in step 2, a secondary epitaxial InP barrier layer 11 is generated in the etched area described in step 2; the thickness of the secondary epitaxial InP barrier layer 11 is consistent with the thickness of the InP etched away in step 2; after the secondary epitaxy, the SiO2 hard mask is etched away by etching to obtain a flat surface, that is, the surface of the n-type InP central collector region 9, the n-type InP electric field protection ring 10 and the secondary epitaxial InP barrier layer 11 are made flush. Further, the secondary epitaxy can be performed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

[0059] Step 4: Deposit a SiO2 layer on the flat surface of the n-type InP central collector region 9, the n-type InP electric field guard ring 10 and the InP barrier layer 11 obtained in step 3, and then use a photoresist patterned mask to etch away the SiO2 in a partial area, so that a ring-shaped SiO2 isolation layer 12 is formed on the InP barrier layer 11 outside the n-type InP electric field guard ring 10, and the thickness of the SiO2 isolation layer 12 is 1um.

[0060] Step 5: Deposit an optical anti-reflection film 13 on the surface of the n-type InP central collector region 9, the n-type InP electric field protection ring 10, the InP barrier layer 11 and the SiO2 isolation layer 12, and use an etching method to open an annular metal contact window 14 on the optical anti-reflection film 13 above the n-type InP central collector region 9.

[0061] Step six: Use photoresist to form the upper electrode metal and metal wire bonding plate patterns, evaporate metal and perform metal stripping to obtain a patterned upper electrode 15 and metal wire bonding plate 15.1; the upper electrode 15 contacts the n-type InP central collector area 9 through the metal contact window 14 described in step five, and annealing forms an ohmic contact; the metal wire bonding plate 15.1 is located directly above the SiO2 isolation layer 12; the upper electrode 15 has an optical incident window 16, and the optical incident window 16 is above the n-type InP central collector area 9.

[0062] Step 7: After thinning and polishing the back side of the p-type InP substrate 1 , a back electrode 17 is prepared on the lower surface thereof and annealed to form an ohmic contact.

[0063] Embodiment 2

[0064] On the basis of the first embodiment, further, the thickness of the p-type InP buffer layer 2 is 0.5 μm, and its function is to better match the p-type InP substrate 1 and the In 0.53 Ga 0.47 The difference in lattice constants between the As absorption layers 3 due to different growth conditions ensures the growth quality of the epitaxial layer. 0.53 Ga0.47 The thickness of the As absorption layer 3 is 2 μm, and the background doping concentration is less than 1×10 15 / cm 3 This layer is a photogenerated carrier generation layer, and its design purpose is to absorb as much photon energy of 1.0 to 1.7 um as possible. 1-x-y Al x Ga y As bandwidth gradient layer 4 includes three layers, and the bandwidths of each layer are 0.85eV, 0.95eV and 1.05eV from bottom to top; the three bandwidth gradient layers are from In 0.53 Ga 0.47 The bandwidth of the As absorption layer 3 gradually changes to the p-type In 0.52 Al 0.48 The bandwidth of the As charge control layer 5 can effectively reduce the accumulation of photogenerated carriers at the interface. 0.52 Al 0.48 The As charge control layer 5 has a thickness of 300 nm and a doping concentration of 6×10 16 / cm 3 The thickness and doping concentration of this layer determine the starting voltage of the detector avalanche effect. 0.52 Al 0.48 The As multiplication layer 6 has a thickness of 500 nm and a background doping concentration of less than 1×10 15 / cm 3 . x Ga 1-x As y P 1-y The thickness of the etching stop layer 7 is 20 nm and the bandwidth is 1.25 eV. x Ga 1-x As y P 1-y Corrosion stop layer 7 to avoid In 0.52 Al 0.48 After being etched, the As multiplication layer 6 is exposed to air and oxidized, which reduces the surface defect density and thus reduces the dark current generated by surface recombination.

[0065] Embodiment 3

[0066] On the basis of Example 1, further speaking, the n-type InP central collector region 9 adopts Si in-situ heavy doping, and the n-type InP electric field protection ring 10 is a circular ring with a width of 10um (that is, the difference between the inner diameter and the outer diameter of the n-type InP electric field protection ring is 10um), and the spacing between the n-type InP central collector region 9 is 15um. The electric field protection ring 10 can effectively reduce the edge electric field of the n-type InP central collector region 9, thereby reducing the probability of edge breakdown and reducing the tunneling dark current.

[0067] See attached Figure 2 , which is a typical IV curve of the prepared avalanche photodetector. In the figure, a is the reverse photocurrent value curve corresponding to different voltage values, and b is the reverse dark current value curve corresponding to different voltage values. It can be seen that the dark current of the prepared avalanche photodetector is still within 1nA near the breakdown voltage, which is much smaller than the typical dark current value of the tabletop avalanche photodetector (>10nA).

[0068] See attached Figure 3 , which is a typical CV curve of the prepared avalanche photodetector. It can be seen that the capacitance value of the prepared avalanche photodetector under the working voltage is very small, making it suitable for use in ultra-high-speed photodetection.

[0069] The present invention is described above by way of example. It should be noted that, without departing from the core of the present invention, any simple deformation, modification or other equivalent replacement that can be made by those skilled in the art without inventive effort falls within the protection scope of the present invention.

Claims

1. A method for preparing an InAlAs avalanche photodetector based on secondary epitaxy, characterized in that: The following steps are involved: Step 1: Grow a p-type InP buffer layer, In 0.53 Ga 0.47 As absorption layer, In 1-x-y Al x Ga y As bandwidth graded layer, p-type In 0.52 Al 0.48 As charge control layer, In 0.52 Al 0.48 As multiplication layer, In x Ga 1-x As y P 1-y Etching the stop layer and the n-type InP cap layer; Step 2: Use SiO2 patterned hard mask to etch the n-type InP cap layer by etching. The remaining n-type InP cap layer forms an n-type InP central collector region and an n-type InP electric field protection ring surrounding the n-type InP central collector region. The etching stops at In x Ga 1-x As y P 1-y The upper surface of the cut-off layer is etched; the n-type InP central collector region is circular and located in the middle region, and the n-type InP electric field protection ring surrounds the periphery of the n-type InP central collector region and there is a gap between the two; Step 3: Using the same SiO2 hard mask pattern in step 2, a secondary epitaxial InP barrier layer is generated in the etched area in step 2; after the secondary epitaxy, the SiO2 hard mask is etched away by an etching method to obtain a flat surface, that is, the surface of the n-type InP central collector region, the n-type InP electric field protection ring and the secondary epitaxial InP barrier layer are made flush; Step 4: depositing a SiO2 layer on the flat surface of the n-type InP central collector region, the n-type InP electric field guard ring and the InP barrier layer obtained in step 3, and then etching away the SiO2 in a part of the region using a photoresist patterned mask, so that a ring-shaped SiO2 isolation layer is formed on the InP barrier layer outside the n-type InP electric field guard ring; Step 5: depositing an optical anti-reflection film on the surface of the n-type InP central collector region, the n-type InP electric field protection ring, the InP barrier layer and the SiO2 isolation layer, and opening an annular metal contact window on the optical anti-reflection film above the n-type InP central collector region by etching; Step 6: Use photoresist to form the upper electrode metal and metal wire bonding plate pattern, evaporate metal and perform metal stripping to obtain the patterned upper electrode and metal wire bonding plate; the upper electrode contacts the n-type InP central collector region through the metal contact window described in step 5, and anneals to form an ohmic contact; the metal wire bonding plate is located directly above the SiO2 isolation layer; the upper electrode has an optical incident window, and the optical incident window is above the n-type InP central collector region; Step 7: After thinning and polishing the back side of the p-type InP substrate, prepare a back electrode on its lower surface and anneal to form an ohmic contact.

2. The method for preparing an InAlAs avalanche photodetector based on secondary epitaxy according to claim 1, characterized in that: The thickness of the p-type InP buffer layer is 0.1-1um. 0.53 Ga 0.47 The thickness of the As absorption layer is 1-5um, and the background doping concentration is less than 1×10 15 / cm 3 This layer is the photogenerated carrier generation layer, which is used to absorb the photon energy of 1.0~1.7um.

3. The method for preparing an InAlAs avalanche photodetector based on secondary epitaxy according to claim 1, characterized in that: In 1-x-y Al x Ga y As bandwidth gradient layer includes N layers of component gradient In 1-x-y Al x Ga y As layer, N is greater than 1, and the bandwidth of each layer is between 0.75eV and 1.35eV. 1-x-y Al x Ga y The bandwidth of each layer of the As bandwidth gradient layer increases from bottom to top, starting from In 0.53 Ga 0.47 The bandwidth of the As absorption layer gradually changes to the p-type In 0.52 Al 0.48 As the bandwidth of the charge control layer, reduces the accumulation of photogenerated carriers at the interface.

4. The method for preparing an InAlAs avalanche photodetector based on secondary epitaxy according to claim 1, characterized in that: The p-type In 0.52 Al 0.48 The As charge control layer thickness is 200-500nm and the doping concentration is 6×10 16 / cm 3 .

5. The method for preparing an InAlAs avalanche photodetector based on secondary epitaxy according to claim 1, characterized in that: In 0.52 Al 0.48 The As multiplication layer thickness is 300-800nm, and the background doping concentration is less than 1×10 15 / cm 3 .

6. The method for preparing an InAlAs avalanche photodetector based on secondary epitaxy according to claim 1, characterized in that: In x Ga 1-x As y P 1-y The thickness of the corrosion cutoff layer is 10-40nm, the bandwidth is 1.25eV, and the In x Ga 1-x As y P 1-y Corrosion cut-off layer to avoid In 0.52 Al 0.48 The As multiplication layer is exposed to air after corrosion and oxidizes, which reduces the surface defect density and the dark current generated by surface recombination.

7. The method for preparing an InAlAs avalanche photodetector based on secondary epitaxy according to claim 1, characterized in that: The n-type InP electric field guard ring is in a circular ring shape, and the number of the n-type InP electric field guard ring is one or more. If there are multiple n-type InP electric field guard rings, there should also be intervals between the n-type InP electric field guard rings.

8. The method for preparing an InAlAs avalanche photodetector based on secondary epitaxy according to claim 1, characterized in that: The InP barrier layer is semi-insulating or weakly p-type, and forms a reverse-biased PN junction barrier with the adjacent n-type InP central collector region and n-type InP electric field guard ring.

9. The method for preparing an InAlAs avalanche photodetector based on secondary epitaxy according to claim 1, characterized in that: The thickness of the SiO2 isolation layer is 500nm to 1500nm.

10. The method for preparing an InAlAs avalanche photodetector based on secondary epitaxy according to claim 1, characterized in that: The secondary epitaxial growth of the InP barrier layer adopts metal organic chemical vapor deposition or molecular beam epitaxy.

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