A power waveform generator with four-quadrant feedback loop and a control method thereof

Abstract

The application provides a power waveform generator with a four-quadrant feedback loop and a control method thereof. The generator is controlled by a user through a host computer and a graphical interface to output a first control signal and a second control signal. The first control signal is input to an FPGA+ARM main control board, parsed into secondary instructions and sent to an auxiliary FPGA, and then used to control a digital-to-analog converter to generate a digital-to-analog converted signal and output the signal to a four-quadrant analog feedback loop to generate an arbitrary waveform signal. The second control signal is directly used to control a bias adjustment circuit to output a suitable bias signal to the four-quadrant analog feedback loop. The four-quadrant analog feedback loop superimposes and processes the received signal to output a voltage and current signal to a bit number expansion circuit, and further drives an operational amplifier bootstrap network to generate a voltage drive waveform, and then generates an arbitrary-shaped power waveform through a push-pull output network.

Description

Technical Field

[0001] This invention relates to the field of programmable power supply technology, and more specifically, to a power waveform generator with a four-quadrant feedback loop and its control method. Background Technology

[0002] In the measurement of semiconductor devices, sometimes to meet specific needs or measure special parameters, it is necessary to introduce a signal with a special waveform in addition to the common DC signal. A common approach is to use a signal generator to produce the required signal, then output this signal to a power amplifier, and finally output this powered signal to the device under test. However, this method requires multiple instruments, and the accuracy of the waveform is often limited by the signal-to-noise ratio of the signal generator and power amplifier themselves, making it unsuitable for high-speed automated measurement.

[0003] A prior art patent discloses a dual negative feedback loop four-quadrant V / I source measurement unit board based on CPCI bus. This patent includes a CPCI bus module, an FPGA module, an ADC module, a DAC module, a relay control module, a power supply module, and a dual negative feedback loop module. The CPCI bus module is the board system bus, connecting the host computer and the FPGA module, and is used for control and data exchange by the host computer. The FPGA module includes a CPCI bus bridge IP core, an ADC module control IP core, and a DAC module control IP core. The relay control module is used to switch the voltage-current measurement and current-voltage measurement circuit functions of the dual negative feedback loop. The dual negative feedback loop module includes a voltage source and current measurement negative feedback loop and a current source and voltage measurement negative feedback loop. The board provided by this invention can operate in all four quadrants, has a V / I source that meets the requirements of two-port testing, and the source can float, meeting the requirements of industrial automation testing. Existing technology also discloses a patent for a high-precision four-quadrant source carrier device. This device includes a power amplifier pair consisting of one NPN bipolar transistor and one PNP bipolar transistor, with both bipolar transistors using the same control baseline. The control baseline is connected to a three-stage amplifier circuit, using an NPN transistor 2SC1845 and a PNP transistor 2SA992 as the first-stage power amplifier circuit, an NPN transistor 2SC4027 and a PNP transistor 2SA1552 as the second and third-stage power amplifier circuits, and two 1N4148 diodes as modulation diodes for the main control signal. It achieves bidirectional voltage and current output and a four-quadrant operating mode that combines output power and absorption power; the diode control modulation scheme controls the power control transistor, achieving continuous zero-crossing output; and the soft-switching control scheme ensures the reliability and safety of the device.

[0004] Existing four-quadrant source carriers or source measurement units have shortcomings in that they can only generate stable DC levels and currents, with insufficient accuracy, relatively high noise, and fail to cover functions such as source carriers that can achieve arbitrary power waveforms. However, there is often a complex contradiction between DC performance and arbitrary waveform performance, requiring complex circuit design, presenting technical difficulties, and incurring high costs. Summary of the Invention

[0005] This invention provides a power waveform generator with a four-quadrant feedback loop, which solves the shortcomings of existing four-quadrant source load or source measurement units in DC performance.

[0006] Another object of the present invention is to provide a control method for the power waveform generator with a four-quadrant feedback loop as described above.

[0007] To achieve the above-mentioned technical effects, the technical solution of the present invention is as follows:

[0008] A power waveform generator with a four-quadrant feedback loop includes a switching power supply module, a power amplifier module, a four-quadrant feedback loop, a digital signal processing and control circuit, and a host computer system. The switching power supply module is connected to and supplies power to the power amplifier module, the four-quadrant feedback loop, and the digital signal processing and control circuit. The four-quadrant feedback loop and the digital signal processing and control circuit are also connected to the host computer system. The four-quadrant feedback loop is also connected to the power amplifier module and the digital signal processing and control circuit.

[0009] Furthermore, the switching power supply module includes a sine wave generation circuit, a spectrum elimination and frequency multiplication circuit, and a push-pull switching power supply and power filter connected in sequence; the switching power supply module is connected to the power amplifier module, the four-quadrant feedback loop, and the digital signal processing and control circuit through the push-pull switching power supply and power filter.

[0010] Furthermore, the power amplification module includes a bias adjustment circuit, a four-quadrant analog feedback loop, and a sampling conditioning circuit. The four-quadrant analog feedback loop is connected to the bias adjustment circuit and the sampling conditioning circuit, respectively. The bias adjustment circuit is also connected to the host computer system, the four-quadrant analog feedback loop is also connected to the digital signal processing and control circuit, and the sampling conditioning circuit is also connected to the power amplification module.

[0011] Furthermore, the power amplification module includes a bit expansion circuit, an operational amplifier bootstrap network, and a push-pull output network connected in sequence; the bit expansion circuit is also connected to a four-quadrant analog feedback loop, the operational amplifier bootstrap network is also connected to a sampling conditioning circuit, and the push-pull output network outputs a power signal.

[0012] Furthermore, the digital signal processing and control circuit includes an analog-to-digital converter, a digital-to-analog converter, an auxiliary FPGA, and an FPGA+ARM main control board connected in sequence; the digital-to-analog converter is also connected to a four-quadrant analog feedback loop, the analog-to-digital converter is also connected to a sampling and conditioning circuit, and the FPGA+ARM main control board is also connected to a host computer system.

[0013] Furthermore, the sine wave generating circuit generates a sine wave driving signal, which, after being superimposed on the frequency-multiplied waveform of the driving signal generated by the spectrum elimination and frequency multiplication circuit, drives the push-pull switching power supply and power filter to provide power to the power amplifier module, the four-quadrant feedback loop, and the digital signal processing and control circuit.

[0014] Furthermore, the host computer system is controlled by the user to output a first control signal and a second control signal respectively. The first control signal is input to the FPGA+ARM main control board, and the instruction is parsed into a secondary instruction and sent to the auxiliary FPGA. The FPGA then controls the digital-to-analog converter to generate a digital-to-analog converted signal, which is output to the four-quadrant analog feedback loop to generate a waveform signal. The second control signal directly controls the bias adjustment circuit and outputs a bias signal to the four-quadrant analog feedback loop.

[0015] Furthermore, the four-quadrant analog feedback loop processes the received signals by superimposing them and outputs voltage and current signals to the bit extension circuit, which in turn drives the operational amplifier bootstrap network to generate a voltage drive waveform, and then generates a power waveform through the push-pull output network.

[0016] Furthermore, the operational amplifier bootstrap network outputs a sampling signal to the sampling conditioning circuit. The sampling conditioning circuit sends the signal back to the four-quadrant analog feedback loop to complete the loop feedback, and on the other hand, it flows into the analog-to-digital converter to perform analog-to-digital conversion, inputting the data to the FPGA+ARM main control board, and then sending it to the host computer system.

[0017] A control method for a power waveform generator with a four-quadrant feedback loop includes the following steps:

[0018] S1: The sine wave generation circuit generates a sine wave drive signal. The superimposed signal of the frequency-multiplied waveform of the drive signal generated by the spectrum elimination and frequency multiplication circuit drives the push-pull switching power supply and power filter to provide power to the power amplifier module, four-quadrant feedback loop and digital signal processing and control circuit.

[0019] S2: The host computer system is controlled by the user to output a first control signal and a second control signal. The first control signal is input to the FPGA+ARM main control board and the instruction is parsed into a secondary instruction and sent to the auxiliary FPGA. The auxiliary FPGA then controls the digital-to-analog converter to generate a digital-to-analog converted signal, which is output to the four-quadrant analog feedback loop to generate a waveform signal. The second control signal directly controls the bias adjustment circuit and outputs a bias signal to the four-quadrant analog feedback loop.

[0020] S3: The four-quadrant analog feedback loop processes the received signals by superimposing them and outputs voltage and current signals to the bit extension circuit, which further drives the operational amplifier bootstrap network to generate a voltage drive waveform, and then generates a power waveform through the push-pull output network.

[0021] S4: The operational amplifier bootstrap network outputs a sampling signal to the sampling conditioning circuit. The sampling conditioning circuit sends the signal back to the four-quadrant analog feedback loop to complete the loop feedback. On the other hand, it flows into the analog-to-digital converter to perform analog-to-digital conversion, inputs the data to the FPGA+ARM main control board, and then sends it to the host computer system.

[0022] Compared with the prior art, the beneficial effects of the technical solution of the present invention are:

[0023] This invention, through a host computer and a graphical interface, allows the user to control the output of a first control signal and a second control signal. The first control signal is input to the FPGA+ARM main control board, parsed into secondary instructions, and sent to the auxiliary FPGA. This further controls the digital-to-analog converter (DAC) to generate a converted signal, which is then output to a four-quadrant analog feedback loop to produce an arbitrary waveform signal. The second control signal directly controls the bias adjustment circuit, outputting a suitable bias signal to the four-quadrant analog feedback loop. The four-quadrant analog feedback loop processes the received signals and outputs voltage and current signals to the bit extension circuit, which further drives the operational amplifier bootstrap network to generate a voltage-driven waveform. This waveform, in turn, generates an arbitrary power waveform through a push-pull output network. Simultaneously, the operational amplifier bootstrap network outputs a sampling signal to the sampling conditioning circuit. The sampling conditioning circuit, on one hand, sends the signal back to the four-quadrant analog feedback loop to complete the loop feedback; on the other hand, it flows into the DAC for analog-to-digital conversion, inputting the data to the FPGA+ARM main control board and then sending it to the host computer. This effectively solves the shortcomings of existing four-quadrant source load or source measurement units in DC performance and the lack of functionality in generating arbitrary power waveforms. Attached Figure Description

[0024] Figure 1 This is a system block diagram of the power waveform generator with a four-quadrant feedback loop in this invention;

[0025] Figure 2This is a schematic diagram of the switching power supply circuit in an embodiment of the present invention;

[0026] Figure 3 This is a schematic diagram of the bootstrap circuit and feedback circuit of the low-noise power amplifier module in an embodiment of the present invention;

[0027] Figure 4 This is a schematic diagram of a four-quadrant feedback loop in an embodiment of the present invention;

[0028] Figure 5 This is a schematic diagram of a high-resolution arbitrary waveform generator circuit in an embodiment of the present invention;

[0029] Figure 6 This is a schematic diagram of the bias adjustment structure in an embodiment of the present invention;

[0030] Figure 7 This is a schematic diagram of the ADC sampling feedback circuit in an embodiment of the present invention. Detailed Implementation

[0031] The accompanying drawings are for illustrative purposes only and should not be construed as limiting the scope of this patent.

[0032] To better illustrate this embodiment, some parts in the accompanying drawings may be omitted, enlarged, or reduced, and do not represent the actual product dimensions;

[0033] It will be understood by those skilled in the art that certain well-known structures and their descriptions may be omitted in the accompanying drawings.

[0034] The technical solution of the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0035] Example 1

[0036] like Figure 1 As shown, a power waveform generator with a four-quadrant feedback loop includes a switching power supply module 1, a power amplifier module 2, a four-quadrant feedback loop 3, a digital signal processing and control circuit 4, and a host computer system 5. The switching power supply module 1 is connected to and supplies power to the power amplifier module 2, the four-quadrant feedback loop 3, and the digital signal processing and control circuit 4. The four-quadrant feedback loop 3 and the digital signal processing and control circuit 4 are also connected to the host computer system 5. The four-quadrant feedback loop 3 is also connected to the power amplifier module 2 and the digital signal processing and control circuit 4.

[0037] The switching power supply module 1 includes a sine wave generation circuit 6, a spectrum elimination and frequency multiplication circuit 7, and a push-pull switching power supply and power filter 8 connected in sequence; the switching power supply module 1 is connected to the power amplifier module 2, the four-quadrant feedback loop 3, and the digital signal processing and control circuit 4 through the push-pull switching power supply and power filter 8.

[0038] The function of the switching power supply module 1 is to provide a low-noise voltage source. The overall power supply architecture is a push-pull switching power supply. The implementation method is to add a power filter at the output terminal. The cutoff frequency is the driving frequency. Attenuation at the cutoff frequency exceeds 60dB. The MOSFET driving waveform is generated by using a DAC to generate a driving frequency, usually a 100kHz sine wave. After passing through a frequency multiplier circuit, a multiplied frequency signal based on the fundamental frequency is generated. After being mixed by a low-pass filter, it drives the MOSFET.

[0039] The power amplifier module 2 includes a bit expansion circuit 11, an operational amplifier bootstrap network 17, and a push-pull output network 18 connected in sequence. The bit expansion circuit 11 is also connected to a four-quadrant analog feedback loop 10, the operational amplifier bootstrap network 17 is also connected to a sampling conditioning circuit 12, and the push-pull output network 18 outputs a power signal.

[0040] The low-noise power amplifier module 2 with a high-resolution arbitrary waveform generator is designed to amplify a low-noise arbitrary waveform. Its core is a bootstrap circuit based on an operational amplifier and a positive and negative feedback network. This allows a low-voltage precision operational amplifier to output voltages of up to 200V or higher. Furthermore, a push-pull current amplification structure enhances the current output capability, ultimately achieving a voltage output of over 200V and a current output of over 1A. Using this power amplifier module 3, the high-resolution arbitrary waveform generator, under the control of the host computer, generates a high-resolution arbitrary signal waveform, drives the feedback loop, and finally outputs an arbitrary waveform with power.

[0041] The four-quadrant feedback loop 3 includes a bias adjustment circuit 9, a four-quadrant analog feedback loop 10, and a sampling conditioning circuit 12. The four-quadrant analog feedback loop 10 is connected to the bias adjustment circuit 9 and the sampling conditioning circuit 12, respectively. The bias adjustment circuit 9 is also connected to the host computer system 5. The four-quadrant analog feedback loop 10 is also connected to the digital signal processing and control circuit 4. The sampling conditioning circuit 12 is also connected to the power amplifier module 2.

[0042] The function of the four-quadrant feedback loop 3 is to construct a feedback network with a high response speed to realize real-time current and voltage control of the four quadrants of the linear power supply. Its core is a feedback loop composed of four high-bandwidth, low-noise precision operational amplifiers and four diodes, as well as a sampling feedback circuit composed of a 24-bit high-speed ADC, a pre-amplifier input protection circuit, a three-operation amplifier input structure, and an anti-aliasing filter.

[0043] The digital signal processing and control circuit 4 includes an analog-to-digital converter 14, a digital-to-analog converter 13, an auxiliary FPGA 15, and an FPGA+ARM main control board 16 connected in sequence. The digital-to-analog converter 13 is also connected to a four-quadrant analog feedback loop 10, the analog-to-digital converter 14 is also connected to a sampling and conditioning circuit 12, and the FPGA+ARM main control board 16 is also connected to a host computer system 5.

[0044] The functions of the host computer system 5 include quick mode setting, setting or limiting voltage and current according to the mode, setting specific waveforms and corresponding parameters according to the mode, and integrating frequency domain analysis functions to draw curves, perform spectrum analysis, and calculate maximum and minimum values ​​of the acquired data.

[0045] like Figure 2 As shown, the switching power supply module 1 generates a 100kHz sine wave through the sine wave generation circuit 6, which enters the spectrum elimination and frequency multiplication circuit 7 to generate multiple 100kHz integer frequency multiplication waveforms. These waveforms are filtered out of the frequency band noise by the push-pull switching power supply and power filter 8 (including low-pass filter, push-pull switching power supply and power filter circuit) and then mixed. The energy is coupled through the transformer to output the corresponding voltage and finally output a low noise voltage.

[0046] The core of the switching power supply module 1 is the bootstrap circuit of the operational amplifier and the positive and negative feedback networks, including a low-voltage precision operational amplifier A1, a positive high-voltage power supply HV+, a negative high-voltage power supply HV-, proportional resistors R1 and R2, an NMOS transistor Q1, a PMOS transistor Q2, a non-inverting proportional resistor R4 and R5, an inverting proportional resistor R3, Zener diodes ZD1 and ZD2, and a signal source Vs1. The specific connection method is as follows: Figure 3 As shown.

[0047] In this circuit, the negative feedback is stronger than the positive feedback, and its voltage analysis can still be performed as a case of deep negative feedback. The maximum output voltage is Vmax = Vs1max / R4*R5. The Zener diodes ZD1 and ZD2 in this circuit have Zener values ​​that are close to half of the maximum voltage rail of the op-amp when it is working normally. These Zener diodes can ensure that the voltage difference across A1 is within the allowable range of the op-amp. Assuming the output voltage is V0, the voltages across the op-amp are Uout-Uzd+Uthn and Uout+Uzd-Uthp, respectively, where Uthn is the threshold voltage of the NMOS transistor and Uthp is the threshold voltage of the PMOS transistor.

[0048] The four-quadrant feedback loop 3 specifically includes operational amplifiers A1, A2, A3, A4, diodes D1, D2, D3, D4, signal sources Vs1 and Vs2, inverters L1 and L2, and error amplifier A5. The specific connection method is as follows: Figure 4 As shown.

[0049] In this circuit, ±REF is responsible for driving voltage variations. Taking the operation in the first quadrant of +V, +I as an example, VFeedback and IFeedback are respectively transmitted via... Figure 7The sampling circuit shown samples the current output voltage and current, performs addition operations at operational amplifiers A1 and A3 respectively, and drives A5. Finally, when the voltage reaches the set value, D1 and D3 turn on, and A5 is no longer driven by ±REF. The operating principle of the other quadrants is similar, so that the entire power generator system can work in any of the four quadrants.

[0050] like Figure 5 As shown in the circuit structure, the sine wave generation circuit 6 includes a 16-bit DAC1, DAC2, a precision resistor array, an operational amplifier A1, and a precision resistor R1. The entire circuit is an adder. Depending on the number of bits to be expanded, the resistance value of the precision resistor array should be a power of 2 (number of bits expanded - 16). Taking a 24-bit expansion with two resistor values ​​of R1 and 256*R1 as an example, the final voltage output of the operational amplifier is:

[0051]

[0052] like Figure 6 The bias modulation structure in the sine wave generation circuit 6 shown includes a DAC, a precision resistor R1, and an operational amplifier A1. The precision resistor R1 and the operational amplifier A1 form an inverter. The signal output from the DAC is input to the inverter to provide sufficient driving capability. This signal is then input to the feedback loop and the sampling circuit, which is equivalent to providing an additional feedback signal to complete the bias adjustment of the entire structure.

[0053] like Figure 7 The sampling conditioning circuit 12 shown includes a protection circuit, an instrumentation amplifier composed of three operational amplifiers, an anti-aliasing filter, a 24-bit high-speed ADC, and surrounding circuitry. The sampled signal first enters the protection circuit, which includes surge protection and overvoltage protection. Then it enters the three operational amplifier structure. In this structure, the first two operational amplifiers use JFET type operational amplifiers to achieve ultra-high impedance input, and the subsequent operational amplifier uses a chopper-stabilized zero-electron operational amplifier to reduce the influence of low-frequency noise such as flicker noise. Next, it enters the anti-aliasing filter, which can achieve attenuation of more than 60dB at the ADC's Nyquist sampling frequency. Finally, it enters the 24-bit high-speed ADC to complete signal acquisition.

[0054] According to the above design scheme, the circuit can output a 24-bit power waveform signal with a maximum frequency of 10kHz and a noise floor of less than 10mV. The corresponding ADC is a 24-bit 1M high-speed ADC, which corresponds to a resolution of 5V / 2^24=0.298uV and a noise floor of more than 95dB, which can accurately sample current and voltage values.

[0055] Example 2

[0056] A control method for a power waveform generator with a four-quadrant feedback loop includes the following steps:

[0057] S1: The sine wave generating circuit 6 generates a sine wave driving signal. The superimposed signal of the frequency-multiplied waveform of the driving signal generated by the spectrum elimination and frequency multiplier circuit 7 drives the push-pull switching power supply and power filter 8 to provide power to the power amplifier module 2, the four-quadrant feedback loop 3 and the digital signal processing and control circuit 4.

[0058] S2: The host computer system 5 is controlled by the user to output a first control signal and a second control signal. The first control signal is input to the FPGA+ARM main control board 16, and the instruction is parsed into a secondary instruction and sent to the auxiliary FPGA 15, which further controls the digital-to-analog converter 13 to generate a digital-to-analog converted signal, which is output to the four-quadrant analog feedback loop 10 to generate a waveform signal. The second control signal directly controls the bias adjustment circuit 9 and outputs a bias signal to the four-quadrant analog feedback loop 10.

[0059] S3: The four-quadrant analog feedback loop 10 processes the received signals and outputs voltage and current signals to the bit extension circuit 11, which further drives the operational amplifier bootstrap network 17 to generate a voltage drive waveform, and then generates a power waveform through the push-pull output network 18.

[0060] S4: The operational amplifier bootstrap network 17 outputs a sampling signal to the sampling conditioning circuit 12. The sampling conditioning circuit 12 sends the signal back to the four-quadrant analog feedback loop 10 to complete the loop feedback. On the other hand, it flows into the analog-to-digital converter 14 to perform analog-to-digital conversion, inputs the data to the FPGA+ARM main control board 16, and then sends it to the host computer system 5.

[0061] The same or similar labels correspond to the same or similar parts;

[0062] The positional relationships depicted in the accompanying drawings are for illustrative purposes only and should not be construed as limiting this patent.

[0063] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively describe all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the claims of the present invention.

Claims

1. A power waveform generator with a four-quadrant feedback loop, characterized by, It includes switch power module (1), power amplifier module (2), four quadrant feedback loop (3), digital signal processing and control circuit (4) and host computer system (5); the switch power module (1) is connected with power amplifier module (2), four quadrant feedback loop (3) and digital signal processing and control circuit (4) and power supply for them;Four quadrant feedback loop (3), digital signal processing and control circuit (4) are also connected with host computer system (5) respectively;Four quadrant feedback loop (3) is also connected with power amplifier module (2) and digital signal processing and control circuit (4) respectively; The switch power module (1) includes sine wave generating circuit (6), spectrum rejection and frequency multiplication circuit (7) and push-pull switch power supply and power filter (8) connected in turn;Switch power module (1) is connected to power amplifier module (2), four quadrant feedback loop (3) and digital signal processing and control circuit (4) through push-pull switch power supply and power filter (8).

2. The power waveform generator with four-quadrant feedback loop of claim 1, wherein, The power amplifier module (2) includes bias adjustment circuit (9), four quadrant analog feedback loop (10) and sampling conditioning circuit (12), four quadrant analog feedback loop (10) is connected with bias adjustment circuit (9) and sampling conditioning circuit (12) respectively;The bias adjustment circuit (9) is also connected with host computer system (5), four quadrant analog feedback loop (10) is also connected with digital signal processing and control circuit (4), and sampling conditioning circuit (12) is also connected with power amplifier module (2).

3. The power waveform generator with four-quadrant feedback loop of claim 2, wherein, The power amplifier module (2) includes bit expansion circuit (11), operational amplifier bootstrap network (17) and push-pull output network (18) connected in turn;Bit expansion circuit (11) is also connected with four quadrant analog feedback loop (10), operational amplifier bootstrap network (17) is also connected with sampling conditioning circuit (12), and push-pull output network (18) outputs power signal.

4. The power waveform generator with four-quadrant feedback loop of claim 3, wherein, The digital signal processing and control circuit (4) includes analog-to-digital converter (14), digital-to-analog converter (13), auxiliary FPGA (15) and FPGA+ARM main control board (16) connected in turn;Digital-to-analog converter (13) is also connected with four quadrant analog feedback loop (10), analog-to-digital converter (14) is also connected with sampling conditioning circuit (12), and FPGA+ARM main control board (16) is also connected with host computer system (5).

5. The power waveform generator with four-quadrant feedback loop of claim 4, wherein, The sine wave generating circuit (6) generates sine wave driving signal, and the superposition signal of the frequency multiplication waveform of the driving signal generated by the spectrum rejection and frequency multiplication circuit (7), drives the push-pull switch power supply and power filter (8) to provide power supply for power amplifier module (2), four quadrant feedback loop (3) and digital signal processing and control circuit (4).

6. The power waveform generator with four-quadrant feedback loop of claim 5, wherein, The upper computer system (5) is controlled by a user to output a first control signal and a second control signal respectively, wherein the first control signal is input to the FPGA+ARM main control board (16) and is parsed into secondary instructions to be sent to the auxiliary FPGA (15), further to control the digital-to-analog converter (13) to generate a digital-to-analog converted signal to be output to the four-quadrant analog feedback loop (10) to generate a waveform signal; and the second control signal directly controls the bias adjustment circuit (9) to output a bias signal to the four-quadrant analog feedback loop (10).

7. The power waveform generator with four-quadrant feedback loop of claim 6, wherein, The four-quadrant analog feedback loop (10) superimposes and processes the received signal to output a voltage and current signal to the bit number expansion circuit (11), and further drives the operational amplifier bootstrap network (17) to generate a voltage drive waveform, and then generates a power waveform through the push-pull output network (18).

8. The power waveform generator with four-quadrant feedback loop of claim 7, wherein, The operational amplifier bootstrap network (17) outputs a sampling signal to the sampling conditioning circuit (12), which sends the signal back to the four-quadrant analog feedback loop (10) to complete loop feedback, and on the other hand, flows into the analog-to-digital converter (14) to generate analog-to-digital conversion, inputs data to the FPGA+ARM main control board (16), and then sends to the upper computer system (5).

9. A control method of the power waveform generator with a four-quadrant feedback loop as claimed in claim 8, characterized by, The method comprises the following steps: S1: The sine wave generating circuit (6) generates a sine wave drive signal, and the superimposed signal of the drive signal generated by the frequency spectrum elimination and frequency multiplication circuit (7) generates a frequency multiplication waveform, which drives the push-pull switching power supply and power filter (8) to provide power supply for the power amplification module (2), the four-quadrant feedback loop (3) and the digital signal processing and control circuit (4); S2: The upper computer system (5) is controlled by a user to output a first control signal and a second control signal respectively, wherein the first control signal is input to the FPGA+ARM main control board (16) and is parsed into secondary instructions to be sent to the auxiliary FPGA (15), further to control the digital-to-analog converter (13) to generate a digital-to-analog converted signal to be output to the four-quadrant analog feedback loop (10) to generate a waveform signal; and the second control signal directly controls the bias adjustment circuit (9) to output a bias signal to the four-quadrant analog feedback loop (10); S3: The four-quadrant analog feedback loop (10) superimposes and processes the received signal to output a voltage and current signal to the bit number expansion circuit (11), and further drives the operational amplifier bootstrap network (17) to generate a voltage drive waveform, and then generates a power waveform through the push-pull output network (18); S4: The operational amplifier bootstrap network (17) outputs a sampling signal to the sampling conditioning circuit (12), which sends the signal back to the four-quadrant analog feedback loop (10) to complete loop feedback, and on the other hand, flows into the analog-to-digital converter (14) to generate analog-to-digital conversion, inputs data to the FPGA+ARM main control board (16), and then sends to the upper computer system (5).

Images