A method for manufacturing a smooth groove and a smooth groove structure

Abstract

The present invention provides a method for making a smooth groove and a smooth groove structure, the method comprising: firstly etching the semiconductor wafer through the mask layer using a first dry etching method mainly based on anisotropy to form a groove structure with steep sidewalls and a smooth bottom, then removing the first mask layer, and etching the semiconductor wafer using a second dry etching method mainly based on isotropy without the protection of the mask layer to smooth the top and bottom of the groove, and finally forming a groove with steep sidewalls and smooth top and bottom. Therefore, the groove making method provided by the present invention has simple process steps, can greatly improve process efficiency and save costs, and the smooth groove structure provided by the present invention can not only improve device performance and reliability, but also bring convenience to the subsequent growth and filling process in the groove.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor grooves, and in particular relates to a method for manufacturing a smooth groove and a smooth groove structure. Background Art

[0002] With the widespread application of trench isolation and trench gate structures in semiconductor devices, the impact of trench processes on the performance of semiconductor devices is crucial. For example, due to the high hardness and chemical stability of SiC semiconductor wafers, the trench processes currently used are mostly dry etching processes.

[0003] like Figure 1 As shown in FIG. 1 , the bottom of the groove formed by the existing dry etching process is not smooth enough, and there are micro grooves ( Figure 1 In addition, the entire dry etching process is carried out under the protection of the mask layer. After the mask layer is removed, the top of the trench is a 90-degree right angle, which will bring inconvenience to the subsequent process and affect the performance and reliability of the device. Summary of the invention

[0004] In view of this, the present invention provides a method for manufacturing a smooth groove and a smooth groove structure to solve the problem that the bottom and top of the groove formed by the existing groove process are not smooth enough and thus affect the device performance.

[0005] A method for making a smooth groove, comprising:

[0006] forming a patterned mask layer on a first surface of the semiconductor wafer, wherein the mask layer exposes a groove region of the semiconductor wafer;

[0007] A first dry etching process is performed with the surface of the groove region as an etching starting surface, and the etching mode of the first dry etching process is mainly anisotropic by adjusting the parameters of the first dry etching process, so as to form a groove with steep sidewalls and a smooth bottom in the groove region of the semiconductor wafer,

[0008] removing the mask layer,

[0009] The second dry etching is performed with the first surface as the etching starting surface, and the etching method of the second dry etching process is mainly isotropic etching by adjusting the parameters of the second dry etching process, so that the upper part and the bottom of the groove become a smooth structure.

[0010] Preferably, the step of forming a patterned mask layer on the first surface of the semiconductor wafer comprises:

[0011] performing a deposition process to form a mask layer on the entire first surface,

[0012] A patterned photolithography barrier layer is coated on the surface of the mask layer, wherein the photolithography barrier layer exposes the surface of the mask layer in the groove region.

[0013] The mask layer is patterned by performing a photolithography process on the first surface through the photolithography blocking layer to remove a portion of the mask layer located in the trench region, so that the surface of the trench region is exposed by the mask layer.

[0014] Preferably, the semiconductor wafer is a silicon carbide wafer.

[0015] The mask layer is formed by selecting one of polysilicon, amorphous silicon, aluminum nitride and silicon dioxide.

[0016] Preferably, the steps of using a plasma etcher to perform the first dry etching and adjusting the first dry etching parameters so that the etching method of the first dry etching process is mainly anisotropic include:

[0017] During the first stage, a first group of etching gases is introduced into the reaction chamber of the plasma etcher, and the gas flow rates of various gases in the first group of etching gases are set so as to smooth the boundary area between the bottom of the groove and the sidewall of the groove during the first stage, and during the first stage, the pressure of the reaction chamber is set to a first preset pressure, and the upper electrode power and the lower electrode power of the plasma etcher are set to a first preset power and a second preset power, so that the etching method of the first dry etching is mainly physical etching, so as to form a groove with steep sidewalls during the first stage,

[0018] During the second stage, a second group of reaction gases is introduced into the reaction chamber, and the flow rates of various gases in the second group of reaction gases are set to preset flow rates, the pressure of the reaction chamber is set to a second preset pressure, and the power of the upper electrode and the power of the lower electrode are set to a third preset power and a fourth preset power, so as to round the bottom of the groove during the second stage.

[0019] Wherein, the second preset pressure is greater than the first preset pressure, and the fourth preset power is less than the second preset power.

[0020] Preferably, the first reaction group gas includes sulfur hexafluoride gas and oxygen, the gas flow ratio of the sulfur hexafluoride gas to the oxygen is greater than 1:2 and less than 2:1, the first preset pressure does not exceed 5mTorr, the first preset power is: 800-1200W, and the second preset power is: 300-500W,

[0021] The second group of reaction gases includes octafluorocyclobutene gas and argon gas. The flow rate of the octafluorocyclobutene gas is set to 30-50 sccm, the flow rate of the argon gas is set to 90-110 sccm, the second preset pressure is 8-10 mTorr, the third preset power is 600-800W, and the fourth preset power is 100-300W.

[0022] Preferably, the steps of using the plasma etcher to perform the second dry etching and adjusting the parameters of the second dry etching so that the etching mode of the second dry etching process is mainly isotropic include:

[0023] During the third stage, after removing the mask layer, a third group of etching gases is introduced into the reaction chamber of the plasma etcher, and the gas flow rates of various gases in the third group of etching gases are set, the pressure of the reaction chamber is set to a third preset pressure, and the upper electrode power and the lower electrode power are set to a fifth preset power and a sixth preset power, so as to weaken the effect of physical etching during the third stage, so that the etching method of the second dry etching is mainly chemical etching.

[0024] Preferably, the third group of reaction gases includes sulfur hexafluoride gas, oxygen and helium, wherein the gas flow ratio of sulfur hexafluoride gas to oxygen is greater than 9:1 and less than 11:1.

[0025] The third preset pressure is 20-40 mTorr, and the fifth preset power is 800-1200W.

[0026] Preferably, wet etching is used to remove the mask layer from the first surface, and during the second dry etching process, the entire first surface and the bottom of the trench are etched.

[0027] Preferably, the manufacturing method further comprises: before forming the mask layer, cleaning the semiconductor wafer,

[0028] After the second dry etching process is completed, a sacrificial oxide layer is formed on the first surface and the groove surface, and the sacrificial oxide layer is removed.

[0029] A smooth groove structure formed according to any one of the manufacturing methods described above, wherein the bottom of the groove, the boundary area between the bottom and the side wall of the groove, and the boundary area between the side wall and the first surface are all smooth structures.

[0030] The beneficial effect of the present invention is that the present invention uses two dry etchings to form smooth grooves. First, the semiconductor wafer is etched through the mask layer using the first dry etching mainly based on anisotropy to form a groove structure with steep sidewalls and a smooth bottom. Then, the first mask layer is removed, and without the protection of the mask layer, the semiconductor wafer is etched using the second dry etching mainly based on isotropy to smooth the top and bottom of the groove, and finally a groove with steep sidewalls and smooth top and bottom is formed. Therefore, the groove manufacturing method provided by the present invention has simple process steps, can greatly improve process efficiency and save costs, and the smooth groove provided by the present invention has steep sidewalls and smooth top and bottom, which can not only improve device performance and reliability, but also facilitate the subsequent growth and filling processes in the groove. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 A schematic diagram of a groove structure implemented in the prior art;

[0032] Figure 2 A schematic diagram of a semiconductor wafer structure corresponding to a mask process in a trench manufacturing method provided by the present invention;

[0033] Figure 3 A schematic diagram of a semiconductor wafer structure corresponding to a photolithography barrier layer forming process in a trench manufacturing method provided by the present invention;

[0034] Figure 4 A schematic diagram of a semiconductor wafer structure corresponding to a patterned mask layer process in a trench manufacturing method provided by the present invention;

[0035] Figure 5 A schematic diagram of a semiconductor wafer structure corresponding to the first etching process in the trench manufacturing method provided by the present invention;

[0036] Figure 6 A schematic diagram of a semiconductor wafer structure corresponding to the mask layer removal process in the trench manufacturing method provided by the present invention;

[0037] Figure 7 It is a schematic diagram of the semiconductor wafer structure corresponding to the second etching process in the groove manufacturing method provided by the present invention. DETAILED DESCRIPTION

[0038] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments produced by ordinary technicians in this field without creative work are within the scope of protection of the present invention. In addition, it should be noted that in the specific implementation method, "the..." refers only to the technical attributes or features in the present invention.

[0039] The present invention mainly forms smooth grooves on a semiconductor wafer through two dry etching processes. Before introducing the present invention, the following etching process-related definitions and contents are first introduced.

[0040] Dry etching: It is a technology that uses plasma etcher to etch thin films using plasma, which includes chemical etching and physical etching. Chemical etching is mainly isotropic, while physical etching is mainly anisotropic.

[0041] Chemical etching: When the gas exists in the form of plasma, the chemical activity of the etching gas is much stronger than under normal conditions. Depending on the material being etched, choosing the right gas can react chemically with the material faster.

[0042] Physical etching: Use electric field to guide and accelerate plasma so that it has a certain energy. When it bombards the surface of the etched object, it will knock out the atoms of the etched material, thereby achieving the purpose of etching by physical energy transfer.

[0043] In the etching process of A using the etching process, the a etching method is mainly used, which means that more than half of A etched away in the etching process is caused by the a etching.

[0044] Figure 2-7 The cross-sectional structure diagram of the semiconductor wafer corresponding to each process step in the process of making the rounded groove provided by the present invention is shown below. Figure 2-7 The present invention will be described in detail.

[0045] The method for making a smooth groove provided by the present invention mainly comprises the following steps:

[0046] Step 1: Cleaning the semiconductor wafer. The semiconductor wafer is a SiC wafer in this embodiment, and may be other semiconductor wafers having similar chemical properties to SiC in other embodiments.

[0047] Step 2: forming a patterned mask layer on the first surface of the semiconductor wafer, wherein the mask layer exposes the groove region of the semiconductor wafer.

[0048] Specifically, Figure 2-5As shown, step 2 may further include:

[0049] Step 21: Perform a deposition process to form a mask layer 02 on the entire first surface of the semiconductor wafer 01. Figure 2 As shown, the mask layer 02 covers the entire first surface. The mask layer can be formed by selecting a material selected from polysilicon, amorphous silicon, aluminum nitride, and silicon dioxide.

[0050] Step 22: Apply a patterned photoresist layer 03 on the surface of the mask layer, wherein the photoresist layer 03 exposes the surface of the mask layer 02 in the groove region. The specific structure formed in this step is as follows: Figure 3 shown.

[0051] Step 23: Performing a photolithography process on the first surface through the photolithography stop layer 03, patterning the mask layer 02, and removing the portion of the mask layer 02 located in the groove area, so that the surface of the groove area is exposed by the mask layer 02, and then removing the photolithography stop layer 03. The structure formed in this step is as follows: Figure 4 shown.

[0052] Step 3: Performing a first dry etching process with the surface of the groove region as the etching starting surface, and adjusting the first dry etching parameters so that the etching mode of the first dry etching process is mainly anisotropic, so as to form a groove T with steep sidewalls and a smooth bottom in the groove region of the semiconductor wafer, such as Figure 5 shown.

[0053] The first dry etching process includes a first stage and a second stage. During the first stage, a first group of etching gases is introduced into the reaction chamber of the plasma etching machine, and the gas flow rates of various gases in the first group of etching gases are set to round the boundary area between the bottom of the groove and the sidewall of the groove during the first stage. During the first stage, the pressure of the reaction chamber is set to a first preset pressure, and the upper electrode power and the lower electrode of the plasma etching machine are set to a first preset power and a second preset power, so that the etching method of the first dry etching is mainly physical etching, so as to form a groove with steep sidewalls during the first stage. During the second stage, a second group of reaction gases is introduced into the reaction chamber, and the flow rates of various gases in the second group of reaction gases are set to preset flow rates, the pressure of the reaction chamber is set to a second preset pressure, and the power of the upper electrode and the power of the lower electrode are set to a third preset power and a fourth preset power, so as to round the bottom of the groove during the second stage, wherein the second preset pressure is greater than the first preset pressure, and the fourth preset power is less than the second preset power.

[0054] Specifically, in accordance with an embodiment of the present invention, during the first stage, SF6 (sulfur hexafluoride) and O2 (oxygen) gases are first used as reaction gases, and the flow ratio of the two gases is set to be greater than 1:2 and less than 2:1, for example, it can be set to 1:1 (SF6:O2=1:1), and the pressure of the reaction chamber is set within 5mTorr (first preset pressure), the upper electrode power is set to: 800-1200W (first preset power), and the lower electrode power is: 300-500W (second preset power). During the first stage, SF6 (sulfur hexafluoride) and O2 (oxygen) gases are used as reaction gases, and the flow ratio of the two gases is set to 1:1, in order to avoid the formation of micro grooves at the junction area between the bottom of the formed groove and the side wall, and the lower electrode power is greater than 300W, in order to enhance physical etching, so that physical etching is mainly used during the first stage to obtain a groove with a steep side wall.

[0055] In the second stage, C4F8 (octafluorocyclobutene) and Ar (argon) are used as reaction gases, wherein the flow rate of C4F8 can be 30-50sccm, and the flow rate of Ar can be 90-110sccm. In this embodiment, the flow rate of C4F8 is 40, and the flow rate of Ar is 100sccm. The second preset pressure is set to 8-10mTorr, the third preset power is: 600-800W, and the fourth preset power is: 100-300W. During the second stage, a gas with more etching by-products is used as a reaction gas, and the pressure of the reaction chamber is increased, and the lower electrode is reduced, so that the bottom of a smooth groove can be obtained.

[0056] Step 4: removing the mask layer 02. In this embodiment, the mask layer 02 is removed from the first surface by wet etching. The semiconductor wafer structure after removing the mask layer is as follows: Figure 6 As shown, the junction between the sidewall of the trench T and the first surface is exposed.

[0057] Step 5: Perform a second dry etching process using the first surface as the etching starting surface, and adjust the parameters of the second dry etching process so that the etching method of the second dry etching process is mainly isotropic etching, so that the upper and bottom parts of the trench T become smooth structures. Figure 7 As shown, the bottom of the trench T, the junction area between the bottom and the sidewall of the trench, and the junction area between the sidewall and the first surface are all smooth structures.

[0058] Step 7 uses SF6 (sulfur hexafluoride), O2 (oxygen) and He (helium) as a group of reaction gases, wherein the flow rate ratio of SF6 to O2 is greater than 11:1 and less than 9:1, for example, the ratio of the two is 10:1. The third preset pressure of the reaction chamber is set to 20-40mTorr, the fifth preset power is: 800-1200W, and the sixth preset power is: 0W. In step 7, the etching gas is mainly SF6 to react with the SiC wafer, and the lower electrode power is set to zero in order to weaken the physical etching effect, so that step 7 is mainly chemical etching. Since the mask is completely removed at this time, the top and bottom of the groove are exposed, so that the effect of smooth top and bottom can be achieved. By adjusting the second etching time and etching rate, top and bottom grooves with different smooth radii can be obtained.

[0059] Step 6: forming a sacrificial oxide layer on the first surface and the groove surface, and removing the sacrificial oxide layer to eliminate damage to the semiconductor wafer caused by the first dry etching and the second dry etching, and reducing the surface roughness of the groove.

[0060] According to FIG7 of the rounded groove structure provided by the present invention, the bottom of the groove, the boundary area between the bottom and the side wall of the groove, and the boundary area between the side wall and the first surface are all rounded structures.

[0061] The present invention uses two dry etchings to form a smooth groove. First, the semiconductor wafer is etched through the mask layer using a first dry etching method based on anisotropy to form a groove structure with steep sidewalls and a smooth bottom. Then, the first mask layer is removed, and without the protection of the mask layer, the semiconductor wafer is etched using a second dry etching method based on isotropy to smooth the top and bottom of the groove, and finally a groove with steep sidewalls and smooth top and bottom is formed. Therefore, the groove manufacturing method provided by the present invention has simple process steps, can greatly improve process efficiency and save costs, and the smooth groove provided by the present invention has steep sidewalls and smooth top and bottom, which can not only improve device performance and reliability, but also facilitate the subsequent growth and filling processes in the groove.

[0062] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. According to the above description, many modifications and changes can be made. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. A method for making a smooth groove, characterized in that: include: forming a patterned mask layer on a first surface of the semiconductor wafer, wherein the mask layer exposes a groove region of the semiconductor wafer; A first dry etching process is performed with the surface of the groove region as an etching starting surface, and the etching mode of the first dry etching process is mainly anisotropic by adjusting the parameters of the first dry etching process, so as to form a groove with steep sidewalls and a smooth bottom in the groove region of the semiconductor wafer, removing the mask layer, Performing a second dry etching process with the first surface as the etching starting surface, and adjusting the parameters of the second dry etching process so that the etching method of the second dry etching process is mainly isotropic etching, so that the upper part and the bottom of the groove become a smooth structure; The steps of using a plasma etcher to perform the first dry etching and adjusting the first dry etching parameters so that the etching method of the first dry etching process is mainly anisotropic include: During the first stage, a first group of etching gases is introduced into the reaction chamber of the plasma etcher, and the gas flow rates of various gases in the first group of etching gases are set so as to round off the boundary area between the bottom of the groove and the sidewall of the groove during the first stage, and during the first stage, the pressure of the reaction chamber is set to a first preset pressure, and the upper electrode power and the lower electrode power of the plasma etcher are set to a first preset power and a second preset power so that the etching method of the first dry etching is mainly physical etching, so as to form a groove with steep sidewalls during the first stage, During the second stage, a second group of reaction gases is introduced into the reaction chamber, and the flow rates of various gases in the second group of reaction gases are set to preset flow rates, the pressure of the reaction chamber is set to a second preset pressure, and the power of the upper electrode and the power of the lower electrode are set to a third preset power and a fourth preset power, so as to round the bottom of the groove during the second stage. Wherein, the second preset pressure is greater than the first preset pressure, and the fourth preset power is less than the second preset power.

2. The method according to claim 1, characterized in that: The step of forming a patterned mask layer on the first surface of the semiconductor wafer comprises: performing a deposition process to form a mask layer on the entire first surface, A patterned photolithography barrier layer is coated on the surface of the mask layer, wherein the photolithography barrier layer exposes the surface of the mask layer in the groove region. The mask layer is patterned by performing a photolithography process on the first surface through the photolithography blocking layer to remove a portion of the mask layer located in the trench region, so that the surface of the trench region is exposed by the mask layer.

3. The method according to claim 1, characterized in that: The semiconductor wafer is a silicon carbide wafer, The mask layer is formed by selecting one of polysilicon, amorphous silicon, aluminum nitride and silicon dioxide.

4. The method according to claim 3, characterized in that: The first set of etching gases includes sulfur hexafluoride gas and oxygen, the gas flow ratio of the sulfur hexafluoride gas to the oxygen is greater than 1:2 and less than 2:1, the first preset pressure does not exceed 5mTorr, the first preset power is: 800-1200W, and the second preset power is: 300-500W, The second group of reaction gases includes octafluorocyclobutene gas and argon gas. The flow rate of the octafluorocyclobutene gas is set to 30-50 sccm, the flow rate of the argon gas is set to 90-110 sccm, the second preset pressure is 8-10 mTorr, the third preset power is 600-800W, and the fourth preset power is 100-300W.

5. The manufacturing method according to claim 4, characterized in that: The steps of using the plasma etcher to perform the second dry etching and adjusting the parameters of the second dry etching so that the etching method of the second dry etching process is mainly isotropic include: During the third stage, after removing the mask layer, a third group of etching gases is introduced into the reaction chamber of the plasma etcher, and the gas flow rates of various gases in the third group of etching gases are set, the pressure of the reaction chamber is set to a third preset pressure, and the upper electrode power and the lower electrode power are set to a fifth preset power and a sixth preset power, so as to weaken the effect of physical etching during the third stage, so that the etching method of the second dry etching is mainly chemical etching.

6. The method according to claim 5, characterized in that: The third group of etching gases includes sulfur hexafluoride gas, oxygen and helium, wherein the gas flow ratio of sulfur hexafluoride gas to oxygen is greater than 9:1 and less than 11:

1. The third preset pressure is 20-40 mTorr, and the fifth preset power is 800-1200W.

7. The method according to claim 4, characterized in that: The mask layer is removed from the first surface by wet etching, and during the second dry etching process, the entire first surface and the bottom of the trench are etched.

8. The manufacturing method according to claim 1, characterized in that: Also includes: Before forming the mask layer, cleaning the semiconductor wafer, After the second dry etching process is completed, a sacrificial oxide layer is formed on the first surface and the groove surface, and the sacrificial oxide layer is removed.

9. A smooth groove structure formed according to the manufacturing method according to any one of claims 1 to 8, wherein the bottom of the groove, the boundary area between the bottom and the side wall of the groove, and the boundary area between the side wall and the first surface are all smooth structures.

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