A reverse conducting IGBT device

Abstract

The present invention discloses a reverse conducting IGBT device, comprising an IGBT device body, wherein an N++ emitter region of the IGBT device body comprises a first N+ source region and a second N+ source region, wherein the right end of the first N+ source region is connected to the left end of the second N+ source region, and in a cross section of the N++ emitter region, the rear end of the first N+ source region is located between the front end and the rear end of the second N+ source region, and the front end of the second N+ source region is located between the front end and the rear end of the second N+ source region. By converting the existing complete rectangular N++ emitter region into a staggered and intersecting first N+ source region and second N+ source region, the existence of part of the N++ emitter region is eliminated, and when the device operates in an FRD mode, the anode short circuit effect is reduced, thereby avoiding the influence of the channel short circuit effect and improving the performance of the device.

Description

Technical Field

[0001] The present invention relates to the field of power semiconductor devices, and in particular to a reverse conducting IGBT device. Background Art

[0002] In the RC-IGBT (Reverse Conducting IGBT, abbreviated as RC-IGBT) module, the power level of the module can be greatly improved because the anti-parallel FRD is integrated inside the chip. RC-IGBT has the ability of forward conduction and reverse conduction. When forward conducting, RC-IGBT works in IGBT mode, and when reverse conducting, the device works in FRD mode.

[0003] Generally, when an IGBT module is working, an optimized gate control method is used to obtain the lowest power loss. That is, opposite gate voltage signals are provided to the low-voltage side and high-voltage side of the device, and a blanking time is required to ensure that the two switches cannot be turned on at the same time to avoid short circuit of the device.

[0004] For RC-IGBT, when it works in FRD mode, the device gate needs to be grounded or negative gate voltage signal to ensure low FRD on-state loss, because positive gate voltage will cause MOS channel inversion and short circuit with P well (i.e. FRD anode), thus greatly reducing FRD anode hole injection efficiency. When FRD is forward-conducted, the on-state voltage drop V F That is, when the RC-IGBT works in FRD mode, the on-state voltage drop V of the FRD under positive gate voltage and negative gate voltage is F Different, positive gate pressure V F The negative gate voltage is larger, which will lead to an increase in the loss of FRD under positive gate voltage. F The different phenomena we call V F -shift.

[0005] In order to reduce V F -shift, that is, reducing the influence of MOS gate signal on the conduction loss of RC-IGBT working in FRD mode. The traditional approach is to design an adjustable N+ source region to reduce the short-circuit effect. However, this method requires an additional photolithography plate as an implantation mask to form the N+ structure, which increases the process complexity. At the same time, it is also necessary to adjust the channel region doping or cell spacing to adjust the short-circuit circuit capability of the device. Summary of the invention

[0006] The present invention provides a reverse-conducting IGBT device, which does not require adjustment of the cell spacing, reduces the influence of a MOS gate signal on the conduction loss of an RC-IGBT operating in an FRD mode, and reduces the short-circuit effect.

[0007] To solve the above technical problems, the present invention provides a reverse conducting IGBT device, including an IGBT device body, wherein an N++ emitter region of the IGBT device body includes a first N+ source region and a second N+ source region, the right end of the first N+ source region is connected to the left end of the second N+ source region, and in a cross section of the N++ emitter region, the rear end of the first N+ source region is located between the front end and the rear end of the second N+ source region, and the front end of the second N+ source region is located between the front end and the rear end of the second N+ source region.

[0008] The distance between the left and right ends of the first N+ source region is equal to the distance between the left and right ends of the second N+ source region.

[0009] The distances between the front and rear ends of the first N+ source region and the front and rear ends of the second N+ source region are equal.

[0010] The doping concentrations of the first N+ source region and the second N+ source region are equal.

[0011] The width of the intersection of the first N+ source region and the second N+ source region is 1 / 4 to 1 / 3 of the width of the first N+ source region.

[0012] The width of the first N+ source region is 1 / 2 to 2 / 3 of the width of the IGBT device body.

[0013] Among them, the P+ base region of the IGBT device body includes a first P+ base region and a second P+ base region, the right end of the first P+ base region is connected to the left end of the second P+ base region, and in the cross-section of the P+ base region, the front end of the first P+ base region is located between the front end and the rear end of the second P+ base region, and the rear end of the second P+ base region is located between the front end and the rear end of the first P+ base region.

[0014] Among them, the distance between the left and right ends of the first P+ base region is equal to the distance between the left and right ends of the P+ base region, the distance between the front and rear ends of the first P+ base region is equal to the front and rear ends of the second P+ base region, and the doping concentrations of the first P+ base region and the second P+ base region are equal.

[0015] The width of the intersection area between the first P+ base region and the second P+ base region is 1 / 4 to 1 / 3 of the width of the first P+ base region, and the width of the first P+ base region is 1 / 2 to 2 / 3 of the width of the IGBT device body.

[0016] Wherein, the IGBT device body is a planar MOS structure IGBT device body or a trench MOS structure IGBT device body.

[0017] The reverse conducting IGBT device provided by the embodiment of the present invention has the following beneficial effects compared with the prior art:

[0018] The reverse conducting IGBT device eliminates the existence of part of the N++ emitter region by transforming the existing complete rectangular N++ emitter region into a first N+ source region and a second N+ source region that intersect each other. When the device operates in the FRD mode, the anode short-circuit effect is reduced, and the influence of the MOS gate signal on the conduction loss of the RC-IGBT operating in the FRD mode is reduced, thereby avoiding the influence of the channel short-circuit effect. There is no need to adjust the cell spacing, and the short-circuit effect is reduced to improve the performance of the device. The structure is simple, the process is simple, and only the mask structure during N++ injection needs to be adjusted, and the process flow does not change. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0020] Figure 1 A schematic cross-sectional structure diagram of an embodiment of an N++ emitter region of a reverse conducting IGBT device provided in the present application;

[0021] Figure 2 A schematic cross-sectional structure diagram of an embodiment of a P+ base region of a reverse conducting IGBT device provided in the present application. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] like Figure 1-2 As shown, Figure 1 A schematic cross-sectional structure diagram of an embodiment of an N++ emitter region of a reverse conducting IGBT device provided in the present application; Figure 2 A schematic cross-sectional structure diagram of an embodiment of a P+ base region of a reverse conducting IGBT device provided in the present application.

[0024] In a specific embodiment, the reverse conducting IGBT device provided by the present invention includes an IGBT device body 10, and the N++ emitter region of the IGBT device body 10 includes a first N+ source region 21 and a second N+ source region 22, the right end of the first N+ source region 21 is connected to the left end of the second N+ source region 22, and the rear end of the first N+ source region 21 in the cross section of the N++ emitter region is located between the front end and the rear end of the second N+ source region 22, and the front end of the second N+ source region 22 is located between the front end and the rear end of the second N+ source region 22.

[0025] By changing the existing complete rectangular N++ emitter region into a staggered first N+ source region 21 and a second N+ source region 22, the existence of part of the N++ emitter region is eliminated. When the device operates in the FRD mode, the anode short-circuit effect is reduced, reducing the influence of the MOS gate signal on the conduction loss of the RC-IGBT operating in the FRD mode, thereby avoiding the influence of the channel short-circuit effect. There is no need to adjust the cell spacing, reducing the short-circuit effect and improving the performance of the device. The structure is simple, the process is simple, and only the mask structure during N++ injection needs to be adjusted, and the process flow does not change.

[0026] The present invention does not limit the distribution of the first N+ source region 21 and the second N+ source region 22. In order to simplify the design, and because there will be a collector region and a short-circuit region in the reverse conducting IGBT device, the first N+ source region 21 and the second N+ source region 22 can be aligned in the horizontal direction, or they can be non-aligned.

[0027] Preferably, the distance between the left and right ends of the first N+ source region 21 is equal to the distance between the left and right ends of the second N+ source region 22, the distance between the front and rear ends of the first N+ source region 21 is equal to the front and rear ends of the second N+ source region 22, and the doping concentrations of the first N+ source region 21 and the second N+ source region 22 are equal.

[0028] The present invention does not limit the region where the first N+ source intersects with the second N+ source region 22 . Generally, the region where the first N+ source intersects with the second N+ source region 22 is 1 / 4 to 1 / 3 of the width of the first N+ source region 21 .

[0029] The front end, rear end, left end and right end in the present invention refer to the corresponding front end, rear end, left end and right end of the cross section of the IGBT device observed from a top view.

[0030] Preferably, the width of the first N+ source region 21 is 1 / 2 to 2 / 3 of the width of the IGBT device body 10 .

[0031] The present invention does not limit the specific size of the first N+ source and the second N+ source region 22. It can be achieved by selectively changing the existing injection state to the mask state at the lower left corner and the upper right corner of the existing mask for selective N++ injection. Therefore, it can be achieved by only resetting a mask, and there is no need to change the corresponding process steps, and there is no impact on the device process.

[0032] In order to further improve the performance of the tipping, the P+ doping area is introduced in certain specific channel areas for compensation, and the P-well concentration of these MOS channels is increased, thereby increasing the turn-on (threshold) voltage required for the MOS channel inversion, so that under normal positive gate voltage, the left channel can be turned on normally, while the right channel cannot be inverted due to the high turn-on voltage, thereby reducing or even eliminating the formation of the electron channel there. When the RC-IGBT works in FRD mode, even under positive gate voltage, the right channel cannot be inverted, and the right P-well area (FRD anode) will not be short-circuited; and due to the presence of the P+ compensation doping area, the FRD anode injection efficiency is increased, reducing the FRD forward conduction voltage drop.

[0033] In one embodiment, the P+ base region of the IGBT device body 10 includes a first P+ base region 31 and a second P+ base region 32, the right end of the first P+ base region 31 is connected to the left end of the second P+ base region 32, and in the cross-section of the P+ base region, the front end of the first P+ base region 31 is located between the front end and the rear end of the second P+ base region 32, and the rear end of the second P+ base region 32 is located between the front end and the rear end of the first P+ base region 31.

[0034] In the present invention, the first P+ base region 31 and the second P+ base region 32 are not vertically corresponding to the first N+ source region 21 and the second N+ source region 22, but are staggered, one in front and the other behind.

[0035] The present invention does not limit the size, doping concentration, process method, etc. of the first P+ base region 31 and the second P+ base region 32. Preferably, the distance between the left and right ends of the first P+ base region 31 is equal to the distance between the left and right ends of the P+ base region, the distance between the front and rear ends of the first P+ base region 31 and the front and rear ends of the second P+ base region 32 are equal, and the doping concentrations of the first P+ base region 31 and the second P+ base region 32 are equal.

[0036] By setting the parameters of the two to be basically the same, the process can be simplified, the process cost can be reduced, and the current difference of the device in different working modes can be reduced.

[0037] The present invention does not limit the specific size of the P+ compensating doping region. The width of the area where the first P+ base region 31 intersects with the second P+ base region 32 is 1 / 4 to 1 / 3 of the width of the first P+ base region 31 , and the width of the first P+ base region 31 is 1 / 2 to 2 / 3 of the width of the IGBT device body 10 .

[0038] It should be pointed out that the method of forming the P+ compensatory doping area in the present invention can be to add a P+ well mask plate in the traditional process flow as a mask for P+ injection in a specific area to form a selective P+ compensatory doping area; the process flow can also be consistent with the traditional process, and the P+ compensatory doping area can be realized simultaneously with the junction terminal protection ring or the transition P well process between the terminal and the active area. Only the mask plate design of the junction terminal protection ring or the transition P well between the terminal and the active area needs to be modified, and the process complexity will not be increased.

[0039] Other processes may also be used in the present invention to implement the structure, and the present invention is not limited to this. In addition, equivalent to the prior art, the portion outside the existing P-well in the present invention may be undoped or lightly doped, and the structure may also be implemented. Personnel in this field may make appropriate adjustments as needed.

[0040] The IGBT device body 10 of the present invention can be used not only in a planar MOS structure but also in a trench MOS structure, that is, the IGBT device body 10 is a planar MOS structure IGBT device body or a trench MOS structure IGBT device body.

[0041] In summary, the reverse conducting IGBT device provided in the embodiment of the present invention eliminates the existence of part of the N++ emitter region by transforming the existing complete rectangular N++ emitter region into a first N+ source region and a second N+ source region that are staggered and intersected. When the device operates in the FRD mode, the anode short-circuit effect is reduced, and the influence of the MOS gate signal on the conduction loss of the RC-IGBT operating in the FRD mode is reduced, thereby avoiding the influence of the channel short-circuit effect. There is no need to adjust the cell spacing, and reducing the short-circuit effect improves the performance of the device. The structure is simple, the process is simple, and only the mask structure during N++ injection needs to be adjusted, and the process flow does not change.

[0042] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0043] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A reverse conducting IGBT device, characterized in that: It includes an IGBT device body, wherein an N++ emitter region of the IGBT device body includes a first N+ source region and a second N+ source region, the right end of the first N+ source region is connected to the left end of the second N+ source region, the rear end of the first N+ source region in the cross section of the N++ emitter region is located between the front end and the rear end of the second N+ source region, the front end of the second N+ source region is located between the front end and the rear end of the second N+ source region, the left and right ends of the first N+ source region are spaced equal to the left and right ends of the second N+ source region, the front and rear ends of the first N+ source region are spaced equal to the front and rear ends of the second N+ source region, and the doping concentrations of the first N+ source region and the second N+ source region are equal.

2. The reverse conducting IGBT device according to claim 1, characterized in that: The width of the region where the first N+ source and the second N+ source region intersect is 1 / 4 to 1 / 3 of the width of the first N+ source region.

3. The reverse conducting IGBT device according to claim 2, characterized in that: The width of the first N+ source region is 1 / 2 to 2 / 3 of the width of the IGBT device body.

4. The reverse conducting IGBT device according to claim 3, characterized in that: The P+ base region of the IGBT device body includes a first P+ base region and a second P+ base region, the right end of the first P+ base region is connected to the left end of the second P+ base region, and in the cross-section of the P+ base region, the front end of the first P+ base region is located between the front end and the rear end of the second P+ base region, and the rear end of the second P+ base region is located between the front end and the rear end of the first P+ base region.

5. The reverse conducting IGBT device according to claim 4, characterized in that: The distance between the left and right ends of the first P+ base region is equal to the distance between the left and right ends of the P+ base region, the distance between the front and rear ends of the first P+ base region is equal to the front and rear ends of the second P+ base region, and the doping concentrations of the first P+ base region and the second P+ base region are equal.

6. The reverse conducting IGBT device according to claim 5, characterized in that: The width of the region where the first P+ base region intersects the second P+ base region is 1 / 4 to 1 / 3 of the width of the first P+ base region, and the width of the first P+ base region is 1 / 2 to 2 / 3 of the width of the IGBT device body.

7. The reverse conducting IGBT device according to claim 6, characterized in that: The IGBT device body is a planar MOS structure IGBT device body or a trench MOS structure IGBT device body.

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