Printed circuit board and manufacturing method thereof, board-level architecture and electronic device

Abstract

The present application discloses a printed circuit board and a method for manufacturing the same, as well as a board-level architecture and an electronic device equipped with the board-level architecture. The printed circuit board includes a substrate and a dielectric layer covering the surface of the substrate. A soldering pad is also provided on the side of the dielectric layer facing away from the substrate, and the soldering pad is used to connect an external device. The dielectric layer includes a first dielectric area and a second dielectric area, and the vertical projection of the soldering pad on the dielectric layer is located in the first dielectric area. The material of the first dielectric area is a first dielectric, the material of the second dielectric area is a second dielectric, and the Young's modulus of the first dielectric is smaller than the Young's modulus of the second dielectric, and / or the thermal expansion coefficient of the first dielectric is smaller than the thermal expansion coefficient of the second dielectric. By arranging a first dielectric with a lower Young's modulus and / or a lower thermal expansion coefficient at the soldering pad position, the thermal fatigue stress at the soldering pad position can be reduced, thereby increasing the service life of the printed circuit board. The electronic device of the present application includes the printed circuit board.

Description

Technical Field

[0001] The present application relates to the field of electronic devices, and in particular to a printed circuit board and a manufacturing method thereof, a board-level architecture, and an electronic device. Background Art

[0002] Most electronic devices use printed circuit boards (PCBs), and components are soldered on them to achieve various functions of electronic devices. A printed circuit board is a composite layer structure, with its main structure made of insulating materials, and pads and metal traces are set on the outer surface and inner layer to achieve electrical connection between components.

[0003] The components are usually made of ceramics, silicon wafers and other materials, and are encapsulated with epoxy molding compound (EMC). Compared with the main material of the printed circuit board, the thermal expansion coefficient (CTE) of the components is different. In addition, due to heat generation during the operation of electronic equipment, the materials of the components will also form a temperature difference with the main material of the printed circuit board, resulting in inconsistent expansion and contraction between the components and the printed circuit board. The solder joints connecting the two are subjected to periodic thermal fatigue stress (creep fatigue) for a long time, which may eventually lead to cracking and failure of the solder joints. Summary of the invention

[0004] The purpose of the present application is to provide a printed circuit board and a method for manufacturing the same, as well as a board-level architecture including the printed circuit board, and an electronic device equipped with the board-level architecture. The Young's modulus of the dielectric material below the solder joint position of the corresponding component is reduced to achieve the effect of reducing the thermal fatigue stress at the solder joint position, and the specific scheme is as follows:

[0005] In a first aspect, the present application provides a printed circuit board, including a substrate and a dielectric layer covering the surface of the substrate, a soldering pad is further provided on the side of the dielectric layer facing away from the substrate, the soldering pad is used to connect and fix an external device, the dielectric layer includes a first dielectric area and a second dielectric area, the vertical projection of the soldering pad on the dielectric layer is located in the first dielectric area, the material of the first dielectric area is the first dielectric, the material of the second dielectric area is the second dielectric, and the Young's modulus of the first dielectric is smaller than the Young's modulus of the second dielectric, or the thermal expansion coefficient of the first dielectric is smaller than the thermal expansion coefficient of the second dielectric.

[0006] The printed circuit board of the present application carries a dielectric layer through a substrate, and realizes welding conduction with external devices through pads on the dielectric layer. The external device forms a solder joint at the solder pad position. The printed circuit board of the present application can reduce the thermal fatigue stress effect of the solder joint formed at the solder pad position by setting a first medium with a lower Young's modulus or thermal expansion coefficient at the solder pad position. In this way, cracking failure at the solder joint can be avoided, and the service life of the printed circuit board can be improved.

[0007] In a possible implementation, the Young's modulus of the first medium is smaller than the Young's modulus of the second medium, and the thermal expansion coefficient of the first medium is smaller than the thermal expansion coefficient of the second medium.

[0008] In this embodiment, the Young's modulus and the thermal expansion coefficient of the first medium are set to be lower than the corresponding parameters of the second medium, which can further reduce the thermal fatigue stress effect of the solder joint formed at the pad position.

[0009] In a possible implementation manner, the first medium is a single material.

[0010] In a possible implementation, the first medium is a composite material, and an average Young's modulus of the composite material is smaller than that of the second medium, and / or an average thermal expansion coefficient of the composite material is smaller than that of the second medium.

[0011] In a possible implementation manner, a vertical projection of the external device on the dielectric layer is a first projection area, and the first projection area is located within the first dielectric area.

[0012] In this implementation, the first dielectric area is set to completely accommodate the first projection area, so that the printed circuit board uses the material of the first dielectric to cooperate with the external device in the entire area corresponding to the external device. Because the temperature of the electronic device changes repeatedly during operation, the use of the first dielectric can reduce the thermal fatigue stress at the solder joint position of the external device. On the other hand, the overall area of ​​the external device is relatively large, and the first projection area formed by it is also relatively large, which is conducive to the production of the first dielectric area.

[0013] In a possible implementation manner, a minimum distance between an edge of the first projection area and an edge of the first medium area is greater than or equal to 50 μm.

[0014] In this implementation, by controlling the distance between the edge of the first dielectric area and the edge of the first projection area, the first dielectric area can be surrounded by the periphery of the first projection area, and the outer edge of the external device is set to the first dielectric with a smaller Young's modulus within a certain range, ensuring that the thermal fatigue stress of the pad of the external device is also within a relatively low range.

[0015] In a possible implementation manner, a distance D between an edge of the first projection area and an edge of the first medium area satisfies the condition: 5 mil≤D≤50 mil.

[0016] In a possible implementation manner, an intermediate dielectric layer is further included, and the intermediate dielectric layer is located between the substrate and the dielectric layer.

[0017] In this implementation, an intermediate dielectric layer may be provided between the dielectric layer and the substrate to increase the overall thickness of the dielectric layer and the middle dielectric layer. At the same time, the introduction of the intermediate dielectric layer also reduces the thickness of the dielectric layer and reduces the usage of the first dielectric.

[0018] In a possible implementation manner, the material of the intermediate dielectric layer is the second dielectric.

[0019] In a possible implementation manner, a metal layer is further provided between the substrate and the dielectric layer, and / or between the substrate and the intermediate dielectric layer for transmitting signals.

[0020] In a possible implementation, there are two dielectric layers, and the two dielectric layers are respectively covered on two opposite outer surfaces of the substrate.

[0021] In a possible implementation, there are multiple substrates, and a semi-cured layer is disposed between two adjacent substrates.

[0022] In a possible implementation manner, the Young's modulus of the first medium is less than or equal to 15 GPa.

[0023] In a possible implementation manner, the Young's modulus of the first medium is less than or equal to 3 GPa.

[0024] In a possible implementation, the thermal expansion coefficient of the first medium is less than or equal to 100 ppm / °C.

[0025] In a possible implementation, the thermal expansion coefficient of the first medium is less than or equal to 35 ppm / °C.

[0026] In a possible implementation, the thermal curing temperature of the first medium is greater than or equal to 130° C.

[0027] In a possible implementation manner, the thickness of the dielectric layer is less than or equal to 75 μm.

[0028] In a possible implementation manner, the sum of the thicknesses of the dielectric layer and the intermediate dielectric layer is less than or equal to 75 μm.

[0029] In a second aspect, the present application provides a method for manufacturing a printed circuit board, comprising the following steps:

[0030] A first dielectric region is formed by using a first dielectric and a second dielectric region is formed by using a second dielectric on an outer surface of one side of the substrate; wherein the Young's modulus of the first dielectric is smaller than the Young's modulus of the second dielectric, and / or the thermal expansion coefficient of the first dielectric is smaller than the thermal expansion coefficient of the second dielectric;

[0031] Laminating the first dielectric region and the second dielectric region to form a dielectric layer on the substrate;

[0032] A pad is made on the side of the dielectric layer facing away from the substrate.

[0033] The second aspect of the present application provides a method for manufacturing a printed circuit board, which is used to form the printed circuit board of the first aspect. When manufacturing the dielectric layer, it is necessary to manufacture the first dielectric area and the second dielectric area separately, and then form the dielectric layer by lamination. It can be understood that the position of the first dielectric area corresponds to the position where the printed circuit board needs to be connected to the external device, so as to achieve the effect of the first aspect that the service life of the printed circuit board can be improved.

[0034] In a possible implementation, a first dielectric region is formed by using a first dielectric and a second dielectric region is formed by using a second dielectric on an outer surface of a substrate, including:

[0035] A first dielectric region is formed on an outer surface of a substrate using a first dielectric;

[0036] A second dielectric film layer is made of a second dielectric, and a hollow area is formed on the second dielectric film layer;

[0037] A second dielectric film layer is attached to the outer surface to form a second dielectric area, and the first dielectric area is exposed through the hollow area.

[0038] In this implementation, the first dielectric area and the second dielectric film layer corresponding to the second dielectric area are formed separately, and a hollow area is opened at a position of the second dielectric film layer corresponding to the first dielectric area, so that when the second dielectric film layer is attached to the substrate, the first dielectric area can be exposed through the hollow area while the second dielectric area is formed, thereby forming a pre-overlap of the first dielectric area and the second dielectric area.

[0039] In a possible implementation, a first medium is used to form a first medium area on an outer surface of a substrate, including:

[0040] A first medium in the form of a low temperature pseudo film is formed on one outer surface of the substrate, or

[0041] A first paste medium is printed on one outer surface of the substrate, and then the first medium is pre-cured.

[0042] In a possible implementation, a first dielectric region is formed by using a first dielectric and a second dielectric region is formed by using a second dielectric on an outer surface of a substrate, including:

[0043] A second medium is used to form a second medium area on an outer surface of one side of the substrate, and a hollow area is provided at a position corresponding to the first medium area;

[0044] A film-shaped first medium is attached to the exposed outer surface of the hollow area to form a first medium area.

[0045] In this implementation, the second dielectric region may be manufactured first, and then the first dielectric region may be manufactured, so as to achieve pre-stacking of the two.

[0046] In a possible implementation, before forming the first dielectric region and the second dielectric region on one outer surface of the substrate, the method further includes:

[0047] Cut the substrate and etch the circuits and browning on the substrate.

[0048] In a third aspect, the present application provides another printed circuit board, comprising a substrate and a dielectric layer covering the substrate, and a solder pad located on a side of the dielectric layer facing away from the substrate, the solder pad being used to connect and fix external devices, the material of the dielectric layer being a first dielectric, and the Young's modulus of the first dielectric being less than or equal to 15 GPa, or the thermal expansion coefficient of the first dielectric being less than or equal to 100 ppm / °C.

[0049] In a possible implementation, the Young's modulus of the first medium is less than or equal to 15 GPa, and the thermal expansion coefficient of the first medium is less than or equal to 100 ppm / °C.

[0050] In a possible implementation manner, the first medium is a single material.

[0051] In a possible implementation, the first medium is a composite material, and an average Young's modulus of the composite material is smaller than that of the second medium, and / or an average thermal expansion coefficient of the composite material is smaller than that of the second medium.

[0052] In a possible implementation manner, an intermediate dielectric layer is further included, and the intermediate dielectric layer is located between the substrate and the dielectric layer.

[0053] In this implementation, an intermediate dielectric layer may be provided between the dielectric layer and the substrate to increase the overall thickness of the dielectric layer and the middle dielectric layer. At the same time, the introduction of the intermediate dielectric layer also reduces the thickness of the dielectric layer and reduces the usage of the first dielectric.

[0054] In a possible implementation, the Young's modulus of the material of the intermediate dielectric layer is greater than 15 GPa, and / or the thermal expansion coefficient of the material of the intermediate dielectric layer is greater than 100 ppm / °C.

[0055] In a possible implementation manner, a metal layer is further provided between the substrate and the dielectric layer, and / or between the substrate and the intermediate dielectric layer for transmitting signals.

[0056] In a possible implementation, there are two dielectric layers, and the two dielectric layers are respectively covered on two opposite outer surfaces of the substrate.

[0057] In a possible implementation, there are multiple substrates, and a semi-cured layer is disposed between two adjacent substrates.

[0058] In a possible implementation manner, the Young's modulus of the first medium is less than or equal to 3 GPa.

[0059] In a possible implementation, the thermal expansion coefficient of the first medium is less than or equal to 35 ppm / °C.

[0060] In a possible implementation, the thermal curing temperature of the first medium is greater than or equal to 130° C.

[0061] In a possible implementation manner, the thickness of the dielectric layer is less than or equal to 75 μm.

[0062] In a possible implementation manner, the sum of the thicknesses of the dielectric layer and the intermediate dielectric layer is less than or equal to 75 μm.

[0063] In a fourth aspect, the present application provides another method for manufacturing a printed circuit board, comprising the following steps:

[0064] A dielectric layer is made of a first dielectric on an outer surface of one side of the substrate, wherein the Young's modulus of the first dielectric is less than or equal to 15 GPa, and / or the thermal expansion coefficient of the first dielectric is less than or equal to 100 ppm / °C;

[0065] A pad is made on the side of the dielectric layer facing away from the substrate.

[0066] In the third aspect of the present application, the dielectric layer of the printed circuit board is entirely made of the first dielectric material, thereby reducing the thermal fatigue stress between the entire dielectric layer and the external device and increasing the service life of the printed circuit board. The printed circuit board manufacturing method of the fourth aspect of the present application is used to form the printed circuit board provided in the third aspect above.

[0067] In a fifth aspect, the present application provides a board-level architecture, comprising at least one printed circuit board and at least one device mounted on the printed circuit board, wherein the printed circuit board is the printed circuit board provided in the first aspect or the third aspect, or the printed circuit board is a printed circuit board manufactured using the printed circuit board manufacturing method of the second aspect and the fourth aspect.

[0068] In a sixth aspect, the present application provides an electronic device comprising the above-mentioned board-level architecture.

[0069] It is understandable that the board-level architecture provided in the fifth aspect of the present application uses the printed circuit board provided in the first to fourth aspects, and the combination between the device and the printed circuit board is more reliable, thereby improving the reliability of the board-level architecture itself and extending the service life of the board-level architecture. Correspondingly, the electronic device provided in the sixth aspect of the present application also improves the reliability and service life of the electronic device because of the improvement of the reliability and service life of the board-level architecture equipped therein. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] Figure 1 It is a structural schematic diagram of a board-level architecture provided in an embodiment of the present application;

[0071] Figure 2 It is a structural schematic diagram of a device in a board-level architecture provided in an embodiment of the present application;

[0072] Figure 2a It is a structural schematic diagram of another device in a board-level architecture provided in an embodiment of the present application;

[0073] Figure 3 It is a schematic diagram of a planar structure of a printed circuit board in a board-level architecture provided in an embodiment of the present application;

[0074] Figure 4 It is a schematic diagram of the decomposition structure of a board-level architecture provided in an embodiment of the present application;

[0075] Figure 5 It is a schematic diagram of a cross-sectional structure of a printed circuit board provided in an embodiment of the present application;

[0076] Figure 6 It is a schematic diagram of a planar structure of a printed circuit board provided in an embodiment of the present application;

[0077] Figure 7 It is a schematic diagram of a planar structure of a board-level architecture provided in an embodiment of the present application;

[0078] Figure 8 It is a schematic diagram of a cross-sectional structure of a board-level architecture provided in an embodiment of the present application;

[0079] Fig. 9 It is a schematic diagram of a planar structure of another board-level architecture provided in an embodiment of the present application;

[0080] Fig.10 It is a schematic diagram of the cross-sectional structure of another board-level architecture provided in an embodiment of the present application;

[0081] Fig.11 It is a partial planar structural schematic diagram of another board-level architecture provided in an embodiment of the present application;

[0082] Fig.12 It is a schematic diagram of the cross-sectional structure of another board-level architecture provided in an embodiment of the present application;

[0083] Fig.13 It is a schematic diagram of the cross-sectional structure of another board-level architecture provided in an embodiment of the present application;

[0084] Fig.14 It is a schematic diagram of the cross-sectional structure of another board-level architecture provided in an embodiment of the present application;

[0085] Fig.15 It is a schematic diagram of the cross-sectional structure of another board-level architecture provided in an embodiment of the present application;

[0086] Figure 16a-16d It is a structural schematic diagram of each step in a printed circuit board manufacturing method provided in an embodiment of the present application;

[0087] Figure 17a-Figure 17c It is a structural schematic diagram of each sub-step of step S100 in a printed circuit board manufacturing method provided in an embodiment of the present application;

[0088] Fig.18 A schematic flow chart of each step in a method for manufacturing a printed circuit board provided in an embodiment of the present application;

[0089] Fig.19 A schematic flow chart of the steps in another method for manufacturing a printed circuit board provided in an embodiment of the present application;

[0090] Figure 20a-Figure 20c It is a structural schematic diagram of each sub-step of step S100 in another printed circuit board manufacturing method provided in an embodiment of the present application;

[0091] Fig.21 A schematic flow chart of the steps in another method for manufacturing a printed circuit board provided in an embodiment of the present application;

[0092] Fig. 22 It is a schematic diagram of the cross-sectional structure of another printed circuit board provided in an embodiment of the present application;

[0093] Figure 23a-23c It is a structural schematic diagram of each step in another printed circuit board manufacturing method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0094] The following embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.

[0095] Figure 1 The structure of a board-level architecture 400 provided in an embodiment of the present application is illustrated.

[0096] The board-level architecture 400 provided in the embodiment of the present application can be assembled in the electronic device (not shown) provided in the present application. Figure 1 As shown, the board-level architecture 400 includes at least one printed circuit board 100 and at least one device 200. The device 200 may be a wafer chip, and a plurality of devices 200 mounted on the printed circuit board 100 may realize the preset functions of the board-level architecture 400. It is understandable that Figure 1 The device 200 shown is the external device of the printed circuit board 100 described in the claims and the invention content of the specification of this application.

[0097] The board-level architecture 400 can be directly assembled in an electronic device to realize the preset functions of the electronic device; the board-level architecture 400 can also be packaged to form functional devices such as capacitors, resistors, inductors, diodes, transistors, and field-effect transistors, and further mounted on the printed circuit board 100 to form the upper-level board-level architecture 400, which can be equipped in the electronic device to realize the preset functions. The electronic devices involved in this application may include but are not limited to mobile phones, tablet computers, notebook computers, ultra-mobile personal computers (ultra-mobile personal computers, UMPC), handheld computers, walkie-talkies, netbooks, POS machines, personal digital assistants (personal digital assistants, PDA), driving recorders, security equipment, servers, wireless base stations, switches, routers and other electronic devices or equipment.

[0098] For the convenience of describing the solution, the present application uses the device 200 as a wafer chip to illustrate each embodiment. Figure 2 The device 200 in the electronic device of the present application includes a plurality of signal legs 201. The plurality of signal legs 201 may be located at the outer edge of the device 200 body and extend in a direction away from the device 200 body. Figure 2a In the schematic diagram of , the device 200 may further include a signal leg 201 partially located at the bottom thereof. Specifically, the device 200 includes a bottom surface 202, and when the device 200 is mounted on the printed circuit board 100, the bottom surface 202 is the outer surface facing the printed circuit board 100. The signal leg 201 located at the bottom of the device 200 may be arranged on the bottom surface 202, so that when the device 200 is mounted on the printed circuit board 100, the signal leg 201 can be attached to and contact the printed circuit board 100.

[0099] In some embodiments, the legs 201 of the device 200 may be located at the side of the device 200 or at its bottom surface 202. In the subsequent embodiments, for the convenience of description, the device 200 described has legs 201 on both the side and the bottom surface 202. It can be understood that for the device 200 having legs 201 only at the side or the device 200 having legs 201 only at the bottom surface 202, the corresponding explanations can also be made with reference to the descriptions of the subsequent embodiments.

[0100] Please look back Figure 1 The printed circuit board 100 of the present application includes a mounting surface 101, and the device 200 is mounted and attached to the mounting surface 101. Figure 3 Understand together. Figure 3 In the schematic diagram, the printed circuit board 100 of the present application is provided with a plurality of pads 102 on the assembly surface 101. The positions of the plurality of pads 102 can be arranged corresponding to the positions of the signal legs 201 of the device 200. The functional device formed after the board-level architecture 400 is packaged, and the device 200 using the wafer chip described above can be fixed and connected to the printed circuit board 100 by welding. Figure 4 As shown, each signal leg 201 of the device 200 can form a one-to-one corresponding structure with each pad 102, so that when the device 200 is fixed on the printed circuit board 100, each signal leg 201 can be welded and connected to a pad 102, thereby realizing the signal transmission function of the device 200 on the printed circuit board 100.

[0101] It can be understood that the signal leg 201 of the device 200 and the pad 102 of the printed circuit board 100 are both made of conductive materials (such as metals such as copper). In addition, a plurality of transmission lines 103 are provided on the assembly surface 101 of the printed circuit board, and each transmission line 103 is connected to a plurality of pads 102 in a one-to-one correspondence, so as to realize the transmission of each signal in the device 200 in the printed circuit board 100. That is, for a signal leg 201 in the device 200, it realizes its signal transmission function on the printed circuit board 100 through a pad 102 and a transmission line 103 in sequence.

[0102] Figure 5 A cross-sectional view of an embodiment of a printed circuit board 100 of the present application is shown.

[0103] In this embodiment, the printed circuit board 100 includes a substrate 110, a dielectric layer 120, and a metal layer 130. The dielectric layer 120 is located between the substrate 110 and the metal layer 130. The metal layer 130 is made of a conductive material, which is used to form the pads 102 and the transmission lines 103 located on the assembly surface 101. In some embodiments, the metal layer 130 can be made of a copper foil material. The substrate 110 is the base material of the printed circuit board 100, which is used to provide structural support for the entire printed circuit board 100. The dielectric layer 120 can be made of a semi-cured material, such as a semi-cured sheet, a semi-cured paste (grease), etc. The dielectric layer 120 is used to achieve bonding and fixing between the substrate 110 and the metal layer 130. In some embodiments, when the printed circuit board 100 includes a multi-layer substrate 110, the dielectric layer 120 (defined as a semi-cured layer 150 in subsequent embodiments) can also be located between two adjacent layers of the substrate 110 to achieve bonding and fixing between the substrates 110.

[0104] In the printed circuit board 100 of the present application, the dielectric layer 120 further includes a first dielectric area 121 and a second dielectric area 122. The material of the first dielectric area 121 is the first dielectric, and the material of the second dielectric area 122 is the second dielectric. Figure 6 The plane structure of the printed circuit board 100 shown in the figure is understood together. The position of the first dielectric area 121 at least corresponds to the position of the pad 102, that is, the vertical projection of the pad 102 on the dielectric layer 120 is located within the first dielectric area 121. The vertical direction in the embodiment of the present application refers to the thickness direction of the substrate 110 or the printed circuit board 100.

[0105] Further, in the printed circuit board 100 of the present application, the Young's modulus of the first medium is smaller than the Young's modulus of the second medium. That is, the Young's modulus of the material in the first medium area 121 is smaller than the Young's modulus of the material in the second medium area 122. Or, in some embodiments, the thermal expansion coefficient of the first medium is smaller than the thermal expansion coefficient of the second medium. And, in some embodiments, the Young's modulus of the first medium is smaller than the Young's modulus of the second medium, and the thermal expansion coefficient of the first medium is also smaller than the thermal expansion coefficient of the second medium.

[0106] See also Figure 7 and Figure 8 The structure of the board-level architecture 400 of the present application is shown. Figure 7 This is the appearance structure diagram of the board-level architecture 400. Figure 8 4 is a cross-sectional view of the board-level architecture 400. As mentioned above, the signal legs 201 of the device 200 are arranged in a one-to-one correspondence with the pads 102 of the printed circuit board 100, and the signal legs 201 are fixed and connected to the pads 102 by welding. Figure 8In the schematic diagram, a solder joint 203 is formed between the signal leg 201 and the pad 102. Since the vertical projection of the pad 102 on the dielectric layer 120 is located within the first dielectric area 121, the vertical projection of the solder joint 203 formed between the signal leg 201 and the pad 102 on the dielectric layer 120 is also located within the first dielectric area 121. Therefore, for the printed circuit board 100 of the present application, each solder joint 203 formed by soldering the mounted device 200 is located within the first dielectric area 121 of the dielectric layer 120.

[0107] As mentioned above, there is a difference in the coefficient of thermal expansion (CTE) between the device 200 and the main material of the printed circuit board 100. In the process of assembling the device 200 on the printed circuit board 100, the solder joint 203 is formed to connect the device 200 and the printed circuit board 100. As the device 200 continues to work on the printed circuit board 100, heat will continue to be generated, that is, the printed circuit board 100 equipped with the device 200 will be subjected to periodic thermal fatigue stress during long-term operation (working, sleeping, shutting down, etc.). The difference in the coefficient of thermal expansion (CTE) will cause the expansion and contraction of the device 200 and the printed circuit board 100 to be inconsistent, resulting in the phenomenon of pulling at both ends of the solder joint 203, which may cause the solder joint 203 to crack.

[0108] The applicant has found through experiments that the stress at the solder joint 203 is related to the material of the dielectric layer 120 in the area where the stress is located, specifically, the Young's modulus, thermal expansion coefficient, and material thickness of the material at the location. For details, see Table 1 below:

[0109]

[0110] Table 1

[0111] The test medium materials of this application shown in Table 1 can be understood as different selections of the first medium mentioned above. CTE is the thermal expansion coefficient of the material, in ppm / ℃; E is the Young's modulus of the material, in GPa; H is the thickness of the material, in um. The stress at the A\B\C\D angle is Figure 7 The stress values ​​at the four corners of the device 200 are shown in MPa. Generally, the thermal fatigue stress effect is the largest at the four corners, and the cracking of the solder joint 203 usually occurs first at the four corners. The signal leg stress is a stress test on a single signal leg 201. Although the stress of the signal leg 201 is the same as the stress value at the A\B\C\D corners, its thermal fatigue stress effect is usually smaller than the effect at the four corners.

[0112] The existing dielectric material can be understood as the second medium involved in this application, and its Young's modulus is usually greater than 15GPa, and its thermal expansion coefficient is usually greater than 100ppm / ℃. It can be seen that when the Young's modulus of the first medium is smaller than that of the second medium, and after the adjustment of the values ​​of the thermal expansion coefficient, thickness, etc., the stress between the first medium and the device 200 is also smaller than the stress of the second medium. Young's modulus can also be understood as the elastic modulus of the material in the tensile direction. The higher the Young's modulus of the material, the more obvious its thermal fatigue effect is. It can also be concluded from Table 1 that the benefits of the thermal fatigue effect obtained by changing the Young's modulus of the material are greater than those obtained by changing the thermal expansion coefficient or thickness of the material. The benefits of changing the thermal expansion coefficient of the material are also relatively large.

[0113] It can be understood that the material of the solder joint 203 is metal, and its Young's modulus is lower than that of the semi-cured dielectric layer 120. Therefore, the printed circuit board 100 of the present application adopts a first medium with a relatively low Young's modulus to cooperate with the solder joint 203 at the position corresponding to each solder joint 203 through the setting of the first dielectric area 121 and the second dielectric area 122, so that each solder joint 203 is subjected to periodic thermal fatigue stress, because the Young's modulus of the first medium is lower, and it is not easy to cause cracking at the solder joint 203. Correspondingly, the thermal expansion coefficient of the first medium can also be set to be smaller than the thermal expansion coefficient of the second medium, which can also achieve an effect similar to that of changing the Young's modulus. In some embodiments, the Young's modulus and thermal expansion coefficient of the first medium are set to be smaller than the Young's modulus and thermal expansion coefficient of the second medium, respectively, which can further ensure the reduction of thermal fatigue stress at the solder joint 203 position.

[0114] On the other hand, Figure 7 As shown in the embodiment, because the volume of the device 200 is smaller than that of the printed circuit board 100, the area overhead of the signal leg 201 of the device 200 on the assembly surface 101 of the printed circuit board 100 is also relatively small, and the vertical projection area of ​​the corresponding pad 102 on the dielectric layer 120 is also relatively small. Therefore, in the dielectric layer 120, the area proportion of the first dielectric area 121 is relatively small compared to the area proportion of the second dielectric area 122. That is, in the dielectric layer 120, the content of the second dielectric is greater than the content of the first dielectric. Therefore, in the dielectric layer 120 of the printed circuit board 100 of the present application, the first dielectric area 121 can be prepared by opening a small area window on the second dielectric area 122.

[0115] It is understandable that the second medium can be prepared using a relatively conventional dielectric layer material, and the first medium is prepared using a dielectric layer material with a relatively small Young's modulus and / or thermal expansion coefficient. Generally, the material cost of the first medium is higher than the material cost of the second medium. In the printed circuit board 100 of the present application, the first dielectric area 121 is prepared by the above-mentioned small-area window opening method, so that the dielectric layer 120 can retain the material properties of the second medium in a large area. At the same time, the first medium is used to cooperate with each solder joint 203 to prevent the solder joint 203 from cracking, thereby improving the connection reliability of the device 200 relative to the printed circuit board 100, and improving the service life of the printed circuit board 100 equipped with the device 200. At the same time, the use amount of the first medium is relatively small, which can control the overall cost of the printed circuit board 100. It is understandable that the board-level architecture 400 using the printed circuit board 100 of the present application, and the electronic equipment equipped with the board-level architecture 400, the cost is also controlled accordingly, and the reliability and service life are also improved accordingly.

[0116] In some embodiments, the Young's modulus of the first medium is defined to be less than or equal to 15 GPa. Preferably, the Young's modulus of the first medium may also be defined to be less than or equal to 3 GPa.

[0117] In some embodiments, the thermal expansion coefficient of the first medium may be defined as less than or equal to 100 ppm / ° C. The thermal expansion coefficient of the first medium may be further defined as less than or equal to 35 ppm / ° C.

[0118] In some embodiments, the thermal curing temperature of the first medium may be defined to be greater than or equal to 130° C. In this embodiment, the thermal curing temperature of the first medium may be close to the thermal curing temperature of the second medium, and the glass transition temperature after curing is greater than or equal to 130° C.

[0119] The above parameter definitions of the first dielectric can improve the thermal fatigue effect of the first dielectric region 121 under long-term periodic thermal fatigue stress, making it more stable than the solder joint 203, so as to avoid cracking of the solder joint 203.

[0120] It should be pointed out that, in some embodiments, the above-mentioned first medium can be a single material, or the material used to form the first medium area 121 is described as a single material. In this case, it is only necessary to define the parameters of the single material to achieve the parameter definition of the first medium. In other embodiments, the first medium can be a composite material. The composite material here can be understood as a mixture of at least two materials formed by the first medium, or it can be understood as the material used to form the first medium area 121 is at least two materials, and the at least two materials are spliced ​​to form the first medium area 121. In the above-mentioned embodiment of the first medium being a composite material, it is necessary to control the average Young's modulus of the composite material to be smaller than the Young's modulus of the second medium, and / or control the average thermal expansion coefficient of the composite material to be smaller than the thermal expansion coefficient of the second medium, so as to ensure that the first medium of the composite material can also achieve the above-mentioned beneficial effects.

[0121] For another embodiment of the printed circuit board 100 of the present application, please refer to Fig. 9 and Fig.10 In this embodiment, the vertical projection of the device 200 on the dielectric layer 120 forms a first projection area 204. The body of the device 200 and each signal leg 201 are located within the first projection area 204. At this time, the first dielectric area 121 of the dielectric layer 120 completely accommodates the first projection area 204. That is, the dielectric layer 120 is set as the first dielectric area 121 as a whole within the range corresponding to the device 200, and is welded, fixed and bonded with the device 200 through the pads 102 on the first dielectric.

[0122] As mentioned above, the device 200 generates heat during operation. When the bottom surface 202 of the device 200 is bonded to the assembly surface 101 of the printed circuit board 100, because the material of the device 200 is different from the main material of the printed circuit board 100 (the material of the dielectric layer 120 in this embodiment), a difference in thermal expansion coefficient will also be formed between the device 200 and the dielectric layer 120. The first dielectric area 121 of the dielectric layer 120 is set to correspond to the device 200, so that the device 200 as a whole can be matched with the first dielectric. Because the Young's modulus of the first dielectric is smaller, or the difference in thermal expansion coefficient between it and the body of the device 200 is smaller, the difference in thermal fatigue stress between the device 200 and the dielectric layer 120 is further reduced, so that the bonding state between the device 200 and the dielectric layer 120 is more stable, thereby ensuring reliable bonding between the two.

[0123] On the other hand, the overall area of ​​the device 200 is larger than the area of ​​its signal leg 201, and the area of ​​the first dielectric area 121 matched therewith is also larger accordingly. When the first dielectric area 121 is manufactured and formed in the dielectric layer 120, the larger area of ​​the first dielectric area 121 is also more conducive to processing and filling the first dielectric, thereby reducing the precision requirements for the first dielectric area 121 and facilitating the manufacture of the first dielectric area 121.

[0124] In one embodiment, see Fig.11 As shown in the figure, the edge of the first dielectric area 121 is also set to form a spacing distance D with the edge of the first projection area 204 to ensure that the device 200 can be completely located in the first dielectric area 121 when it is attached to the dielectric layer 120. In one embodiment, the minimum value of the spacing distance D between the edge of the first projection area 204 and the edge of the first dielectric area 121 is set to be greater than or equal to 50μm. At this time, the first dielectric area 121 covers a larger area of ​​the first projection area 204, and the material of the first dielectric is formed to cooperate with the solder joint 203 at the position corresponding to the solder pad 102 and its surrounding area, which can better ensure that the thermal expansion coefficient of the solder joint 203 and its surrounding area is smaller.

[0125] In one embodiment, the interval value of the spacing distance D may also be set to satisfy: 5mil≤D≤50mil. In this embodiment, the edge of the first dielectric area 121 is closer than the edge of the first projection area 204, and the position accuracy of the first dielectric area 121 is also higher, which can better position the device 200, and at the same time, the area ratio of the second dielectric in the dielectric layer 120 is increased, thereby ensuring the structural stability of the dielectric layer 120.

[0126] In some embodiments, the thickness of the dielectric layer 120 is limited to less than or equal to 75 μm. Because the first dielectric and the second dielectric in the dielectric layer 120 are mostly in a semi-cured state, if the dielectric layer 120 is too thick, the overall structural stability of the printed circuit board 100 may be affected.

[0127] For an example, see Fig.12. An intermediate dielectric layer 140 is also provided between the dielectric layer 120 and the substrate 110. The intermediate dielectric layer 140 is also in a semi-cured state, and its function is similar to that of the dielectric layer 120, and is used to achieve bonding and fixing between the substrate 110 and the metal layer 130. In this embodiment, the material of the intermediate dielectric layer 140 and the second dielectric region 122 of the dielectric layer 120 can be the same, that is, the intermediate dielectric layer 140 can also be prepared using the second dielectric. The function of the intermediate dielectric layer 140 is similar to that of the dielectric layer 120, but it is necessary to ensure that the dielectric layer 120 is always located on the side close to the metal layer 130 relative to the intermediate dielectric layer 140 to ensure the coordination between the first dielectric region 121 and the pad 102. In one embodiment, the sum of the thickness of the dielectric layer 120 and the intermediate dielectric layer 140 can also be set to be less than or equal to 75μm.

[0128] Please refer to Fig.13 , Fig.14 and Fig.15 In the embodiment shown, the printed circuit board 100 in the board-level architecture 400 of the present application can also be constructed as a printed circuit board with a composite layer structure. Fig.13 As shown, a second metal layer 131 may be further provided between the substrate 110 and the dielectric layer 120. A plurality of transmission lines 103 may be formed in the second metal layer 131 by patterning, so that the second metal layer 131 has a transmission function within the layer of the printed circuit board 100. At this time, a plurality of vias 104 may be provided in the dielectric layer 120, and the vias 104 may be connected between the transmission lines 103 on the mounting surface 101 and the transmission lines 103 in the second metal layer 131, or the vias 104 may be connected between the pads 102 on the mounting surface 101 and the transmission lines 103 in the second metal layer 131, so as to realize the function of transmitting signals within the layer of the printed circuit board 100.

[0129] exist Fig.14 In the schematic diagram of FIG. 1 , the number of substrates 110 is two (the number of substrates 110 in other embodiments may also be multiple layers). The two substrates 110 are stacked, and a semi-cured layer 150 is further provided between the two substrates 110. The semi-cured layer 150 is used to connect and fix the two substrates 110. Because the semi-cured layer 150 is also in a semi-cured state and is also used to achieve the connection function, in some embodiments, the material of the semi-cured layer 150 may also be implemented by a second medium.

[0130] And in Fig.15In the schematic diagram, a dielectric layer 120 and a metal layer 130 are provided on opposite sides of the substrate 110, and a dielectric layer 120 is provided between each metal layer 130 and the substrate 110. Such a structure enables the devices 200 to be mounted on both sides of the printed circuit board 100, that is, in this embodiment, the printed circuit board 100 is formed as a double-sided printed circuit board. Furthermore, the dielectric layer 120 located on one side of the substrate 110 can set the positions of the first dielectric area 121 and the second dielectric area 122 corresponding to the positions of the pads 102 in the metal layer 130 located on the same side thereof, or the dielectric layer 120 sets the positions of the first dielectric area 121 and the second dielectric area 122 corresponding to the positions of the devices 200 mounted on the same side thereof; and the dielectric layer 120 located on the other side of the substrate 110 also sets the positions of the first dielectric area 121 and the second dielectric area 122 based on the positions of the pads 102 or the devices 200 on the same side thereof. Thus, Fig.15 The structure of the double-sided printed circuit board in the embodiment can also ensure the connection reliability of the devices 200 mounted on the opposite sides thereof and avoid cracking of the solder joints 203 by disposing the first dielectric area 121 and the second dielectric area 122 in the dielectric layer 120 .

[0131] It should be pointed out that the above Figure 13-Figure 15 In the embodiments, the composite layer structure of the printed circuit board 100 can also be arranged in combination with each other. For example, in some embodiments, the two opposite sides of the printed circuit board 100 can be equipped with the device 200, and the printed circuit board 100 is also provided with a second metal layer 131 for transmitting signals; or in some embodiments, the number of substrates 110 of the printed circuit board 100 is multiple, and the two opposite sides of the printed circuit board 100 can also be equipped with the device 200, etc.; even in some embodiments, the printed circuit board 100 can include the second metal layer 131, and include multiple substrates 110, and also have the function of a double-sided printed circuit board, which will not be described in detail in this specification.

[0132] The printed circuit board manufacturing method provided in the second aspect of the present application can be understood as being used to manufacture the above-mentioned printed circuit board 100. The printed circuit board manufacturing method can include the following steps:

[0133] S100, on one outer surface 111 of the substrate 110, a first dielectric region 121 is formed by using a first dielectric, and a second dielectric region 122 is formed by using a second dielectric; wherein the Young's modulus of the first dielectric is smaller than the Young's modulus of the second dielectric, and / or the thermal expansion coefficient of the first dielectric is smaller than the thermal expansion coefficient of the second dielectric;

[0134] S200 , pressing the first dielectric region 121 and the second dielectric region 122 to form a dielectric layer 120 on the substrate 110 ;

[0135] S300 , manufacturing a pad 102 on a side of the dielectric layer 120 facing away from the substrate 110 .

[0136] For details, see Figures 16a to 16d Indication. Fig.16a In the printed circuit board manufacturing method of the present application, a substrate 110 is first provided, and the substrate 110 has an outer surface 111. Then, a first dielectric area 121 ( Fig.16b ) and the second dielectric region 122 ( Fig.16c ), wherein the first dielectric area 121 is prepared by using the first dielectric, and the second dielectric area 122 is prepared by using the second dielectric, and the manufacturing order of the first dielectric area 121 and the second dielectric area 122 is not strictly defined in this embodiment. At the same time, the position area of ​​the first dielectric area 121 can be set based on the position area of ​​the device 200 that needs to be carried on the printed circuit board 100, that is, based on the position area of ​​the device 200 on the board-level architecture 400. By pressing the first dielectric area 121 and the second dielectric area 122, a dielectric layer 120 can be formed on the first outer surface 111 of the substrate 110.

[0137] Finally, a metal layer 130 is formed on the side of the dielectric layer 120 facing away from the substrate 110, and patterned to form a pad 102 ( Fig.16d ). The above-mentioned printed circuit board 100 can be formed by adopting the method of the present application. Among them, because the Young's modulus of the first medium is smaller than the Young's modulus of the second medium, and / or the thermal expansion coefficient of the first medium is smaller than the thermal expansion coefficient of the second medium, after the device 200 is mounted, the solder joint 203 formed has a smaller thermal fatigue effect, which can improve the reliability and service life of the printed circuit board 100.

[0138] It should be noted that, before step S100, that is, in the process of providing the substrate 110, the method of the present application may further include the following steps:

[0139] S50 , cutting the substrate 110 .

[0140] Then, when the printed circuit board 100 further includes a second metal layer 131 between the dielectric layer 120 and the substrate 110, it is also necessary to first form the second metal layer 131 on the outer surface 111 of the substrate 110 and pattern it, and then separately make the first dielectric area 121 and the second dielectric area 122. That is, the method of the present application does not limit the dielectric layer 120 to be directly bonded to the outer surface 111 of the substrate 110. Therefore, after the above step S50 "cutting the substrate 110", the following steps may also be included:

[0141] S70, etching a circuit on the substrate 110;

[0142] S80, browned substrate 110.

[0143] Specifically, in step S70, a circuit is etched on the substrate 110, that is, a second metal layer 131 is formed on the outer surface 111 of the substrate 110, and the second metal layer 131 is patterned to form the transmission line 103. Finally, steps such as browning the substrate 110 are all part of the manufacturing process required in the process of providing the substrate 110.

[0144] The above step S100 of “using a first medium to form a first dielectric region 121 and using a second medium to form a second dielectric region 122 on an outer surface 111 of the substrate 110 ” may include the following sub-steps:

[0145] S110, using a first medium to form a first dielectric area 121 on an outer surface 111 of the substrate 110;

[0146] S120, using a second medium to manufacture a second dielectric film layer 122a, and opening a hollow area 1221a on the second dielectric film layer 122a;

[0147] S130 , attaching the second dielectric film layer 122 a onto the outer surface 111 to form the second dielectric region 122 , and the first dielectric region 121 is exposed through the hollow region 1221 a .

[0148] Specifically, in this embodiment, the manufacturing sequence is to first prepare the first dielectric region 121 on the substrate 110, and then attach the second dielectric film layer 122a to form the second dielectric region 122. Figures 17a to 17c In this embodiment, the method first uses a first medium to form a first dielectric region 121 (see Fig.17a ), and a separate second dielectric film layer 122a is formed at another location different from the outer surface 111 (see Fig.17a ). The second dielectric film layer 122a is made of a second dielectric, and the second dielectric film layer 122a needs to have transferable properties.

[0149] A hollow area 1221a needs to be provided on the second dielectric film layer 122a (see Fig.17b ), the position and area size of the hollow area 1221a need to be opened with reference to the position and size of the first dielectric area 121 on the outer surface 111, so that when the second dielectric film layer 122a is attached to the outer surface 111, the first dielectric area 121 can be exposed through the hollow area 1221a, so that after the first dielectric area 121 and the second dielectric area 122 are reliably pre-stacked, a relatively flat and continuous dielectric layer 120 can be formed when the first dielectric area 121 and the second dielectric area 122 are subsequently pressed together (see Fig.17c ).

[0150] In one embodiment, the above step S110 of “using a first medium to form a first dielectric region 121 on an outer surface 111 of the substrate 110 ” may include:

[0151] S111 , depositing a first dielectric film on an outer surface 111 of the substrate 110 at low temperature to form a first dielectric region 121 .

[0152] For details, please refer to Fig.18 As shown, a flow chart of the method for manufacturing a printed circuit board of the present application corresponding to this embodiment is shown. After cutting the substrate 110 to forming the outer surface 111 of the substrate 110, the first dielectric in the form of a film (sheet) can be fixed on the outer surface 111 by low-temperature pseudo-joining, and then the second dielectric film layer 122a is provided with a corresponding hollow area 1221a to ensure that when the second dielectric film layer 122a is attached to the outer surface 111, the hollow area 1221a is precisely aligned with the first dielectric area 121, and the dielectric layer 120 is formed. In this embodiment, because the accuracy of low-temperature pseudo-joining is relatively high, the printed circuit board 100 of the above-mentioned embodiment of "the value of the spacing distance D satisfies: 5mil≤D≤50mil" can be manufactured.

[0153] In another embodiment, step S110 of “using a first medium to form a first dielectric region 121 on an outer surface 111 of the substrate 110 ” may further include:

[0154] S112 , printing a first medium paste on one outer surface 111 of the substrate 110 , and then pre-curing the first medium to form a first medium area 121 .

[0155] For details, please refer to Fig.19 After forming the outer surface 111 of the substrate 110, a paste-like first dielectric is printed on the outer surface 111, and then pre-cured to form a first dielectric region 121. The subsequent surface mounting process of the second dielectric film layer 122a is the same as that described above. Fig.18 The process shown is similar. Fig.18 and Fig.19 The selection of the production method can be determined based on the properties of the first medium being in a film or paste state.

[0156] In one embodiment, step S100 of "using a first medium to form a first dielectric region 121 and using a second medium to form a second dielectric region 122 on an outer surface 111 of the substrate 110" may further include the following sub-steps:

[0157] S140, using a second medium to manufacture a second dielectric region 122 on one outer surface 111 of the substrate 110, and opening a hollow region 1221 at a position corresponding to the first dielectric region 121;

[0158] S150 , attaching a film-like first dielectric surface to the outer surface 111 exposed by the hollow area 1221 to form a first dielectric area 121 .

[0159] For details, see Figures 20a to 20c Indications, combined with Fig.21 In this embodiment, the second dielectric region 122 (see FIG. 1 ) is first formed on the outer surface 111 of the substrate 110. Fig.20a ), and then the first dielectric area 121 is made by opening and filling the window. The window position of the hollow area 1221 needs to correspond to the position of the device 200 to be mounted on the printed circuit board 100 (see Fig.20b When the film-like first medium is attached to the outer surface 111 exposed in the hollow area 1221, the area size of the first medium needs to match the area size of the hollow area 1221 (see Fig.20c ). The precision of opening the hollow area 1221 and attaching the first medium is relatively low. This method embodiment is suitable for manufacturing the printed circuit board 100 with the above-mentioned "minimum value of the spacing distance D is greater than or equal to 50 μm". Fig.18 and Fig.19 The method of this embodiment has a simpler process and a lower production cost.

[0160] It can be understood that when the printed circuit board manufacturing method of the present application is used to manufacture the printed circuit board 100, if the printed circuit board 100 also includes a second metal layer 131, includes multiple substrates 110, and both opposite sides of the printed circuit board 100 need to carry devices 200, etc., the steps of the above-mentioned method embodiments can be followed, and the reliability and service life of the printed circuit board 100 can be improved by setting the first dielectric area 121 at the location where the device 200 is carried.

[0161] See also Fig. 22 Another printed circuit board 300 provided by the present application is shown. Fig. 22In the schematic diagram of , the printed circuit board 300 also includes a substrate 310, a dielectric layer 320, and a metal layer 330. The dielectric layer 320 is located between the substrate 310 and the metal layer 330. The metal layer 330 is made of conductive material to form the pads and transmission lines of the printed circuit board 300 of this embodiment, wherein the pads are used to connect and fix the device 200, and the transmission lines are used to transmit signals. The substrate 310 also serves as the base material of the printed circuit board 300, and the dielectric layer 320 is also made of semi-cured material to achieve bonding and fixing between the metal layer 330 and the substrate 310. In the printed circuit board 300 provided in this embodiment, the Young's modulus of the material for making the dielectric layer 320 is less than or equal to 15GPa, or the thermal expansion coefficient of the material for making the dielectric layer 320 is less than or equal to 100ppm / ℃. And, in some embodiments, the Young's modulus of the material for making the dielectric layer 320 is less than or equal to 15GPa, and its thermal expansion coefficient is less than or equal to 100ppm / ℃.

[0162] It can be understood that for another printed circuit board 300 provided in the present application, the material of its dielectric layer 320 can be prepared using the above-mentioned first dielectric, and the Young's modulus of the first dielectric is less than or equal to 15 GPa. When the dielectric layer 320 is made of the first dielectric as a whole, because the Young's modulus of the first dielectric in this embodiment is defined to be less than or equal to 15 GPa, and / or the thermal expansion coefficient of the material used to make the dielectric layer 320 is less than or equal to 100 ppm / °C, the overall stress of the dielectric layer 320 of the printed circuit board 300 is relatively small. When the device 200 is mounted on the printed circuit board 300, the solder joints formed by the device 200 on the printed circuit board 300 are also not easy to crack because of the cooperation with the first dielectric, thereby improving the reliability and service life of the printed circuit board 300 provided in this embodiment.

[0163] Compared with the aforementioned printed circuit board 100, the printed circuit board 300 provided in this embodiment omits the application of the second medium, which can also be understood as the dielectric layer 320 of the printed circuit board 300 being set as the first dielectric area 121 of the aforementioned printed circuit board 100. Because the Young's modulus and / or thermal expansion coefficient of the material used in its dielectric layer 320 is small, after the device 200 is mounted, similar beneficial effects can be obtained as with the aforementioned printed circuit board 100. At the same time, the printed circuit board 300 provided in this embodiment has a simpler structure than the aforementioned printed circuit board 100, and there is no need to consider the alignment problem between the pad and the first medium in the subsequent process, which also reduces the position accuracy requirements for the device 200 accordingly.

[0164] It is understandable that, based on the various embodiments of the printed circuit board 100 described above, another printed circuit board 300 provided in the present application can also form some similar embodiments and achieve similar beneficial effects, including but not limited to further setting the Young's modulus of the material of the dielectric layer 320 to be less than or equal to 3GPa; or setting the thermal expansion coefficient of the material of the dielectric layer 320 to be less than or equal to 35ppm / °C; or setting the thermal curing temperature of the material of the dielectric layer 320 to be similar to that of the second medium, and the glass transition temperature after curing to be greater than or equal to 130°C.

[0165] Furthermore, in some embodiments, another printed circuit board 300 provided in the present application may also include an intermediate dielectric layer, a second metal layer, a plurality of substrates 310, and embodiments in which both opposite sides of the printed circuit board 300 can carry devices 200, etc., which will not be described one by one here.

[0166] Correspondingly, the present application also provides a method for manufacturing the printed circuit board 300, comprising the following steps:

[0167] S401, on one outer surface 111 of the substrate 310, a dielectric layer 320 is made of a first dielectric, wherein the Young's modulus of the first dielectric is less than or equal to 15 GPa, and / or the thermal expansion coefficient of the first dielectric is less than or equal to 100 ppm / °C;

[0168] S402 , manufacturing a pad 102 on a side of the dielectric layer 320 facing away from the substrate.

[0169] For details, please refer to Figures 23a to 23c Schematic diagram. The method for manufacturing a printed circuit board provided in this embodiment, because the dielectric layer 320 is made of the same material as a whole, eliminates the steps of window opening, alignment, pre-stacking, etc. required when using two different materials. Compared with the method for manufacturing the printed circuit board 100 described above, it is simpler and reduces the manufacturing cost. It can be understood that the beneficial effects of the printed circuit board 300 manufactured based on this method are similar to the beneficial effects of the printed circuit board 300 described above, and this specification will not be repeated here. Further, Fig. 22 The printed circuit board 300 shown is based on Figures 23a to 23c The printed circuit board 300 manufactured by the steps shown can also be applied to the board-level architecture 400 involved in the present application, and achieve similar beneficial effects as the printed circuit board 100. When the board-level architecture 400 provided in this embodiment is assembled in an electronic device, the reliability and service life of the electronic device can also be improved.

[0170] The above description is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or replacements within the technical scope disclosed in the present application, such as reducing or adding structural parts, changing the shape of structural parts, etc., which should be included in the protection scope of the present application; in the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A printed circuit board, characterized in that: It includes a substrate and a dielectric layer covering the surface of the substrate, wherein a metal layer is further provided on a side of the dielectric layer facing away from the substrate, wherein the metal layer includes a pad and a transmission line, wherein the pad is used to connect an external device, and each of the transmission lines is used to be connected to a plurality of pads in a one-to-one correspondence, wherein the dielectric layer includes a first dielectric area and a second dielectric area, wherein a vertical projection of the pad on the dielectric layer is located in the first dielectric area, wherein the material of the first dielectric area is a first dielectric, and the material of the second dielectric area is a second dielectric, wherein both the first dielectric and the second dielectric are made of semi-cured material, wherein the first dielectric is used to bond and fix the substrate and the pad, and wherein the second dielectric is used to bond and fix the substrate and the transmission line, wherein the Young's modulus of the first dielectric is smaller than that of the second dielectric, and the thermal expansion coefficient of the first dielectric is smaller than that of the second dielectric.

2. The printed circuit board according to claim 1, characterized in that: A vertical projection of the external device on the dielectric layer is a first projection area, and the first projection area is located within the first dielectric area.

3. The printed circuit board according to claim 1 or 2, characterized in that: It also includes an intermediate dielectric layer, which is located between the substrate and the dielectric layer.

4. The printed circuit board according to any one of claims 1 to 3, characterized in that: The Young's modulus of the first medium is less than or equal to 15 GPa.

5. The printed circuit board according to any one of claims 1 to 4, characterized in that: The thermal expansion coefficient of the first medium is less than or equal to 100 ppm / °C.

6. The printed circuit board according to any one of claims 1 to 5, characterized in that: The thermal curing temperature of the first medium is greater than or equal to 130°C.

7. The printed circuit board according to any one of claims 1 to 6, characterized in that: A vertical projection of the external device on the dielectric layer is a first projection area, and the first projection area is located within the first dielectric area.

8. The printed circuit board according to claim 7, characterized in that: A minimum distance between an edge of the first projection area and an edge of the first medium area is greater than or equal to 50 μm.

9. The printed circuit board according to claim 7, characterized in that: A distance D between an edge of the first projection area and an edge of the first medium area satisfies the condition: 5 mil≤D≤50 mil.

10. A method for manufacturing a printed circuit board, characterized in that: The steps include: A first medium is used to form a first medium area on an outer surface of one side of the substrate, and a second medium is used to form a second medium area; wherein the first medium and the second medium are both made of semi-cured materials, the Young's modulus of the first medium is smaller than the Young's modulus of the second medium, and the thermal expansion coefficient of the first medium is smaller than the thermal expansion coefficient of the second medium; Laminating the first dielectric region and the second dielectric region to form a dielectric layer on the substrate; A pad is made on the side of the first dielectric layer facing away from the substrate, and a transmission line is made on the side of the second dielectric layer facing away from the substrate; wherein the first dielectric layer is used to bond and fix the substrate and the pad, and the second dielectric layer is used to bond and fix the transmission line.

11. The method for manufacturing a printed circuit board according to claim 10, characterized in that: The method of using a first medium to form a first dielectric area on an outer surface of a substrate and using a second medium to form a second dielectric area comprises: A first dielectric region is formed on an outer surface of a substrate using a first dielectric; A second dielectric film layer is made of a second dielectric, and a hollow area is formed on the second dielectric film layer; The second dielectric film layer is attached to the outer surface to form the second dielectric area, and the first dielectric area is exposed through the hollow area.

12. A board-level architecture, characterized in that: The invention comprises at least one printed circuit board and at least one device attached to the printed circuit board, wherein the printed circuit board is the printed circuit board described in any one of claims 1 to 9, or the printed circuit board is a printed circuit board manufactured by the printed circuit board manufacturing method described in claim 10 or 11.

13. An electronic device, characterized in that: Comprising the board level architecture as claimed in claim 12.

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