A three-level inverter and its modulation method, device and storage medium

Abstract

The present invention discloses a modulation method, device, three-level inverter, and storage medium for a three-level inverter. The method includes: obtaining the DC bus voltage and three-phase voltage of the three-level inverter; determining the modulation index and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter; selecting small vectors, synthesizing a virtual middle vector, and designing a switching sequence according to the modulation index and reference vector; determining the duty ratio of each vector of the three-level inverter based on the virtual middle vector and the switching sequence according to the volt-second balance equation and the numerical approximation method; and controlling the three-level inverter according to the duty ratio of each vector of the three-level inverter. In this solution, by setting a virtual vector in the space vector diagram of the three-level inverter, the midpoint current generated by the comprehensive action of the virtual vector, small vectors, and middle vector is 0, suppressing the fluctuation of the midpoint voltage, improving the output waveform quality of the three-level inverter, and ensuring the power consumption safety of electrical equipment.

Description

Technical Field

[0001] The present invention belongs to the technical field of inverters, and particularly relates to a modulation method, device, three-level inverter, and storage medium of a three-level inverter, and more particularly to a modulation method, device, three-level inverter, and storage medium of a three-level inverter. Background Art

[0002] Three-level inverters, such as Neutral Point Clamped (NPC) three-level inverters, have been widely used in medium-voltage and high-power equipment. During the use of a three-level inverter, there is a problem of neutral point voltage fluctuation. The neutral point voltage is the voltage at which the neutral point current of the inverter topology charges and discharges the neutral point O due to switching actions. The inflow and outflow of current at the neutral point will cause changes in the neutral point voltage, resulting in fluctuations in the neutral point voltage. The fluctuation of the neutral point voltage will cause the upper and lower capacitor voltages of the three-level inverter to be uneven, affecting the output waveform quality of the three-level inverter, and seriously interfering with the safety of electrical equipment.

[0003] Therefore, in the practical application of a three-level inverter, reducing the fluctuation of its neutral point voltage is an engineering problem that needs to be solved, and it is of great significance for actual engineering use.

[0004] The above content is only used to assist in understanding the technical solution of the present invention, and does not represent an admission that the above content is prior art. Summary of the Invention

[0005] The purpose of the present invention is to provide a modulation method, device, three-level inverter, and storage medium of a three-level inverter to solve the problem that the fluctuation of the neutral point voltage of the three-level inverter will affect the output waveform quality of the three-level inverter, and seriously interfere with the safety of electrical equipment, so as to achieve the effect of suppressing the fluctuation of the neutral point voltage by setting a virtual vector in the space vector diagram of the three-level inverter, making the neutral point current generated by the comprehensive action of the virtual vector, small vector, and medium vector zero, improving the output waveform quality of the three-level inverter, and ensuring the electrical safety of electrical equipment.

[0006] The present invention provides a modulation method for a three-level inverter, including: obtaining the DC bus voltage and three-phase voltage of the three-level inverter; determining the modulation degree and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter; selecting small vectors according to the modulation degree and the reference vector, synthesizing a virtual medium vector, and designing a switching sequence based on the virtual medium vector; determining the duty ratio of each vector of the three-level inverter according to the virtual medium vector and the switching sequence, based on the volt-second balance equation and the numerical approximation method; and controlling the three-level inverter according to the duty ratio of each vector of the three-level inverter.

[0007] In some embodiments, determining the modulation index and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter includes: determining the reference vector according to the three-phase voltage; determining the sector and small region where the reference voltage vector is located according to the amplitude and phase of the reference voltage vector; determining the modulation index of the three-level inverter according to the amplitude of the reference voltage vector and the DC bus voltage.

[0008] In some embodiments, selecting small vectors and synthesizing a virtual middle vector according to the modulation index and the reference vector includes: determining the sector and small region where the reference vector is located according to the amplitude and phase of the reference vector; determining two adjacent small vectors of the reference vector according to the modulation index based on the sector and small region where the reference vector is located; synthesizing a virtual middle vector according to the two adjacent small vectors of the reference vector.

[0009] In some embodiments, synthesizing a virtual middle vector according to the two adjacent small vectors of the reference vector includes: synthesizing a virtual middle vector according to the virtual middle vector formula; wherein, in the first sector (taking the first sector as an example), the virtual middle vector formula is:

[0010] wherein, V 13 ’ is the virtual middle vector, V7 and V8 are two adjacent small vectors, PPO is the switching state of the small vector V8, and ONN is the switching state of the small vector V7.

[0011] In some embodiments, designing a switching sequence based on the virtual middle vector includes: determining the adjacent small vectors participating in synthesizing the virtual middle vector according to the sector and small region where the reference vector is located, and synthesizing the virtual middle vector, and further determining the switching sequence.

[0012] In some embodiments, determining the duty ratio of each vector of the three-level inverter according to the virtual middle vector and the switching sequence by using the volt-second balance equation and the numerical approximation method includes: determining the volt-second balance equation under the four-vector condition according to the virtual middle vector and the switching sequence by using the volt-second balance equation and the numerical approximation method; determining the duty ratio of each vector of the three-level inverter according to the volt-second balance equation under the four-vector condition;

[0013] wherein, the volt-second balance equation under the four-vector condition is as follows:

[0014] ΔV oV1 +ΔV oV2 =ΔV oV3

[0015]

[0016]

[0017] Among them, ΔV oV1 、ΔV oV2 and ΔV oV1 respectively represent the midpoint voltage increments generated by three vectors capable of generating midpoint current. y1 is the duty cycle coefficient, and y1T s represents the vector duty cycle. C represents the upper capacitor or the lower capacitor in the three-level inverter topology. Since the upper and lower capacitors of the NPC-type three-level inverter topology are equal, only one symbol is needed to represent them. i a 、i b 、i c are three-phase currents. V1 to V4 are voltage vectors participating in the synthesis of the reference vector. T1, T2, and T4 are the action times of V1, V2, and V4 respectively. The action time of V3 is y1T s .

[0018] Matched with the above method, on the other hand, the present invention provides a modulation device for a three-level inverter, including: an acquisition unit configured to acquire the DC bus voltage and three-phase voltage of the three-level inverter; a control unit configured to determine the modulation degree and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter; the control unit is further configured to select small vectors, synthesize a virtual middle vector, and design a switching sequence based on the virtual middle vector according to the modulation degree and the reference vector; the control unit is further configured to determine the vector duty ratios of the three-level inverter based on the virtual middle vector and the switching sequence according to the volt-second balance equation and the numerical approximation method; the control unit is further configured to control the three-level inverter according to the vector duty ratios of the three-level inverter.

[0019] In some embodiments, the control unit determines the modulation degree and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter, including: determining a reference vector according to the three-phase voltage; determining the sector and small region where the reference voltage vector is located according to the amplitude and phase of the reference voltage vector; determining the modulation degree of the three-level inverter according to the amplitude of the reference voltage vector and the DC bus voltage.

[0020] In some embodiments, the control unit selects small vectors and synthesizes a virtual middle vector according to the modulation degree and the reference vector, including: determining the sector and small region where the reference vector is located according to the amplitude and phase of the reference vector; determining two adjacent small vectors of the reference vector according to the sector and small region where the reference vector is located and the modulation degree; and synthesizing a virtual middle vector according to the two adjacent small vectors of the reference vector.

[0021] In some embodiments, the control unit synthesizes a virtual middle vector according to two adjacent small vectors of the reference vector, including: synthesizing a virtual middle vector according to the virtual middle vector formula; where, in the first sector (taking the first sector as an example), the virtual middle vector formula is:

[0022]

[0023] where, V 13 ’ is the virtual middle vector, V7 and V8 are two adjacent small vectors, PPO is the switching state of the small vector V8, and ONN is the switching state of the small vector V7.

[0024] In some embodiments, the control unit designs a switching sequence based on the virtual middle vector, including: determining adjacent small vectors participating in synthesizing the virtual middle vector according to the sector and small region where the reference vector is located, synthesizing the virtual middle vector, and further determining the switching sequence.

[0025] In some embodiments, the control unit determines the duty ratio of each vector of the three-level inverter according to the virtual middle vector and the switching sequence based on the volt-second balance equation and the numerical approximation method, including: determining the volt-second balance equation under the four-vector condition based on the virtual middle vector and the switching sequence according to the volt-second balance equation and the numerical approximation method; and determining the duty ratio of each vector of the three-level inverter according to the volt-second balance equation under the four-vector condition.

[0026] where, the volt-second balance equation under the four-vector condition is as follows:

[0027] ΔV oV1 +ΔV oV2 =ΔV oV3

[0028]

[0029]

[0030] where, ΔV oV1 、ΔV oV2 and ΔV oV1respectively represent the midpoint voltage increments generated by three vectors capable of generating midpoint currents, y1 is the duty cycle coefficient, and y1T s represents the vector duty cycle, C represents the upper capacitor or the lower capacitor in the three-level inverter topology. Since the upper and lower capacitors in the NPC-type three-level inverter topology are equal, only one symbol is needed to represent them. i a 、i b 、i c are the three-phase currents, V1 to V4 are the voltage vectors participating in the synthesis of the reference vector respectively, T1, T2, and T4 are the action times of V1, V2, and V4 respectively, and the action time of V3 is y1T s .

[0031] Matched with the above device, on the other hand, the present invention provides a three-level inverter, including: the modulation device of the three-level inverter described above.

[0032] Matched with the above method, on the other hand, the present invention provides a storage medium, the storage medium includes a stored program, wherein, when the program runs, it controls the device where the storage medium is located to execute the modulation method of the three-level inverter described above.

[0033] Thus, the solution of the present invention determines the modulation degree and the position and angle of the reference vector by the DC bus voltage V dc and the three-phase voltage V ABC . When the position of the reference vector is determined, appropriate small vectors are selected to synthesize a virtual middle vector, and a switching sequence is designed based on this virtual middle vector. Finally, according to the volt-second balance equation and the numerical approximation method, the duty cycle of each vector is determined for inverter control; thereby, by setting a virtual vector in the space vector diagram of the three-level inverter, the midpoint current generated by the comprehensive action of the virtual vector, small vectors, and middle vector is 0, suppressing the fluctuation of the midpoint voltage, improving the output waveform quality of the three-level inverter, and ensuring the power consumption safety of electrical equipment.

[0034] Other features and advantages of the present invention will be described in the subsequent specification, and, in part, will be obvious from the specification, or will be understood by implementing the present invention.

[0035] Next, through the drawings and embodiments, the technical solution of the present invention will be further described in detail. Brief Description of the Drawings

[0036] Figure 1 is a schematic flowchart of an embodiment of the modulation method of the three-level inverter of the present invention;

[0037] Figure 2 is a schematic flowchart of an embodiment of determining the modulation degree and the reference vector of the three-level inverter in the method of the present invention;

[0038] Figure 3 Schematic flow chart of an embodiment for synthesizing a virtual medium vector in the method of the present invention;

[0039] Figure 4 Schematic flow chart of an embodiment for determining the duty ratio of each vector of the three-level inverter in the method of the present invention;

[0040] Figure 5 Schematic structural diagram of an embodiment of the modulation device of the three-level inverter of the present invention;

[0041] Figure 6 Schematic topological structure diagram of an NPC type three-level inverter;

[0042] Figure 7 Schematic space vector diagram of an NPC type three-level inverter;

[0043] Figure 8 Schematic virtual vector diagram and reference vector synthesis diagram of an NPC type three-level inverter;

[0044] Figure 9 Schematic flow chart of an embodiment of a modulation method for a three-level inverter.

[0045] In combination with the accompanying drawings, the reference signs in the embodiments of the present invention are as follows:

[0046] 102 - Acquisition unit; 104 - Control unit. Detailed implementation manners

[0047] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with specific embodiments of the present invention and the corresponding accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0048] In an NPC type three-level inverter, the midpoint voltage fluctuation is an important indicator. The midpoint voltage is the voltage difference between the upper and lower capacitors on the DC side of the inverter. Generally, it is desired that the midpoint voltage is 0, that is, the upper and lower capacitor voltages are equal. However, due to different switching actions during inverter switching, the charging and discharging of the three-phase current to the midpoint are unbalanced, resulting in a voltage difference between the upper and lower capacitors, which is the fluctuation of the midpoint voltage.

[0049] The midpoint voltage fluctuation will cause the waveform quality of the inverter output to deteriorate, resulting in an increase in THD (total harmonic distortion) in the output voltage and current, thereby affecting the equipment performance; when the midpoint voltage fluctuation is severe, a large voltage difference will appear between the upper and lower capacitors, causing an excessive voltage on one side of the capacitor. On the one hand, it endangers the equipment safety, and on the other hand, it will cause serious distortion of the output voltage and current of the inverter.

[0050] In the related solutions, in the modulation method of the three-level inverter, due to the fact that under high modulation index conditions, the selectable basic voltage vectors cannot make the midpoint voltage zero, and thus the midpoint voltage fluctuation cannot be suppressed.

[0051] According to an embodiment of the present invention, there is provided a modulation method for a three-level inverter, as Figure 1 shown in the flowchart of an embodiment of the method of the present invention. The modulation method of the three-level inverter may include: step S110 to step S150.

[0052] At step S110, obtain the DC bus voltage and three-phase voltage of the three-level inverter.

[0053] At step S120, according to the DC bus voltage and three-phase voltage of the three-level inverter, determine the modulation index and reference vector of the three-level inverter.

[0054] In some embodiments, for the specific process of determining the modulation index and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter in step S120, refer to the following exemplary description.

[0055] The following combines Figure 2 shown in the flowchart of an embodiment of the method of the present invention for determining the modulation index and reference vector of the three-level inverter to further illustrate the specific process of determining the modulation index and reference vector of the three-level inverter in step S120, including: step S210 to step S230.

[0056] Step S210, determine the reference vector according to the three-phase voltage, such as reference vector V ref .

[0057] Step S220, determine the sector and small region where the reference voltage vector is located according to the amplitude and phase of the reference voltage vector.

[0058] Step S230, determine the modulation index of the three-level inverter according to the amplitude of the reference voltage vector and the DC bus voltage.

[0059] Figure 7 is the space vector diagram of the NPC type three-level inverter. As Figure 7As shown, with the horizontal axis α as the abscissa and the β axis as the ordinate, taking the α axis as the reference, rotating counterclockwise, each π / 3 angle is a sector, and the entire space vector diagram is divided into 6 sectors, denoted as Z1 to Z6 respectively. Each sector is further divided into six small regions, such as the six small regions ①②③④⑤⑥.

[0060] As Figure 9 shown, a three-level inverter modulation method includes:

[0061] Step 1, sample the three-phase voltages V a , V b and V c , synthesize the signals V α , V β in the stationary coordinate system, and further synthesize the reference vector V ref . According to the amplitude |V ref | and the phase θ ref of the reference vector V n , determine the sector and the corresponding small region where the reference vector V ref is located, and judge its modulation index range according to the calculation method of the modulation index m.

[0062] Among them, the expression of the modulation index m is:

[0063]

[0064] In formula (1), m is the modulation index of the three-level inverter, V dc is the amplitude of the DC bus voltage, and |V ref | represents the amplitude of the reference vector V ref .

[0065] Among them, judging its modulation index range means: judging the small region and the modulation depth where the reference vector V ref is located according to the modulation index. Because in implementation, the modulation index is an indispensable judgment condition, and the modulation index m is used to determine the basic voltage vectors participating in the synthesis of the reference vector and the necessary synthetic virtual middle vector, so what is mentioned here is to judge the modulation index range, and the specific judgment method is the expression of the modulation index m listed in the following formula.

[0066] At step S130, according to the modulation index and the reference vector, select small vectors, synthesize a virtual middle vector, and design a switching sequence based on the virtual middle vector.

[0067] In some embodiments, for the specific process of selecting small vectors and synthesizing a virtual middle vector according to the modulation index and the reference vector in step S130, refer to the following exemplary description.

[0068] The following combines Figure 3Schematic diagram of a process for synthesizing a virtual medium vector in the method of the present invention, further illustrating the specific process of synthesizing the virtual medium vector in step S130, including: steps S310 to S330.

[0069] Step S310: Determine the sector and small region where the reference vector is located according to the amplitude and phase of the reference vector.

[0070] Step S320: Based on the sector and small region where the reference vector is located, determine two adjacent small vectors of the reference vector according to the modulation degree.

[0071] Step S330: Synthesize a virtual medium vector according to two adjacent small vectors of the reference vector.

[0072] Figure 8 Schematic diagram of virtual vectors and reference vector synthesis for an NPC type three-level inverter. As Figure 8 shown, when the reference vector V ref is located in the high modulation degree interval, it is equivalently synthesized by three adjacent basic voltage vectors and virtual vectors. Considering the problem of suppressing the midpoint voltage fluctuation, since the midpoint current generated by all medium vectors is positive (defining the direction flowing out of the midpoint O as the positive direction), that is, when selecting adjacent small vectors to synthesize the virtual vector, small vectors with a negative equivalent midpoint current generated should be selected. Taking the Figure 8 situation shown as an example, at this time, the switch state of the medium vector V 13 is PON, and the generated midpoint current is i b . Then, when selecting small vectors, two small vectors, namely the small vector V7 with the switch state ONN and the small vector V8 with the switch state PPO, whose generated midpoint currents are i a and i c respectively, should be selected. According to the current relationship under three-phase symmetry conditions:

[0073] i a +i b +i c = 0.

[0074] It can be known that the virtual small vector V 13 ' synthesized by the small vector V7 with the switch state ONN and the small vector V8 with the switch state PPO, and the midpoint current generated by the virtual small vector V 13 ' is -i b , while the large vector PNN (i.e., the large vector V1 with the switch state PNN) does not generate a midpoint current. Therefore, for the switching sequence under this condition, there is a duty cycle combination such that the midpoint current under this switching sequence is 0.

[0075] Aiming at the problem that the neutral point current cannot be zero under high modulation index conditions for NPC three-level inverters, the solution of the present invention designs a virtual vector, which is composed of adjacent small vectors, for the purpose of neutralizing the neutral point current generated by the middle vector or other vectors, and designs a nearest four-vector modulation method. This method can make the neutral point current generated by the comprehensive action of the virtual vector, small vector and middle vector zero, thereby suppressing the fluctuation of the neutral point voltage.

[0076] Among them, the nearest four vectors refer to the equivalent synthesis by the four basic vectors or virtual vectors closest to the reference vector V ref The following embodiments of the present invention are examples based on the nearest four vectors in the first sector.

[0077] In some embodiments, in step S230, synthesizing a virtual middle vector according to two adjacent small vectors of the reference vector includes:

[0078] Synthesizing the virtual middle vector according to the virtual middle vector formula.

[0079] Taking the first sector as an example, the virtual middle vector formula is:

[0080]

[0081] Among them, is the virtual middle vector V 13 ’, V7 and V8 are two adjacent small vectors, PPO is the switching state of the small vector V8, and ONN is the switching state of the small vector V7. Connecting several switching states together forms what is called a switching sequence.

[0082] Such as Figure 9 shown, a three-level inverter modulation method further includes:

[0083] Step 2: Participated by adjacent small vectors, and combined with the situation of the remaining basic voltage vectors, synthesize a virtual middle vector.

[0084] Among them, combining the situation of the remaining basic voltage vectors means: considering the flowing direction of the neutral point current of the middle vector, and determining the selection of the small vectors for synthesizing the virtual vector according to this situation.

[0085] In Figure 8 the example shown, the original middle vector is V 13 , and the newly synthesized virtual vector is V 13 ’. Taking Figure 8 the large sector Z1 shown as an example, the specific calculation relationship is shown in the following virtual vector synthesis method and selection method:

[0086]

[0087] In formula (2), the virtual middle vector V13 The representation relationship of '' can be understood as that, with the directions of two small vectors V7 and V8 remaining unchanged and half of the amplitudes, the virtual middle vector V 13 '' is synthesized. It can be proved by the geometric construction method that the starting point of the virtual middle vector V 13 '' is the origin of the space vector diagram, the angle is π / 6, the amplitude is half of the middle vector, and the end point falls on the common intersection point of the small regions ①②③④. For the remaining basic voltage vectors, such as the zero vector V0, the middle vector V 13 , the large vector V1, and the large vector V2.

[0088] In some embodiments, designing the switching sequence based on the virtual middle vector in step S130 includes: determining the adjacent small vectors participating in synthesizing the virtual middle vector according to the sector and small region where the reference vector is located, synthesizing the virtual middle vector, and further determining the switching sequence.

[0089] As Figure 9 shown, a three-level inverter modulation method further includes:

[0090] Step 3: According to the virtual vector synthesis method in step 2, the inverter switching sequence under high modulation ratio conditions in the entire space vector diagram can be designed. Taking the large sector Z1 as an example, when the reference vector is located in the small region ⑥, its vector sequence can be designed as: the virtual middle vector V 13 '' → the small vector V7 → the large vector V1 → the middle vector V 13 , and when shown as the switching sequence, it is: PPO-ONN → ONN → PNN → PON, where PPO-ONN represents the virtual vector synthesized by two small vectors, that is, the virtual middle vector V 13 ''. Similarly, when the reference vector is located in the small region ⑤, its vector sequence can be designed as V 13 '' → the middle vector V 13 → the large vector V2 → the small vector V8, and when shown as the switching sequence, it can be designed as: PPO-ONN → PON → PPN → PPO, where PPO-ONN represents the virtual vector V 13 '' synthesized by two small vectors.

[0091] At step S140, based on the virtual middle vector and the switching sequence, according to the volt-second balance equation and the numerical approximation method, the duty ratio of each vector of the three-level inverter is determined.

[0092] In some embodiments, for the specific process of determining the duty ratio of each vector of the three-level inverter based on the virtual middle vector and the switching sequence in step S140 according to the volt-second balance equation and the numerical approximation method, refer to the following exemplary description.

[0093] The following combines Figure 4The flowchart of an embodiment for determining the duty ratio of each vector of the three-level inverter in the method of the present invention is shown, further illustrating the specific process of determining the duty ratio of each vector of the three-level inverter in step S140, including: step S410 to step S420.

[0094] Step S410: Based on the virtual middle vector and the switching sequence, determine the volt-second balance equation under the four-vector condition according to the volt-second balance equation and the numerical approximation method.

[0095] Step S420: Determine the duty ratio of each vector of the three-level inverter according to the volt-second balance equation under the four-vector condition.

[0096] Among them, the volt-second balance equation under the four-vector condition is as follows:

[0097] ΔV oV1 +ΔV oV2 =ΔV oV3

[0098]

[0099]

[0100] Among them, ΔV oV1 、ΔV oV2 and ΔV oV1 respectively represent the midpoint voltage increments generated by three vectors that can generate midpoint current. y1 is the duty ratio coefficient, and y1T s represents the vector duty ratio. C represents the upper capacitor or the lower capacitor in the three-level inverter topology. Since the upper and lower capacitors in the NPC-type three-level inverter topology are equal, only one symbol is needed to represent them. i a 、i b 、i c are three-phase currents. V1 to V4 are voltage vectors participating in synthesizing the reference vector. T1, T2, and T4 are the action times of V1, V2, and V4 respectively. The action time of V3 is y1T s .

[0101] As Figure 9 shown, a modulation method for a three-level inverter further includes:

[0102] Step 4: It can be seen from the vector sequence in step 3 that the above vector sequences are all four vectors synthesizing the reference vector, while the volt-second balance equation in the related solution is the three-vector condition. Therefore, at this time, this equation needs to be improved to the volt-second balance equation under the four-vector condition. Based on the method of canceling the midpoint voltage proposed by the present invention, the midpoint voltages generated by each basic voltage vector cancel each other out.

[0103] According to the idea that the midpoint currents generated by each vector neutralize each other, the following equation holds true:

[0104] ΔV oV1 +ΔV oV2 =ΔV oV3

[0105]

[0106] In formula (3), ΔV oV1 , ΔV oV2 and ΔV oV1 They represent the midpoint voltage increments generated by the three vectors that can generate midpoint currents, y1 is the duty cycle coefficient, y1T s = represents the vector duty cycle. C represents the upper or lower capacitance in the three-level inverter topology. Since the upper and lower capacitance values are the same in the NPC three-level inverter topology, C can be used to represent the capacitance value.

[0107] The volt-second balance equation is:

[0108]

[0109] In formula (4), V1~V4 are the reference vectors V involved in the synthesis ref The voltage vector, T1, T2 and T4 are the action time of V1, V2 and V4 respectively, the action time of V3 is y1T s , y1 is the duty cycle coefficient. Combining the amplitude and phase relationship of each basic voltage vector, the above basic voltage vector action time T1, T2 and T4 can be obtained respectively. Each action time expression contains the duty cycle factor y1. s Indicates the sampling period, the action time of each basic voltage vector and T s The ratio of is expressed as duty cycle. The sum of the action time of each basic voltage vector is the sampling period time T s .

[0110] In the related solutions, a synchronous modulation method is adopted, while the solution of the present invention adopts a four-vector based virtual modulation method.

[0111] Combined with the characteristic that the duty cycle coefficient y1>0, the above formula can be combined to approximate the duty cycle coefficient. The result is the midpoint voltage increment ΔV that can be generated between the middle vector and the small vector. o The result of canceling each other out.

[0112] like Figure 9 As shown, a three-level inverter modulation method further includes:

[0113] Step 5: According to the duty ratios of the basic voltage vectors obtained by numerical approximation, convert each duty ratio into the switching state of the three-level inverter, which can be directly applied to the three-level inverter drive system.

[0114] In a nearest four-vector modulation method of the present invention, a numerical approximation method is designed. First, according to the volt-second balance equation, determine the duty ratios corresponding to each basic voltage vector and virtual vector, their corresponding relationships with each other, and according to the characteristic that the duty ratio is greater than zero, calculate or numerically approximate each action time. The calculated duty ratios can make the midpoint voltage increment of the inverter zero, effectively suppressing the midpoint voltage fluctuation.

[0115] Among them, the action time refers to the action times of the basic voltage vectors and virtual vectors participating in the synthesis of the reference vector.

[0116] At step S150, control the three-level inverter according to the vector duty ratios of the three-level inverter.

[0117] Figure 6 It is a schematic diagram of the topological structure of an NPC-type three-level inverter. In [[ID=:14]] Figure 6 the example shown, the voltage V dc is the DC bus voltage, and the capacitors C1 and C2 are the DC side voltage stabilizing capacitors respectively. Among them, the midpoint of the two capacitors (i.e., capacitors C1 and C2) is connected to the midpoint of two freewheeling diodes in each phase, which is the midpoint O of the NPC three-level inverter. S k1 -S k4 (k = A, B, C) are the power switch tubes of phases A, B, and C respectively, the loads A, B, and C are three-phase resistive-inductive loads respectively, and N is the load neutral point. From Figure 6 the example shown, it can be seen that according to different switching combinations of four power switch tubes in each phase, three level states of P, O, and N can be combined, corresponding to V dc / 2, 0, -V dc / 2 of the DC bus voltage respectively. The three-phase currents i A , i B , i C generated by the three-level inverter are used to drive the load.

[0118] Figure 9 It is a schematic flowchart of an embodiment of a three-level inverter modulation method. In Figure 9 the example shown, N refers to the sector number, n refers to the small area in the aforementioned sector, and T1, T2, T3, and T4 refer to the action times of zero vectors or certain vectors.

[0119] According to the process as Figure 9 shown, from the DC bus voltage V dcand the three-phase voltage V ABC Determine the modulation index and the position and angle of the reference vector. After determining the position of the reference vector, select appropriate small vectors to synthesize a virtual middle vector, design a switching sequence based on this virtual middle vector, and finally determine the duty cycle of each vector according to the volt-second balance equation and the numerical approximation method to control the inverter.

[0120] The solution of the present invention provides a modulation method for a three-level inverter. By designing a virtual vector, a new type of basic voltage vector (i.e., the designed virtual vector) is added to the space vector diagram, which has the following characteristics: the virtual vector is composed of adjacent small vectors, its direction is the same as that of the middle vector, and its amplitude is half of the middle vector. When calculating the duty cycle, it can be equivalently replaced by adjacent small vectors. Furthermore, based on this virtual vector, a nearest four-vector synthesis method under high modulation index conditions is constructed, and the duty cycle of each vector is calculated by the volt-second balance equation and the numerical approximation method. This method can effectively suppress the fluctuation of the midpoint voltage.

[0121] Adopting the technical solution of this embodiment, from the DC bus voltage V dc and the three-phase voltage V ABC Determine the modulation index and the position and angle of the reference vector. After determining the position of the reference vector, select appropriate small vectors to synthesize a virtual middle vector, design a switching sequence based on this virtual middle vector, and finally determine the duty cycle of each vector according to the volt-second balance equation and the numerical approximation method to control the inverter. Thus, by setting a virtual vector in the space vector diagram of the three-level inverter, the midpoint current generated by the comprehensive action of the virtual vector, small vectors, and middle vector is 0, suppressing the fluctuation of the midpoint voltage, improving the output waveform quality of the three-level inverter, and ensuring the electrical safety of electrical equipment.

[0122] According to an embodiment of the present invention, there is also provided a modulation device for a three-level inverter corresponding to the modulation method of the three-level inverter. Refer to Figure 5 the structural schematic diagram of an embodiment of the device of the present invention shown. The modulation device for the three-level inverter may include: an acquisition unit 102 and a control unit 104.

[0123] Among them, the acquisition unit 102 is configured to acquire the DC bus voltage and the three-phase voltage of the three-level inverter. The specific functions and processes of this acquisition unit 102 are referred to step S110.

[0124] The control unit 104 is configured to determine the modulation index and the reference vector of the three-level inverter according to the DC bus voltage and the three-phase voltage of the three-level inverter. The specific functions and processes of this control unit 104 are referred to step S120.

[0125] In some embodiments, the control unit 104 determines the modulation index and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter, including:

[0126] The control unit 104 is specifically further configured to determine a reference vector according to the three-phase voltage, such as reference vector V ref . For the specific functions and processes of this control unit 104, refer to step S210.

[0127] The control unit 104 is specifically further configured to determine the sector and small region where the reference voltage vector is located according to the amplitude and phase of the reference voltage vector. For the specific functions and processes of this control unit 104, refer to step S220.

[0128] The control unit 104 is specifically further configured to determine the modulation index of the three-level inverter according to the amplitude of the reference voltage vector and the DC bus voltage. For the specific functions and processes of this control unit 104, refer to step S230.

[0129] Figure 7 It is a space vector schematic diagram of an NPC type three-level inverter. As Figure 7 shown, with the horizontal axis α-axis as the abscissa and the β-axis as the ordinate, taking the α-axis as the reference and rotating counterclockwise, each π / 3 angle is a sector, and the entire space vector diagram is divided into 6 sectors, denoted as Z1-Z6 respectively. Each sector is further divided into six small regions, such as the six small regions ①②③④⑤⑥.

[0130] As Figure 9 shown, a modulation method for a three-level inverter includes:

[0131] Step 1, sample three-phase voltages V a , V b and V c , synthesize signals V α , V β in the stationary coordinate system, and further synthesize reference vector V ref . According to the amplitude |V ref | and phase θ ref of reference vector V n , determine the sector and corresponding small region where reference vector V ref is located, and judge its modulation index range according to the calculation method of the modulation index m.

[0132] Among them, the expression of the modulation index m is:

[0133]

[0134] In formula (1), m is the modulation index of the three-level inverter, V dcis the amplitude of the DC bus voltage, |V ref | represents the reference vector V ref amplitude.

[0135] The control unit 104 is further configured to select small vectors, synthesize a virtual middle vector according to the modulation degree and the reference vector, and design a switching sequence based on the virtual middle vector. For the specific functions and processes of this control unit 104, refer to step S130.

[0136] In some embodiments, the control unit 104 selects small vectors and synthesizes a virtual middle vector according to the modulation degree and the reference vector, including:

[0137] The control unit 104 is specifically further configured to determine the sector and small region where the reference vector is located according to the amplitude and phase of the reference vector. For the specific functions and processes of this control unit 104, refer to step S310.

[0138] The control unit 104 is specifically further configured to determine two adjacent small vectors of the reference vector according to the modulation degree based on the sector and small region where the reference vector is located. For the specific functions and processes of this control unit 104, refer to step S320.

[0139] The control unit 104 is specifically further configured to synthesize a virtual middle vector according to two adjacent small vectors of the reference vector. For the specific functions and processes of this control unit 104, refer to step S330.

[0140] Figure 8 is the schematic diagram of virtual vectors and the schematic diagram of reference vector synthesis for an NPC-type three-level inverter. As Figure 8 shown, when the reference vector V ref is located in the high modulation degree interval, it is equivalently synthesized by three adjacent basic voltage vectors and virtual vectors. Considering the problem of suppressing the midpoint voltage fluctuation, since the midpoint currents generated by all middle vectors are positive (defining the direction of flowing out of the midpoint O as the positive direction), that is, when selecting adjacent small vectors to synthesize virtual vectors, small vectors that generate negative equivalent midpoint currents should be selected. Taking the [[ID=3 shown situation as an example, at this time, the switching state of the middle vector V 13 is PON, and the generated midpoint current is i b , then when selecting small vectors, two small vectors, namely the small vector V7 with the switching state of ONN and the small vector V8 with the switching state of PPO, should be selected, and the midpoint currents generated by them are i a and i c respectively. According to the current relationship under three-phase symmetry conditions:

[0141] i a +ib +i c = 0。

[0142] It can be seen that the virtual small vector V synthesized by the small vector V7 with the switch state of ONN and the small vector V8 with the switch state of PPO 13 ’, the virtual small vector V 13 ’ generates a midpoint current of -i b , and the large vector PNN (i.e., the large vector V1 with the switch state of PNN) does not generate a midpoint current. Therefore, for the switch sequence under this condition, there is a duty cycle combination such that the midpoint current under this switch sequence is 0.

[0143] Aiming at the problem that the midpoint current cannot be made 0 under high modulation ratio conditions for NPC-type three-level inverters, the solution of the present invention designs a virtual vector composed of adjacent small vectors to neutralize the midpoint current generated by the mid-vector or other basic voltage vectors, and designs a nearest four-vector modulation device. This device can make the midpoint current generated by the comprehensive action of the virtual vector, small vector and mid-vector be 0, thereby suppressing the fluctuation of the midpoint voltage.

[0144] In some embodiments, the control unit 104 synthesizes a virtual mid-vector according to two adjacent small vectors of the reference vector, including: the control unit 104 is specifically further configured to synthesize the virtual mid-vector according to the virtual mid-vector formula.

[0145] Among them, taking the first sector as an example, the virtual mid-vector formula is:

[0146]

[0147] Among them, V 13 ’ is the virtual mid-vector, V7 and V8 are two adjacent small vectors, PPO is the switch state of the small vector V8, and ONN is the switch state of the small vector V7.

[0148] As ​ shown, a three-level inverter modulation device further includes:

[0149] Step 2: Participated by adjacent small vectors, combined with the situation of the remaining basic voltage vectors, synthesize the virtual mid-vector.

[0150] Taking ​ the large sector Z1 shown in as an example, the specific calculation relationship is as shown in the following virtual vector synthesis method and selection method:

[0151]

[0152] In formula (2), the virtual mid-vector V 13The relationship of ' can be understood as the two small vectors V7 and V8 have the same direction and half the amplitude, and the virtual vector V 13 'Synthesis. It can be proved by geometric construction that the virtual vector V 13 The starting point of ' is the origin of the space vector diagram, the angle is π / 6, the amplitude is half of the center vector, and the end point falls on the common intersection of the small areas ①②③④. Other basic voltage vectors, such as zero vector V0, center vector V 13 , large vector V1, large vector V2.

[0153] In some embodiments, the control unit 104 designs a switching sequence based on the virtual center vector, including: the control unit 104 is further configured to determine adjacent small vectors that participate in synthesizing the virtual center vector based on the sector and small area where the reference vector is located, and synthesize the virtual center vector to further determine the switching sequence.

[0154] like ​ As shown, a three-level inverter modulation device further includes:

[0155] Step 3: Based on the virtual vector synthesis method described in step 2, the inverter switching sequence under high modulation index conditions in the entire space vector diagram can be designed. Taking the large sector Z1 as an example, when the reference vector is located in the small area ⑥, its vector sequence can be designed as follows: Virtual middle vector V 13 '→Small vector V7→Large vector V1→Medium vector V 13 , which is displayed as a switching sequence: PPO-ONN→ONN→PNN→PON, where PPO-ONN represents a virtual vector composed of two small vectors, namely the virtual middle vector V 13 '. Similarly, when the reference vector is located in the small area ⑤, its vector sequence can be designed as V 13 '→Medium vector V 13 → large vector V2 → small vector V8, which is displayed as a switching sequence that can be designed as: PPO-ONN → PON → PPN → PPO, where PPO-ONN represents a virtual vector V composed of two small vectors 13 '.

[0156] The control unit 104 is further configured to determine the duty cycle of each vector of the three-level inverter based on the virtual neutral vector and the switching sequence according to a volt-second balance equation and a numerical approximation device. The specific functions and processing of the control unit 104 are also shown in step S140.

[0157] In some embodiments, the control unit 104 determines the duty cycle of each vector of the three-level inverter based on the virtual neutral vector and the switching sequence according to a volt-second balance equation and a numerical approximation method, including:

[0158] The control unit 104 is further specifically configured to determine the volt-second balance equation under the four-vector condition based on the virtual middle vector and the switching sequence according to the volt-second balance equation and the numerical approximation device. For the specific functions and processes of the control unit 104, refer to step S410.

[0159] The control unit 104 is further specifically configured to determine the duty ratio of each vector of the three-level inverter according to the volt-second balance equation under the four-vector condition. For the specific functions and processes of the control unit 104, refer to step S420.

[0160] Among them, the volt-second balance equation under the four-vector condition is as follows:

[0161] ΔV oV1 +ΔV oV2 =ΔV oV3

[0162]

[0163]

[0164] Among them, ΔV oV1 、ΔV oV2 and ΔV oV1 respectively represent the midpoint voltage increments generated by three vectors capable of generating midpoint current. y1 is the duty ratio coefficient, and y1T s represents the vector duty ratio. C represents the upper capacitor or the lower capacitor in the three-level inverter topology. Since the upper and lower capacitors in the NPC-type three-level inverter topology are equal, only one symbol is needed to represent them. i a 、i b 、i c are three-phase currents. V1 to V4 are voltage vectors participating in the synthesis of the reference vector. T1, T2, and T4 are the action times of V1, V2, and V4 respectively. The action time of V3 is y1T s .

[0165] As ​ shown, a three-level inverter modulation device further includes:

[0166] Step 4: From the vector sequence in step 3, it can be seen that the above vector sequences are all four-vector synthesized reference vectors, while the volt-second balance equation in the related solution is the three-vector condition. Therefore, at this time, the equation needs to be improved to the volt-second balance equation under the four-vector condition. Based on the device for canceling the midpoint voltage proposed by the present invention, the midpoint voltages generated by each basic voltage vector cancel each other out.

[0167] According to the idea that the midpoint currents generated by each vector neutralize each other, the following equation holds:

[0168]

[0169] In formula (3), ΔV oV1 , ΔV oV2 and ΔV oV1 They represent the midpoint voltage increments generated by the three vectors that can generate midpoint currents, y1 is the duty cycle coefficient, y1T s = represents the vector duty cycle. C represents the upper or lower capacitance in the three-level inverter topology. Since the upper and lower capacitances of the NPC three-level inverter topology are equal, only one symbol is needed to represent them. Since the upper and lower capacitances are the same in the NPC three-level inverter topology, C can be used to represent the capacitance value.

[0170] The volt-second balance equation is:

[0171]

[0172] In formula (4), V1~V4 are the reference vectors V involved in the synthesis ref The voltage vector, T1, T2 and T4 are the action time of V1, V2 and V4 respectively, the action time of V3 is y1T s , y1 is the duty cycle coefficient. Combining the amplitude and phase relationship of each basic voltage vector, the above basic voltage vector action time T1, T2 and T4 can be obtained respectively. Each action time expression contains the duty cycle factor y1. s Indicates the sampling period, the action time of each basic voltage vector and T s The ratio of is expressed as duty cycle. The sum of the action time of each basic voltage vector is the sampling period time T s .

[0173] Combined with the characteristic that the duty cycle coefficient y1>0, the above formula can be combined to approximate the duty cycle coefficient. The result is the midpoint voltage increment ΔV that can be generated between the middle vector and the small vector. o The result of canceling each other out.

[0174] like ​ As shown, a three-level inverter modulation device further includes:

[0175] Step 5: Based on the duty cycles of the basic voltage vectors calculated by numerical approximation, each duty cycle is converted into a switching state of the three-level inverter, which can be directly applied to the three-level inverter drive system.

[0176] In a recent four-vector modulation device of the present invention, a numerical approximation device is designed. First, the duty ratios corresponding to each basic voltage vector and virtual vector, their corresponding relationships with each other, and based on the characteristic that the duty ratio is greater than zero, each action time is calculated or numerically approximated. The calculated duty ratios can make the midpoint voltage increment of the inverter zero, effectively suppressing the midpoint voltage fluctuation.

[0177] The control unit 104 is further configured to control the three-level inverter according to the vector duty ratios of the three-level inverter. For the specific functions and processes of this control unit 104, refer to step S150.

[0178] ​ It is a schematic diagram of the topological structure of an NPC-type three-level inverter. In ​ the example shown, the voltage V dc is the DC bus voltage, and the capacitors C1 and C2 are the DC-side voltage stabilizing capacitors respectively. Among them, the midpoint of the two capacitors (i.e., capacitors C1 and C2) is connected to the midpoint of the two freewheeling diodes in each phase, which is the midpoint O of the NPC three-level inverter. S k1 -S k4 (k = A, B, C) are the power switch tubes of phases A, B, and C respectively, the loads A, B, and C are three-phase resistive-inductive loads respectively, and N is the load neutral point. From ​ the example shown, it can be seen that according to the different switching combinations of the four power switch tubes in each phase, three level states of P, O, and N can be combined, corresponding to V dc / 2, 0, -V dc / 2 of the DC bus voltage respectively. The three-phase currents i A , i B , i C generated by the three-level inverter are used to drive the load.

[0179] ​ It is a schematic flowchart of an embodiment of a three-level inverter modulation method. According to the process shown in ​ , the modulation degree and the position and angle of the reference vector are determined from the DC bus voltage V dc and the three-phase voltages V ABC . When the position of the reference vector is determined, a suitable small vector is selected to synthesize a virtual middle vector, and a switching sequence is designed based on this virtual middle vector. Finally, according to the volt-second balance equation and the numerical approximation device, the vector duty ratios are determined for inverter control.

[0180] The solution of the present invention provides a three-level inverter modulation device. By designing a virtual vector, a new type of basic voltage vector (i.e., the designed virtual vector) is added in the space vector diagram, which has the following characteristics: The virtual vector is composed of adjacent small vectors, its direction is the same as that of the middle vector, its amplitude is half of the middle vector, and it can be equivalently replaced by adjacent small vectors when calculating the duty cycle. Furthermore, based on this virtual vector, a nearest four-vector synthesis device under high modulation ratio conditions is constructed, and the duty cycles of each vector are calculated by the volt-second balance equation and a numerical approximation device. This device can effectively suppress the fluctuation of the midpoint voltage.

[0181] Since the processing and functions implemented by the device in this embodiment are basically corresponding to the embodiments, principles, and examples of the foregoing method, for the details not described in the description of this embodiment, reference can be made to the relevant descriptions in the foregoing embodiments, and no further elaboration will be provided here.

[0182] Adopting the technical solution of the present invention, by using the DC bus voltage V dc and the three-phase voltage V ABC to determine the modulation ratio and the position and angle of the reference vector. After determining the position of the reference vector, appropriate small vectors are selected to synthesize a virtual middle vector, and a switching sequence is designed based on this virtual middle vector. Finally, according to the volt-second balance equation and the numerical approximation method, the duty cycles of each vector are determined for inverter control, improving the output waveform quality of the three-level inverter.

[0183] According to an embodiment of the present invention, there is also provided a three-level inverter corresponding to the modulation device of the three-level inverter. This three-level inverter may include: the modulation device of the three-level inverter described above.

[0184] Since the processing and functions implemented by the three-level inverter in this embodiment are basically corresponding to the embodiments, principles, and examples of the foregoing device, for the details not described in the description of this embodiment, reference can be made to the relevant descriptions in the foregoing embodiments, and no further elaboration will be provided here.

[0185] Adopting the technical solution of the present invention, by using the DC bus voltage V dc and the three-phase voltage V ABC to determine the modulation ratio and the position and angle of the reference vector. After determining the position of the reference vector, appropriate small vectors are selected to synthesize a virtual middle vector, and a switching sequence is designed based on this virtual middle vector. Finally, according to the volt-second balance equation and the numerical approximation method, the duty cycles of each vector are determined for inverter control, ensuring the safety of electrical equipment during use.

[0186] According to an embodiment of the present invention, there is also provided a storage medium corresponding to the modulation method of the three-level inverter. The storage medium includes a stored program, wherein when the program runs, it controls the device where the storage medium is located to execute the modulation method of the three-level inverter described above.

[0187] Since the processing and functions implemented by the storage medium of this embodiment are basically corresponding to the embodiments, principles and examples of the foregoing method, for the details not described in the description of this embodiment, reference may be made to the relevant descriptions in the foregoing embodiments, which will not be elaborated here.

[0188] Adopting the technical solution of the present invention, by the DC bus voltage V dc and the three-phase voltage V ABC the modulation degree and the position and angle of the reference vector are determined. After determining the position of the reference vector, appropriate small vectors are selected to synthesize a virtual middle vector, and a switching sequence is designed based on this virtual middle vector. Finally, according to the volt-second balance equation and the numerical approximation method, the duty ratio of each vector is determined for inverter control, so that the upper and lower capacitor voltages of the three-level inverter are uniform.

[0189] In summary, it is easy for those skilled in the art to understand that, on the premise of no conflict, the above advantageous ways can be freely combined and superimposed.

[0190] The above are only the embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the scope of the claims of the present invention.

Claims

1. A modulation method for a three-level inverter, characterized in that, Including: Obtain the DC bus voltage and three-phase voltage of the three-level inverter; Determine the modulation index and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter; wherein, the determined reference vector of the three-level inverter includes: the position and angle of the reference vector; Select small vectors according to the modulation index and the reference vector, synthesize a virtual middle vector, and design a switching sequence based on the virtual middle vector; Based on the virtual middle vector and the switching sequence, determine the duty ratio of each vector of the three-level inverter according to the volt-second balance equation and the numerical approximation method; Control the three-level inverter according to the duty ratio of each vector of the three-level inverter; by setting a virtual vector in the space vector diagram of the three-level inverter, making the midpoint current generated by the combination of the virtual vector, small vectors and middle vector zero, suppressing the fluctuation of the midpoint voltage, and improving the output waveform quality of the three-level inverter.

2. The modulation method of the three-level inverter according to claim 1, characterized in that Determine the modulation index and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter, including: Determine the reference vector according to the three-phase voltage; Determine the sector and small region where the reference voltage vector is located according to the amplitude and phase of the reference voltage vector; Determine the modulation index of the three-level inverter according to the amplitude of the reference voltage vector and the DC bus voltage.

3. The modulation method of the three-level inverter according to claim 1, characterized in that Select small vectors according to the modulation index and the reference vector, synthesize a virtual middle vector, including: Determine the sector and small region where the reference vector is located according to the amplitude and phase of the reference vector; Based on the sector and small region where the reference vector is located, determine two adjacent small vectors of the reference vector according to the modulation index; Synthesize a virtual middle vector according to the two adjacent small vectors of the reference vector.

4. The modulation method of the three-level inverter according to claim 3, characterized in that, Synthesize a virtual middle vector according to the two adjacent small vectors of the reference vector, including: Synthesize a virtual middle vector according to the virtual middle vector formula; Wherein, in the first sector, the virtual middle vector formula is: Among them, V 13 ’ is a virtual medium vector, V7 and V8 are two adjacent small vectors, PPO is the switching state of the small vector V8, and ONN is the switching state of the small vector V7.

5. The modulation method of the three-level inverter according to claim 3, characterized in that Design a switching sequence based on the virtual middle vector, including: According to the sector and small region where the reference vector is located, determine the adjacent small vectors participating in synthesizing the virtual middle vector, synthesize the virtual middle vector, and further determine the switching sequence.

6. The modulation method of the three-level inverter according to any one of claims 1 to 5, characterized in that Based on the virtual middle vector and the switching sequence, determine the duty ratio of each vector of the three-level inverter according to the volt-second balance equation and the numerical approximation method, including: Based on the virtual middle vector and the switching sequence, determine the volt-second balance equation under the four-vector condition according to the volt-second balance equation and the numerical approximation method; Determine the duty ratio of each vector of the three-level inverter according to the volt-second balance equation under the four-vector condition; Wherein, the volt-second balance equation under the four-vector condition is as follows: ΔV oV1 +ΔV oV2 =ΔV oV3 Among them, ΔV oV1 , ΔV oV2 and ΔV oV1 respectively represent the midpoint voltage increments generated by three vectors capable of generating midpoint current. y1 is the duty cycle coefficient, and y1T s represents the vector duty cycle. C represents the upper capacitor or the lower capacitor in the three-level inverter topology. Since the upper and lower capacitors in the NPC-type three-level inverter topology are equal, only one symbol is needed to represent them. i a , i b , i c are three-phase currents. V1 to V4 are voltage vectors participating in the synthesis of the reference vector. T1, T2, and T4 are the action times of V1, V2, and V4 respectively. The action time of V3 is y1T s .

7. A modulation device for a three-level inverter, characterized in that, Including: An acquisition unit configured to acquire the DC bus voltage and three-phase voltage of the three-level inverter; A control unit, configured to determine the modulation index and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter; wherein, the determined reference vector of the three-level inverter includes: the position and angle of the reference vector. The control unit is further configured to select small vectors, synthesize a virtual middle vector according to the modulation index and the reference vector, and design a switching sequence based on the virtual middle vector. The control unit is further configured to determine the duty ratio of each vector of the three-level inverter based on the virtual middle vector and the switching sequence according to the volt-second balance equation and the numerical approximation device. The control unit is further configured to control the three-level inverter according to the duty ratio of each vector of the three-level inverter; by setting a virtual vector in the space vector diagram of the three-level inverter, the midpoint current generated by the comprehensive action of the virtual vector, small vectors and middle vector is made 0, suppressing the fluctuation of the midpoint voltage and improving the output waveform quality of the three-level inverter.

8. The modulation device of the three-level inverter according to claim 7, characterized in that, The control unit determines the modulation index and reference vector of the three-level inverter according to the DC bus voltage and three-phase voltage of the three-level inverter, including: Determining a reference vector according to the three-phase voltage. Determining the sector and small region where the reference voltage vector is located according to the amplitude and phase of the reference voltage vector. Determining the modulation index of the three-level inverter according to the amplitude of the reference voltage vector and the DC bus voltage.

9. The modulation device of the three-level inverter according to claim 7, characterized in that, The control unit selects small vectors and synthesizes a virtual middle vector according to the modulation index and the reference vector, including: Determining the sector and small region where the reference vector is located according to the amplitude and phase of the reference vector. Based on the sector and small region where the reference vector is located, determining two adjacent small vectors of the reference vector according to the modulation index. Synthesizing a virtual middle vector according to the two adjacent small vectors of the reference vector.

10. The modulation device of the three-level inverter according to claim 9, characterized in that, The control unit synthesizes a virtual middle vector according to the two adjacent small vectors of the reference vector, including: Synthesizing a virtual middle vector according to the virtual middle vector formula. Wherein, in the first sector, the virtual middle vector formula is: Among them, V 13 ’ is a virtual middle vector, V7 and V8 are two adjacent small vectors, PPO is the switching state of the small vector V8, and ONN is the switching state of the small vector V7.

11. The modulation device of the three-level inverter according to claim 9, characterized in that, The control unit designs a switching sequence based on the virtual middle vector, including: Determining the adjacent small vectors participating in the synthesis of the virtual middle vector according to the sector and small region where the reference vector is located, synthesizing the virtual middle vector, and further determining the switching sequence.

12. The modulation device of the three-level inverter according to any one of claims 7 to 11, characterized in that, The control unit determines the duty ratio of each vector of the three-level inverter based on the virtual middle vector and the switching sequence according to the volt-second balance equation and the numerical approximation method, including: Based on the virtual middle vector and the switching sequence, determining the volt-second balance equation under the four-vector condition according to the volt-second balance equation and the numerical approximation device. Determining the duty ratio of each vector of the three-level inverter according to the volt-second balance equation under the four-vector condition. Wherein, the volt-second balance equation under the four-vector condition is as follows: ΔV oV1 +ΔV oV2 =ΔV oV3 Among them, ΔV oV1 , ΔV oV2 and ΔV oV1 respectively represent the midpoint voltage increments generated by three vectors that can generate midpoint currents. y1 is the duty cycle coefficient, and y1T s represents the vector duty cycle. C represents the upper capacitor or the lower capacitor in the three-level inverter topology. Since the upper and lower capacitors of the NPC-type three-level inverter topology are equal, only one symbol is needed to represent them. i a , i b , i c are three-phase currents. V1 to V4 are voltage vectors participating in the synthesis of the reference vector. T1, T2, and T4 are the action times of V1, V2, and V4 respectively. The action time of V3 is y1T s .

13. A three-level inverter, characterized in that, Including: The modulation device of the three-level inverter according to any one of claims 7 to 12.

14. A storage medium, characterized in that, The storage medium includes a stored program, wherein when the program runs, it controls the device where the storage medium is located to execute the modulation method of the three-level inverter according to any one of claims 1 to 6.

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