Temporal filtering of gamma events

Abstract

The present application generally relates to silicon photomultiplier (SiPM) detector arrays. In one aspect, there is a system comprising an array of cells, each cell comprising a single photon avalanche diode (SPAD), the SPAD being reverse biased above the breakdown voltage of the SPAD. The system may also include a trigger network configured to generate a pulse on a trigger line in response to a SPAD of the array experiencing a breakdown. The system may also include a pulse width filter configured to block pulses on the pulse line whose pulse width is less than a threshold width.

Description

Technical Field

[0001] The following generally refers to silicon photomultiplier (SiPM) detector arrays of the type often used in digital positron emission tomography (PET) systems, astronomical detectors, light detection and ranging (LIDAR) systems, and the like. Background Art

[0002] In a SiPM for digital PET, each pixel of the detector array itself consists of an array of cells, where each cell includes a single photon avalanche diode (SPAD) and part of the supporting circuitry, the SPAD being reverse biased above its breakdown voltage. The supporting circuitry includes a submodule for generating and verifying a trigger event when the SPAD enters a breakdown state, and for counting the breakdown events on the array of cells of the pixel within a certain time interval after the trigger event. After the trigger event (e.g., after the breakdown), a quenching and refresh circuit is used to accelerate the recovery of the SPAD. Some illustrative examples of SiPM detector arrays for PET are described in U.S. Patent No. 9,268,033, entitled “Digital Silicon Photomultiplier for TOF-PET” by Frach et al. and in U.S. Patent Publication No. US2016 / 0011321 A1, entitled “Timestamping Detected Radiation Quanta” by Solf.

[0003] However, certain issues can arise due to noise. In particular, so-called dark counts are SPAD breakdowns that are unrelated to photon detection and are primarily caused by thermally generated carriers in the single-photon avalanche diode junction. These dark counts can lead to false triggers, which can introduce undesirable detector dead time due to the processing, rejection, and reset of these false triggers by the SiPM.

[0004] Certain improvements that address this and other problems are disclosed below. Summary of the Invention

[0005] In one disclosed aspect, a system includes: an array of cells, each cell including a single-photon avalanche diode (SPAD), the SPAD being reverse biased above a breakdown voltage of the SPAD; a trigger network configured to generate a pulse on a trigger line in response to a SPAD of the array experiencing breakdown; and a pulse width filter configured to block pulses on the pulse line having a pulse width less than a threshold width.

[0006] In another disclosed aspect, a method includes generating a pulse on a trigger line using a trigger network in response to single photon avalanche diodes (SPADs) of an array experiencing breakdown; and blocking pulses on the pulse line having a pulse width less than a threshold width using a pulse width filter.

[0007] In another disclosed aspect, a trigger network for a silicon photomultiplier (SiPM), the silicon photomultiplier comprising an array of cells, each cell comprising a single-photon avalanche diode (SPAD), the SPAD being reverse biased above a breakdown voltage of the SPAD, the trigger network comprising: a network of OR gates connecting the cells of the array with a trigger line, the network of OR gates generating a pulse on the trigger line in response to the SPAD of the array experiencing breakdown; and a pulse width filter configured to block pulses on the pulse line having a pulse width less than a threshold width.

[0008] One advantage resides in providing a trigger line noise filter that effectively rejects dark counts.

[0009] Another advantage resides in providing a trigger line noise filter that effectively rejects dark counts without invoking energy-based validation logic, thereby avoiding unnecessary detector dead time.

[0010] Another advantage resides in providing a trigger line noise filter that effectively rejects dark counts without triggering the integration and time stamp circuits, thereby avoiding unnecessary detector reset processing.

[0011] Another advantage resides in an improved PET system having improved imaging capabilities.

[0012] Another advantage resides in improved light detection and ranging (LIDAR) systems.

[0013] A given embodiment may provide none, one, two, more, or all of the aforementioned advantages, and / or may provide other advantages that will become apparent to one of ordinary skill in the art upon reading and understanding this disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The invention may take form in various components and arrangements of components, and in various steps and arrangements of steps.The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention.

[0015] Figure 1 An embodiment of a PET scanning system is schematically illustrated.

[0016] Figure 2A and Figure 2B An embodiment of a detector pixel (or more generally, a silicon photomultiplier, ie SiPM) is schematically illustrated. Figure 2A The diagram shows a single row of circuits. Figure 2B The circuit for combining rows is shown.

[0017] Figure 3 Examples of pulses caused by dark counts and gamma events are shown.

[0018] Figure 4 An embodiment of a pulse width filter is illustrated.

[0019] Figure 5 Pictured Figure 2A An example of a variable width pulse generator implementation for a row trigger pulse generator.

[0020] Figure 6 The efficacy of the time domain filter is illustrated; more specifically, the coincidence-resolved time spectra for different pulse width / trigger filter settings are illustrated.

[0021] Figure 7 The effect of the time domain filter alone is shown; more specifically, measurements showing the effect of the pulse width filter and variable pulse width with the second stage fast verification filter disabled are illustrated.

[0022] Figure 8 Embodiments relating to pulse width filters are schematically illustrated. DETAILED DESCRIPTION

[0023] The following refers to silicon photomultiplier (SiPM) detector arrays that are frequently used in medical nuclear imaging systems, such as digital positron emission tomography (PET) systems. However, the disclosed method has many applications both within and outside the field of nuclear medicine imaging.

[0024] refer to Figure 1 , the radiological imaging system 10 includes a scanner 12. The scanner 12 is arranged and dimensioned to receive a prone human subject in an examination region.

[0025] Different scanning techniques and variations can be used for medical nuclear imaging. One such technique is PET. In one PET example, a subject is administered a radiopharmaceutical comprising a radioactive isotope that emits positrons. The radiopharmaceutical can be designed to accumulate in an organ or tissue of interest (e.g., brain, lungs, tumor, etc.). After the radiopharmaceutical is administered, the subject is placed in an examination area. Over time, the radiopharmaceutical will emit positrons in a radioactive decay event. Before interacting with an electron, the positron emitted by the radiopharmaceutical will travel a short (usually negligible) distance. Once the positron interacts with the electron, both the positron and the electron will be annihilated and a pair of gamma photons traveling in opposite directions (sometimes referred to as annihilation photons) will be produced. The gamma photons travel in opposite directions, and each gamma photon can be detected when it reaches the scintillator 100 in the scanner 12. This example can depend on the simultaneous detection of a pair of gamma photons. Therefore, some algorithms can discount gamma photons that do not arrive at the same time.

[0026] To detect gamma photons, silicon photomultiplier (SiPM) detector arrays are used. In these detectors, each pixel of the detector array itself consists of an array of cells, where each cell includes a single-photon avalanche diode (SPAD) and part of the supporting circuitry, with the SPAD reverse-biased above its breakdown voltage. (Hereinafter, the term "pixel" is used to refer to an array of SPAD cells because, in PET applications, the array of cells forms one pixel of a larger PET detector array. However, it will be appreciated that in some other applications, a single array of SPAD cells may be employed, for example as a radiation detector in a LIDAR system, in which case there may be only one "pixel.") The supporting circuitry includes submodules for generating and verifying a trigger event when the SPAD enters a breakdown state, and for counting the number of breakdown events across the array of cells in the pixel within a certain time interval after the trigger event, and assigning a digital timestamp to the event. Quenching and refresh circuitry is used to accelerate the recovery of the SPAD after breakdown. To provide high spatial resolution in PET detector designs, the silicon footprint occupied by each cell is kept as small as practical. While some support circuitry must be located within the area of ​​the cells in the array, a feasible portion of the support circuitry is placed around the perimeter of the pixel and is also designed to serve multiple cells (e.g., an entire row of cells). Some illustrative examples of SiPM detector arrays for PET are described in U.S. Patent No. 9,268,033 to Frach et al., entitled “Digital Silicon Photomultiplier for TOF-PET,” and in U.S. Patent Publication No. US2016 / 0011321 A1 to Solf, entitled “Timestamping Detected Radiation Quanta,” both of which are incorporated herein by reference in their entireties.

[0027] A complete PET radiation detector for detecting gamma rays also includes a scintillator 100, which generates flashes of light (scintillation) when gamma rays are absorbed. SiPM pixels 110 detect the bursts of photons that make up the scintillation. The total number of counts over the integration time interval is a measure of the photon energy of the detection event, while the timing of the trigger signal provides a timestamp for the event. Furthermore, it is desirable to operate the SiPM at room temperature, or at least to limit the amount of cooling required.

[0028] Of interest here is that the trigger detection and verification circuitry is located at the perimeter of the pixel area, and the cell's trigger lines are combined by a trigger network including a logical OR unit. The effect is that the final output is a queue of trigger pulses generated by all the SPADs in the pixel. Thus, a single trigger detection circuit can be used for the entire pixel. Some designs aim to trigger immediately at the moment of first SPAD breakdown to provide the highest temporal resolution.

[0029] One potential problem is that the SPAD can also be triggered due to noise. In particular, so-called dark counts are triggering events unrelated to photon detection, primarily due to thermally generated carriers in the single-photon avalanche diode junction. Typically, as temperature increases, noise (e.g., dark count triggering events) also increases. In this regard, this can lead to false triggering because the pixel triggering occurs after the first SPAD breakdown. Energy-based verification circuitry can partially address this issue. The trigger verification circuit verifies the trigger signal and, if it determines that the trigger signal is false (e.g., due to thermally induced SPAD breakdown), terminates the integration of the counts. In one approach, the trigger verification circuit measures the current flowing through the SiPM's bias network. If the total current remains below a certain current threshold for a selected time interval within the acquisition period, as measured by a discriminator or other circuitry, acquisition (i.e., counting over the integration time interval) is terminated and an automatic reset sequence is initiated in preparation for the next trigger. If the current exceeds the threshold, the discriminator output rises to a "high" level and acquisition continues. This approach is effective because a SPAD in the reverse biased quiescent state draws a very low current, while in the breakdown state a SPAD draws a large current. Therefore, if the trigger pulse is generated by random thermal breakdown, the bias network current will be low (corresponding to the random breakdown rate), while if the trigger pulse is the first photon detection of a scintillation event, there should be a larger number of SPAD breakdowns that produce a larger bias network current. Another trigger verification method operating in the digital domain is to detect the number of counts for a short time interval within the integration time interval, and to abort the integration if the counts are too low. These trigger verification methods are referred to herein as energy-based verification because the verification metric is an assessment of the energy of the scintillation (and therefore, indirectly, of the gamma ray that generated the scintillation).

[0030] Temporal resolution is another factor to consider in system design. More specifically, when coupled to a scintillator with time-of-flight capabilities, suitably fast trigger logic in a digital silicon photomultiplier (DSPM) enables temporal resolution typically in the 100-200 ps range. However, to achieve optimal temporal resolution, and assuming negligible scintillation pulse rise time, the DSPM's integration period should be triggered to begin just after the device detects the first photon (i.e., when the first SPAD breakdown occurs). However, DSPMs are not ideal and exhibit a certain degree of noise (e.g., dark counts). Therefore, configuring the device for optimal temporal resolution automatically increases the device dead time, as it triggers on every dark count. While verification can partially address the issue of dark current-induced triggering, this solution is not entirely satisfactory. This is because there is a time interval between triggering the integration time interval and the subsequent termination of integration through the action of the verification circuitry, followed by an automatic pixel controller reset sequence (which resets the integration and timestamp circuitry). This introduces a sensor dead time during which the SPAD array cannot detect scintillation events. For example, in some embodiments, resetting the time-to-digital converter (TDC) that timestamps the trigger pulse can take up to 50 ns (see U.S. Patent Publication US2016 / 0011321 A1 to Solf), which can be problematic when designed for a time resolution of 200 ps.

[0031] A method for addressing this problem is described in Solf's previous patent application, US2016 / 0011321 A1. This method inserts a 5ns delay line at the output of the (combined) trigger line to provide time for energy-based validation logic to verify the trigger before actually triggering the pixel controller. The basic principle here is to gate the first photon trigger pulse with a higher "energy" threshold. As an example, each photon (and dark count) generates a 1ns-long trigger pulse on the trigger network. At the output of the trigger network, a pulse train is sent over a 5ns delay line and then processed by the first input of an AND gate. The other input of the AND gate is connected to logic that detects higher energy levels (validation logic, for example, by measuring current in the bias network or early counts of SPAD breakdown), thereby determining whether a particular pulse at the end of the delay line represents a true gamma event or a dark noise event. In this way, dark noise events are suppressed and do not trigger the pixel controller, thus not contributing to the sensor dead time. The resulting dead time can be suppressed, achieving high coincidence time resolution, even at room temperature.

[0032] Furthermore, the event filter of U.S. Patent Publication US2016 / 0011321 A1 by Solf employs pulse encoding of the trigger event. Therefore, it is sensitive to the trigger pulse width. Long pulse widths create dead time in the trigger network and can cause event and dark noise triggers to merge together. Therefore, it is beneficial to keep the pulse width of the trigger pulse as short as possible, especially when operating the sensor at higher temperatures (and therefore with higher noise levels).

[0033] The present disclosure describes a different and / or additional approach to enhancing the discrimination of dark noise events by adding a pulse width filter 120 before the actual energy-based fast verification trigger filter 130. The pulse width filter 120 is configured to block single trigger pulses (or more generally, pulses with a pulse width less than a minimum threshold), which typically result from dark counts. This blocks dark noise events and reduces the dead time of the pixel controller. In one example, a true event is indicated by the detection of tens of photons within the first nanosecond. The trigger pulses of these photons overlap in the trigger network, thus lengthening the trigger pulse entering the pulse width filter 120. The pulse width filter 120 is a time-domain filter and allows longer pulses to pass through and be used as trigger pulses for triggering downstream components. Advantageously, the disclosed pulse width filter 120 rejects false triggers before activating downstream verification logic and timestamp and integration circuits, thereby avoiding false triggers associated with the dead time of these processes and subsequent pixel reset times.

[0034] In other words, in one aspect, there is a programmable pulse width filter / discriminator. Thus, in some embodiments, the threshold of the pulse width filter (i.e., the minimum pulse width that passes) is a programmable filter parameter. It is also possible to make the pulse width of each trigger variable / adjustable.

[0035] exist Figure 2A and Figure 2B An illustrative embodiment of a detector pixel (or more generally, a silicon photomultiplier, i.e., SiPM) is shown in FIG. A PET detector typically consists of a ring of detector pixels. Each detector pixel comprises an array (200) of cells (202), such as Figure 2A As schematically shown in FIG. A of FIG. FIG. A also schematically illustrates a SiPM chip in a plan view (lower portion of FIG. A) showing a suitable layout of SPAD rows 210 and row trigger pulse generator 214; FIG. A also schematically illustrates a more detailed layout of an illustrative row (upper portion of FIG. A). Figure 2AAs schematically shown in FIG. 2B , each cell 202 comprises a single photon avalanche diode (SPAD) 204 that is reverse biased above the breakdown voltage of the SPAD 204. For design reasons, these SPAD cells are arranged in rows 210, and Figure 2A Inset B of FIGURE 2 shows a single row of two cells 202. Each row of SPAD cells 210 generates a trigger pulse of finite width (typically one nanosecond or less) when one or more SPADs in the row breaks down. Figure 2A A circuit for generating a trigger pulse is shown. The trigger line of the SPAD 202 is connected to a row trigger pulse generator 214 through a tree of logic OR gates 212, which generates a pulse 216 in response to any SPAD 202 in the row entering a breakdown state (and thus generating a logic high on the tree of logic OR gates 212). The control logic unit 206 of the unit 202 also automatically quenches and recharges the broken SPAD to restore sensitivity. Note that in the extreme case, the row 210 can include a single SPAD unit.

[0036] Go to Figure 2B , inset C schematically illustrates a SiPM chip in a plan view showing SPAD arrays 210, 214 including SPAD rows 210 and associated row trigger pulse generators 214, and a suitable layout for components 120, 220, 130, 240, 250 at the periphery of the SPAD arrays 210, 214. This is merely an illustrative example, and the detailed layout of the components on the silicon chip area is appropriately designed for a particular application. Figure 2B Also shown is a trigger network consisting of, but not limited to, a tree of logical OR gates 220 that combines the trigger outputs 216 of the SPAD rows 210, 214 into a single trigger line 230. (It should be noted that the term "logical OR gate" as used herein is intended to encompass logical equivalents, such as the De Morgan equivalent, A OR B = NOT [NOT A AND NOT B]). Here, as Figure 2BAs shown, the pulses of each row 210, 214 are combined in time. Due to the asynchronous nature of the breakdown, the trigger pulses can partially overlap and merge into a longer trigger pulse. The pulse width filter 120 filters the trigger line 230 to block pulses on the trigger line 230 with pulse widths less than a threshold width and pass trigger pulses with pulse widths exceeding the threshold width. The time stamp circuit 240 is configured to assign a time stamp to the trigger pulses passing through the pulse width filter 120. For example, the time stamp circuit 240 may include at least one time-to-digital converter (TDC). In one approach, the leading edge of the trigger pulse passing through the pulse width filter 120 is used to latch the value of a counter or other reference clock to provide a time stamp. A more complex TDC circuit for providing a time stamp with high temporal resolution (e.g., useful for time-of-flight PET) is described in U.S. Patent Publication US2012 / 0068077A1, entitled "Method to Improve the Time Resolution of Digital Silicon Photomultipliers," by Frach et al. (incorporated herein by reference in its entirety). In addition, the integration circuit 250 is configured to accumulate the count of SPAD breakdown events in the array 200 of cells 202 over an integration time period triggered by a trigger pulse passing through the pulse width filter 120. The integration circuit appropriately includes a digital counter that counts the number of SPAD breakdown events that occur over the integration time interval. Some suitable embodiments of the integration circuit are described in U.S. Patent No. 9,268,033 by Frach et al. and U.S. Patent Publication No. US2016 / 0011321A1 by Solf. In some embodiments, the trigger pulse passing through the pulse width filter 120 is also passed to an energy-based verification trigger filter 130, which is configured to verify the pulse passing through the pulse width filter on the trigger line. In response to a failure of verification, the optical detector is reset (e.g., the timestamp circuit 240 is reset, and the accumulation of the breakdown count by the integration circuit 250 is suspended). The benefits of inserting the pulse width filter 120 to remove shorter pulses on the trigger line 230 are as follows. Since the typical dark count rate at the input of the trigger network is in the order of hundreds of kcps, the average distance between trigger pulses at the output of the trigger network is typically greater than 1 microsecond, with pulse widths in the order of one nanosecond. Therefore, the probability of extending the trigger pulse width by coincidence is very low (assuming low optical crosstalk in the sensor / scintillator).

[0037] In other words, in Figure 2BIn Figure 1, a time-domain pulse width filter 120 is inserted on the trigger line after the last combinatorial OR 220, but before entering the downstream timestamp, integration, and trigger verification logic. The premise is that for a real gamma ray, a burst of photons will cause many SPADs to trigger rapidly, so that when these rapid triggers are combined into a single combined trigger signal by a logical OR chain, the result will be a long pulse. In contrast, SPAD breakdowns are isolated events, while thermal breakdown rates can be quite high, making it unlikely that random thermal breakdowns will combine to generate a combined pulse of a length comparable to that of a real gamma detection result. Therefore, by setting the time-domain pulse width filter to pass only pulses longer than some minimum threshold length, pulses caused by thermal noise are rejected.

[0038] Figure 3 An example of overlapping trigger pulses is shown. In the case of a gamma event with sufficient energy, triggering occurs for many rows within a short time window, and the probability of generating a sufficiently long trigger pulse increases. Figure 3 In the example, the time trigger window for the detection of gamma events is shown as T e , and the detected trigger time window for the detected dark count event is shown as T d . A higher energy deposition in the crystal causes the crystal to emit more photons and therefore a higher probability of generating a trigger pulse that can pass the filter. In this way, the time domain filter is combined with the programmable pulse width to act as an energy threshold. The variable trigger pulse width and filter parameters allow the noise suppression to be optimized for a given detector configuration. For example, the photon density in a 1:1 coupled detector is much higher compared to, for example, a light-sharing detector. Therefore, in a 1:1 coupled detector, narrow line trigger pulses still overlap to trigger pulses of sufficient length and the trigger network dead time is minimized. In light-sharing detectors with low photon density, the trigger pulse width has to be extended and the pulse width filter window has to be adjusted in order to still be able to adequately discriminate between real events and noise. For very low photon densities (e.g. BGO or light-sharing detectors), the effect of the time domain filtering becomes increasingly poor and units that bypass / disable the time domain filter are implemented.

[0039] Another effect can occur in high photon density situations when the trigger pulse width is too narrow. In this case, the pulse width filter acts as a low-pass filter and determines the threshold of the next Schmitt trigger not by the trigger of the first photon but by the integral value of the first N narrow pulses (duty cycle on the filter input). This can result in a trigger signal that passes through the filter such that the timestamp of the trigger is no longer correlated with the first detected photon and causes degraded coincidence time resolution. Therefore, some embodiments also include adjustable filter parameters, including variable trigger pulse width. Some embodiments also include providing filter parameter tuning to adjust for the characteristics of different scintillator crystals and / or different noise levels (e.g., at different operating temperatures).

[0040] Figure 4 One possible implementation of a pulse width filter 120 is shown. The illustrative pulse width filter 120 includes starved inverters N1, N2 / P1, P2, followed by a gate oxide capacitor pair Cn / Cp and an inverting Schmitt trigger 410. Schmitt trigger 410 is designed to prevent oscillation when the voltage on Cn / Cp reaches a level close to a threshold voltage (e.g., approximately 100 mV). The starved inverter acts as a switched current source with an adjustable current to charge / discharge the gate capacitor depending on the duty cycle of the input signal. Schmitt trigger 410 provides hysteresis and determines whether the average input signal corresponds to a logic 1 or a logic 0. Voltages Vn and Vp are used to regulate the current for rising and falling edges, thereby adjusting the charge / discharge rate of Cn / Cp, respectively.

[0041] Figure 5 An example of a variable width pulse generator 500 is shown, which is suitable for acting as the row trigger pulse generator 214 for each row (see Figure 2A ) to provide variable pulse width. The embodiment presented here also uses a method similar to Figure 4 The starvation inverter configuration 540 of the illustrative embodiment of the pulse width filter 120 is shown; however, it is Figure 5is used as a variable delay element in the hungry inverter configuration 540. In order to save chip area, only the rising edge of the input signal can be delayed by adjusting the bias voltage Vn of N2. The falling edge of the trigger input does not need to be adjusted because it will not cause a trigger pulse at the output. A static active high trigger signal is connected to the AND gate 510 input A, and an inverted copy of this signal is connected to the input B through the variable delay element 540. Therefore, as the trigger input in the switch changes from 0 to 1, the input B remains at logic 1 and the AND gate 510 output Z switches to logic 1. After the adjusted delay Tp, the AND gate 510 input B changes to logic 0, and a short time later the AND gate 510 output also changes to logic 0. Therefore, the pulse width Tp is adjusted using the variable delay element 540. As Figure 5 As shown, an additional static delay element 530 (buffer) can optionally be added in front of input A of AND gate 510 to compensate for the internal delay ΔT of Schmitt trigger 520, which, if not compensated, would limit the minimum pulse width. In an alternative embodiment, variable delay element 540 can be replaced by multiple fixed delay elements (e.g., a buffer or inverter chain, a fixed delay element chain) connected to a multiplexer, which is then used to select the preferred delay. This has the advantage of avoiding the use of analog voltages and digital-to-analog converters (chip area, noise sensitivity), but only allows a relatively small number of pulse widths to be selected.

[0042] Figure 6 The efficiency of the time domain filter is shown in Figure 2. More specifically, Figure 6 The figure shows the time spectrum of coincidence resolution for different pulse width / trigger filter settings. For triggers with short pulse widths, the noise floor is significantly reduced. The time domain filter suppresses dark count noise by amplitude. This results in a much lower noise floor for uncorrelated coincidence pairs (in the case of a trigger filter configuration with a longer trigger pulse). Figure 6 The “shoulder” around the coincidence peak is due to the subsequent fast verification trigger filter (as described in US Patent Publication No. US2016 / 0011321 A1 to Solf).

[0043] Figure 7 The effect of a separate time domain filter is shown. More specifically, Figure 7The diagram shows measurement results illustrating the effect of a pulse width filter and variable pulse width with the second level fast verification filter disabled. The combination of the pulse width filter and the short trigger pulse effectively reduces the tails in the coincidence timing histogram. The probability that at least one of the timestamps was generated by a dark count firing is significantly reduced (by a factor of eight), whereas a shorter trigger pulse length would only reduce this by a factor of two. The embodiments described herein show a reduction in dead time, resulting in improved system sensitivity at elevated temperatures (98% sensitivity at 35°C, as exemplified here).

[0044] Figure 8 FIG2 is a flow chart illustrating an embodiment related to a pulse width filter. Figure 8 At step 802, the SPAD experiences breakdown. At (optional) step 804, the OR tree generates a row trigger. At step 806, the row trigger pulse generator 214 generates a pulsed SPAD row trigger signal 216. At step 810, the SPAD row trigger signal 216 is received using a plurality of OR gates. At step 820, a trigger signal 230 is generated based on the SPAD row trigger signal 216 using a plurality of OR gates. At step 830, the trigger signal 230 is received from the plurality of OR gates using the pulse width filter 120. At step 840, a pulse width filtered signal is generated based on the received trigger signal using the pulse width filter 120. At step 850, the pulse width filtered signal is received from the pulse width filter using the energy-based fast verify trigger filter.

[0045] In addition to PET, the disclosed digital silicon photomultiplier has many applications, especially when used at high temperatures. More generally, other applications are envisioned that require the detection of optical pulses with high temporal resolution time stamping. Other applications include, for example, PET / CT, PET / MR, SPECT, high energy physics, LIDAR, and fluorescence-lifetime imaging microscopy. Of particular interest are LIDAR systems, which perform optical ranging based on the time of flight between an emitted laser beam and a detection laser beam reflection. LIDAR can be used in different industries, including automotive (where it is used, for example, as a trigger device for activating emergency braking).

[0046] It will also be appreciated that the technology disclosed herein can also be implemented by a non-transitory storage medium storing instructions that can be read and executed by an electronic data processing device to perform the disclosed technology. Such non-transitory storage media may include hard drives or other magnetic storage media, optical disks or other optical storage media, cloud-based storage media (e.g., RAID disk arrays), flash memory or other non-volatile electronic storage media, etc.

[0047] The present invention has been described with reference to preferred embodiments. Modifications and alterations may occur to others upon reading and understanding the preceding detailed description. The exemplary embodiments are intended to be interpreted as including all such modifications and alterations as come within the scope of the appended claims or their equivalents.

Claims

1. An optical detector comprising: an array (200) of cells (202), each cell comprising a single-photon avalanche diode (204) reverse-biased above a breakdown voltage of the single-photon avalanche diode; a trigger network (212, 214, 220) configured to generate a pulse on a trigger line (230) in response to a single photon avalanche diode of the array experiencing breakdown, wherein the trigger network (212, 214, 220) comprises a network of OR gates (212, 220) connecting the cells (202) of the array (200) with the trigger line (230); and A pulse width filter (120) is configured to block pulses on the trigger line having a pulse width less than a threshold width.

2. The optical detector of claim 1, further comprising a time stamp circuit (240) configured to assign a time stamp to the trigger pulse passing through the pulse width filter (120).

3. The optical detector according to claim 2, wherein The time stamp circuit (240) includes a time-to-digital converter (260).

4. The optical detector according to any one of claims 1 to 3, further comprising an integration circuit (250) configured to accumulate a count of single photon avalanche diode breakdown events in the array (200) of cells (202) over an integration time period triggered by a trigger pulse passing through the pulse width filter (120).

5. The optical detector according to any one of claims 1 to 3, further comprising an energy-based verification logic unit (130) configured to verify the pulse on the trigger line passing through the pulse width filter (120), wherein In response to failure of the verification, the optical detector is reset.

6. The optical detector according to any one of claims 1 to 3, wherein: The pulse width filter (120) comprises: a starvation inverter comprising four transistors; a gate oxide capacitor pair; and An inverting Schmitt trigger (410) is configured to prevent voltage oscillation when the voltage across the capacitor pair reaches a predetermined voltage level.

7. The optical detector according to any one of claims 1 to 3, wherein: The pulse width filter (120) comprises: hunger reverser; capacitor pairs; and Inverting Schmitt trigger (410).

8. The optical detector according to any one of claims 1 to 3, wherein: The trigger network (212, 214, 220) includes a pulse generator (214), the pulse generator including a variable width pulse generator (500), the variable width pulse generator including: a starvation inverter (540) configured to delay a rising edge of a trigger signal but not a falling edge of the trigger signal; a Schmitt trigger (520) configured to receive the output of the starvation inverter (540); and An AND gate (510) configured to output a pulse width filtered signal by receiving: (i) a first input signal, which includes the trigger signal; and (ii) A second input signal comprising the output signal of the Schmitt trigger (520).

9. The optical detector according to any one of claims 1 to 3, wherein: The trigger network (212, 214, 220) includes a pulse generator (214), the pulse generator including a variable width pulse generator, the variable width pulse generator including: a starvation inverter (540) configured to delay a rising edge of a trigger signal but not a falling edge of the trigger signal; a Schmitt trigger (520) configured to receive the output of the starvation inverter (540); a static delay element (530) configured to receive the trigger signal and generate a statically delayed output signal by compensating for an internal delay of the Schmitt trigger (520); and An AND gate (510) configured to output a pulse width filtered signal by receiving: (i) a first input signal comprising a statically delayed output signal; and (ii) A second input signal comprising the output signal of the Schmitt trigger.

10. The optical detector according to any one of claims 1 to 3, wherein: The trigger network (212, 214, 220) includes a pulse generator (214), the pulse generator including a variable width pulse generator (500), the variable width pulse generator including: a starvation inverter (540) configured to delay a rising edge of a trigger signal but not a falling edge of the trigger signal; a Schmitt trigger (520) configured to receive the output of the starvation inverter (540); a plurality of static delay elements configured to receive the trigger signal; a multiplexer configured to receive outputs of the plurality of static delay elements; and An AND gate (510) configured to output a pulse width filtered signal by receiving: (i) a first input signal comprising the output of the multiplexer; and (ii) A second input signal comprising the output signal of the Schmitt trigger.

11. A light detection and ranging system comprising an optical detector according to any one of claims 1 to 10.

12. A PET system comprising one or more PET detector rings comprising the optical detector according to any one of claims 1 to 10.

13. A method for triggering verification, comprising: generating a pulse on a trigger line (230) in response to a single photon avalanche diode of the array experiencing breakdown using a trigger network (220), wherein the trigger network (220) includes a network of OR gates (220) connecting cells (202) of the array (200) to the trigger line (230); and A pulse width filter (120) is used to block pulses on the trigger line whose pulse width is less than a threshold width.

14. The method according to claim 13, further comprising: A time stamp circuit is used to assign a time stamp to the trigger pulse passing through the pulse width filter (120).

15. The method according to claim 13, further comprising: A count of single photon avalanche diode breakdown events in the array (200) of cells (202) is accumulated using an integration circuit (250) over an integration period triggered by a trigger pulse passing through the pulse width filter (120).

16. A trigger network for a silicon photomultiplier, the silicon photomultiplier comprising an array (200) of cells (202), each cell comprising a single-photon avalanche diode (204), the single-photon avalanche diode being reverse biased above a breakdown voltage of the single-photon avalanche diode, the trigger network comprising: a network of OR gates (220) connecting the cells (202) of the array (200) to a trigger line (230), the network of OR gates (220) generating a pulse on the trigger line (230) in response to a single photon avalanche diode of the array experiencing breakdown; as well as A pulse width filter (120) is configured to block pulses on the trigger line (230) whose pulse width is less than a threshold width.

17. The trigger network according to claim 16, wherein: The pulse width filter (120) comprises: a starvation inverter comprising four transistors; a gate oxide capacitor pair; and An inverting Schmitt trigger (410) is configured to prevent voltage oscillation when the voltage across the capacitor pair reaches a predetermined voltage level.

18. A PET system comprising one or more PET detector rings comprising a trigger network according to any one of claims 16-17.

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