Packaging system, manufacturing method and smart wearable device

By using a packaging system connected by parallel circuit layers and conductive columns in the smart wearable device, the problem of enlarged packaging system is solved, and a smart wearable device with rich and compact functions is realized to ensure signal stability and monitoring accuracy.

CN114156191BActive Publication Date: 2025-08-29QINGDAO GOERTEK INTELLIGENT SENSOR CO LTD
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Patent Information

Application Number
CN202111481982.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-06
Publication Date
2025-08-29
Estimated Expiration
2041-12-06

AI Technical Summary

Technical Problem

When the packaging system in the prior art is assembled by multiple chips, the volume of the smart wearable device increases, which violates the original design intention and does not conform to the user's aesthetics.

Method used

The first circuit layer and the second circuit layer are arranged in parallel, and there is a first plastic sealing layer and a conductive column in the middle. The first chip and the second chip are respectively arranged on both sides. The adapter plate and the EMI shielding layer are used to reduce chip interference, and signal transmission is realized through the conductive column and solder ball to avoid the plastic sealing layer of the optical heart rate sensor chip to ensure monitoring accuracy.

Benefits of technology

It realizes that the packaging system has rich functions and does not increase the control volume, supports the miniaturization of smart wearable devices and signal stability, and improves monitoring accuracy and heat dissipation performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application provides a packaging system, a manufacturing method, and a smart wearable device, the packaging system comprising: a first circuit layer and a second circuit layer, the first circuit layer and the second circuit layer being arranged in parallel, a first plastic layer being arranged between the first circuit layer and the second circuit layer, a plurality of conductive pillars being arranged within the first plastic layer, at least one first chip being arranged on the side of the first circuit layer opposite to the second circuit layer, at least one second chip being arranged within the first plastic layer, the second chip being electrically connected to the second circuit layer; and a second plastic layer being arranged on the side of the first circuit layer opposite to the first circuit layer. The present application improves the packaging system, making the packaging system more functional while also preventing the volume of the packaging system from increasing excessively, thereby further achieving the effect of miniaturization of smart wearable devices.
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Description

Technical Field

[0001] The present application relates to the technical field of packaging systems. Specifically, the present application relates to a packaging system, a manufacturing method and a smart wearable device. Background Art

[0002] Currently, a large number of smart wearable devices, such as smart bracelets, smart watches, and smart rings, are on the market. Demand for these devices is increasing due to their compact size and ability to meet a wide range of user needs. These devices offer functions such as monitoring exercise, receiving call notifications, providing alarms, and monitoring sleep quality. They also incorporate Bluetooth chips for interconnection with other electronic devices.

[0003] However, with the popularity of smart wearable devices, major manufacturers choose to set up structures such as gyroscope sensor chips and NFC chips in smart wearable devices, so that smart wearable devices have richer functions and gain a larger market share.

[0004] However, the packaging system in the prior art usually occupies a large space when assembling multiple chips, which will increase the size of the smart wearable device, which is inconsistent with the original design intention of the smart wearable device and does not conform to the user's aesthetic taste.

[0005] Therefore, it is necessary to improve the structure of the packaging system to solve the problem in the prior art that there are too many chips in the packaging system, which leads to an increase in the volume of the packaging system. Summary of the Invention

[0006] The purpose of this application is to provide a packaging system, a manufacturing method and a smart wearable device to solve the problem in the prior art that there are too many chips in the packaging system, resulting in an increase in the volume of the packaging system.

[0007] In a first aspect, the present application provides a packaging system, comprising:

[0008] a first circuit layer and a second circuit layer, the first circuit layer and the second circuit layer being arranged in parallel, a first plastic layer being arranged between the first circuit layer and the second circuit layer, a plurality of conductive posts being arranged in the first plastic layer, the conductive posts being configured to connect the first circuit layer and the second circuit layer, at least one first chip being arranged on a side of the first circuit layer opposite to the second circuit layer, at least one second chip being arranged in the first plastic layer, and the second chip being electrically connected to the second circuit layer;

[0009] A second plastic packaging layer is provided on the side of the first circuit layer opposite to the second circuit layer. The first chip at least includes an optical heart rate sensor chip. The second plastic packaging layer is provided to avoid the optical heart rate sensor chip.

[0010] Optionally, a transfer board is further provided on a side of the second circuit layer facing the first circuit layer, and the second chip is provided on the transfer board.

[0011] Optionally, the first circuit layer and the adapter board are electrically connected via the conductive pillars.

[0012] Optionally, an EMI shielding layer is provided between the first plastic packaging layer and the first circuit layer.

[0013] Optionally, a plurality of solder balls are provided on a side of the second circuit layer opposite to the first circuit layer.

[0014] Optionally, the first circuit layer is a substrate, the second circuit layer is an RDL layer, and the first chip and the second chip are any one or more of an ASIC chip, a gyroscope sensor chip, an acceleration sensor chip, a bioelectrical impedance sensor chip, a galvanic skin response sensor chip, a temperature sensor chip, a GPS chip, an NFC chip, a flash memory chip or a Bluetooth chip.

[0015] Optionally, a plurality of through holes are formed on the first plastic packaging layer, and a plurality of conductive pillars are respectively inserted into different through holes to be connected to the second circuit layer.

[0016] Optionally, the conductive pillars are silver pillars.

[0017] In a second aspect, the present application provides a method for manufacturing a packaging system described above, characterized in that a first packaging layer and a second packaging layer are manufactured separately, the second packaging layer includes the first plastic packaging layer, a plurality of through holes are opened on the first plastic packaging layer, and the conductive columns are arranged in the through holes, the first packaging layer is covered on the first plastic packaging layer, and the conductive columns electrically connect the first packaging layer and the second packaging layer.

[0018] Optionally, the specific steps for making the second encapsulation layer are as follows:

[0019] An adapter board is placed on a temporary carrier board, and at least one second chip is electrically connected to the adapter board. The adapter board and the second chip on the temporary carrier board are plastic-sealed to form a first plastic-sealing layer; a plurality of through holes are opened on the first plastic-sealing layer perpendicular to the temporary carrier board, and liquid silver is poured into the through holes to form the conductive columns; the temporary carrier board is removed and an RDL layer is formed at the bottom of the first plastic-sealing layer through an RDL process.

[0020] Optionally, the specific steps for making the first encapsulation layer are as follows:

[0021] A plurality of the first chips are arranged on a substrate, wherein one of the first chips is an optical heart rate sensor chip; and the first chips except the optical heart rate sensor are plastic-sealed to form a second plastic-sealing layer.

[0022] Optionally, an EMI shielding layer is provided on the bottom surface of the substrate, the first packaging layer is fixed on the side of the second packaging layer away from the RDL layer, the substrate, the RDL layer and the adapter board are connected through the conductive columns, and a plurality of solder balls are provided on the side of the RDL layer away from the first plastic packaging layer.

[0023] In a third aspect, the present application provides a smart wearable device, in which any of the above-mentioned packaging systems is provided.

[0024] This application improves the packaging system so that the packaging system has more functions while also being able to control the volume of the packaging system from increasing too much, thereby further achieving the effect of miniaturization of smart wearable devices.

[0025] Other features and advantages of the present application will become apparent from the following detailed description of exemplary embodiments of the present application with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the application and, together with the description, serve to explain the principles of the application.

[0027] Figure 1 It is a structural diagram of a packaging system provided in a specific embodiment of the present application;

[0028] Figure 2 This is one of the structural schematic disassembly diagrams of a packaging system provided in a specific embodiment of the present application;

[0029] Figure 3 This is the second disassembled diagram of the structural schematic diagram of a packaging system provided in a specific embodiment of the present application;

[0030] Figure 4 This is the third disassembled diagram of the structural diagram of a packaging system provided in a specific embodiment of the present application;

[0031] Figure 5 This is the fourth disassembled diagram of the structural diagram of a packaging system provided in a specific embodiment of the present application;

[0032] Figure 6 This is the fifth disassembled diagram of the structural diagram of a packaging system provided in a specific embodiment of the present application;

[0033] Figure 7This is the sixth disassembly diagram of the structural diagram of a packaging system provided in the specific embodiment of this application.

[0034] Reference numerals:

[0035] 1. First circuit layer; 11. First chip; 111. Optical heart rate sensor chip; 2. Second circuit layer; 21. Second chip; 22. Adapter board; 23. Solder balls; 3. First plastic layer; 31. Through hole; 4. Conductive column; 5. EMI shielding layer; 6. Temporary carrier board; 7. Second plastic layer. DETAILED DESCRIPTION

[0036] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present application.

[0037] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present disclosure, its application, or uses.

[0038] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0039] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0040] It should be noted that like reference numerals and letters refer to like items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0041] First, as Figures 1 to 7 As shown, the present application provides a packaging system, comprising:

[0042] A first circuit layer 1 and a second circuit layer 2 are arranged in parallel, a first plastic layer 3 is arranged between the first circuit layer 1 and the second circuit layer 2, a plurality of conductive pillars 4 are arranged in the first plastic layer 3, and the conductive pillars 4 are configured to connect the first circuit layer 1 and the second circuit layer 2. At least one first chip 11 is arranged on the side of the first circuit layer 1 opposite to the second circuit layer 2, and at least one second chip 21 is arranged in the first plastic layer, and the second chip 21 is electrically connected to the second circuit layer 2. The first chip 11 and the second chip 21 are stacked together through the cooperation of the first circuit layer 1 and the second circuit layer 2 and the conductive pillars 4, thereby reducing the volume of the packaging system. The external circuit is connected to the first circuit board, and the signal of the second chip 21 can be directly transmitted to the external circuit through the first circuit board. The relevant signal received by the first chip 11 can be transmitted in sequence through the first circuit layer 1, the conductive pillars 4, and the second circuit layer 2, thereby ensuring that the signals of the first chip 11 and the second chip 21 can be fully transmitted.

[0043] At the same time, the first plastic encapsulation layer 3 can encapsulate the second chip 21 and the conductive pillars 4, protecting them from damage. It also prevents the conductive pillars 4 from short-circuiting with external structures, potentially damaging other components within the package system. Furthermore, the second plastic encapsulation layer 7 can prevent signal interference between multiple chips, ensuring stable signal transmission across the chips.

[0044] A second plastic encapsulation layer 7 is provided on the side of the first circuit layer 1 opposite to the second circuit layer 2. The first chip 11 includes at least an optical heart rate sensor chip 111, and the second plastic encapsulation layer 7 is provided to avoid the optical heart rate sensor chip 111. The second plastic encapsulation layer 7 can cover the first chip 11 provided on the first circuit layer 1, thereby protecting the first chip 11. The function of the optical heart rate sensor chip 111 is to illuminate the skin with light. The light reflected back through the skin tissue is received by the photosensor in the optical heart rate sensor chip 111 and converted into an electrical signal, which is then converted into a digital signal. The heart rate can then be calculated based on the absorbance of the blood, thereby achieving the function of monitoring the user's heart rate. If a plastic encapsulation layer is provided on the optical heart rate sensor chip 111, it will have a significant impact on the refraction of light, resulting in inaccurate detection data. Therefore, the second plastic encapsulation layer 7 should be provided to avoid the optical heart rate sensor chip 111 to ensure the accuracy of the monitoring data.

[0045] The number and type of the first chip 11 and the second chip 21 are not specifically limited. Depending on the needs of the manufacturer, different numbers and types of chips can be provided on the first circuit layer 1 and the second circuit layer 2. When the packaging system is installed in a smart wearable device, more functions can be realized, making it easier for users to use. Furthermore, since the packaging system in this application is relatively small, the smart device can be kept small, making it easier for users to wear.

[0046] Alternatively, as Figures 1 to 7 As shown, an adapter plate 22 is further provided on the side of the second circuit layer 2 facing the first circuit layer 1, and the second chip 21 is provided on the adapter plate 22. If the second chip 21 is directly connected to the second circuit layer 2, the number of connection pins will increase. However, by connecting the adapter plate 22 to the second circuit layer 2, the number of pins is fixed. Even if there are more second chips 21, the number of layers of the second circuit layer 2 will not increase. Therefore, by connecting the second chip 21 to the second circuit layer 2 via the adapter plate 22, the thickness of the second circuit layer 2 can be reduced, which reduces the volume of the packaging system while also improving the heat dissipation performance of the packaging system.

[0047] Alternatively, as Figures 1 to 7 As shown, the first circuit layer 1 and the adapter board 22 are electrically connected via conductive pillars 4. The conductive pillars 4 connect the first circuit layer 1 and the second circuit layer 2, and connect the first circuit layer 1 and the adapter board 22. If the information of the first chip 11 and the second chip 21 needs to be combined for processing, part of the information of the first chip 11 is transmitted to the adapter board 22 through the conductive pillars 4, and then transmitted to the designated second chip 21. After the information of the first chip 11 is processed by the second chip 21, it is output to the external circuit.

[0048] An EMI (electromagnetic interference) shielding layer 5 is provided between the first plastic layer 3 and the first circuit layer 1. The EMI shielding layer 5 further reduces the mutual interference between the first chip 11 and the second chip 21, ensuring that each of the first chip 11 and the second chip 21 can achieve stable signal output and input.

[0049] Alternatively, as Figures 1 to 7 As shown, a plurality of solder balls 23 are provided on the side of the second circuit layer 2 opposite to the first circuit layer 1. The solder balls 23 can connect the packaging system to the circuit board of the external circuit, and transmit the data collected by the first chip 11 and the second chip 21 in the packaging system to the outside.

[0050] Alternatively, as Figures 1 to 7As shown, the first circuit layer 1 is a substrate, the second circuit layer 2 is an RDL layer, and the first chip 11 and the second chip 21 are any one or more of an ASIC chip, a gyroscope sensor chip, an acceleration sensor chip, a bioelectrical impedance sensor chip, a galvanic skin response sensor chip, a temperature sensor chip, a GPS chip, an NFC chip, a flash memory chip, or a Bluetooth chip. The RDL layer can reduce the overall power consumption of the package module and the volume of the package system. Furthermore, the RDL layer can cooperate with the adapter board 22 to increase the number of input / output interfaces on the adapter board 22.

[0051] Among them, the ASIC (Application Specific Integrated Circuit) chip can be specifically designed according to the needs of the smart wearable device, and can be strengthened in a targeted manner according to the types and functions of the first chip 11 and the second chip 21, with higher processing speed and lower energy consumption.

[0052] The function of the gyroscope sensor chip is to accurately determine small deviations of the package system. When used in smart wearable devices, it can be used to detect the number of times the user tosses and turns during sleep, or to start a specified program by shaking the smart wearable device.

[0053] The accelerometer chip and the gyroscope sensor chip work together to determine whether the device is moving by measuring direction and acceleration force, thereby achieving the purpose of step counting. By matching the collected data with the type of exercise the user is performing, the user's number of steps, calorie consumption, etc. are monitored, realizing the most basic functions of smart devices.

[0054] The bioelectrical impedance sensor chip can monitor blood flow through the biological body's own impedance and convert it into specific heart rate, respiratory rate and skin conduction response index.

[0055] Galvanic skin response sensor chips are used to measure arousal, a level that has been shown in numerous scientific studies to be closely linked to attention and engagement. Skin resistance and conductance change with the function of sweat glands, and these measurable changes are called galvanic skin activity. Psychophysiologists measure psychologically induced sweat gland activity to understand the associated psychological processes, which is a key basis for some wristbands to provide user mood indices.

[0056] The temperature sensor chip measures the surface temperature of the user's skin through direct contact with the user's skin.

[0057] The GPS (Global Positioning System) chip can be used to record the user's geographic location, running route, and realize track planning and return to home. It is an absolute necessity for people who like outdoor sports.

[0058] The NFC (Near Field Communication) chip enables the packaged system to have functions such as mobile payment, electronic ticketing, access control, mobile identity recognition, and anti-counterfeiting. For example, when the packaged system in the embodiment of the present application is applied to a smart watch, the watch can realize functions such as swiping a card to board a bus or subway.

[0059] The flash memory chip can store the information collected by the packaging system, allowing users to view more detection data.

[0060] The Bluetooth chip can enable the packaged system to communicate with other electronic devices over short distances. For example, when the packaged system in the embodiment of the present application is applied to a smart watch, data transmission between the watch and the mobile phone can be achieved.

[0061] At the same time, the first chip 11 and the second chip 21 are not limited to the above-mentioned chips, and can also be a capacitive sensor chip, a Hall sensor chip, an ambient light sensor chip, etc., which are not described in detail here. Among them, if a chip that needs to come into contact with the human body, such as a bioelectrical impedance sensor chip, a galvanic skin response sensor, or a temperature sensor chip, is used, it is set on the first circuit layer 1 as the first chip 11, and when setting the second plastic packaging layer 7, the bioelectrical impedance sensor chip, the galvanic skin response sensor, or the temperature sensor chip, etc., which needs to come into contact with the human body, is avoided, thereby improving the accuracy of the monitoring results.

[0062] Alternatively, as Figures 1 to 7 As shown, the first plastic encapsulation layer 3 is provided with a plurality of through holes 31, and a plurality of conductive pillars 4 are respectively inserted into different through holes 31 to connect with the second circuit layer 2. The through holes 31 are arranged perpendicular to the second circuit layer 2. When the conductive pillars 4 are installed in the through holes 31, the conductive pillars 4 can accurately connect the first circuit layer 1 and the adapter board 22 and the corresponding positions on the second circuit layer 2, thereby achieving interconnection between the first circuit layer 1, the adapter board 22 and the second circuit layer 2.

[0063] Alternatively, as Figures 1 to 7 As shown, the conductive pillars 4 are silver pillars. The first circuit layer 1, the adapter board 22, and the second circuit layer 2 are electrically connected by placing the silver pillars in the through-holes 31. Alternatively, the silver pillars can be formed by pouring liquid silver into the through-holes 31. Both methods are acceptable.

[0064] Second, as Figures 1 to 7As shown, the present application provides a method for manufacturing a packaging system described in any of the above, characterized in that a first packaging layer and a second packaging layer are manufactured separately, the second packaging layer includes the first plastic packaging layer 3, a plurality of through holes 31 are opened on the first plastic packaging layer 3, and the conductive pillars 4 are arranged in the through holes 31, the first packaging layer is covered on the first plastic packaging layer 3, and the conductive pillars 4 electrically connect the first packaging layer and the second packaging layer. Among them, the first circuit layer 1, the first chip 11 and the second plastic packaging layer 7 belong to the first packaging layer, and the second circuit layer 2, the second chip 21, the first plastic packaging layer 3, the conductive pillars 4 and the adapter plate 22 belong to the second packaging layer. The installation of the packaging system can be achieved by splicing the first packaging layer and the second packaging layer, which greatly reduces the difficulty of installing the packaging system.

[0065] Alternatively, as Figures 2 to 5 As shown, the specific steps for making the second encapsulation layer are as follows:

[0066] The adapter board 22 is placed on a temporary carrier board 6, and at least one second chip 21 is electrically connected to the adapter board 22. The adapter board 22 and the second chip 21 on the temporary carrier board 6 are plastic-encapsulated to form a first plastic-encapsulation layer 3. A plurality of through-holes 31 are provided in the first plastic-encapsulation layer 3 perpendicular to the temporary carrier board 6, and liquid silver is poured into each of the through-holes 31 to form the conductive pillars 4. The temporary carrier board 6 is removed, and an RDL layer is formed at the bottom of the first plastic-encapsulation layer 3 through an RDL process. The adapter board 22 and the second chip 21 are fixed using the temporary carrier board 6, and the adapter board 22 and the second chip 21 are plastic-encapsulated to form a first plastic-encapsulation layer 3. Through-holes 31 are provided at corresponding positions in the first plastic-encapsulation layer 3, and conductive pillars 4 are provided in the through-holes 31. The conductive pillars 4 can be silver pillars sized to match the through-holes 31. To further ensure the stability of the electrical connection between the first and second packaging layers, liquid silver can be poured into the through-holes 31. Once the liquid silver cools within the through-holes 31, it forms silver pillars that conform to the through-holes 31. If the packaging system is shaken or impacted, the conductive pillars 4 will not easily separate from the first circuit layer 1, adapter plate 22, and second circuit layer 2, ensuring stable signal transmission within the packaging system.

[0067] Alternatively, as Figures 6 and 7 As shown, the specific steps for making the first encapsulation layer are as follows:

[0068] Multiple first chips 11 are arranged on a substrate, one of which is an optical heart rate sensor chip 111. The first chips 11 excluding the optical heart rate sensor are plastic-encapsulated to form a second plastic encapsulation layer 7. The optical heart rate sensor chip 111 is used to detect the human heart rate and other data. The second plastic encapsulation layer 7 covers the first chips 11 excluding the optical heart rate sensor chip 111. If the first chip 11 also includes a chip that needs to come into contact with the human body, such as a bioelectrical impedance sensor chip, a galvanic skin response sensor, or a temperature sensor chip, the second plastic encapsulation layer 7 is arranged to avoid the chip that needs to come into contact with the human body, thereby improving the accuracy of the monitoring results.

[0069] The first plastic encapsulation layer 3 and the second plastic encapsulation layer 7 can reduce signal interference between the first chip 11 and the second chip 21 , thereby increasing the stability of information transmission and the accuracy of data monitoring of the first chip 11 and the second chip 21 .

[0070] Optionally, an EMI shielding layer 5 is provided on the bottom surface of the substrate, the first packaging layer is fixed to the side of the second packaging layer away from the RDL layer, the substrate is connected to the RDL layer and the adapter board 22 via the conductive pillars 4, and a plurality of solder balls 23 are provided on the side of the RDL layer away from the first plastic encapsulation layer 3. The EMI shielding layer 5 can further reduce interference between the first chip 11 and the second chip 21. By fixing the first packaging layer and the second packaging layer, the assembly of the packaging system is completed, the assembly process is very simple, and the production difficulty is reduced.

[0071] In a third aspect, the present application provides a smart wearable device, wherein the smart wearable device is provided with any of the above-described packaging systems. Taking the above-described packaging system applied to a smart watch as an example, the smart watch can have more functions while not making the smart watch too large, controlling the dial size, and making the appearance of the smart watch more acceptable to more users. At the same time, because a large number of chips are assembled in the packaging system, there is a large space inside the smart watch to install a battery, so that the smart watch has more sufficient power and improves the battery life of the smart watch.

[0072] Although some specific embodiments of the present application have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present application. It should be understood by those skilled in the art that the above embodiments may be modified without departing from the scope and spirit of the present application. The scope of the present application is defined by the appended claims.

Claims

1. A packaging system, characterized in that: include: a first circuit layer and a second circuit layer, the first circuit layer and the second circuit layer being arranged in parallel, a first plastic layer being arranged between the first circuit layer and the second circuit layer, a plurality of conductive posts being arranged in the first plastic layer, the conductive posts being configured to connect the first circuit layer and the second circuit layer, at least one first chip being arranged on a side of the first circuit layer opposite to the second circuit layer, at least one second chip being arranged in the first plastic layer, and the second chip being electrically connected to the second circuit layer; A second plastic packaging layer is provided on a side of the first circuit layer opposite to the second circuit layer, the first chip includes at least an optical heart rate sensor chip, and the second plastic packaging layer is provided to avoid the optical heart rate sensor chip; A transfer board is further provided on the side of the second circuit layer facing the first circuit layer. The second chip is provided on the transfer board. The second circuit layer is an RDL layer.

2. The packaging system according to claim 1, wherein: The first circuit layer and the adapter board are electrically connected via the conductive pillars.

3. The packaging system according to claim 1, wherein: An EMI shielding layer is provided between the first plastic packaging layer and the first circuit layer.

4. The packaging system according to claim 1, wherein: A plurality of solder balls are provided on a side of the second circuit layer opposite to the first circuit layer.

5. The packaging system according to claim 1, wherein: The first circuit layer is a substrate, and the first chip and the second chip are any one or more of an ASIC chip, a gyroscope sensor chip, an acceleration sensor chip, a bioelectrical impedance sensor chip, a galvanic skin response sensor chip, a temperature sensor chip, a GPS chip, an NFC chip, a flash memory chip or a Bluetooth chip.

6. The packaging system according to claim 1, wherein: The first plastic packaging layer is provided with a plurality of through holes, and a plurality of conductive pillars are respectively inserted into different through holes to connect with the second circuit layer.

7. The packaging system according to claim 1, wherein: The conductive pillars are silver pillars.

8. A method for manufacturing the packaging system according to any one of claims 1 to 7, characterized in that: A first packaging layer and a second packaging layer are respectively produced, wherein the second packaging layer includes the first plastic packaging layer, a plurality of through holes are opened on the first plastic packaging layer, and the conductive pillars are arranged in the through holes, and the first packaging layer is covered on the first plastic packaging layer, and the conductive pillars electrically connect the first packaging layer and the second packaging layer.

9. The method for manufacturing a packaging system according to claim 8, wherein: The specific steps for making the second encapsulation layer are as follows: An adapter board is placed on a temporary carrier board, and at least one second chip is electrically connected to the adapter board. The adapter board and the second chip on the temporary carrier board are plastic-sealed to form a first plastic-sealing layer; a plurality of through holes are opened on the first plastic-sealing layer perpendicular to the temporary carrier board, and liquid silver is poured into the through holes to form the conductive columns; the temporary carrier board is removed and an RDL layer is formed at the bottom of the first plastic-sealing layer through an RDL process.

10. The method for manufacturing a packaging system according to claim 9, wherein: The specific steps for making the first encapsulation layer are as follows: A plurality of the first chips are arranged on a substrate, wherein one of the first chips is an optical heart rate sensor chip; and the first chips except the optical heart rate sensor are plastic-sealed to form a second plastic-sealing layer.

11. The method for manufacturing a packaging system according to claim 10, wherein: An EMI shielding layer is provided on the bottom surface of the substrate, the first packaging layer is fixed on the side of the second packaging layer away from the RDL layer, the substrate, the RDL layer and the adapter board are connected through the conductive columns, and a plurality of solder balls are provided on the side of the RDL layer away from the first plastic packaging layer.

12. A smart wearable device, characterized in that: The smart wearable device is provided with the packaging system according to any one of claims 1 to 7.

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