A resistive memory and a method for preparing the same

Abstract

The invention discloses a resistive memory and a preparation method thereof, comprising: a substrate; a lower electrode, the lower electrode being connected to the substrate; a resistive layer, the resistive layer being connected to the lower electrode; an upper electrode, the upper electrode being connected to the resistive layer, the resistive layer being arranged between the lower electrode and the upper electrode, and having a beneficial effect that when the resistive memory changes between a high resistance state and a low resistance state, a large number of oxygen atoms are absorbed or released, when the resistive memory changes from a low resistance state to a high resistance state, a large number of released oxygen atoms can greatly promote the disconnection of conductive filaments in the resistive layer, and make the conductive filaments disconnect more thoroughly, by effectively strengthening the disconnection of conductive filament channels in the resistive layer, the resistance between the electrodes is increased, so as to achieve the effect of increasing the storage window of the resistive memory.

Description

Technical Field

[0001] The present invention belongs to the technical field of resistive random access memory, and more specifically, the present invention relates to a resistive random access memory and a preparation method thereof. Background Art

[0002] Memristor is the fourth basic passive circuit element after resistor, capacitor and inductor. Since the internal resistance of memristor can change with the voltage at both ends, memristor is actually a resistor with memory function and can be used as a storage element. Resistive random access memory is a kind of memristor. The information storage of resistive random access memory is realized by changing the resistance of the resistive random access layer. The resistive random access layer has two states: high resistance and low resistance. The state of the resistive random access layer can be changed by applying voltage between two electrodes. After the voltage is removed, the resistance state of the resistive random access layer can be maintained.

[0003] The reason why the resistive memory can realize the mutual conversion between different resistance states under different voltages is that a filament conductive channel is formed or disconnected inside the resistive layer. The on-off state of the filament conductive channel determines whether the resistive layer in the resistive memory is in a high resistance state or a low resistance state, thus realizing storage. The resistance ratio of the high resistance state and the low resistance state of the resistive memory is the storage window of the resistive memory. In the prior art, when the conductive channel is disconnected, due to the existence of some vacancies in the resistive layer that have not been compounded with oxygen ions, electrons can jump in the vacancy traps to conduct electricity, making it inevitable that there is a certain current in the high resistance state of the resistive memory, resulting in the resistance window cannot be further improved, affecting the further application of the resistive memory. Therefore, it has become an urgent need to prepare a resistive memory with an ultra-large storage window. Summary of the invention

[0004] The object of the present invention is to provide a resistive random access memory and a method for preparing the same, so as to solve the technical problem in the prior art that a certain current inevitably exists in the high resistance state of the resistive random access memory, resulting in the inability to further increase the resistance window.

[0005] In order to achieve the above technical objectives, the technical solution adopted by the present invention is as follows:

[0006] A resistive random access memory, comprising:

[0007] substrate;

[0008] A lower electrode connected to the substrate;

[0009] A resistive switching layer, wherein the resistive switching layer is connected to the lower electrode;

[0010] An upper electrode is connected to the resistive layer, and the resistive layer is arranged between the lower electrode and the upper electrode.

[0011] Preferably, the resistive layer includes a first metal oxide layer, a second metal oxide layer and a storage window layer, the first metal oxide layer is respectively connected to the lower electrode and the second metal oxide layer, the second metal oxide layer is respectively connected to the first metal oxide layer and the storage window layer, and the storage window layer is respectively connected to the upper electrode and the second metal oxide layer.

[0012] Preferably, the material of the first metal oxide layer is aluminum oxide, the material of the second metal oxide layer is titanium dioxide, and the material of the storage window layer is metal oxide.

[0013] Preferably, the material of the lower electrode is Pd, Pt, Ti, Au or TiN, and the material of the upper electrode is Pd, Pt, Ti, Au or TiN.

[0014] Preferably, the substrate is made of insulating material.

[0015] A method for preparing a resistive random access memory comprises the following steps:

[0016] Select a silicon wafer as a substrate and clean it, and deposit a lower electrode on the substrate;

[0017] Depositing a resistive switching layer on the lower electrode, wherein the resistive switching layer is sequentially formed into a first metal oxide layer, a second metal oxide layer and a storage window layer;

[0018] Depositing an upper electrode on the storage window layer;

[0019] The patterns of the lower electrode, the resistive switching layer and the upper electrode are processed by photolithography technology, so that a plurality of resistive switching memories composed of the lower electrode, the resistive switching layer and the upper electrode are isolated from each other.

[0020] Preferably, the method of depositing the lower electrode on the substrate is physical vapor deposition, thermal evaporation process or atomic layer deposition.

[0021] Preferably, the first metal oxide layer, the second metal oxide layer and the storage window layer are sequentially formed on the lower electrode, specifically comprising the following steps:

[0022] The first metal oxide layer uses TMA and H2O as reaction precursors, N2 as a carrier, and a growth temperature of 300°C to grow aluminum oxide with a thickness of 4nm;

[0023] The second metal oxide layer is sputtered TiO2, the sputtering power is 80W, the oxygen-argon ratio is 10 / 90sccm, the purity of the titanium target is 99.99%, and the sputtering thickness is 4nm.

[0024] Preferably, the first metal oxide layer, the second metal oxide layer and the storage window layer are sequentially formed on the lower electrode, specifically comprising the following steps:

[0025] The storage window layer is a 10 nm thick sputtered nickel oxide layer with a sputtering vacuum of 5*10 -4 Pa, the sputtering power is 100 W, the sputtering speed is 2 nm / min, and the sputtering thickness is 10 nm.

[0026] Preferably, the method of manufacturing the upper electrode on the storage window layer is physical vapor deposition, thermal evaporation process or atomic layer deposition.

[0027] The beneficial effects provided by the present invention are:

[0028] 1. The present invention includes a substrate, a lower electrode, a resistive switching layer and an upper electrode. The resistive switching layer is arranged between the lower electrode and the upper electrode. The resistive switching layer includes a first metal oxide layer, a second metal oxide layer and a storage window layer. The second metal oxide layer is connected to the first metal oxide layer and the storage window layer respectively. When the resistive switching memory changes between a high resistance state and a low resistance state, a large number of oxygen atoms are absorbed or released. When the resistive switching memory changes from a low resistance state to a high resistance state, the large number of oxygen atoms released can greatly promote the disconnection of the conductive filaments in the resistive switching layer, and make the conductive filaments disconnect more thoroughly. By effectively strengthening the disconnection of the conductive filament channel in the resistive switching layer, the resistance between the electrodes is increased, thereby achieving the effect of increasing the storage window of the resistive switching memory.

[0029] 2. The present invention includes a method for preparing a resistive random access memory. The preparation process of the present invention is simple, compatible with the traditional CMOS process, and greatly reduces the production cost. The lower electrode, the resistive random access layer and the upper electrode are patterned by photolithography technology, and multiple resistive random access memories composed of the lower electrode, the resistive random access layer and the upper electrode are isolated from each other. The isolated resistive random access memories can be tested independently. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0031] Figure 1 is a schematic diagram of the structure of a resistive memory;

[0032] Figure 2 It is a process flow chart of the preparation of resistive random access memory;

[0033] Figure 3It is a schematic diagram comparing the storage window sizes of resistive random access memory and resistive random access memory with a traditional structure. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0035] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] Embodiment 1:

[0037] like Figure 1 As shown, this embodiment includes a resistive memory, including: a substrate; a lower electrode, the lower electrode is connected to the substrate; a resistive layer, the resistive layer is connected to the lower electrode; an upper electrode, the upper electrode is connected to the resistive layer, and the resistive layer is arranged between the lower electrode and the upper electrode.

[0038] The resistive layer includes a first metal oxide layer, a second metal oxide layer and a storage window layer, the first metal oxide layer is connected to the lower electrode and the second metal oxide layer respectively, the second metal oxide layer is connected to the first metal oxide layer and the storage window layer respectively, and the storage window layer is connected to the upper electrode and the second metal oxide layer respectively.

[0039] The material of the first metal oxide layer is aluminum oxide, the material of the second metal oxide layer is titanium dioxide, and the material of the storage window layer is metal oxide. Specifically, in this embodiment, the material of the storage window layer may be nickel oxide.

[0040] The material of the lower electrode is Pd, Pt, Ti, Au or TiN, the material of the upper electrode is Pd, Pt, Ti, Au or TiN, and the material of the substrate is an insulating material. Specifically, in this embodiment, the insulating material may be silicon dioxide or silicon nitride.

[0041] The storage window layer in the resistive switching layer absorbs or releases a large number of oxygen atoms during the resistive switching process. When the resistive switching memory changes from a high resistance state to a low resistance state, the storage window layer absorbs a large number of oxygen atoms to form conductive filaments in the resistive switching layer. When the resistive switching memory changes from a low resistance state to a high resistance state, the storage window layer promotes the disconnection of the conductive filaments in the resistive switching layer by releasing a large number of oxygen atoms, and makes the conductive filaments disconnect more thoroughly, thereby increasing the resistance between the electrodes, thereby reducing the current of the resistive switching memory in the high resistance state. While maintaining the current of the resistive switching memory in the low resistance state basically unchanged, the storage window in the resistive switching memory can be increased.

[0042] Specifically, in this embodiment, nickel oxide is taken as an example, and the material of the storage window layer is nickel oxide. During the resistive switching process, nickel oxide can undergo a chemical reaction, that is, it can be converted into each other between NiO and Ni2O3. The different electrical conductivities of NiO and Ni2O3 are utilized to reduce the current of the resistive memory in the high resistance state and increase the storage window in the resistive memory.

[0043] Specifically, in nickel oxide, NiO is an insulator and Ni2O3 is a conductive phase. By applying different specific voltages between the upper electrode and the lower electrode, NiO and Ni2O3 can be converted into each other. When the resistive memory is completed, the nickel oxide is mainly NiO. At this time, the resistive memory is in a high-resistance state. When a voltage is applied across the electrodes, the storage window layer is converted into Ni2O3 through a chemical reaction. At the same time, the first metal oxide layer and the second metal oxide layer also release oxygen atoms in the electric field, thereby converting to an oxygen-deficient state, that is, a state with oxygen vacancies, and then the entire resistive layer is converted to a low-resistance state.

[0044] After the resistive memory is in a low-resistance state, a voltage is applied across the electrodes, and current will flow through the resistive layer, causing the temperature near the conductive filaments inside the resistive layer to rise sharply, so that Ni2O3 decomposes to form NiO and releases oxygen atoms. At this time, the oxygen vacancies in the metal oxides of the first metal oxide layer and the second metal oxide layer recombine with the released oxygen atoms and transform into a state without oxygen vacancies, and then the entire resistive layer is converted to a high-resistance state.

[0045] Embodiment 2:

[0046] like Figure 2 As shown, this embodiment includes a method for preparing a resistive random access memory, comprising the following steps: selecting a silicon wafer as a substrate and cleaning it, depositing a lower electrode on the substrate; depositing a resistive random access layer on the lower electrode, and sequentially manufacturing a first metal oxide layer, a second metal oxide layer and a storage window layer on the resistive random access layer;

[0047] An upper electrode is deposited on the storage window layer; the patterns of the lower electrode, the resistive switching layer and the upper electrode are processed by photolithography technology to isolate multiple resistive switching memories composed of the lower electrode, the resistive switching layer and the upper electrode from each other.

[0048] Specifically, in this embodiment, a silicon wafer with silicon oxide may be selected as a substrate and cleaned, wherein the silicon oxide is used as an isolation layer to isolate the resistive random access memory from the substrate.

[0049] The method for depositing the lower electrode on the substrate is physical vapor deposition, thermal evaporation or atomic layer deposition. In this embodiment, the lower electrode is made on the substrate, specifically including the following steps: forming a pattern by photolithography; sputtering Pt, the sputtering vacuum is 5*10 -4 Pa, the sputtering power is 300W, the sputtering speed is 40nm / min, and the sputtering thickness is 40nm; a photoresist stripping process is performed, and nitrogen is blown dry after the stripping is completed.

[0050] A first metal oxide layer, a second metal oxide layer and a storage window layer are sequentially formed on the lower electrode, specifically comprising the following steps: the first metal oxide layer uses TMA and H2O as reaction precursors, N2 as a carrier, a growth temperature of 300°C, and a growth thickness of 4nm of aluminum oxide; the second metal oxide layer is sputtered TiO2, the sputtering power is 80W, the oxygen-argon ratio is 10 / 90sccm, the titanium target purity is 99.99%, and the sputtering thickness is 4nm.

[0051] The first metal oxide layer, the second metal oxide layer and the storage window layer are sequentially formed on the lower electrode, specifically including the following steps: the storage window layer is a 10nm thick nickel oxide sputtered, and the sputtering vacuum is 5*10 -4 Pa, the sputtering power is 100 W, the sputtering speed is 2 nm / min, and the sputtering thickness is 10 nm.

[0052] The method for making the upper electrode on the storage window layer is physical vapor deposition, thermal evaporation process or atomic layer deposition. In this embodiment, the upper electrode is made on the storage window layer, specifically including the following steps: sputtering 40nm of nickel, the sputtering vacuum is 5*10 -4 Pa, the sputtering power is 200 W, and the sputtering speed is 18 nm / min.

[0053] Specifically, when the resistive memory is working, a large positive forming DC scanning voltage, such as 5V, is applied to the upper electrode when the voltage of the lower electrode is zero, so that the resistive memory enters the low resistance state from the initial high resistance state. Then a negative DC scanning voltage, such as -2V, is applied to make the resistive memory enter the high resistance state from the low resistance state. By repeatedly applying positive and negative voltages, the resistive device can switch between the high resistance state and the low resistance state.

[0054] Use a very small pulse voltage, such as 0.1V, to read the current value passing through the resistive memory to determine which state the resistive layer is in. By dividing the pulse voltage by the obtained current, the resistance values ​​of the high resistance state and the low resistance state can be obtained respectively. The ratio of the two is the storage window of the resistive memory. Figure 3 As shown, the storage window sizes of the two resistive memory with and without nickel oxide are compared, and it can be seen that the storage window of the resistive memory with nickel oxide is larger.

[0055] It should be noted that:

[0056] The "one embodiment" or "embodiment" mentioned in the specification means that the specific features, structures or characteristics described in conjunction with the embodiment are included in at least one embodiment of the present invention. Therefore, the phrases "one embodiment" or "embodiment" appearing in various places throughout the specification do not necessarily refer to the same embodiment.

[0057] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0058] In addition, it should be noted that the shapes and names of the parts and components of the specific embodiments described in this specification may be different. Any equivalent or simple changes made based on the structure, features and principles described in the patent concept of the present invention are included in the protection scope of the patent of the present invention. The technicians in the technical field of the present invention can make various modifications or supplements to the specific embodiments described or replace them in a similar manner, as long as they do not deviate from the structure of the present invention or exceed the scope defined by the claims, they should all fall within the protection scope of the present invention.

Claims

1. A resistive random access memory, characterized in that: include: substrate; A lower electrode connected to the substrate; A resistive switching layer, wherein the resistive switching layer is connected to the lower electrode; An upper electrode, wherein the upper electrode is connected to the resistive layer, and the resistive layer is disposed between the lower electrode and the upper electrode; The resistive layer includes a first metal oxide layer, a second metal oxide layer and a storage window layer, the first metal oxide layer is connected to the lower electrode and the second metal oxide layer respectively, the second metal oxide layer is connected to the first metal oxide layer and the storage window layer respectively, and the storage window layer is connected to the upper electrode and the second metal oxide layer respectively; The material of the storage window layer is metal oxide, specifically nickel oxide. When a voltage is applied across the electrodes, the storage window layer is converted into Ni2O3 through a chemical reaction. At the same time, the first metal oxide layer and the second metal oxide layer also release oxygen atoms in the electric field, and then the entire resistive layer is converted into a low-resistance state. When a voltage is applied across the electrodes, current will flow through the resistive layer, causing the temperature near the conductive filaments inside the resistive layer to rise sharply, so that Ni2O3 decomposes to generate NiO and releases oxygen atoms. At this time, the oxygen vacancies in the metal oxides of the first metal oxide layer and the second metal oxide layer recombine with the released oxygen atoms and are converted into a state without oxygen vacancies, and then the entire resistive layer is converted into a high-resistance state.

2. A resistive random access memory according to claim 1, characterized in that: The material of the first metal oxide layer is aluminum oxide, and the material of the second metal oxide layer is titanium dioxide.

3. The resistive random access memory according to claim 1, wherein: The material of the lower electrode is Pd, Pt, Ti, Au or TiN, and the material of the upper electrode is Pd, Pt, Ti, Au or TiN.

4. The resistive random access memory according to claim 1, wherein: The substrate is made of insulating material.

5. A method for preparing a resistive random access memory according to any one of claims 1 to 4, characterized in that: The following steps are involved: Select a silicon wafer as a substrate and clean it, and deposit a lower electrode on the substrate; Depositing a resistive switching layer on the lower electrode, wherein the resistive switching layer is sequentially formed into a first metal oxide layer, a second metal oxide layer and a storage window layer; Depositing an upper electrode on the storage window layer; The patterns of the lower electrode, the resistive switching layer and the upper electrode are processed by photolithography technology, so that a plurality of resistive switching memories composed of the lower electrode, the resistive switching layer and the upper electrode are isolated from each other.

6. The method for preparing a resistive random access memory according to claim 5, wherein: The method of depositing the lower electrode on the substrate is physical vapor deposition, thermal evaporation process or atomic layer deposition.

7. The method for preparing a resistive random access memory according to claim 5, characterized in that: A first metal oxide layer, a second metal oxide layer and a storage window layer are sequentially formed on the lower electrode, specifically comprising the following steps: The first metal oxide layer uses TMA and H2O as reaction precursors, N2 as a carrier, and a growth temperature of 300°C to grow aluminum oxide with a thickness of 4nm; The second metal oxide layer is sputtered TiO2, the sputtering power is 80W, the oxygen-argon ratio is 10 / 90sccm, the purity of the titanium target is 99.99%, and the sputtering thickness is 4nm.

8. The method for preparing a resistive random access memory according to claim 5, wherein: A first metal oxide layer, a second metal oxide layer and a storage window layer are sequentially formed on the lower electrode, specifically comprising the following steps: The storage window layer is a 10 nm thick sputtered nickel oxide layer with a sputtering vacuum of 5*10 -4 Pa, the sputtering power is 100 W, the sputtering speed is 2 nm / min, and the sputtering thickness is 10 nm.

9. The method for preparing a resistive random access memory according to claim 5, wherein: The method for making the upper electrode on the storage window layer is physical vapor deposition, thermal evaporation process or atomic layer deposition.

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