Image forming apparatus

Abstract

The present disclosure relates to an image forming apparatus. The image forming apparatus includes a fixing unit including a heater, a bidirectional thyristor for supplying power to the heater from an AC power source in a conduction state and for cutting off the supply of power from the AC power source to the heater in a non-conduction state, a control unit for outputting a control signal for controlling the conduction state or the non-conduction state of the bidirectional thyristor, and a DC voltage source for supplying power for the conduction of the bidirectional thyristor by the control signal output from the control unit. The control unit controls the heater with a predetermined control period based on a half wave unit of an AC voltage of the AC power source. The control unit outputs a plurality of control signals in one half wave of the AC voltage.

Description

Technical Field

[0001] This invention relates to an image forming apparatus, and more particularly to the power control of a fixing device used in an image forming apparatus. Background Technology

[0002] Conventionally, there exist image forming apparatuses such as copiers or printers (i.e., image forming apparatuses in which an image forming processing unit of an electrophotographic type, etc., uses a toner made of a heat-softening resin material, etc., to form a toner image on a recording material). In these image forming apparatuses, a thermal fixing device is used to perform thermal processing on the toner image. The thermal fixing device includes a heater that generates heat using electricity supplied from an AC power source, and in controlling the power to the heater, a bidirectional thyristor (hereinafter referred to as a triac switching element) is generally used. As a general drive unit for the triac switching element, there exists a drive configuration in which, for example, when the T1 terminal of the triac switching element is set to a reference potential, the T2 terminal and the gate terminal are both set to a positive (+) potential (trigger mode I) or a negative (-) potential (trigger mode III) (Yasunobu Arita, Satoshi Mori, and Yoshiharu Yu (February 1985), "Power Control Circuit Design Know-how," CQ Publishing Co., Ltd., p. 57).

[0003] like Figure 8 As shown in part (a), there is a circuit configuration in which the potential difference of the AC power supply 804 is used as the power supply for the gate trigger signal of the triac switching element 801. In this case, the triac switching element 801 cannot start conducting at the zero-crossing point of the AC power supply 804. Due to the larger potential difference between terminals T1 and T2 when the triac switching element 801 starts conducting, the amount of switching noise generated increases, thus requiring a large noise filter 805 to suppress noise emission to the outside of the image forming apparatus. On the other hand, as Figure 8 As shown in section (b), a circuit configuration exists in which a capacitor (capacitive) element 901 is used as the power supply for the gate trigger signal of a triac switching element 801 (see U.S. Patent No. 3,932,770). An AC power supply 804 charges the capacitor element 901 every half cycle, and the DRV signal is high, thereby supplying the gate trigger signal with the power accumulated from the capacitor element 901, resulting in an on-state (trigger mode II or III) being established between terminals T1 and T2. Figure 8In the configuration of part (b), it becomes possible to turn on the triac 801 from the zero-crossing point of the AC power supply 804. In the case where the power to the fusing apparatus is controlled on a half-wave basis of the AC power supply 804, the triac 801 is driven in synchronization with the zero-crossing point of the AC power supply 804. Thereby, the switching noise is suppressed, and thus the noise filter becomes relatively small.

[0004] Generally, the AC power supply outputs a sine wave having a predetermined frequency. However, due to the quality of the AC power supply, the waveform of the AC voltage can be distorted in some cases. Depending on the distortion of the waveform (hereinafter referred to as waveform distortion), the triac 801 can not be turned on at the timing of the zero-crossing point of the AC power supply 804. In this case, the power to the fusing apparatus is not supplied, and thus the fusing apparatus can not be heated to a predetermined temperature. Figure 8 The voltage between the T1 terminal and the T2 terminal of the triac shown in part (c) becomes 0 V at a timing other than the zero-crossing point during normal operation in some cases, so that the turn-on of the triac 801 is stopped in some cases. In this case, the power to the fusing apparatus is not supplied, and thus the fusing apparatus can not be heated to a predetermined temperature. Figure 8 In part (c), the upper part indicates the voltage waveform [V] of the AC power supply, and the lower part indicates the current waveform [A] flowing through the triac 801, in which the current waveform during normal operation is indicated by a dotted line. When the waveform distortion continuously occurs, an inappropriate temperature rise of the fusing apparatus can occur due to the insufficient power supply to the heater. As a means of suppressing the insufficient power supply, there is a first means in which the detection circuit portion by the ZEROX signal always monitors that the AC voltage becomes 0 V. In the case where an unintended 0 V state due to the waveform distortion is detected, the gate trigger signal is output again, so that the half wave of the AC voltage as a control target can be turned on again. In addition, there is a second means so that the gate trigger signal is continuously supplied during the half wave period as a control target. Even when the waveform distortion in the half wave period as a control target stops the turn-on of the triac 801, the gate trigger current is continuously supplied, and thus the turn-on of the triac 801 is established again.

[0005] However, in the case where the conventional first means is used, the load on the CPU for monitoring the ZEROX signal increases, and the period of the signal for suppressing the false detection of the ZEROX signal due to noise or the like is required, so that it is difficult to always monitor the ZEROX signal. In addition, in the case where the conventional second means is used, the power of the capacitive element is always discharged during the half wave period as a control target. Therefore, the power supply capacitor of the triac driving circuit becomes large, and causes an increase in cost and a size of the component portion. SUMMARY

[0006] According to an aspect of the present application, there is provided an image forming apparatus including: a fixing unit including a heater and configured to fix a toner image formed on a recording material by heat of the heater; a bidirectional thyristor configured to supply power from an AC power source to the heater in a conduction state and configured to cut off the supply of power from the AC power source to the heater in a non-conduction state; a control unit configured to output a control signal for controlling the conduction or non-conduction state of the bidirectional thyristor; and a DC voltage source configured to supply power for the conduction of the bidirectional thyristor by the control signal output from the control unit, wherein the control unit controls the heater with a predetermined control period based on a half wave unit of an AC voltage of the AC power source, and wherein the control unit outputs a plurality of control signals in one half wave of the AC voltage. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 is a schematic diagram of an image forming apparatus of Example 1.

[0008] Figure 2 is a configuration diagram of a power supply circuit to a heater in Example 1.

[0009] Figure 3 is a schematic example of outputting a plurality of FSRD signals in Example 1.

[0010] Figure 4 is a schematic example of outputting a plurality of FSRD signals in a case where waveform distortion occurs in Example 1.

[0011] Figure 5 is a schematic example of outputting a plurality of FSRD signals in a case where waveform distortion occurs in Example 2.

[0012] Figure 6 is a flowchart showing output processing of a plurality of FSRD signals in Example 3.

[0013] Figure 7 is a schematic diagram showing an example of supply of a FSRD signal when power control in Example 3 is performed.

[0014] Figure 8 Parts (a), (b), and (c) of are a schematic diagram showing a driving circuit in trigger modes I and III of a conventional triac, a schematic diagram showing a driving circuit in trigger modes II and III of the conventional triac, and a schematic diagram showing an example of conduction stop of the conventional triac due to waveform distortion of an AC power source, respectively. DETAILED DESCRIPTION

[0015] Embodiments for carrying out the present application will be specifically described below with reference to the accompanying drawings. Incidentally, in the following description, a bidirectional thyristor includes a T1 terminal, a T2 terminal, and a G terminal and is capable of establishing conduction in four trigger modes. Here, when the T1 terminal is a reference terminal, trigger mode I refers to a case where the T2 terminal is positive and the G terminal is positive, and trigger mode II refers to a case where the T2 terminal is positive and the G terminal is negative. In addition, trigger mode III refers to a case where the T2 terminal is negative and the G terminal is negative, and trigger mode IV refers to a case where the T2 terminal is negative and the G terminal is positive.

[0016] [Embodiment 1]

[0017] [Image forming apparatus]

[0018] As an example of an image forming apparatus including the fixing device in Embodiment 1, Figure 1 A schematic diagram of a laser beam printer of an electrophotographic type is shown in FIG. 1. A photosensitive layer is formed on a surface of a photosensitive drum 301 as a photosensitive member, and the signal layer is charged by a charging roller 302, after which a latent image is formed by irradiating the signal layer with laser light from a laser scanner 303. A toner image is formed on the photosensitive drum 301 by applying toner 305 to the latent image formed on the photosensitive drum 301 by a developing roller 304 as a developing unit. A transfer roller 306 as a transfer unit feeds a recording material 307 toward a fixing device (fixing unit) 300 while transferring the (unfixed) toner image in a transfer nip between the photosensitive drum 301 and the transfer roller 306 to the recording material 307. The fixing device 300 includes a cylindrical fixing film 309 and a heater 311 disposed in an inner space of the fixing film 309. The fixing film 309 is a film that is formed of a material having a low thermal conductivity and a high heat capacity, and is formed in a cylindrical shape so as to surround the heater 311. The fixing film 309 is formed of a material having a low thermal conductivity and a high heat capacity, and is formed in a cylindrical shape so as to surround the heater 311. The fixing film 309 is formed of a material having a low thermal conductivity and a high heat capacity, and is formed in a cylindrical shape so as to surround the heater 311. Figure 1The depth direction is longitudinal. The pressure roller 310 contacts and presses against the outer peripheral surface of the fixing film 309, thereby forming a fixing roller gap. The recording material 307 is heated while being clamped and fed through the fixing film 309 in the fixing roller gap formed by the heater 311 and the pressure roller 310. The heater 311 is a heater consisting of a substrate, a heating layer, and a protective layer, for example, made of ceramic. A stay 312 holds the heater 311. A member 313 is a reinforcing member. A thermistor 314, serving as a temperature detection unit, detects the temperature of the heater 311. For example, an unfixed toner image 308 is fixed onto the recording material 307 by heating with the heater 311, which is connected in series with an overheat protection element (not shown), which is composed of a thermal fuse and has a power supply during a certain period. Afterward, the recording material 307 is discharged from the fixing roller gap through the discharge opening to the discharge section 316 of the image forming apparatus. Incidentally, the sheet feed roller 317 is used to feed the recording material 307, while the transfer roller pair 318 and 319 are used to transfer the recording material 307. The CPU 315 controls various operations of the image forming apparatus.

[0019] [Power supply circuit]

[0020] The electrical connection diagram of the circuit supplying power to heater 311 is shown in Figure 2 As shown in the diagram, the power supply from AC power source 401 to heater 311 is controlled by a bidirectional thyristor (hereinafter referred to as a triac switching element) 402. The triac switching element 402 is turned on when power is supplied from AC power source 401 to heater 311, and turned off when the power supply from AC power source 401 to heater 311 is cut off. The circuitry for driving the triac switching element 402 includes transistors 403 and 405, an optocoupler 404, and registers 406, 407, 408, and 409.

[0021] The CPU 315 calculates the amount of power supply to the heater 311 based on the temperature detection result of the thermistor 314. The CPU 315 outputs a FSRD signal as a control signal at a high level according to the calculation result, thereby causing the transistor 403 to enter conduction. When the transistor 403 enters conduction, a current flows from the power source Vcc through the register 406, thereby causing the opto-coupler 404 to enter conduction, thereby causing the transistor 405 to enter conduction. By the conduction of the transistor 405, a gate trigger voltage is applied between the Tl terminal of the triac 402 and the gate terminal (hereinafter referred to as the G terminal) of the triac 402, so that a gate trigger current flows. The gate trigger voltage applied depending on the FSRD signal is hereinafter referred to as a gate trigger signal. Thus, an on state is established between the Tl terminal and the T2 terminal of the triac 402, thereby supplying power from the AC power source 401 to the heater 311. The overheat protection element 410 is an element for preventing the heater 311 from overheating. The coil 411 suppresses emission of switching noise generated at the timing when the triac 402 starts conduction to the outside of the image forming apparatus. The CPU 315 performs control with a predetermined control capability based on one half unit of the AC voltage of the AC power source 401.

[0022] The registers 412, 415, and 416, the diode 413, the opto-coupler 414, and the capacitor 417 constitute a zero-crossing detection circuit as a zero-crossing detection unit. The zero-crossing detection circuit outputs a high level or low level signal (hereinafter referred to as a ZEROX signal) to the CPU 315 depending on the AC voltage waveform of the AC power source 401. The CPU 315 determines the output timing of the FSRD signal synchronized with the ZEROX signal based on the output of the opto-coupler 414 that changes depending on the instantaneous value of the voltage of the AC power source 401, that is, based on the detection result of the zero-crossing detection circuit. Thereby, the triac 402 starts entering conduction near the zero-crossing point of the AC power source 401.

[0023] [Power source 418]

[0024] Here, the power supply 418 for the gate trigger signal will be described. The power supply 418 includes a Zener diode 419, a capacitor 420, a resistor 421, and a diode 422. In the power supply 418, the T1 terminal of the triac 402 is used as a reference potential, and a DC voltage source is constituted by the Zener diode 419 and the capacitor 420. The capacitor 420 is charged via the diode 422 at each half wave of the AC voltage waveform of the AC power source 401 until the end-to-end voltage thereof reaches the Zener voltage Vz (hereinafter referred to as the Vz voltage) of the Zener diode 419. In Embodiment 1, for example, the AC voltage of the AC power source 401 is 100 V AC, the frequency fac is 60 Hz, the Vz voltage is 10 V, the resistance value R409 of the resistor 409 is 150 Ω, and the resistance value R407 of the resistor 407 is 4.7 kΩ. In addition, the gate trigger voltage Vgt of the triac 402 in the trigger mode I or III is 1.5 V, and the maximum gate trigger current Igt max of the triac 402 in the trigger mode I or III is 50 mA. Thus, when the triac 402 is driven, the capacitor 420 is required to supply a potential difference exceeding the gate trigger voltage Vgt (e.g., 1.5 V) and a current exceeding the maximum gate trigger current Igt max (e.g., 50 mA). Incidentally, the masking period of the zero-crossing detection signal in Embodiment 1 is half of one cycle of the AC power source 401.

[0025] [Gate trigger signal in Embodiment 1]

[0026] Here, in Figure 3 the power supply control of the triac 402 in Embodiment 1 is shown. In Figure 3 (i) indicates a waveform of the voltage value [V] of the AC power source 401, and (ii) indicates the level (high level or low level) of the ZEROX signal as a result of the zero-crossing detection. In addition, (iii) indicates the FSRD signal output by the CPU 315, and (iv) indicates a waveform of the current (heater current) flowing through the heater 311. In each of (i) to (iv), the abscissa indicates time [msec]. Incidentally, in the following description, the gate trigger signal is a signal (voltage) depending on the FSRD signal, and thus, in some cases, the FSRD signal is described by replacing the FSRD signal with the gate trigger signal.

[0027] The CPU 315 supplies a gate trigger signal having a time width Twx = 200 sec with a zero-crossing point of a half wave (hereinafter referred to as an on-target half wave) of an AC voltage for turning on the triac 402 as a starting point. The gate trigger signal first output with the zero-crossing point as the starting point is hereinafter referred to as a first gate trigger signal. The CPU 315 also outputs the gate trigger signal twice in the on-target half wave (one half wave) at intervals of, for example, 1 / 6 of one period (hereinafter referred to as an AC power period) Tac (= 1 / fc) of the AC power source 401. That is, the CPU 315 supplies the gate trigger signal three times in one half wave (hereinafter referred to as a same power supply target half wave) which is a target of the same power supply. Incidentally, at least one gate trigger signal output after the first gate trigger signal with the zero-crossing point as the starting point is hereinafter referred to as another gate trigger signal. In Embodiment 1, two other gate trigger signals are output, so that the first gate trigger signal, and the second gate trigger signal and the third gate trigger signal after the first gate trigger signal are output. Therefore, the CPU 315 determines the output intervals of the three gate trigger signals based on the zero-crossing detection result depending on the frequency fac of the AC power source 401. To this end, even when the frequency fac of the AC power source 401 is changed, the CPU 315 can supply the gate trigger signal at timings obtained by dividing a half wave of the power supply into three equal parts. Therefore, the CPU 315 outputs a plurality of control signals at timings depending on the frequency of the AC power source 401 in one half wave of the AC voltage.

[0028] In addition, based on the ZEROX signal which is the zero-crossing detection result, the output timing of the first gate trigger signal with respect to the same power supply target half wave is such that the first gate trigger signal is output in accordance with the zero-crossing point of the AC power source 401. Here, Figure 4 The respective waveforms in a case where waveform distortion occurs in the AC power source 401 are shown, in which (i) indicates a waveform of a voltage value [V] of the AC power source 401, and (ii) indicates a gate trigger signal (or an FSRD signal) output by the CPU 315. In addition, (iii) indicates a waveform of a current flowing through the heater 311. In each of (i) to (iii), the abscissa indicates time [msec]. By performing the supply of the gate trigger signal as described above, the following effects can be obtained. That is, even in a case where waveform distortion occurs at the turn-off of the triac 402 at a timing t1 shown in FIG. 10, Figure 4 The triac 402 can be turned on by the subsequent gate trigger signal (i.e., the second gate trigger signal) even in a case where waveform distortion occurs at the turn-off of the triac 402 at the timing t1 shown in FIG. 10, Figure 4In this case, the transistor 405 is again turned on by the second gate trigger signal at timing T2. Thus, an inappropriate temperature rise of the imaging device 300 can be suppressed. Therefore, the CPU 315 outputs a plurality of FSRD signals in one half wave of the AC voltage.

[0029] [Capacitance of capacitor 420]

[0030] The capacitance of the capacitor 420 necessary when such power supply control is performed will be described. In a case where the end-to-end potential difference Vc of the capacitor 420 is charged to the Vz voltage at the time point at which power supply is started in the power supply target half wave, the relationship of the gate trigger current Igt at the time t from the start of power supply can be approximated as shown in the following formula (1).

[0031]

[0032] In formula (1), the saturation voltage of the transistor 405 (i.e., the gate trigger voltage Vgt) is omitted.

[0033] Here, the high level time of one gate trigger signal (also the time width (duration) of the gate trigger signal) is twx, for example, 200 μsec. The gate trigger signal supply period (total supply time) tgt of each (one) power supply half wave is {(time width twx) = 200 μsec} x 3. For this reason, according to formula (1), the capacitance C420 of the capacitor 420 that satisfies the gate trigger current Igt (0.6 msec) > Igt_min flowing in one power supply half wave becomes 14 μF or more. The capacitance of the capacitor 420 is determined based on the value of the sum of the currents flowing between the Tl terminal and the gate terminal of the triac 402 when a plurality of gate trigger signals are output. The capacitor 420 is charged only every half wave of the AC power source 401, and therefore, the capacitance C420 can preferably be a capacitance of 28 μF or more, which is twice the above-described 14 μF or more. On the other hand, in a case where the gate trigger signal is continuously supplied during the period of the power supply target half wave as described in the background art, the supply period tgt is approximately 8.67 msec, which is the half wave period of the AC power source 401, and the necessary capacitance C420 of the capacitor 420 is 200 μF or more.

[0034] Therefore, in the power supply control of the triac 402 in Embodiment 1, the DC power source portion of the Tl terminal of the triac 402 is the power source of the gate trigger signal. In addition, in this power supply control circuit, by supplying a plurality of gate trigger signals to the same power supply target half wave, it is possible to suppress the inappropriate temperature rise of the fixing device due to the waveform distortion occurring in the AC power source 401 while limiting the size increase of the DC power source portion.

[0035] Incidentally, as an example, the number of supplied gate trigger signals in the same power supply target half wave in Embodiment 1 is three. However, when the number of supply is two or more (i.e., multiple), a similar effect can be obtained. In addition, the interval of the plurality of gate trigger signals supplied in the same power supply target half wave is an interval depending on the frequency of the AC power source 401, but the output timing can be a fixed or an unfixed output timing. In addition, in Embodiment 1, the configuration in the case of using the trigger modes II and III of the triac 402 is described. However, the present application is also applicable to the case of using the trigger mode I or IV in which the Tl terminal side of the capacitor 420 is negative and the G terminal side of the capacitor 420 is positive, and achieves a similar effect.

[0036] As described above, according to Embodiment 1, while suppressing the size increase of the power capacity of the circuit for dividing the voltage of the bidirectional thyristor, it is possible to prevent the inappropriate temperature rise of the fixing device due to the waveform distortion of the AC voltage.

[0037] [Embodiment Two]

[0038] [Gate Trigger Signal]

[0039] The differences between the configuration of Embodiment 2 and the configuration of Embodiment 1 will be described, and the description of the commonalities will be omitted. In Embodiment 1, the triac 402 is brought into conduction near the zero-crossing point of the AC power source 401 by determining the output timing of the FSRD signal based on the ZEROX signal by the CPU 315. However, due to the mass production deviation of the optocoupler 414 and the register 412 for generating the ZEROX signal, and the like, a deviation occurs between the output timing of the true zero-crossing point and the FSRD signal of the AC power source 401. Even in the case where the FSRD signal is output at a high level before the true zero-crossing point due to such a deviation, in order to reliably supply power in the power supply target half wave, the following is preferable. That is, the duration Tw1 of the first gate trigger signal (corresponding to the first control signal) for the power supply target half wave can preferably be determined in the following manner. The duration Tw1 can preferably be longer than the sum of the pulse width tw_min (required time) of the gate trigger current necessary to maintain the conduction state of the triac 402 and the deviation time tgap (tw1 > tw_min + tgap).

[0040] On the other hand, the other gate trigger signals (corresponding to the other control signals other than the first control signal) for the same power supply target half wave are supplied in the period in which the potential difference is generated between the T1 terminal and the T2 terminal. The duration twy of each of the other gate trigger signals can only need to be longer than the pulse width tw_min of the gate trigger current (twy > Tw_min). For this reason, these values can only need to satisfy the following relationship of Equation (2).

[0041] t w1 ≥t gap +t w_min >t wy ≥t w_min (2)

[0042] Here, in the case where the deviation time tgap is 100 μsec and the pulse width tw_min of the gate trigger current is 50 μsec, the duration tw1 of the gate trigger signal is set to 200 μsec and the duration twy of each of the other gate trigger signals is set to 100 μsec. Thereby, the relationship of Equation (2) can be satisfied so that the sum of the supply times (durations) for the same power supply target half wave becomes 400 μsec.

[0043] The capacitance C420 of the capacitor 420 required for the current in the third gate trigger signal to exceed Igt_min becomes approximately 10 μF based on formula (1) (Igt(0.4 msec) > Igtmin). The capacitor 420 is charged only at each half wave of the AC power source 401, and therefore, as the preferable capacitance of the capacitance C420, approximately 20 μF is used, which makes it possible to suppress an inappropriate temperature rise of the fixing device due to waveform distortion of the AC power source 401 in the power supply control circuit configuration using a smaller power source than that in Embodiment 1.

[0044] Figure 5 is a schematic diagram showing the control in Embodiment 2. In Figure 5 , (i) shows a waveform of the voltage value [V] of the AC power source 401, and (ii) shows the level (high level or low level) of the ZEROX signal as a result of zero-cross detection. In addition, (iii) shows the FSRD signal output by the CPU 315, and (iv) shows a waveform of the current (heater current) flowing through the heater 311. In each of (i) to (iv), the abscissa axis shows time [msec]. As shown in (i) of Figure 5 , in Embodiment 2, the deviation time tgap occurs. In addition, waveform distortion occurs in the AC power source 401. However, even when the power supply target half wave is turned off due to the waveform distortion, the triac 402 can be made to be turned on again by the subsequent other signal (second signal), and thus it is possible to suppress an inappropriate temperature rise of the fixing device.

[0045] Therefore, also in the power supply control of the triac 402 in Embodiment 2, a power supply control circuit in which the DC power source portion based on the Tl terminal of the triac 402 is a power source of the gate trigger signal is used. In addition, the supply period of the first gate trigger signal and the other gate trigger signal in the power supply target half wave is changed, and a plurality of gate trigger signals are supplied in the same power supply target half wave. Thereby, it is possible to suppress an inappropriate temperature rise of the fixing device due to waveform distortion while limiting an increase in the size of the DC power source portion.

[0046] As described above, according to Embodiment 2, it is possible to prevent an inappropriate temperature rise of the fixing device due to waveform distortion of the AC voltage while suppressing an increase in the size of the power supply capacity of the circuit for dividing the voltage of the triac.

[0047] [Embodiment 3]

[0048] In Embodiments 1 and 2, the following control is performed: when the conduction of the triac 402 is stopped due to waveform distortion of the AC power supply 401 in the middle of the power supply target half-wave, the conduction of the triac 402 is always restored. On the other hand, in the case where waveform distortion occurs intermittently, the power shortage rate varies depending on the electrical power required by the heater 311 per unit time. Incidentally, unit time corresponds to, for example, a half-wave unit in which two half-waves (one full wave) of the AC power supply 401 are minimized. The control unit for the power supply to the heater 311 will be described as, for example, the case of 10 half-waves of the AC power supply 401. In Embodiment 3, depending on the determined power, the CPU 315 determines whether to output multiple FSRD signals.

[0049] When the temperature of the fixing device 300 begins to rise, there is a trend where continuous power supply to the heater 311 is controlled, causing the power supply ratio in the power supply control unit to become 100%. In this 100% power supply ratio control, for example, if power supply to a half-wave is stopped due to waveform distortion, the input power is 90%. On the other hand, when the primary intention is to maintain the temperature of the fixing device 300, the power supply ratio to the heater 311 decreases, causing the power supply ratio to become, for example, approximately 30% (corresponding to 3 half-waves). Therefore, if power supply to a half-wave is stopped due to waveform distortion, the input power becomes 67%, leading to an increase in temperature ripple in the fixing device 300. When this control with a low power supply ratio is executed, the increase in temperature ripple in the fixing device 300 can be suppressed by supplying multiple gate trigger signals in the same power supply target half-wave.

[0050] [Power Supply Control]

[0051] exist Figure 6 The diagram illustrates a flowchart of control for supplying multiple gate trigger signals when the power supply ratio is, for example, 50% or less. When temperature control of the fixing device 300 begins, the CPU 315 executes step (hereinafter referred to as S) 1 and subsequent processing. In S1, the CPU 315 begins controlling the power supply to the heater 311 based on the detection result of the thermistor 314. In S2, the CPU 315 determines whether the subsequent half-wave of the AC power supply 401 is a power supply target. Here, the subsequent half-wave refers to a predetermined half-wave that is a control target during a predetermined control period (e.g., 10 half-waves). In S2, if the CPU 315 determines that the subsequent half-wave is not a power supply target, the CPU 315 returns the processing to S2; and if the CPU 315 determines that the subsequent half-wave is a power supply target, the CPU 315 advances the processing to S3.

[0052] In S3, CPU 315 outputs an FSRD signal and supplies a first gate trigger signal to the triac switching element 402. In S4, CPU 315 determines whether the current half-wave is not a power supply target (hereinafter referred to as a non-power supply target). In S4, if CPU 315 determines that the current half-wave is a power supply target, CPU 315 proceeds the process to S6; if CPU 315 determines that the current half-wave is a non-power supply target, CPU 315 proceeds the process to S5. In S5, CPU 315 outputs multiple FSRD signals in the same power supply target half-wave. Incidentally, multiple FSRD signals are output at the time intervals described in Embodiments 1 and 2. In S6, CPU 315 determines whether the temperature control of the fixing device 300 has ended. In S6, if CPU 315 determines that temperature control should continue, CPU 315 returns the process to S2; if CPU 315 determines that temperature control has ended, CPU 315 terminates the series of processes.

[0053] exist Figure 7 The diagram illustrates an example (from half-wave 1 to half-wave 4) of the power supply control of the heater 311 controlled in its application embodiment 3. Figure 7 In the diagram, (i) represents the waveform of the voltage value [V] of the AC power supply 401, (ii) represents the FSRD signal output by the CPU 315, and (iii) represents the waveform of the current flowing through the heater 311. In each of (i) to (iii), the horizontal axis represents time [msec]. Here, half-waves 1 and 4 are non-power supply target half-waves, while half-waves 2 and 3 are power supply target half-waves. Therefore, in each of half-waves 2 and 3, the first gate trigger signal is supplied near the zero-crossing point of the AC power supply 401. In the case of half-wave 2, half-wave 1, which is the current half-wave, is a non-power supply target half-wave, therefore, for Figure 6 The S4 judgment is "yes", so the gate trigger signal is supplied twice in the middle of half-wave 2.

[0054] On the other hand, in the case of half-wave 3, half-wave 2, which is the current half-wave, is the half-wave to which the power is supplied; therefore, for Figure 6If the judgment in S4 is "No", then in half-wave 3, only the first gate trigger signal for starting the conduction of the triac 402 is supplied, and no other signals are supplied. That is, the processing in S4 is not performed. Therefore, by performing the control in Embodiment 3, it becomes possible to supply multiple gate trigger signals only when the power supply ratio is below 50%. Therefore, the cessation of the conduction of the triac 402 caused by intermittent waveform distortion is suppressed by half the capacitance of the capacitor 420 required for each power supply unit, thereby reducing the degree of temperature ripple in the fixing device 300.

[0055] In Embodiment 3, the DC power supply section based on the T1 terminal of the triac switching element 402 is the power supply for the gate trigger signals. In this power supply control circuit, by changing the number of multiple gate trigger signals supplied to the same power supply target half-wave, depending on the power supply ratio, the temperature ripple of the fixing device caused by waveform distortion can be suppressed while limiting the increase in the size of the DC power supply section. Incidentally, in Embodiment 3, the number of gate trigger signals supplied in subsequent half-waves changes depending on the power supply state of the current half-wave. However, the number of gate trigger signals can also change depending on the result of the power supply ratio in the power supply control unit of the CPU 315. Furthermore, the number of a single gate trigger signal or multiple gate trigger signals changes depending on the power supply state of the current half-wave, but the number of multiple gate trigger signals can also change depending on the consecutive power supply target half-waves.

[0056] As described above, according to Embodiment 3, while suppressing the increase in the size of the power supply capacity of the circuit used for voltage division of the bidirectional thyristor, it is possible to prevent inappropriate temperature rise of the fixing equipment due to waveform distortion of the AC voltage.

[0057] [Other embodiments]

[0058] One or more embodiments of the present invention can also be implemented by a computer that reads and executes computer-executable instructions (e.g., one or more programs) recorded on a storage medium (which may also be more fully referred to as a "non-transient computer-readable storage medium") to perform the functions of one or more embodiments described above and / or includes one or more circuits (e.g., application-specific integrated circuits (ASICs)) for performing the functions of one or more embodiments described above, and by a method performed by a computer of a system or device by, for example, reading and executing computer-executable instructions from a storage medium to perform the functions of one or more embodiments described above and / or controlling one or more circuits to perform the functions of one or more embodiments described above. The computer may include one or more processors (e.g., a central processing unit (CPU), a microprocessor unit (MPU)) and may include a network of individual computers or individual processors to read and execute computer-executable instructions. The computer-executable instructions may be provided to the computer, for example, from a network or a storage medium. The storage medium may include, for example, a hard disk, random access memory (RAM), read-only memory (ROM), a storage device for a distributed computing system, an optical disc (such as a CD, a DVD, or a Blu-ray disc (BD)). TM One or more of the following: flash memory devices, memory cards, etc.

[0059] While the invention has been described with reference to exemplary embodiments, it should be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the appended claims should be given the broadest interpretation to cover all such modifications and equivalent structures and functions.

Claims

1. An image forming apparatus, comprising: A fixing unit includes a heater and is configured to fix a toner image formed on a recording material by the heat of the heater; A bidirectional thyristor is configured to supply power from an AC power source to the heater in a conducting state and to cut off the power supply from the AC power source to the heater in a non-conducting state. The control unit is configured to output a control signal for controlling the conduction state or non-conducting state of the bidirectional thyristor; as well as A DC voltage source is configured to supply power to turn on the bidirectional thyristor via a control signal output from the control unit. The control unit controls the heater based on the half-wave unit of the AC voltage of the AC power supply at a predetermined control cycle. The control unit outputs multiple control signals within a half-wave, starting from the zero-crossing point of the AC voltage. The control unit mentioned above, The duration of the first control signal being high among the plurality of control signals is determined to be longer than the sum of the time required for the bidirectional thyristor to maintain its conducting state and the deviation time between the zero-crossing point and the detection result of the zero-crossing point detection unit, and The time width of the other control signal among the plurality of control signals, excluding the first control signal, is determined to be a time width that is longer than the time required for the bidirectional thyristor to maintain the conducting state and shorter than the time width of the first control signal.

2. The image forming apparatus according to claim 1, wherein the control unit outputs the plurality of control signals at a timing that depends on the frequency of the AC power supply during one half-wave of the AC voltage.

3. The image forming apparatus according to claim 1, wherein the DC voltage source comprises a capacitor, and The capacitance of the capacitor is determined based on the sum of the currents flowing between the T1 terminal and the gate terminal of the bidirectional thyristor when the multiple control signals are output.

4. The image forming apparatus according to claim 1, further comprising a zero-crossing detection unit configured to detect the zero-crossing point of the AC voltage. The control unit outputs the plurality of control signals based on the detection results of the zero-crossing detection unit.

5. The image forming apparatus according to claim 1, further comprising a temperature detection unit configured to detect the temperature of the heater. The control unit determines the amount of power supplied to the heater based on the detection results of the temperature detection unit.

6. The image forming apparatus of claim 5, wherein the control unit determines whether to output the plurality of control signals based on the determined power.

7. The image forming apparatus according to claim 6, wherein in a predetermined half-wave of an object to be controlled in a predetermined control cycle, if power is supplied in the half-wave preceding the predetermined half-wave, the control unit outputs only a first control signal, and if power is not supplied in the half-wave preceding the predetermined half-wave, it outputs the plurality of control signals.

8. The image forming apparatus according to claim 1, wherein the fixing unit comprises a cylindrical film and a pressure roller contacting the outer peripheral surface of the film. The heater is disposed within the internal space of the membrane, and The recording material is heated while being clamped and fed through the membrane in the fixing roller gap formed by the heater and the pressure roller.

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