Chip information carving method and device, computer readable storage medium and terminal

Abstract

A method and apparatus for engraving chip information, a computer-readable storage medium, and a terminal are disclosed. The method includes: determining the identity information of a wafer and the distribution information of each chip; generating the identity information of each chip based on the identity information of the wafer and the distribution information of each chip; encrypting the identity information of each chip based on a preset encryption rule to obtain encrypted information; and engraving each chip from the back side of the wafer, wherein the engraved chip information includes the encrypted information. This invention can effectively ensure the security of chip information and enables easy reading of chip information at each stage.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method and apparatus for etching chip information, a computer-readable storage medium, and a terminal. Background Technology

[0002] Identifying and tracking chips is crucial at every stage of the chip industry chain. Specifically, determining a chip's identity at any point in time, from its inception to its failure, enables business claims, allows for returns to suppliers to demand thorough investigations, and allows chip manufacturers to examine production history and data to identify the root cause of problems and ultimately resolve them, preventing the recurrence of chip quality issues.

[0003] The chip's identity information is used to indicate the chip's origin, such as the chip's supplier information, production line information, wafer information, and the chip's distribution information on the wafer.

[0004] In existing technologies, after a chip is packaged, its identification information is laser-printed onto the back of the chip's plastic casing. However, this method only applies to packaged chips. Before packaging or after the packaging material is removed for failure analysis, the exposed chip's identification information is no longer available. Furthermore, this identification information needs to be read using testing equipment and programs. When a memory cell fails, or when the chip experiences peripheral circuit failure due to defects, the testing program will be unable to perform normal memory cell-related operations and reads. Summary of the Invention

[0005] The technical problem solved by this invention is to provide a method and apparatus for engraving chip information, a computer-readable storage medium, and a terminal, which can effectively ensure the security of chip information and enable easy reading of chip information at each stage.

[0006] To address the aforementioned technical problems, embodiments of the present invention provide a method for engraving chip information, comprising: determining the identity information of a wafer and the distribution information of each chip; generating the identity information of each chip based on the identity information of the wafer and the distribution information of each chip; encrypting the identity information of each chip based on a preset encryption rule to obtain encrypted information; and engraving each chip from the back side of the wafer, wherein the engraved chip information includes the encrypted information.

[0007] Optionally, determining the distribution information of each chip includes: acquiring a front image of the wafer; and using image recognition technology to determine the coordinates of one or more corners of each chip on the wafer, so as to obtain the distribution information of each chip based on the determined coordinates.

[0008] Optionally, determining the coordinates of one or more corners of each chip in the wafer to obtain the distribution information of each chip based on the determined coordinates includes: for each chip, determining the coordinates of the center point of the chip or the coordinates of a preset corner based on the coordinates of one or more corners of the chip; and using the coordinates of the center point of the chip or the coordinates of the preset corner as the distribution information of the chip.

[0009] Optionally, determining the coordinates of one or more corners of each chip in the wafer to obtain the distribution information of each chip based on the determined coordinates includes: sorting the chips of the wafer according to the coordinates of one or more corners of each chip and determining the serial number of each chip; using the serial number of each chip as the distribution information of that chip.

[0010] Optionally, sorting the chips of the wafer according to the coordinates of one or more corners of each chip and determining the serial number of each chip includes: drawing a chip distribution map according to the coordinates of each chip; comparing the chip distribution map with the chip design drawing of the wafer and removing predicted invalid chips, wherein the chip design drawing is marked with the predicted invalid chips; and sorting the remaining chips to determine the serial number of each chip.

[0011] Optionally, determining the wafer's identity information includes: reading the wafer's production batch number and wafer number, and using them as the wafer's identity information.

[0012] Optionally, etching each chip from the back side of the wafer includes: drawing a chip distribution map based on the coordinates of each chip; flipping the chip distribution map 180 degrees with the extension line of the cut as the axis of symmetry to obtain the crystal back coordinates of each chip on the back side of the wafer; and determining the etching position of each chip based on the crystal back coordinates and etching it.

[0013] Optionally, the identity information of each chip is encrypted based on a preset encryption rule. The encrypted information includes: encrypting each character of the chip information according to a preset mapping table between characters and ASCII codes; wherein, the chip information engraved on the back of each chip also includes the indication information of the mapping table.

[0014] Optionally, encrypting each character of the chip information includes: encrypting each character in the chip information according to a preset mapping table between characters and ASCII codes to obtain first-level encrypted chip information; converting the first-level encrypted chip information from the current base to another base to obtain second-level encrypted chip information; wherein, the chip information engraved on the back of each chip also includes a version number of the codebook, the codebook containing indication information of the mapping table and base conversion indication information.

[0015] Optionally, the preset mapping table between characters and ASCII codes is generated using a random value selection function.

[0016] To address the aforementioned technical problems, embodiments of the present invention provide a chip information engraving apparatus, comprising: a distribution information determining module for determining the identity information of a wafer and the distribution information of each chip; an identity information determining module for generating identity information for each chip based on the identity information of the wafer and the distribution information of each chip; an encryption module for encrypting the identity information of each chip based on a preset encryption rule to obtain encrypted information; and a chip information engraving module for engraving each chip from the back side of the wafer, wherein the engraved chip information includes the encrypted information.

[0017] To address the aforementioned technical problems, embodiments of the present invention provide a computer-readable storage medium storing a computer program thereon, wherein the computer program, when executed by a processor, performs the steps of the chip information engraving method described above.

[0018] To address the aforementioned technical problems, this invention provides a terminal, including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor runs the computer program, it executes the steps of the chip information engraving method described above.

[0019] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0020] In this embodiment of the invention, based on the wafer's identity information and the distribution information of each chip, the identity information of each chip is generated and encrypted, which can effectively ensure the security of chip information. By engraving each chip from the back of the wafer, compared with laser printing on the back of the plastic shell of the packaged chip, the solution of this embodiment of the invention allows the wafer's identity information to be identified directly by the naked eye or software program before the chip packaging process. During or after the packaging process, the wafer's identity information can also be identified by X-ray equipment and software program. At each stage, easy reading of chip information can be achieved.

[0021] Furthermore, image recognition technology is used to determine the coordinates of one or more corners of each chip in the wafer, so as to obtain the distribution information of each chip based on the determined coordinates. This allows the distribution information of each chip to be determined and distinguished based on coordinate parameters, thereby improving the accuracy of the engraved chip information.

[0022] Furthermore, the chip distribution diagram is compared with the chip design diagram of the wafer, and the predicted invalid chips are removed. The remaining chips are sorted to determine the sequence number of each chip, thereby improving the continuity of chip information and effectively reducing the interference of invalid chip information.

[0023] Furthermore, by encrypting each character of the chip information according to a preset mapping table between characters and ASCII codes, the security of the engraved chip information can be improved.

[0024] Furthermore, according to a preset mapping table between characters and ASCII codes, each character in the chip information is encrypted to obtain first-level encrypted chip information; the first-level encrypted chip information is converted from the current base to another base to obtain second-level encrypted chip information. Through second-level encryption, the security of the engraved chip information can be further improved. Attached Figure Description

[0025] Figure 1 This is a flowchart of a chip information engraving method according to an embodiment of the present invention;

[0026] Figure 2 This is a schematic diagram of the distribution information of a chip in an embodiment of the present invention;

[0027] Figure 3 This is a schematic diagram of a chip design for a wafer according to an embodiment of the present invention;

[0028] Figure 4 This is a schematic diagram of a method for encrypting each character of the chip information in an embodiment of the present invention;

[0029] Figure 5 This is a schematic diagram of the chip distribution on the back side of a wafer in an embodiment of the present invention;

[0030] Figure 6 This is a schematic diagram of the structure of a chip information engraving device according to an embodiment of the present invention. Detailed Implementation

[0031] Regarding chip identity tracking, in one existing specific application, the chip's identity information can be laser-printed on the back of the chip's plastic casing after the chip is packaged.

[0032] However, this method only applies to packaged chips. Before packaging or after the packaging material is removed for failure analysis, the exposed chip's identity information cannot be determined. Furthermore, this identity information needs to be read using testing equipment and programs. When a memory cell fails, or when the chip experiences peripheral circuit failure due to defects, the testing program will be unable to perform normal memory cell-related operations and reads.

[0033] In another specific application, some storage units can be designed into the chip during chip design; during chip testing, the specific location information of each chip can be written into the storage units; and when the identity of the chip needs to be known later, the chip can be read out using testing equipment and testing programs.

[0034] However, the above methods are cumbersome, have high barriers to entry, and are costly, requiring the storage units to be designed into the chip, which occupies a large area. Furthermore, reading the chip's identification information also requires testing equipment and programs. When the storage unit fails, or when the chip's peripheral circuits fail due to defects, the testing program will be unable to perform normal storage unit operations and reads.

[0035] The inventors of this invention discovered through research that memory cell failure or peripheral circuit failure is quite common. In a non-limiting process platform, the failure rate of memory cells or peripheral circuits is approximately 0.5%, and these failed chips all suffer from identification tracking failures. However, in practical applications, it is even more necessary to track the identification information of failed chips.

[0036] In this embodiment of the invention, based on the wafer's identity information and the distribution information of each chip, the identity information of each chip is generated and encrypted, which can effectively ensure the security of chip information. By engraving each chip from the back of the wafer, compared with laser printing on the back of the plastic shell of the packaged chip, the solution of this embodiment of the invention allows the wafer's identity information to be identified directly by the naked eye or software program before the chip packaging process. During or after the packaging process, the wafer's identity information can also be identified by X-ray equipment and software program. At each stage, easy reading of chip information can be achieved.

[0037] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0038] Reference Figure 1 , Figure 1 This is a flowchart of a chip information engraving method according to an embodiment of the present invention. The chip information engraving method may include steps S11 to S14:

[0039] Step S11: Determine the identity information of the wafer and the distribution information of each chip;

[0040] Step S12: Based on the identity information of the wafer and the distribution information of each chip, generate the identity information of each chip;

[0041] Step S13: Encrypt the identity information of each chip based on the preset encryption rules to obtain the encrypted information;

[0042] Step S14: Engraving each chip from the back side of the wafer, wherein the engraved chip information includes the encrypted information.

[0043] In the specific implementation of step S11, the chip's identity information may include the chip's supplier information, production line information, wafer information, and the chip's distribution information on the wafer.

[0044] It should be noted that wafer information and chip distribution information on the wafer are more critical than other information. Understandably, each supplier and consumer in the chip industry chain (such as design companies, manufacturing companies, testing companies, and purchasing companies) has an internal tracking system. Based on the wafer information, they can quickly determine supplier information and production line information. Wafer information and chip distribution information on the wafer are often held by the manufacturing company and need to be effectively marked during the production process.

[0045] In this embodiment of the invention, by fusing the wafer's identity information and the distribution information of each chip, the identity information of each chip is generated. Thus, this embodiment of the invention integrates the information of the chip and its associated wafer, facilitating traceability. For example, if multiple chips are found to have problems at the same location on the wafer, or if multiple chips forming a certain shape on the wafer have problems, it is easy to trace all chips at that location; or to trace all chips on a particular wafer that has a problem.

[0046] It should be noted that when multiple chips arranged in a certain shape are formed within a wafer, for example, if the main shape of the chips is ring-shaped, the positions of other chips can be deduced from the known chips, thus shifting the chip problem from unknown to known. The specific shape can also be arc-shaped, straight, or other shapes; as long as it is not random and exhibits a certain regularity, the identity information of other chips can be deduced from one or more known chips, and the product or equipment to which the chip locator is applied can be determined based on the chip's flow.

[0047] Furthermore, the step of determining the identity information of the wafer may include: reading the production batch number and wafer number of the wafer, and using them as the identity information of the wafer.

[0048] The wafer production batch number can be an internal batch number of the manufacturing company, such as A88516. The wafer number can be the serial number of a batch of wafers. For example, a batch of wafers usually contains 25 wafers, so A88516-01 can be the first wafer in A88516.

[0049] Furthermore, the step of determining the distribution information of each chip may include: acquiring a front image of the wafer; using image recognition technology to determine the coordinates of one or more corners of each chip on the wafer, so as to obtain the distribution information of each chip based on the determined coordinates.

[0050] Specifically, the front image of the wafer can be obtained by capturing the front of the wafer using an image sensor. Conventional image recognition technology can then be used to determine one or more corners of each chip on the wafer. After selecting a reference origin, the coordinates corresponding to the selected chip corner are established. In a non-limiting embodiment, an identification pattern can be set at one or more corners of the chip, for example, the alignment mark of the chip's top process layer can be reused. Then, the coordinates of one or more corners of the chip are calculated based on the identified identification pattern.

[0051] In this embodiment of the invention, since the corners of the chip are easily identifiable in image recognition, the center point of the chip can be calculated based on the position information of multiple identified corners, and the center point can be used as the corresponding coordinates. Alternatively, any other calculable or image-recognition-obtainable coordinate point can be used as the chip's coordinates, as long as it is consistent and facilitates chip identification. (Refer to...) Figure 2 , Figure 2 This is a schematic diagram of the chip distribution information in an embodiment of the present invention.

[0052] like Figure 2 The wafer shown has multiple chips, each chip having defined four-corner coordinates and center point coordinates on the wafer. Taking chip 1 in the figure as an example, the five pentagrams represent the four-corner coordinates and the center point coordinates, respectively.

[0053] In one specific embodiment of the present invention, the step of determining the coordinates of one or more corners of each chip of the wafer, so as to obtain the distribution information of each chip according to the determined coordinates, may include: for each chip, determining the coordinates of the center point of the chip or the coordinates of a preset corner according to the coordinates of one or more corners of the chip; and using the coordinates of the center point of the chip or the coordinates of the preset corner as the distribution information of the chip.

[0054] That is to say, for Figure 2 Chip 1 can use the coordinates of one of the five pentagrams as the distribution information of chip 1.

[0055] In this embodiment of the invention, by employing image recognition technology, the coordinates of one or more corners of each chip in the wafer are determined, so as to obtain the distribution information of each chip based on the determined coordinates. This allows the distribution information of each chip to be determined and distinguished based on coordinate parameters, thereby improving the accuracy of the engraved chip information.

[0056] In another specific embodiment of the present invention, the step of determining the coordinates of one or more corners of each chip of the wafer, so as to obtain the distribution information of each chip according to the determined coordinates, may include: sorting the chips of the wafer according to the coordinates of one or more corners of each chip, and determining the serial number of each chip; using the serial number of each chip as the distribution information of the chip.

[0057] Specifically, multiple chips in a wafer can be sorted using a preset positional order, for example... Figure 2 The sorting order can be from left to right or from top to bottom.

[0058] Further, the step of sorting the chips of the wafer in a certain order according to the coordinates of one or more corners of each chip and determining the serial number of each chip may include: drawing a chip distribution map according to the coordinates of each chip; comparing the chip distribution map with the chip design drawing of the wafer and removing predicted invalid chips, wherein the chip design drawing is marked with the predicted invalid chips; and sorting the remaining chips to determine the serial number of each chip.

[0059] It is understandable that although there are many chips on a wafer, once the order of the chips is set, the serial number of each chip can be determined. The specific order is not limited in this embodiment of the invention.

[0060] The coordinates of the chip can be the coordinates of the chip's center point or the coordinates of a preset angle of the chip.

[0061] Reference Figure 3 , Figure 3 This is a schematic diagram of a chip design for a wafer according to an embodiment of the present invention.

[0062] Specifically, the chip design diagram may be marked with predicted valid chips and predicted invalid chips. For example, an incomplete chip may be directly marked as a predicted invalid chip; another example is that a chip known to have process defects may also be marked as a predicted invalid chip. For instance, in a non-limiting process platform, the edge washing process may cause defects in the chip within 3mm of the wafer edge.

[0063] In this embodiment of the invention, the chip distribution map is compared with the chip design map of the wafer, and the predicted invalid chips are removed. The remaining chips are sorted to determine the sequence number of each chip, thereby improving the continuity of chip information and effectively reducing the interference of chip information from invalid chips.

[0064] Continue to refer to Figure 1 In the specific implementation of step S12, the identity information of each chip is generated.

[0065] In one specific embodiment of the present invention, the chip's identity information may be the wafer's identity information and the chip's distribution information.

[0066] Taking the wafer's identification information as A88516-01 and the chip's distribution information as a serial number, with the serial number being 001, as an example, the chip's identification information could be A88516-01-001.

[0067] In the specific implementation of step S13, the identity information of each chip can be encrypted to obtain encrypted information.

[0068] In one specific embodiment of the present invention, the step of encrypting the identity information of each chip based on a preset encryption rule to obtain the encrypted information may include: encrypting each character of the chip information according to a preset mapping table between characters and ASCII codes; wherein, the chip information engraved on the back of each chip also includes the indication information of the mapping table.

[0069] Furthermore, the preset mapping table between characters and ASCII codes can be generated using a random value selection function.

[0070] Referring to Table 1, which is an example table of functions for generating a mapping table using a random value function in an embodiment of the present invention.

[0071] Table 1

[0072]

[0073] Specifically, based on the lookup table of commonly used characters and their ASCII codes, all characters can be arranged into the first character column, and the sequence number of each character is its ASCII code (such as the sequence number column).

[0074] Furthermore, in the process of generating a new list using a random value function, the specific steps may include: for the first cell of the second character column, randomly selecting a value from the character set formed by the first character column; deleting a row in the first character column whose value is equal to that of the first cell, and then randomly selecting a value from the remaining set of the first character column in the second cell of the second character column; and so on, filling all cells of the second character column, and finally obtaining a shuffled character list in the second character column; using the first and second character columns and their corresponding relationship as a password book for encryption, that is, when encrypting, if the number 0 in the original chip identity information is displayed as the letter C after encryption, and the letter C is determined to be the number 0 after decryption.

[0075] It should be noted that at preset intervals, a new list, i.e., a new codebook, can be generated using a random value function. Each codebook can have a unique version number.

[0076] In a non-limiting specific embodiment, the identity information of a certain chip is KL0825-07-08. After being encrypted with the 90th edition of the codebook, 0 is encrypted as X, 8 is encrypted as 7, and L is encrypted as 0. Its identity information can be displayed as 0090A0X7p5X6X7. When reading, it can be decrypted using the 90th edition of the codebook to obtain the original identity information.

[0077] In this embodiment of the invention, each character of the chip information is encrypted according to a preset mapping table between characters and ASCII codes, which can improve the security of the engraved chip information.

[0078] Reference Figure 4 , Figure 4 This is a schematic diagram of a method for encrypting individual characters of the chip information according to an embodiment of the present invention.

[0079] The method for encrypting each character of the chip information may include steps S41 and S42, which are described below.

[0080] In step S41, each character in the chip information is encrypted according to a preset mapping table between characters and ASCII codes to obtain first-level encrypted chip information.

[0081] For details regarding the encryption of each character in the chip information, please refer to the encryption methods shown above and in Table 1, which will not be repeated here.

[0082] In step S42, the primary encryption chip information is converted from the current base to another base to obtain the secondary encryption chip information.

[0083] Specifically, the current base and the other base can be selected from: binary, decimal, hexadecimal, or other conventional bases.

[0084] The chip information engraved on the back of each chip also includes the version number of the codebook, which contains the indication information of the mapping table and the indication information of the number system conversion.

[0085] In this embodiment of the invention, each character in the chip information is encrypted according to a preset mapping table between characters and ASCII codes to obtain first-level encrypted chip information; the first-level encrypted chip information is converted from the current base to another base to obtain second-level encrypted chip information. Through second-level encryption, the security of the engraved chip information can be further improved.

[0086] This invention encrypts the chip's identity information, preventing others from obtaining information about the chip's manufacturing process. Only those who understand the decryption rules can obtain the chip's specific location information.

[0087] Continue to refer to Figure 1 In the specific implementation of step S14, each chip is engraved from the back side of the wafer, and the engraved chip information includes the encrypted information.

[0088] The engraving step can be laser engraving or other suitable physical engraving methods.

[0089] In this embodiment of the invention, laser engraving is used to improve the persistence of engraving information on the back of the chip.

[0090] Furthermore, the step of engraving each chip from the back side of the wafer may include: drawing a chip distribution map based on the coordinates of each chip; flipping the chip distribution map 180 degrees with the extension line of the notch as the axis of symmetry to obtain the crystal back coordinates of each chip on the back side of the wafer; determining the engraving position of each chip based on the crystal back coordinates and engraving it.

[0091] The coordinates of the chip can be the coordinates of the chip's center point or the coordinates of a preset angle.

[0092] Reference Figure 5 , Figure 5 This is a schematic diagram of the chip distribution on the back side of a wafer in an embodiment of the present invention.

[0093] Specifically, after flipping the chip distribution map by 180 degrees, the arrangement order and coordinates of the chips may change. By adding a step to determine the crystal back coordinates, the engraving position can be determined more accurately.

[0094] In practice, the chip information to be engraved can be input into the computer control system of the laser engraving machine, and then the laser engraving machine can engrave each chip from the back of the wafer.

[0095] In this embodiment of the invention, based on the wafer's identity information and the distribution information of each chip, the identity information of each chip is generated and encrypted, which can effectively ensure the security of chip information. By engraving each chip from the back of the wafer, compared with laser printing on the back of the plastic shell of the packaged chip, the solution of this embodiment of the invention allows the wafer's identity information to be identified directly by the naked eye or software program before the chip packaging process. During or after the packaging process, the wafer's identity information can also be identified by X-ray equipment and software program. At each stage, easy reading of chip information can be achieved.

[0096] The software program can be a software program in the ID Reader hardware and software system.

[0097] Reference Figure 6 , Figure 6 This is a schematic diagram of a chip information engraving device according to an embodiment of the present invention. The chip information engraving device may include:

[0098] The distribution information determination module 61 is used to determine the identity information of the wafer and the distribution information of each chip;

[0099] The identity information determination module 62 is used to generate the identity information of each chip based on the identity information of the wafer and the distribution information of each chip;

[0100] Encryption module 63 is used to encrypt the identity information of each chip based on preset encryption rules to obtain the encrypted information;

[0101] The chip information engraving module 64 is used to engrave each chip from the back side of the wafer, wherein the engraved chip information includes the encrypted information.

[0102] For the principles, specific implementation, and beneficial effects of the chip information engraving device, please refer to the previous description of the chip information engraving method; it will not be repeated here.

[0103] This invention also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, performs the steps of the above-described method. The computer-readable storage medium may be a computer-readable storage medium in general, such as non-volatile or non-transitory memory, or optical discs, hard disk drives, solid-state drives, etc.

[0104] This invention also provides a terminal, including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor runs the computer program, it performs the steps of the above-described method. The terminal includes, but is not limited to, terminal devices such as servers, mobile phones, computers, and tablet computers.

[0105] Specifically, in this embodiment of the invention, the processor can be a central processing unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0106] It should also be understood that the memory in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced synchronous DRAM (ESDRAM), synchronous linked DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0107] It should be noted that the sequence number of each step in this embodiment does not represent a limitation on the execution order of each step.

[0108] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article indicates that the preceding and following related objects have an "or" relationship.

[0109] In the embodiments of this application, "multiple" refers to two or more.

[0110] The descriptions of "first," "second," etc., appearing in the embodiments of this application are for illustrative purposes and to distinguish the objects being described. They have no order and do not indicate any special limitation on the number of devices in the embodiments of this application, nor do they constitute any limitation on the embodiments of this application.

[0111] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for engraving chip information, characterized in that, include: Determine the identity information of the wafer and the distribution information of each chip; Based on the identity information of the wafer and the distribution information of each chip, the identity information of each chip is generated; The identity information of each chip is encrypted based on preset encryption rules to obtain the encrypted information; Each chip is etched from the back of the wafer, wherein the etched chip information includes the encrypted information; Encrypting each character of the chip information includes: According to the preset mapping table between characters and ASCII codes, each character in the chip information is encrypted to obtain the first-level encrypted chip information; The primary encryption chip information is converted from the current base to another base to obtain the secondary encryption chip information; The chip information engraved on the back of each chip also includes the version number of the codebook, which contains the indication information of the mapping table and the indication information of the number system conversion.

2. The method according to claim 1, characterized in that, The determination of the distribution information for each chip includes: Obtain a front image of the wafer; Image recognition technology is used to determine the coordinates of one or more corners of each chip in the wafer, so as to obtain the distribution information of each chip based on the determined coordinates.

3. The method according to claim 2, characterized in that, Determining the coordinates of one or more corners of each chip in the wafer, and obtaining the distribution information of each chip based on the determined coordinates, includes: For each chip, determine the coordinates of the chip's center point or the coordinates of a preset angle based on the coordinates of one or more of the chip's angles; The coordinates of the chip's center point or the coordinates of a preset angle are used as the chip's distribution information.

4. The method according to claim 2, characterized in that, Determining the coordinates of one or more corners of each chip in the wafer, and obtaining the distribution information of each chip based on the determined coordinates, includes: The chips of the wafer are sorted according to the coordinates of one or more corners of each chip, and the serial number of each chip is determined. The serial number of each chip is used as the distribution information for that chip.

5. The method according to claim 4, characterized in that, The chips on the wafer are sorted according to the coordinates of one or more corners of each chip, and the sequence number of each chip is determined, including: Draw a chip distribution diagram based on the coordinates of each chip; The chip distribution map is compared with the chip design map of the wafer, and the predicted invalid chips are removed, wherein the chip design map is marked with the predicted invalid chips; The remaining chips are sorted to determine the sequence number of each chip.

6. The method according to claim 1, characterized in that, The identification information for a wafer includes: The production batch number and wafer number of the wafer are read and used as the identification information of the wafer.

7. The method according to claim 1, characterized in that, The etching of individual chips from the back side of the wafer includes: Draw a chip distribution diagram based on the coordinates of each chip; Using the extension line of the cut as the axis of symmetry, the chip distribution map is flipped 180 degrees to obtain the crystal back coordinates of each chip on the back side of the wafer. Based on the crystal back coordinates, the engraving position of each chip is determined and engraving is performed.

8. The method according to claim 1, characterized in that, The preset mapping table between characters and ASCII codes is generated using a random value selection function.

9. A chip information engraving device, characterized in that, include: The distribution information determination module is used to determine the identity information of the wafer and the distribution information of each chip; The identity information determination module is used to generate the identity information of each chip based on the identity information of the wafer and the distribution information of each chip; The encryption module is used to encrypt the identity information of each chip based on preset encryption rules to obtain the encrypted information; A chip information engraving module is used to engrave each chip from the back side of the wafer, wherein the engraved chip information includes the encrypted information; The encryption module is also used to encrypt each character in the chip information according to a preset mapping table between characters and ASCII codes, so as to obtain first-level encrypted chip information. The primary encryption chip information is converted from the current base to another base to obtain the secondary encryption chip information; The chip information engraved on the back of each chip also includes the version number of the codebook, which contains the indication information of the mapping table and the indication information of the number system conversion.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, The computer program, when run by the processor, performs the steps of the chip information engraving method according to any one of claims 1 to 8.

11. A terminal comprising a memory and a processor, wherein the memory stores a computer program capable of running on the processor, characterized in that, When the processor runs the computer program, it performs the steps of the chip information engraving method according to any one of claims 1 to 8.

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