Signal readout circuit, signal processing circuit, lidar and signal readout method

Abstract

The application provides a signal reading circuit, a signal processing circuit, a laser radar and a signal reading method. The signal reading circuit can comprise a logic control unit, a plurality of gating units and a channel switching unit. The logic control unit is adapted to generate a control signal for controlling one of the plurality of gating units to be gated and controlling the channel switching unit to be in communication with the gated gating unit. The gated gating unit is adapted to output an electrical signal received thereby to the channel switching unit according to the control signal. The channel switching unit is adapted to be selectively in communication with the gated gating unit according to the control signal and output the electrical signal. The above scheme can improve the transmission performance and flexibility of the circuit, and reduce the hardware cost and overall size of the circuit.

Description

Technical Field

[0001] This invention relates to the field of lidar, and more particularly to a signal readout circuit, a signal processing circuit, a lidar, and a signal readout method. Background Technology

[0002] Currently, for systems with multiple signal transmission requirements, a signal readout circuit based on a multiplexer (MUX) can be used. The multiplexer can receive multiple electrical signals and output them sequentially, allowing multiple electrical signals to share the same signal readout circuit, thus realizing the multiplexing of the signal readout circuit.

[0003] In practical applications, multiplexers are mostly analog multiplexers, which include multiple analog switches. The analog switches typically use metal-oxide-semiconductor field-effect transistors (MOSFETs) to implement the switching functions of opening and closing.

[0004] When a MOSFET is turned on, it has on-resistance and parasitic capacitance. When at least one of the on-resistance and parasitic capacitance increases, the bandwidth of the MOSFET will decrease. Therefore, the bandwidth of the MOSFET is affected by the on-resistance and parasitic capacitance, which in turn reduces the bandwidth of each signal transmission channel of the multiplexer.

[0005] Based on the above description, on the one hand, if the bandwidth and isolation of the multiplexer are inadequate, the leading edge of the electrical signal will become slower after passing through the multiplexer, resulting in a reduced amplitude and a wider pulse width. Currently, post-processing circuits are added after the multiplexer to improve the signal amplitude. However, post-processing circuits cannot improve the pulse width problem of the multiplexer's output signal and still affect signal quality. Therefore, it is necessary to select a high-speed, high-bandwidth multiplexer to meet the bandwidth and transmission rate requirements. However, such multiplexers are expensive and limited by hardware circuit compatibility, resulting in a limited number of available models.

[0006] On the other hand, as the number of signals increases, multiplexers with more channels are needed to meet the channel requirements, or multiple multiplexers need to be combined. However, all of these methods of increasing the number of channels will increase the on-resistance and / or parasitic capacitance, thereby reducing the bandwidth of the multiplexer, affecting the signal transmission effect, and will also significantly increase hardware costs and footprint, resulting in an increase in the overall circuit size and making circuit layout more difficult.

[0007] In summary, multiplexers have many disadvantages in practical applications, affecting signal readout results. Therefore, how to improve signal readout schemes has become an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0008] In view of this, the present invention provides a signal readout circuit, a signal processing circuit, a lidar, and a signal readout method, which can improve the transmission performance and flexibility of the circuit, and reduce hardware costs and overall circuit size.

[0009] This invention provides a signal readout circuit, comprising: a logic control unit, multiple gating units, and a channel switching unit, wherein:

[0010] The logic control unit is adapted to generate control signals for controlling one of the plurality of gating units to be gated, and to control the channel switching unit to connect with the gated gating unit.

[0011] The gating unit is adapted to output the received electrical signal to the channel switching unit after being gated according to the control signal;

[0012] The channel switching unit is adapted to selectively connect with the selected selection unit according to the control signal and output the electrical signal.

[0013] This invention also provides a signal processing circuit, comprising:

[0014] Multiple signal acquisition units are used to acquire signals and output electrical signals;

[0015] The signal readout circuit described in any of the above embodiments is adapted to be selectively connected to a signal acquisition unit that performs signal acquisition, and to transmit the received electrical signal;

[0016] The signal processing unit is adapted to process the electrical signal output by the signal readout circuit.

[0017] This invention also provides a lidar, comprising:

[0018] The transmitting module includes multiple optical transmitting units, suitable for transmitting detection optical signals;

[0019] The receiving module includes multiple optical receiving units, adapted to receive the echo optical signal returned by the probe optical signal emitted by the corresponding optical emitting unit, and generate an electrical signal;

[0020] The control module is adapted to activate at least one of the optical emitting units and the corresponding optical receiving units each time.

[0021] The signal readout circuit described in any of the above embodiments is coupled to the receiving module and is adapted to selectively connect to the activated optical receiving unit and transmit the electrical signal;

[0022] The signal processing module is adapted to process the electrical signal output by the signal readout circuit.

[0023] This invention also provides a signal readout method applied to a signal readout circuit, the signal readout circuit including: multiple gating units and a channel switching unit; the method includes:

[0024] The plurality of gating units and the channel switching unit are controlled respectively, such that one of the plurality of gating units is selected, and the channel switching unit is connected to the selected gating unit;

[0025] The received electrical signal is transmitted through the selected gating unit and the channel switching unit.

[0026] The signal readout circuit of this invention uses a control signal generated by a logic control unit to control one of a plurality of gating units to be selected, thereby transmitting the received electrical signal to a channel switching unit. Furthermore, the control signal generated by the logic control unit can also control the channel switching unit to selectively connect with the selected gating unit, enabling the channel switching unit to output the electrical signal. As can be seen from the above, in the signal readout circuit provided by this invention, the hardware combination of the logic control unit, multiple gating units, and channel switching unit replaces the multiplexer for electrical signal transmission. Based on this, on the one hand, the hardware combination avoids the influence of on-resistance and parasitic capacitance, effectively ensuring the bandwidth of the signal readout circuit without post-processing circuits or high-cost multiplexers, thereby improving the circuit's transmission performance and reducing hardware costs. On the other hand, the hardware combination offers greater flexibility, avoiding waste of hardware resources while meeting the required number of channels. Moreover, the flexible hardware combination facilitates circuit layout design and adjustment, effectively controlling the overall circuit size. In summary, the signal readout circuit provided in this embodiment of the invention can improve the transmission performance and flexibility of the circuit, and reduce hardware costs and overall circuit size. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of a signal readout circuit provided in an embodiment of the present invention.

[0028] Figure 2 This is a schematic diagram of a channel switching unit provided in an embodiment of the present invention.

[0029] Figure 3a This is a schematic diagram of another channel switching unit provided in an embodiment of the present invention.

[0030] Figure 3b for Figure 3a The diagram shows a specific connection of the channel switching unit.

[0031] Figure 4a This is a connection diagram of a signal readout circuit provided in an embodiment of the present invention.

[0032] Figure 4b for Figure 4a The equivalent circuit diagram.

[0033] Figure 5 This is a connection diagram of another signal readout circuit provided in an embodiment of the present invention.

[0034] Figure 6 This is a schematic diagram of a signal processing circuit provided in an embodiment of the present invention.

[0035] Figure 7 This is a schematic diagram of a lidar structure provided in an embodiment of the present invention.

[0036] Figure 8 This is a flowchart of a signal readout method provided in an embodiment of the present invention. Detailed Implementation

[0037] As discussed in the background section, multiplexers have many disadvantages in practical applications, affecting signal readout results. Therefore, how to improve signal readout schemes has become a problem that urgently needs to be solved by those skilled in the art.

[0038] To address the problems described in the background art, embodiments of the present invention provide a signal readout circuit. A control signal generated by a logic control unit can control one of a plurality of gating units to be selected, thereby transmitting the received electrical signal to a channel switching unit. Furthermore, the control signal generated by the logic control unit can also control the channel switching unit to selectively connect with the selected gating unit, enabling the channel switching unit to output the electrical signal. Thus, by combining the logic control unit, multiple gating units, and the channel switching unit in a hardware configuration, a multiplexer is replaced for electrical signal transmission, avoiding the influence of on-resistance and parasitic capacitance, effectively ensuring the bandwidth of the signal readout circuit. The flexible hardware combination avoids wasting hardware resources and is beneficial for circuit layout design and adjustment. Therefore, the above solution can improve the transmission performance and flexibility of the circuit, while reducing hardware costs and the overall circuit size.

[0039] To enable those skilled in the art to better understand the concept, implementation scheme, and advantages of the present invention and to carry it out, a detailed description is provided below with reference to the accompanying drawings.

[0040] Reference Figure 1This is a schematic diagram of a signal readout circuit provided in an embodiment of the present invention. In this embodiment, the signal readout circuit 10 may include: a logic control unit 11, and multiple selection units (such as...). Figure 1 The diagram shows selection units 12-11, 12-12 to 12-1m, 12-21, 12-22 to 12-2n, and channel switching unit 13. Here, m and n are both non-zero integers.

[0041] The logic control unit 11 is adapted to generate control signals for controlling one of the plurality of selection units 12-11 to 12-1m and selection units 12-21 to 12-2n to be selected, and for controlling the channel switching unit 13 to connect with the selected selection unit.

[0042] The selection units 12-11 to 12-1m and 12-21 to 12-2n are adapted to output the received electrical signal to the channel switching unit 13 after being selected according to the control signal.

[0043] The channel switching unit 13 is adapted to selectively connect with the selected selection unit according to the control signal and output the electrical signal.

[0044] It is understood that, in practical applications, the channel switching unit 13 can be connected to or disconnected from any one of the selection units 12-11 to 12-1m and selection units 12-21 to 12-2n. Through the control signal, the connection target of the channel switching unit 13 can be controlled, allowing the channel switching unit 13 to select and connect to the selected selection units 12-11 to 12-1m and selection units 12-21 to 12-2n, while disconnecting from the remaining unselected selection units.

[0045] As can be seen from the above, in the signal readout circuit provided in the embodiments of the present invention, the multiplexer is replaced for electrical signal transmission by a hardware combination of a logic control unit, multiple selection units, and a channel switching unit. Based on this, on the one hand, the hardware combination can avoid the influence of on-resistance and parasitic capacitance, effectively ensuring the bandwidth of the signal readout circuit, thereby improving the transmission performance of the circuit and reducing hardware costs; on the other hand, the hardware combination has greater flexibility, and can avoid wasting hardware resources while meeting the number of channels. Furthermore, the flexible hardware combination is beneficial for circuit layout design and adjustment, and can effectively control the overall size of the circuit.

[0046] In summary, the signal readout circuit provided in this embodiment of the invention can improve the transmission performance and flexibility of the circuit, and reduce hardware costs and overall circuit size.

[0047] In practical implementation, multiple gating parts can be grouped to obtain multiple gating groups, and each gating group can include at least one gating part. Furthermore, the gating parts in each gating group can be distributed according to a specified pattern. For example, continue to refer to... Figure 1 The selection sections 12-11 to 12-2n are grouped to obtain two selection groups. One selection group may include the selection sections 12-11 to 12-1m distributed in columns, and the other selection group may include the selection sections 12-21 to 12-2n distributed in columns.

[0048] It is understood that the above examples are only illustrative. In specific applications, the number of groups of multiple gating sections and the distribution of gating sections in each gating group can be set according to the specific application scenario and requirements.

[0049] Furthermore, the logic control unit and the channel switching unit can be configured accordingly based on the number of groups of multiple gating units and the distribution of gating units in each gating group, so that the logic control unit and the channel switching unit can match multiple gating groups.

[0050] In a specific implementation, the logic control unit can be configured according to the timing of the electrical signal input to the signal readout circuit (i.e., the input timing of the electrical signal) and the specific location of the corresponding gating part, so that the logic control unit can generate corresponding control signals before the electrical signal is input, which are used to control the corresponding gating part to be selected and the channel switching unit to connect with the selected gating part, thereby forming a signal transmission channel for the electrical signal and ensuring that the signal readout circuit can transmit the electrical signal.

[0051] The input timing of the electrical signal is related to the operating timing of the signal acquisition unit coupled to the gating unit. The type of the signal acquisition unit can be determined according to the application scenario; please refer to the relevant content about signal acquisition units below for details, which will not be elaborated here.

[0052] In practical applications, the input timing of electrical signals can be pre-stored in the logic control unit, or it can be sent to the logic control unit through other devices with data communication functions (such as controllers or memory).

[0053] In an optional example, continue to refer to Figure 1At time t0, an electrical signal is input from the selection section 12-11 of the signal readout circuit 10. Before or at time t0, the logic control section 11 can control the selection section 12-11 to be selected, and control the channel switching section 13 to connect with the selected selection section 12-11, and control the channel switching section 13 to disconnect from the unselected selection sections 12-12 to 12-1m and 12-21 to 12-2n, thereby connecting the channel switching section 13 with the selected selection section 12-11 to form a signal transmission channel.

[0054] At time t0, the gating unit 12-11 receives an electrical signal. The electrical signal received by the gating unit 12-11 can originate from a signal acquisition unit coupled to it, such as the optical receiving unit in a lidar system.

[0055] After receiving an electrical signal, the gating unit 12-11 outputs an electrical signal to the channel switching unit 13. The channel switching unit 13, after receiving the electrical signal from the gating unit 12-11, can output the electrical signal.

[0056] Therefore, under the control of the logic control unit, the multiple selection units can form signal transmission channels with the logic control unit at different times to transmit electrical signals input to the signal readout circuit at different times. This allows the signal readout circuit to be multiplexed by utilizing the hardware combination of the logic control unit, multiple selection units, and channel switching unit, avoiding the influence of on-resistance and parasitic capacitance, effectively ensuring the bandwidth of the signal readout circuit. Furthermore, the flexible hardware combination can avoid wasting hardware resources and is beneficial for circuit layout design and adjustment.

[0057] In practical applications, the timing of the logic control unit controlling the gating unit and the channel switching unit can be set according to specific circumstances.

[0058] For example, when the control signal generated by the logic control unit controls one of the multiple selection units to be selected, the synchronous control channel switching unit is connected to the selected selection unit.

[0059] For example, the control signal generated by the logic control unit can first control one of the multiple selection units to be selected, and then control the channel switching unit to connect with the selected selection unit. Alternatively, the control signal generated by the logic control unit can first control the channel switching unit to connect with the selection unit waiting to be selected, and then control one of the multiple selection units to be selected.

[0060] In a specific implementation, the channel switching unit may include multiple signal input terminals, each of which may be coupled to a portion of the gating units. In other words, one end of a portion of the gating units may be coupled to the same signal input terminal of the channel switching unit. Thus, when the number of signal input terminals of the channel switching unit is limited, the channel switching unit can be coupled to more gating units.

[0061] In a specific implementation, the channel switching unit may further include at least one signal input terminal, and the number of signal output terminals may be less than the number of signal input terminals. Each signal input terminal of the channel switching unit can be selectively connected to at least one signal input terminal, thereby reducing the demand for signal output terminals by flexibly switching the connection relationship between signal output terminals and signal input terminals.

[0062] In a specific implementation, the channel switching unit may further include: multiple output control terminals, each coupled to a different output terminal of the logic control unit, adapted to receive control signals from the logic control unit, so that the corresponding signal input terminal and the signal output terminal are connected.

[0063] In a specific implementation, the logic control unit may include multiple output terminals adapted to output level signals respectively, the multiple level signals forming the control signal. Some output terminals of the logic control unit may be coupled to multiple gating units, and some output terminals may be coupled to multiple output control terminals of the channel switching unit.

[0064] In an optional example, continue to refer to Figure 1 The channel switching unit 13 may include two signal input terminals, one signal output terminal and two output control terminals, namely signal input terminal IN11, signal output terminal IN12, signal output terminal OUT11, output control terminal EN11 and output control terminal EN12.

[0065] The logic control unit may include multiple output terminals, namely output terminal PN1, output terminal PN2, output terminal PA1, output terminals PA2 to PAm, output terminal PB1, and output terminals PB2 to PBn.

[0066] The signal input terminal IN11 of the channel switching unit 13 can be coupled to one end of the gating unit 12-11 to one end of the gating unit 12-1m, and the signal input terminal IN12 of the channel switching unit 13 can be coupled to one end of the gating unit 12-11 to one end of the gating unit 12-1m.

[0067] The signal input terminals IN11 and IN12 of the channel switching unit 13 can be selectively connected to the signal output terminal OUT11.

[0068] The output control terminals EN11 and EN12 of the channel switching unit 13 can be coupled to the output terminals PN1 and PN2 of the logic control unit 11, respectively.

[0069] The output terminals PA1 to PAm of the logic control unit 11 can be coupled to the other end of the gating unit 12-11 to the other end of the gating unit 12-1m, respectively; the output terminals PB1 to PBn of the logic control unit 11 can be coupled to the other end of the gating unit 12-21 to the other end of the gating unit 12-2n, respectively.

[0070] The logic control unit 11 can output multiple level signals through output terminals PN1, PN2, PA1 to PAm, and PB1 to PBn to form control signals. Based on the multiple level signals output by the logic control unit 11, one of the selection units 12-11 to 12-1m and 12-21 to 12-2n can be selected, and the signal input terminal IN11 or IN12 of the channel switching unit 13 can be connected to the signal output terminal OUT11.

[0071] Specifically, based on the multiple level signals output by the output terminals PN1, PN2, PA1 to PAm, and PB1 to PBn of the logic control unit 11, the selection unit 12-11 can be selected, the signal input terminal IN11 coupled to the selected selection unit 12-11 in the channel switching unit 13 can be connected to the signal output terminal OUT11, and the signal input terminal IN12 in the channel switching unit 13 can be disconnected from the signal output terminal OUT11, thereby enabling the selected selection unit 12-11 to form a signal transmission channel through the signal input terminal IN11 and the signal output terminal OUT11 connected in the channel switching unit 13.

[0072] After receiving an electrical signal, the gating unit 12-11 outputs an electrical signal to the signal input terminal IN11 of the channel switching unit 13. After receiving the electrical signal from the gating unit 12-11, the signal input terminal IN11 of the channel switching unit 13 outputs the electrical signal through the signal output terminal OUT11.

[0073] It should be noted that the specific connection method between the signal input terminal and the signal output terminal is related to the internal hardware structure of the channel switching unit. Based on the control signal generated by the logic control unit and the internal hardware structure of the channel switching unit, a corresponding path can be formed within the channel switching unit, thereby connecting the corresponding signal input terminal and the signal output terminal. This embodiment of the invention does not impose specific limitations on the internal hardware structure of the channel switching unit.

[0074] In specific implementations, depending on the actual situation, the channel switching unit, logic control unit, and gating unit described in this invention can each be composed of one or more devices to achieve the corresponding functions mentioned above. This embodiment of the invention does not impose any limitations on this. To enable those skilled in the art to more clearly understand and implement the concept, implementation scheme, and advantages of the channel switching unit, logic control unit, and gating unit, the following descriptions of the channel switching unit, logic control unit, and gating unit are provided respectively.

[0075] In a specific implementation, the channel switching unit may include: a plurality of first controlled units, each controlled by the logic control unit. Each first controlled unit is adapted to transmit bidirectional electrical signals, with its first end serving as both the signal input and output control terminals of the channel switching unit, respectively coupled to a corresponding signal input terminal and a corresponding output control terminal; and its second end serving as the signal output terminal of the channel switching unit, adapted to output the electrical signals.

[0076] Specifically, by changing the control signal output by the logic control unit, the voltage at both ends of the first controlled unit can be changed accordingly, thereby controlling the connection or disconnection of the two ends of the first controlled unit. After the two ends of the first controlled unit are connected, the first controlled unit can receive and transmit the electrical signal.

[0077] Optionally, the second ends of at least two first controlled units are coupled to each other to serve as a signal output end of the channel switching unit, thereby reducing the number of signal output ends of the channel switching unit. Furthermore, when the number of signal output ends is the same, multiple first controlled units can be coupled to the same signal output end, which can expand to obtain more signal transmission channels.

[0078] In an optional example, such as Figure 2 The diagram shown is a structural schematic of a channel switching unit according to an embodiment of the present invention. In this example, the channel switching unit 20 may include two first controlled units, namely, a first controlled unit 21 and a first controlled unit 22. Both the first controlled unit 21 and the first controlled unit 22 are adapted to transmit bidirectional electrical signals.

[0079] The first terminal of the first controlled unit 21 serves as a signal input terminal IN21 and an output control terminal EN21 of the channel switching unit 20, and can be coupled to the gating units A2-11 to A2-1p and the logic control unit A1, respectively. The first terminal of the first controlled unit 22 serves as a signal input terminal IN22 and an output control terminal EN22 of the channel switching unit 20, and can be coupled to the gating units A2-21 to A2-2q and the logic control unit A1, respectively. The second terminals of the first controlled unit 21 and the first controlled unit 22 are coupled to each other and serve as a signal output terminal OUT21 of the channel switching unit 20, suitable for outputting the electrical signal. Where p and q are positive integers.

[0080] The logic control unit A1 can control one of the selection units A2-11 to A2-1p and selection units A2-21 to A2-2q to be selected by control signals, and control the two ends of the first controlled unit 21 or the first controlled unit 22 of the channel switching unit 20 to be connected, thereby forming a signal transmission channel.

[0081] Specifically, based on the control signal output by the logic control unit A1, the selection unit A2-11 can be selected; the two ends of the first controlled unit 21 can be connected to connect the signal input terminal IN21 and the signal output terminal OUT21; and the two ends of the first controlled unit 22 can be disconnected to disconnect the signal input terminal IN22 and the signal output terminal OUT21. Thus, the selected selection unit A2-11, together with the signal input terminal IN21 and the signal output terminal OUT21 connected in the channel switching unit 20, forms a signal transmission channel.

[0082] After receiving the electrical signal, the gating unit A2-11 outputs it to the signal input terminal IN21 of the channel switching unit 20. After receiving the electrical signal from the gating unit A2-11 at the signal input terminal IN21 of the channel switching unit 20, the electrical signal is output from the signal output terminal OUT21 through the transmission of the first controlled unit 21.

[0083] It should be noted that the first controlled unit described in this invention is a device with connection and disconnection functions and capable of transmitting bidirectional electrical signals. The bidirectional electrical signals described in this invention are positive electrical signals and negative electrical signals. The positive electrical signal is an electrical signal that can increase the voltage of the first terminal of the first controlled unit, and the negative electrical signal is an electrical signal that can decrease the voltage of the first terminal of the first controlled unit.

[0084] Understandably, in practical applications, depending on the specific application scenario, the electrical signal of the input signal readout circuit may be a single-direction changing signal (i.e., a positive or negative signal), or it may be a combination of positive and negative signals (i.e., a combination of positive and negative signals, such as a sinusoidal signal). Accordingly, based on the direction of the electrical signal of the input signal readout circuit, the first controlled unit can realize one or more combinations of positive and negative signal transmission.

[0085] Furthermore, depending on the direction of the change in the electrical signal, the electrical signal may include at least one of a direct current signal and an alternating current signal.

[0086] It is understandable that the amplitude and direction changes of the electrical signal are related to the specific type of the signal acquisition unit that generates the electrical signal. For example, if the signal acquisition unit is a light receiving unit in a lidar system, then depending on the specific internal structure of the light receiving unit, the light receiving unit can output positive pulse AC signals and negative pulse AC signals.

[0087] In an optional example, the first controlled unit may include a PIN diode, i.e., a diode with an intrinsic semiconductor layer added between a P-type semiconductor material and an N-type semiconductor material. The PIN diode may include an anode and a cathode. Depending on the specific application, one end of the PIN diode may be selected as the signal input terminal and the output control terminal, respectively coupled to a portion of the gating section and the logic control section, while the other end serves as the output control terminal for outputting the electrical signal.

[0088] When the voltage across the PIN diode is changed by a DC signal, the PIN diode can be turned on or off. Correspondingly, when the PIN diode is on, the corresponding signal input terminal and the signal output terminal can be connected; when the PIN diode is off, the corresponding signal input terminal and the signal output terminal can be disconnected.

[0089] When the voltage across a PIN diode is changed by an alternating current signal, the current in the PIN diode changes accordingly. Specifically, when the PIN diode is reverse biased (i.e., the voltage at the anode is less than the voltage at the cathode), the PIN diode can be considered as a combination of a capacitor and a resistor; when the PIN diode is forward biased (i.e., the voltage at the anode is greater than the voltage at the cathode), the PIN diode can be considered as a resistor. Based on this, the PIN diode can transmit bidirectional electrical signals.

[0090] As can be seen from the above, compared with PN diodes (i.e., diodes made of P-type and N-type semiconductor materials), PIN diodes have reverse voltage withstand capability. When a negative electrical signal is applied to the two ends of a PIN diode, current still flows through the PIN diode, and it does not experience a cutoff situation like a PN diode. Therefore, the application range of signal readout circuits can be increased, and the universality of signal readout circuits can be improved.

[0091] In addition, PIN diodes have strong reverse voltage withstand capability (typically able to withstand reverse voltages of tens to hundreds of volts) and generate small junction capacitance (less than 1pF), which can improve the bandwidth of the signal readout circuit and meet the requirements of high bandwidth.

[0092] In a specific implementation, the channel switching unit may further include: a plurality of second controlled units, each controlled by the logic control unit. The second controlled unit is at least adapted to transmit unidirectional electrical signals and cooperates with the first controlled unit.

[0093] The actual connection relationship between the first controlled unit and the second controlled unit can be set according to specific circumstances, thereby determining which end of the first controlled unit and the second controlled unit serves as the signal input terminal, output control terminal, and signal output terminal. This embodiment does not impose specific restrictions on the actual connection relationship between the first controlled unit and the second controlled unit.

[0094] In a specific implementation, by changing the control signal output by the logic control unit, the voltages at both ends of the first controlled unit and the second controlled unit can be changed accordingly, thereby controlling the connection or disconnection of the two ends of the first controlled unit and the connection or disconnection of the two ends of the second controlled unit, so that the corresponding signal input terminal and signal output terminal are connected.

[0095] In practical applications, the second controlled unit described in this invention is a device that has connection and disconnection functions and is at least capable of transmitting unidirectional electrical signals.

[0096] For example, the second controlled unit may include a PN diode. Since PN diodes have a fast response speed and mature manufacturing technology, using PN diodes can improve signal transmission speed and reduce hardware costs.

[0097] Furthermore, in some specific applications, the PN diode can specifically be an RF Schottky diode. RF Schottky diodes have extremely low junction capacitance (e.g., less than 1 pF), low on-state voltage drop (e.g., 0.3 V), and low on-resistance (e.g., 10 Ω), resulting in higher bandwidth. Moreover, RF Schottky diodes have small package sizes (e.g., less than 0.2 square meters), facilitating circuit layout and reducing overall circuit size. Their low cost (e.g., approximately $0.1 per unit) reduces circuit hardware costs, and the mature manufacturing process facilitates mass production, meeting the demand for large-scale circuit production.

[0098] For example, the second controlled unit may include a PIN diode, thereby adapting to electrical signals with multiple directional changes, increasing the application range of the signal readout circuit, improving the universality of the signal readout circuit, and increasing the bandwidth of the signal readout circuit.

[0099] In specific implementation, as the number of the gating units increases, in order to avoid excessively long traces caused by coupling too many gating units to one signal input terminal of the channel switching unit, the number of signal input terminals of the channel switching unit should also be increased accordingly, that is, the number of at least one of the first controlled unit and the second controlled unit in the channel switching unit should be increased.

[0100] However, directly increasing the number of at least one of the first and second controlled units in the channel switching unit can lead to excessively long traces. Therefore, without affecting the transmission performance, the internal structure of the channel switching unit can be optimized to avoid wasting hardware resources and effectively shorten the trace length in the channel switching unit, thereby enhancing the reliability and stability of the signal readout circuit. The following is a detailed description of how to optimize the internal structure of the channel switching unit.

[0101] It should be noted that, since the channel switching unit may include at least a first controlled unit, and in some scenarios, the channel switching unit may also include a second controlled unit, for ease of description and understanding, the first controlled unit and the second controlled unit will be collectively referred to as the controlled unit below. In practical applications, the controlled unit can be set to either the first controlled unit or the second controlled unit according to the actual situation.

[0102] In a specific implementation, the channel switching unit may include multiple levels, which are set according to the connection order with the gating unit, wherein each level may include multiple controlled units.

[0103] In a specific implementation, if the channel switching unit includes multiple levels, then in two adjacent levels, the number of controlled units in the level farther away from the gating unit can be less than the number of controlled units in the level closer to the gating unit.

[0104] Specifically, for each controlled unit in each level, its first end can be coupled to the corresponding gating section and the logic control section respectively; in adjacent levels, multiple controlled units in the level closer to the gating section are coupled to a controlled unit in the level farther from the gating section; for multiple controlled units in the last level, the end of the unit not coupled to the gating section is adapted to output the electrical signal.

[0105] Taking two levels as an example, such as Figure 3a The diagram shown is a structural schematic of another channel switching unit provided in an embodiment of the present invention. In this example, the channel switching unit 30 includes two levels, arranged according to the selection unit ( Figure 3a (Not shown in the diagram) The connection sequence is such that the layer directly coupled to the gating part is set as the first layer, and the layer indirectly coupled to the gating part is set as the second layer.

[0106] Based on this, the first level may include: controlled units 31-11 to 31-1r, controlled units 31-21 to 31-2r, controlled units 31-31 to 31-3r, and controlled units 31-41 to 31-4r. The second level may include: controlled units 32-11 to 32-1s and controlled units 32-21 to 32-2s, and in the second level, the second ends of controlled units 32-11 to 32-1s and controlled units 32-21 to 32-2s are coupled together to serve as a signal output terminal OUT31 of the channel switching unit 30.

[0107] In practical implementation, the specific type of the controlled unit at each level in the channel switching unit can be set according to the specific scenario and requirements. For example, all controlled units at each level in the channel switching unit can be the first controlled unit; or, for another example, the controlled unit at each level in the channel switching unit can be either the first controlled unit or the second controlled unit.

[0108] To facilitate circuit design and layout, the controlled units at each level of the channel switching unit can be set to be of the same type, while the controlled units at adjacent levels can be of different types. For example, all controlled units at each level of the channel switching unit can be either the first controlled unit or the second controlled unit; and the first controlled unit and the second controlled unit can be arranged alternately in adjacent levels.

[0109] In specific implementations, the logic control unit can be coupled to multiple gating units and multiple controlled units of the channel switching unit. To accurately control each gating unit and each controlled unit, the control signal can include multiple level signals. Some level signals are output to each gating unit, and the remaining level signals are output to each controlled unit. The level signals can be a first level signal or a second level signal. The first level signal and the second level signal are different; the first level signal can be a high level signal or a low level signal, and correspondingly, the second level signal can be a low level signal or a high level signal.

[0110] In an optional example, when the controlled units at each level of the channel switching section are of the same type, and the controlled units at adjacent levels are of different types, the adjacent levels are adapted to receive different level signals respectively. Specifically, according to the connection order with the selected selection section, the first terminals of the corresponding controlled units in multiple levels sequentially receive a first level signal or a second level signal.

[0111] For example, if the channel switching unit includes three levels, after a selection unit is selected, according to the connection order of the selected selection unit in the first level, the second level and the third level, the first end of the corresponding controlled unit in the first level can receive a first level signal, the first end of the corresponding controlled unit in the second level can receive a second level signal, and the first end of the corresponding controlled unit in the third level can receive a first level signal.

[0112] This enables precise control of each level of controlled unit.

[0113] In an optional example, such as Figure 3b As shown, this is the Figure 3a The diagram shows a specific connection of the channel switching unit. In this example, the channel switching unit 30 may include: four first controlled units and two second controlled units, namely, first controlled unit 3-11, first controlled unit 3-12, first controlled unit 3-13, first controlled unit 3-14, second controlled unit 3-21, and second controlled unit 3-22.

[0114] The first controlled units 3-11 to 3-14 are all adapted to transmit bidirectional electrical signals, and the second controlled units 3-21 and 3-22 are at least adapted to transmit unidirectional electrical signals.

[0115] The first controlled units 3-11 to 3-14 have similar connection relationships. Taking the first controlled unit 3-11 as an example, the first end of the first controlled unit 3-11 serves as a signal input terminal IN3-1 and an output control terminal EN3-11 of the channel switching unit 30, and can be coupled to the gating unit B2-11, gating units B2-12 to B2-1P, and logic control unit B1, respectively. Here, P is a positive integer. The second end of the first controlled unit 3-11 is coupled to the first end of the second controlled unit 3-21.

[0116] Similarly, the first terminals of the first controlled units 3-12 to 3-14 respectively serve as signal input terminals IN3-2, IN3-3, and IN3-4 of the channel switching unit 30, and can be connected to at least one gating unit. Furthermore, the first terminals of the first controlled units 3-12 to 3-14 respectively serve as output control terminals EN3-12, EN3-13, and EN3-14 of the channel switching unit 30, and can be coupled to the logic control unit B1. The second terminal of the first controlled unit 3-12 is coupled to the first terminal of the second controlled unit 3-21, and the second terminals of both the first controlled units 3-13 and 3-14 are coupled to the first terminal of the second controlled unit 3-22.

[0117] The first terminal of the second controlled unit 3-21 can serve as an output control terminal EN3-21 of the channel switching unit 30, and is coupled to the logic control unit B1. The first terminal of the second controlled unit 3-22 can serve as an output control terminal EN3-22 of the channel switching unit 30, and is coupled to the logic control unit B1.

[0118] The second terminal of the second controlled unit 3-21 and the second terminal of the second controlled unit 3-22 are coupled together to serve as a signal output terminal OUT31 of the channel switching unit 30, which is suitable for outputting the electrical signal.

[0119] The logic control unit B1 can control one of the multiple selection units, such as selection units B2-11 to B2-1P, to be selected by control signals, control the connection between the two ends of one of the first controlled units 3-11 to 3-14 of the channel switching unit 30, and control the connection between the two ends of the corresponding second controlled unit 3-21 or 3-22, thereby forming a signal transmission channel.

[0120] Specifically, based on the control signal output by the logic control unit B1, the selection unit B2-11 can be selected; the two ends of the first controlled unit 3-11 and the two ends of the second controlled unit 3-21 can be connected to connect the signal input terminal IN3-1 and the signal output terminal OUT31; the two ends of the first controlled units 3-12 to 3-14 and the two ends of the second controlled unit 3-22 can be disconnected to disconnect the signal input terminals IN3-2 to IN3-3 from the signal output terminal OUT31. Thus, the selected selection unit B2-11, together with the signal input terminal IN3-1 and the signal output terminal OUT31 connected in the channel switching unit 30, forms a signal transmission channel.

[0121] After receiving the electrical signal, the gating unit B2-11 outputs the signal to the signal input terminal IN3-1 of the channel switching unit 30. After receiving the electrical signal from the gating unit B2-11, the signal input terminal IN3-1 of the channel switching unit 30 outputs the electrical signal from the signal output terminal OUT31 through the transmission of the first controlled unit 3-11 and the second controlled unit 3-21.

[0122] In specific implementations, the logic control unit may include one or more control units, and the number of control units can be set according to the actual number of gating units and the number of controlled units in the channel switching unit. This embodiment of the invention does not impose a specific limitation on the number of control units in the logic control unit.

[0123] For example, if the number of ports of a control unit is sufficient, the control unit can control each controlled unit of the gating section and the channel switching section; if the number of ports of a control unit cannot meet the actual number of gating sections and the number of controlled units of the channel switching section, the number of control units can be increased to control each controlled unit of the gating section and the channel switching section.

[0124] It is understood that the control unit can be any device capable of outputting control signals, and the embodiments in this specification do not impose specific restrictions on the model of the control unit of the logic control section.

[0125] In one alternative example, the control unit can be any of the following: a controller; a decoder; a shift register.

[0126] The controller can generate control signals to control multiple gating units and channel switching units. In practical applications, the controller can include chips such as CPU (Central Processing Unit), FPGA (Field Programmable Gate Array), and DSP (Digital Signal Processing). The decoder or shift register needs to be combined with an additional controller. Under the control of the controller, the decoder or shift register generates corresponding control signals to control multiple gating units and channel switching units.

[0127] In practical implementation, to facilitate adjustments to the control logic of the gating unit or the channel switching unit, separate control units can be coupled to either unit. For ease of description and understanding, the control unit coupled to the gating unit is referred to as the first control unit, and the control unit coupled to the channel switching unit is referred to as the second control unit.

[0128] In an optional example, the logic control unit may include: at least one first control unit and at least one second control unit; the first control unit may be coupled to the plurality of gating units; and the second control unit may be coupled to the channel switching unit.

[0129] In a specific implementation, if the logic control unit includes multiple second control units, then the multiple second control units can be coupled to controlled units at different levels in the channel switching unit. This facilitates the adjustment of the control logic of controlled units at different levels.

[0130] In practical implementation, multiple selection units can be coupled to the same end of the logic control unit, and one of the multiple coupled selection units can be selected by the control signal generated by the logic control unit. This reduces the number of ports in the logic control unit, lowers hardware costs and overall circuit size, makes the circuit layout more rational and concise, and facilitates expansion of the number of channels.

[0131] In a specific implementation, the selection unit may include: a conduction unit, the first end of which is coupled to different output ends of the logic control unit, the first end of which is adapted to receive electrical signals, and the second end of which is also coupled to the channel switching unit.

[0132] In specific implementations, the conduction unit can include any device capable of conducting, such as a PN diode or a PIN diode. Furthermore, based on the direction of the electrical signal and the volt-ampere characteristics of the device, it is circuitically connected to the logic control unit and the channel switching unit, so that when conducting, the electrical signal can be transmitted in the direction of conduction.

[0133] In an optional example, the electrical signal is a negative electrical signal, and the conducting unit can be a PN diode. Based on this, the cathode of the PN diode is its first terminal, and the anode of the PN diode is its second terminal. The cathode and anode of the PN diode are respectively coupled to different output terminals of the logic control unit. The cathode of the PN diode is adapted to receive the electrical signal, and the anode of the PN diode is also coupled to the channel switching unit. The PN diode conducts when the voltage across its terminals reaches the conduction bias voltage and outputs the electrical signal through its anode.

[0134] It should be noted that the unidirectional conduction function described in this specification is implemented based on the specific device type of the conduction unit, the connection method with other hardware (such as the selection unit and the logic control unit), and the control signals. The above examples are only for illustrative purposes and do not limit the way to implement the unidirectional conduction function.

[0135] It should be noted that the signal readout circuit may also include components with other functions, such as a voltage divider and a filter. The voltage divider may include any device with signal blocking properties, such as a resistor, and other devices that work in conjunction with a resistor. The filter may include any device with DC blocking and AC passing functions, such as a capacitor, and other devices that work in conjunction with a capacitor. This embodiment of the invention does not impose specific limitations on other components included in the signal readout circuit.

[0136] In specific implementations, the component distribution of the signal readout circuit in this embodiment of the invention can be set according to specific circumstances. In some cases, the components of the signal readout circuit can be placed on the same circuit board, while in other cases, the various components of the signal readout circuit can be placed on different circuit boards and connected by wires. This specification does not impose specific limitations on the component distribution of the signal readout circuit in the embodiments.

[0137] To enable those skilled in the art to clearly understand and implement the above technical solutions, the signal readout circuit will be described in detail below through several specific embodiments.

[0138] In one embodiment of the present invention, such as Figure 4a The diagram shows a connection schematic of a signal readout circuit 40, which may include: a logic control unit 41, and multiple selection units (such as...). Figure 4a The following are shown: gating units 42-11, 42-12 to 42-1x, 42-21, 42-22 to 42-2x, channel switching unit 43, and multiple voltage dividers (e.g., Figure 4aThe pressure dividers 44-11, 44-12 to 44-1x, 44-21, 44-22 to 44-2x, 44-a0, 44-a1 and 44-a2 are shown in the figure. Here, x is a non-zero integer.

[0139] The logic control unit 41 may include a control unit M1, and the control unit M1 may include multiple output terminals (such as...). Figure 4a The output terminals P11, P12 to P1x, P21, and P22 are shown. It is understood that in practical applications, the logic control unit 41 may include more control units, with each control unit corresponding to a different output terminal. For example, the logic control unit 41 may include two control units, one of which includes output terminals P11 to P1x, and the other includes output terminals P21 and P22.

[0140] Each of the multiple gating sections 42-11 to 42-1x and gating sections 42-21 to 42-2x may include a PN diode (e.g. Figure 4a The PN diode D shown 11 To PN diode D 1x PN diode D 21 To PN diode D 2x ).

[0141] The channel switching unit 43 may include two PIN diodes (such as...). Figure 4a The PIN diode D shown a1 and PIN diode D a2 ).

[0142] Each of the voltage dividers 44-11 to 44-1x, 44-21 to 44-2x, 44-a0, 44-a1, and 44-a2 may include a resistor (e.g., ...). Figure 4a The resistance R shown 11 To resistor R 1x Resistance R 21 To resistor R 2x Resistance R a0 Resistance R a1 and resistance R a2 ).

[0143] Continue to refer to Figure 4a The connection relationship between the logic control unit 41, the voltage divider unit 44-11, the selection unit 42-11, the voltage divider unit 44-a1, the channel switching unit 43, and the voltage divider unit 44-a0 will be described in detail as an example.

[0144] The output terminal P11 of the control unit M1 is connected to resistor R 11 With PN diode D 11 The cathode terminal is coupled, and the PN diode D 11 The cathode terminal can also be used to receive electrical signals; PN diode D 11 The positive terminals are respectively coupled to resistor R a1 One end and PIN diode D a1 The positive terminal; resistor R a1 The other end is coupled to the output terminal P21 of the control unit M1; PIN diode D a1 The cathode terminal and PIN diode D a2 The cathodes are coupled to each other and serve as a signal output terminal OUT41 of the channel switching unit 43. Furthermore, the PIN diode D... a1 The cathode is also connected to resistor R. a0 Grounding.

[0145] It is understood that the connection relationships of the other components of the signal readout circuit 40 can be deduced by analogy with the above description, and will not be described one by one here.

[0146] Continue to refer to Figure 4a Based on the specific connection relationship of the signal readout circuit 40 and the specific location of the selection section corresponding to the electrical signal, the logic control unit 41 can output a low-level signal to one of the corresponding selection sections 42-11 to 42-1x and 42-21 to 42-2x, and output a low-level signal to the multiple PIN diodes D. a1 and PIN diode D a2 A corresponding PIN diode outputs a high-level signal, thus forming a signal transmission channel for the electrical signal. The following example provides a circuit analysis of the signal readout circuit 40.

[0147] The control unit M1 outputs a low-level signal at terminal P11, high-level signals at terminals P12 to P1x, a high-level signal at terminal P21, and a low-level signal at terminal P22. For ease of description, the symbol "H" represents a high-level signal and the symbol "L" represents a low-level signal. Therefore, the multiple level signals output by terminals P11 to P1x of the control unit M1 can be: L, H...H, where there are x-1 high-level signals "H". The two level signals output by terminals P21 and P22 of the control unit M1 can be: H and L.

[0148] For PN diode D 11 The PN diode D can be controlled by the low-level signal output from terminal P11 and the high-level signal output from terminal P21 of control unit M1. 11 The voltage across the two ends satisfies its forward voltage, causing the PN diode D to...11 Conduction.

[0149] For PN diode D 12 To D 1x The high-level signals output from terminals P12 to P1x and from terminal P21 of control unit M1 can control the PN diode D. 12 To D 1x The voltage across the terminals is less than its forward voltage, thus ensuring that when PN diode D1 is on, PN diode D... 12 To D 1x It is not conductive.

[0150] For PN diode D 21 The low-level signals output from output terminal P11 and output terminal P22 of control unit M1 can control the PN diode D. 21 The voltage across the PN diode D is less than its forward voltage, ensuring that the PN diode D 11 When the PN diode D is turned on, 21 It is not conductive.

[0151] For PN diode D 22 To D 2x The high-level signal output from output terminals P12 to P1x and the low-level signal output from output terminal P22 of control unit M1 can control the PN diode D. 22 To D 2x The voltage across the two ends is less than its forward voltage and the PN diode D 22 To D 2x A reverse bias is applied to both ends to ensure that the PN diode D 11 When the PN diode D is turned on, 22 To D 2x Deadline.

[0152] For PIN diode D a1 The high-level signal output from the output terminal P21 of the control unit M1 can control the PIN diode D. a1 The voltage across the two terminals satisfies its forward voltage, causing the PIN diode D to... a1 Conduction.

[0153] For PIN diode D a2 The low-level signal output from the output terminal P22 of the control unit M1 can control the PIN diode D. a2 The voltage across the diode is less than its forward voltage, ensuring that the PIN diode D... a1 When turned on, PIN diode D a2 It is not conductive.

[0154] Based on the above description, we can obtain the following: Figure 4b The equivalent circuit 40' of the signal readout circuit 40 shown is referenced. Figures 4a to 4b The DC path of the signal readout circuit 40 can be obtained, such as... Figure 4b The dashed arrows A and B are shown in the diagram.

[0155] Continue to refer to Figures 4a to 4b Negative electrical signals (such as) Figure 4b The negative pulse electrical signal shown can be input to the gating unit 42-11, PN diode D 11 As the voltage at the cathode decreases, the PN diode D... 11 The voltage at the anode terminal decreases, and due to the PN diode D 11 The voltage across the two ends still satisfies the forward voltage, PN diode D 11 It is still conducting.

[0156] Based on the magnitude of the negative pulse electrical signal, the PN diode D 11 The voltage at the anode terminal can be a positive voltage greater than zero or a negative voltage less than zero. Correspondingly, the PIN diode D... a1 The voltage at the anode terminal can be a positive voltage greater than zero or a negative voltage less than zero.

[0157] To further highlight the advantages of the technical solution of this invention, using a PN diode D 11 The voltage at the anode is described as negative. Referring to the previously described volt-ampere characteristics of PIN diodes and PN diodes, for a PN diode, its anode has a negative voltage, while its cathode is connected to a resistor R. a0 Grounding will reverse the voltage across the PN diode, thus turning it off; for PIN diodes D... a1 Its anode is at a negative voltage, while its cathode is connected to resistor R. a0 Grounded, PIN diode D a1 The voltage across the two ends is negative, i.e., the PIN diode D... a1 It withstands reverse bias, however, the PIN diode D a1 There is still current in it, and it will not be cut off like a PN diode, so it can transmit negative pulse electrical signals and output them at the signal output terminal OUT41.

[0158] In short, through the output terminals P11 to P1x and P21 and P21 of the control unit M1, the following signal transmission channel can be formed in the signal readout circuit 40: PN diode D 11 →PIN diode D a1 →Signal output terminal OUT41.

[0159] based on Figure 4a and Figure 4bAs can be seen from the relevant description, 2x different signal transmission channels can be formed through the x+2 output ports of the control unit M1, thereby outputting the electrical signals received by different gating sections. Furthermore, due to the effective sharing of some ports in the signal readout circuit 40 (such as...), Figure 4a In the middle, PN diode D 11 To D 1x The anode of the diode is commonly coupled to the PIN diode D. a1 The anode of the PN diode D 11 The cathode and PN diode D 21 The negative terminals are jointly coupled to the output terminal P11 of the control unit M1, which can reduce the number of ports required for the signal readout circuit 40, thereby reducing hardware costs and overall circuit size, making the circuit layout more reasonable and concise, and making it easier to expand the number of signal transmission channels of the signal readout circuit.

[0160] In another embodiment of the invention, such as Figure 5 The diagram shows a connection schematic of another signal readout circuit. The signal readout circuit 50 may include: a logic control unit 51, and multiple gating units (in...). Figure 5 Only the gating section of region 1 is shown, namely gating section 52-a1 to gating section 52-ay, and the channel switching section ( Figure 5 (not marked in the text) and multiple pressure distribution sections ( Figure 5 Only a portion of the voltage dividers are shown, namely voltage dividers 54-a1 to 54-ay, voltage dividers 54-11 to 54-1z, voltage dividers 54-21 to 54-2h, voltage dividers 54-31 to 54-3j, and voltage divider 54-0. Here, y, z, h, and j are non-zero integers.

[0161] It should be noted that, for ease of description and understanding, Figure 5 The diagram only schematically shows some components of the signal readout circuit 50. Other components not shown can be derived from the components shown, and will not be described in detail here.

[0162] The logic control unit 51 may include at least one first control unit (in... Figure 5 The diagram shows a first control unit M11, and may include at least one second control unit (M11). Figure 5 The diagram shows the second control unit M21, the second control unit M22, and the second control unit M23.

[0163] The first control unit M11 may include multiple output terminals, which may be coupled to a voltage divider and a selection unit, respectively. Similarly, the second control units M21 to M23 may also include multiple output terminals, which may be coupled to a voltage divider and a channel switching unit, respectively.

[0164] For ease of description, Figure 5 Only the output terminals P1-1, P1-2 to P1-y of the first control unit M11 are shown; other output terminals of the first control unit M11 are omitted. Similarly, Figure 5 Only the output terminals P2-1, P2-2, and P2-z of the second control unit M21, the output terminals P3-1 and P3-h of the second control unit M22, and the output terminals P4-1 and P4-j of the second control unit M23 are shown. The other output terminals of the second control units M21 to M23 are omitted.

[0165] Each of the gating sections 52-a1 to 52-ay may include a PN diode (e.g. Figure 5 The PN diode D shown a-1 To PN diode D a-y ).

[0166] The channel switching unit may include multiple first controlled units (such as...) Figure 5 The first controlled units 53-11 to 53-1z, 53-31 to 53-3j shown, and a plurality of second controlled units (e.g.) Figure 5 The second controlled units 53-21 to 53-2h are shown.

[0167] Furthermore, each of the first controlled units includes a PIN diode (e.g., Figure 5 The PIN diode D shown 1-1 To PIN diode D 1-z PIN diode D 3-1 To PIN diode D 3-j Each of the second controlled units may include a PN diode (e.g., Figure 5 The PN diode D shown 2-1 To PIN diode D 2-h )

[0168] Each voltage divider section may include a resistor (e.g., Figure 5 The resistance R shown a-1 To resistor R a-y Resistance R 1-1 To resistor R 1-zResistance R 2-1 To resistor R 2-h Resistance R 3-1 To resistor R 3-j and resistance R0).

[0169] Continue to refer to Figure 5 The connection relationship between the first control unit M11, the second control unit M21, the voltage divider 54-a1, the selection unit 52-a1, the voltage divider 54-11, the first controlled unit 53-11, the voltage divider 54-21, the second controlled unit 53-21, the voltage divider 54-31, and the first controlled unit 53-31 and the voltage divider 54-0 will be described in detail as an example.

[0170] The output terminal P1-1 of the first control unit M11 is connected to a resistor R. a-1 With PN diode D a-1 The cathode terminal is coupled, and the PN diode D a-1 The cathode terminal can also be used to receive electrical signals; PN diode D a-1 The positive terminals are respectively coupled to resistor R 1-1 One end and PIN diode D 1-1 The positive terminal; resistor R 1-1 The other end is coupled to the output terminal P2-1 of the second control unit M21; PIN diode D 1-1 The cathode terminals are respectively coupled with resistors R 2-1 One end and PN diode D 2-1 The cathode terminal; resistor R 2-1 The other end is coupled to the output terminal P3-1 of the second control unit M22; PN diode D 2-1 The positive terminals are respectively coupled to resistor R 3-1 One end and PIN diode D 3-1 The positive terminal; resistor R 3-1 The other end is coupled to the output terminal P4-1 of the second control unit M23; PN diode D 3-1 The negative terminal is used as a signal output terminal OUT51 of the channel switching section and is grounded through resistor R0.

[0171] It is understood that the connection relationships of the other components of the signal readout circuit 50 can be deduced by analogy with the above description, and will not be described one by one here.

[0172] Continue to refer to Figure 5Based on the specific connection relationship of the signal readout circuit 50 and the location of the selection section corresponding to the electrical signal, the logic control unit 51 can output a low-level signal to one of the multiple selection sections and output a conduction-enabled level signal to the corresponding first controlled unit and the corresponding second controlled unit, thereby forming a signal transmission channel for the electrical signal. The signal readout circuit 50 will be analyzed below using examples.

[0173] The first control unit M11 outputs a low-level signal at its output terminal P1-1 and outputs high-level signals at its output terminals P1-2 to P1-y. That is, the multiple level signals output by the first control unit M11 from its output terminals P1-1 to P1-y can be: L, H...H, among which there are y-1 high-level signals "H".

[0174] The second control unit M21 outputs a high-level signal H at its output terminal P2-1, and low-level signals L at its other output terminals P2-2 to P2-z.

[0175] Similarly, the output terminal P3-1 of the second control unit M22 outputs a low-level signal L, while the other output terminals (such as output terminal 3-h) output a high-level signal H; the output terminal P4-1 of the second control unit M23 outputs a high-level signal H, while the other output terminals (such as output terminal 4-j) output a low-level signal L.

[0176] refer to Figure 5 Combined with reference Figure 4a and Figure 4b From the description, we can obtain that the PN diode D a-1 PIN diode D 1-1 PN diode D 2-1 and PIN diode D 3-1 When the PN diode D conducts, a signal transmission channel is formed. a-1 After receiving the electrical signal, the electrical signal can be output at the signal output terminal OUT51 through the formed signal transmission channel.

[0177] It is understood that the above examples are merely illustrative. In practical applications, those skilled in the art can adaptively select and / or modify the signal readout circuit provided in the embodiments of the present invention according to actual needs and application scenarios. For example, changing the number of gating sections can change the number of signal transmission channels in the signal readout circuit; changing the number of controlled units in the channel switching section can change the number of signal transmission channels in the signal readout circuit; and replacing some components in the signal readout circuit with equivalent substitutions can also be used. Based on this, more implementation schemes for the signal readout circuit can be derived, and the embodiments of the present invention do not limit these derived schemes.

[0178] This invention also provides a signal processing circuit corresponding to the signal readout circuit described above, which will be described below with reference to the accompanying drawings and specific embodiments. It should be noted that the content of the signal processing circuit described below can be referred to in correspondence with the content of the signal readout circuit described above.

[0179] In specific implementation, such as Figure 6 The diagram shown is a structural schematic of a signal processing circuit according to an embodiment of the present invention. In this embodiment, the signal processing circuit 60 may include:

[0180] Multiple signal acquisition units (such as) Figure 6 The diagram shows signal acquisition units 611 to 61X, which are adapted to acquire signals and output electrical signals.

[0181] The signal readout circuit 62 is adapted to selectively connect to the signal acquisition unit that performs signal acquisition and transmit the received electrical signals. The signal readout circuit 62 may include a logic control unit, multiple selection units, and a channel switching unit. The structure and signal analysis of the signal readout circuit 62 can be found in the description of the signal readout circuit section above, and will not be repeated here.

[0182] The signal processing unit 63 is adapted to process the electrical signal output by the signal readout circuit 62.

[0183] In the structure of the above signal processing circuit, the signal readout circuit provided in the embodiments of this specification can replace the multiplexer for electrical signal transmission through a hardware combination of a logic control unit, multiple gating units, and a channel switching unit. Based on this, on the one hand, the hardware combination can avoid the influence of on-resistance and parasitic capacitance, and effectively guarantee the bandwidth of the signal readout circuit without post-processing circuits or high-cost multiplexers, thereby improving the transmission performance of the circuit and reducing hardware costs. On the other hand, the hardware combination has greater flexibility, and can avoid wasting hardware resources while meeting the number of channels. Furthermore, the flexible hardware combination is conducive to circuit layout design and adjustment, and can effectively control the overall circuit size.

[0184] In summary, the signal readout circuit provided in this embodiment of the invention can improve the transmission performance and flexibility of the circuit, and reduce hardware costs and overall circuit size, thereby improving signal processing efficiency and quality.

[0185] In a specific implementation, the signal acquisition unit may include an acquisition unit and a filtering unit. The acquisition unit is adapted to acquire environmental information and generate electrical signals; the filtering unit is adapted to receive the electrical signals, filter the DC signals from the electrical signals, and transmit the filtered AC signals to the signal readout circuit.

[0186] In practical applications, the specific sensor types included in the acquisition unit can be determined according to the specific application scenario. For example, in lidar, the acquisition unit may include sensors for photoelectric conversion, such as photodetectors, wherein the photodetectors may include at least one of avalanche photodiodes (APDs), single-photon avalanche diodes (SPADs), and silicon photomultipliers (SiPMs); in imaging systems, the acquisition unit may include sensors for optical imaging, such as image sensors, wherein the image sensors may include at least one of CMOS image sensors (CIS) and charge-coupled devices (CCDs). This embodiment of the invention does not limit the specific type of the acquisition unit.

[0187] In specific implementation, the controller can implement the function of the logic control unit in the signal readout circuit, or the controller can control the logic control unit in the signal readout circuit to perform corresponding operations. The embodiments in this specification do not impose specific restrictions on the specific implementation method of the logic control unit.

[0188] In specific implementation, the signal processing unit can be implemented by a controller, or the controller can control the signal processing unit to perform corresponding operations. The embodiments in this specification do not impose specific restrictions on the specific implementation of the signal processing unit.

[0189] The present invention also provides a lidar corresponding to the signal readout circuit described above, which will be described below with reference to the accompanying drawings and specific embodiments. It should be noted that the lidar described below can be referred to in correspondence with the signal readout circuit described above.

[0190] In specific implementation, such as Figure 7 The diagram shown is a structural schematic of a lidar in an embodiment of the present invention. In this embodiment, the lidar 70 may include:

[0191] Transmitting module 71 includes multiple optical emitting units (such as...) Figure 7 The diagram shows optical emitting units 711, 712 to 71M, which are suitable for emitting detection optical signals.

[0192] Receiver module 72 includes multiple optical receiver units (such as...) Figure 7The diagram shows optical emitting units 721, 722 to 72M, adapted to receive echo optical signals returned by probe optical signals emitted by the respective optical emitting units, and to generate electrical signals. The waveform of the electrical signals is related to the sensor devices included in the optical receiving unit and their adapted circuitry.

[0193] The control module 73 is adapted to activate at least one of the optical emitting units and the corresponding optical receiving units each time.

[0194] The signal readout circuit 74, coupled to the receiving module 72, is adapted to selectively connect with the activated optical receiving unit and transmit the electrical signal. The signal readout circuit 74 may include a logic control unit, multiple selection units, and a channel switching unit. The structure and signal analysis of the signal readout circuit 74 can be found in the description of the signal readout circuit section above, and will not be repeated here.

[0195] The signal processing module 75 is adapted to process the electrical signal output by the signal readout circuit 74.

[0196] In the aforementioned lidar structure, the signal readout circuit provided in the embodiments of this specification can replace the multiplexer for electrical signal transmission through a hardware combination of a logic control unit, multiple selection units, and a channel switching unit. Based on this, on the one hand, the hardware combination avoids the influence of on-resistance and parasitic capacitance, effectively ensuring the bandwidth of the signal readout circuit without post-processing circuits or high-cost multiplexers, thereby improving circuit transmission performance and reducing hardware costs. On the other hand, the hardware combination offers greater flexibility, avoiding waste of hardware resources while meeting the required number of channels. Furthermore, the flexible hardware combination facilitates circuit layout design and adjustment, effectively controlling the overall circuit size.

[0197] In specific implementations, the signal processing module can be configured with corresponding functional circuits according to specific scenarios and requirements. For example, the signal processing module may include sampling circuits, filtering circuits, signal amplification circuits, etc., thereby realizing sampling processing, filtering processing, and signal amplification processing. The embodiments of the present invention do not limit the specific structure of the signal processing module.

[0198] In practical implementation, the control module of the lidar can be configured according to the specific application scenario and requirements to determine the activation timing and number of multiple optical emitting units of the lidar, as well as the activation timing and number of the corresponding multiple optical receiving units. Furthermore, based on the activation timing and number of multiple optical emitting units and the corresponding multiple optical receiving units, the timing of the control signals to be generated by the logic control unit in the signal readout circuit and the magnitude of each level signal can be configured.

[0199] Taking the sequential activation of multiple optical receiving units in a lidar as an example, refer to... Figure 7 and in conjunction with references Figure 1 And its related descriptions.

[0200] At time t0, the control module 73 can activate the optical emitting unit 711 and the optical receiving unit 721, and the logic control unit in the signal readout circuit 74 can control one of the multiple selection units coupled to the optical receiving unit 721 to be selected, and control the channel switching unit to connect with the selected selection unit.

[0201] After the optical emitting unit 711 emits a probe optical signal, the optical receiving unit 721 can receive the echo optical signal returned by the probe optical signal emitted by the optical emitting unit 711 and generate an electrical signal. Since the signal readout circuit 74 can be selectively connected to the optical receiving unit 721, it can transmit the electrical signal obtained based on the echo optical signal to the signal processing module 75.

[0202] At time t1, the control module 73 can activate the optical emitting unit 712 and the optical receiving unit 722, and the logic control unit in the signal readout circuit 74 can control one of the multiple selection units coupled to the optical receiving unit 722 to be selected, and control the channel switching unit to connect with the selected selection unit.

[0203] After the optical emitting unit 712 emits a probe optical signal, the optical receiving unit 722 can receive the echo optical signal returned by the probe optical signal emitted by the optical emitting unit 712 and generate an electrical signal. Since the signal readout circuit 74 can be selectively connected to the optical receiving unit 722, it can transmit the electrical signal obtained based on the echo optical signal to the signal processing module 75.

[0204] Similarly, the optical emitting units 711 to 71M and the corresponding optical receiving units 721 to 72M can be activated in sequence to complete one scanning cycle of the lidar. Furthermore, through the multiplexed signal readout circuit 74, after the optical receiving units 721 to 72M generate electrical signals in sequence, the corresponding electrical signals can be transmitted to the signal processing module 75.

[0205] In practical implementation, the specific type of optical receiving unit can be determined according to specific needs. For example, the optical receiving unit may include at least one of APD, SPAD, and SiPM. Taking SiPM as an example, SiPM is a high-sensitivity photoelectric detection device composed of many avalanche diodes operating in Geiger mode. Its internal structure can be simplified to a diode with a voltage signal output port. The voltage signal output port outputs a pulse electrical signal, which is usually composed of a capacitor coupled to the SiPM internally or externally. Depending on the internal structure of the SiPM, the voltage signal output port can output a positive pulse AC signal or a negative pulse AC signal; this specification does not impose specific limitations on this.

[0206] In practice, the receiving module can be placed on the same circuit board as the signal readout circuit to reduce signal interference.

[0207] This specification also provides a signal readout method corresponding to the signal readout circuit described above, which will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the content of the signal readout method described below can be referred to in conjunction with the content of the signal readout circuit described above.

[0208] In specific implementation, refer to Figure 8 This is a flowchart of a signal readout method according to an embodiment of the present invention. In this embodiment, the signal readout method can be applied to a signal readout circuit, which includes multiple selection sections and a channel switching section. The structure and signal analysis of the signal readout circuit can be referred to the relevant description in the above-mentioned signal readout circuit section, and will not be repeated here. The method may include:

[0209] S11, control the plurality of selection units and the channel switching unit respectively, so that one of the plurality of selection units is selected, and connect the channel switching unit with the selected selection unit;

[0210] S12, the received electrical signal is transmitted through the selected selection unit and the channel switching unit.

[0211] By employing the above method, a hardware combination of a logic control unit, multiple selection units, and a channel switching unit replaces the multiplexer for electrical signal transmission. Based on this, on the one hand, the hardware combination avoids the influence of on-resistance and parasitic capacitance, effectively ensuring the bandwidth of the signal readout circuit without post-processing circuits or high-cost multiplexers, thereby improving circuit transmission performance and reducing hardware costs. On the other hand, the hardware combination offers greater flexibility, avoiding waste of hardware resources while meeting the required number of channels. Furthermore, the flexible hardware combination facilitates circuit layout design and adjustment, effectively controlling the overall circuit size. In summary, the signal readout circuit provided by this embodiment of the invention improves circuit transmission performance and flexibility while reducing hardware costs and overall circuit size.

[0212] It should be noted that the term "an embodiment" or "embodiment" as used in this invention refers to a specific feature, structure, or characteristic that can be included in at least one implementation of the invention. Furthermore, in the description of this invention, terms such as "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with terms such as "first" and "second" may explicitly or implicitly include one or more of that feature. Moreover, terms such as "first" and "second" are used to distinguish similar objects and are not necessarily used to describe a specific order or indicate importance. It is understood that such terms can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein.

[0213] While the embodiments of the present invention have been disclosed above, the present invention is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A signal readout circuit for a lidar, characterized by, include: The system comprises a logic control unit, multiple gating units, and a channel switching unit, wherein: The logic control unit is adapted to generate control signals for controlling one of the plurality of gating units to be gated, and to control the channel switching unit to connect with the gated gating unit. The gating unit is adapted to output the received electrical signal to the channel switching unit after the control signal is selected; wherein, the logic control unit is configured according to the timing of the electrical signal input to the signal readout circuit and the position of the gating unit, so that the logic control unit generates a corresponding control signal before the electrical signal is input; The channel switching unit is adapted to selectively connect with the selected selection unit according to the control signal and output the electrical signal.

2. The signal readout circuit of claim 1, wherein The channel switching unit includes multiple signal input terminals and signal output terminals; each of the signal input terminals is coupled to a portion of the gating unit and can be selectively connected to the signal output terminals.

3. The signal readout circuit of claim 2, wherein, The channel switching unit further includes: multiple output control terminals, which are respectively coupled to different output terminals of the logic control unit, and are adapted to receive the control signal so that the corresponding signal input terminal and the signal output terminal are connected.

4. The signal readout circuit of claim 1, wherein, The channel switching unit includes: a plurality of first controlled units, each controlled by the logic control unit, wherein: The first controlled unit is adapted to transmit bidirectional electrical signals, its first end is coupled to a portion of the gating section and the logic control section respectively, and its second end is adapted to output the electrical signals.

5. The signal readout circuit of claim 4, wherein, The channel switching unit further includes: a plurality of second controlled units, each controlled by the logic control unit; wherein: the second controlled unit is at least adapted to transmit unidirectional electrical signals and cooperates with the first controlled unit.

6. The signal sensing circuit of claim 1, wherein The channel switching unit includes multiple levels, which are set according to the connection order with the gating unit; each level includes multiple controlled units.

7. The signal readout circuit of claim 6, wherein, In two adjacent layers, the number of controlled units in the layer farther away from the gating section is less than the number of controlled units in the layer closer to the gating section.

8. The signal readout circuit of claim 6, wherein, For each controlled unit in each level, its first end is coupled to the corresponding gating part and the logic control part respectively; In adjacent layers, multiple controlled units in the layer closer to the gating section are coupled to a controlled unit in the layer farther from the gating section; For multiple controlled units in the last level, the end of which is not coupled to the gating section is adapted to output the electrical signal.

9. The signal readout circuit of claim 6, wherein, All controlled units in each level are either first controlled units or second controlled units, and the first controlled units and the second controlled units are arranged alternately in adjacent levels.

10. The signal readout circuit of claim 9, wherein, The control signal includes multiple level signals, and the controlled units at adjacent levels are adapted to receive different level signals respectively.

11. The signal readout circuit of claim 10, wherein, According to the connection sequence with the selected gating part, the first end of the corresponding controlled unit in multiple levels sequentially receives the first level signal or the second level signal.

12. The signal readout circuit according to any one of claims 1 to 11, characterized in that The logic control unit includes: at least one first control unit and at least one second control unit; the first control unit is coupled to the plurality of gating units; and the second control unit is coupled to the channel switching unit.

13. The signal readout circuit of claim 12, wherein, The plurality of second control units are adapted to control the controlled units at different levels in the gating section respectively.

14. The signal readout circuit according to any one of claims 1 to 11, characterized in that The selection unit includes a conduction unit, whose first end and second end are respectively coupled to different output ends of the logic control unit. Its first end is adapted to receive electrical signals, and its second end is also coupled to the channel switching unit and adapted to output electrical signals.

15. A signal processing circuit, characterized by comprising: include: Multiple signal acquisition units are used to acquire signals and output electrical signals; The signal readout circuit of the lidar according to any one of claims 1-14 is adapted to be selectively connected to a signal acquisition unit that performs signal acquisition, and to transmit the received electrical signal. The signal processing unit is adapted to process the electrical signal output by the signal readout circuit.

16. The signal processing circuit of claim 15, wherein, The signal acquisition unit includes: an acquisition unit and a filtering unit, wherein: The acquisition unit is adapted to acquire environmental information and generate electrical signals; The filtering unit is adapted to receive the electrical signal, filter the DC signal in the electrical signal, and transmit the filtered AC signal to the signal readout circuit.

17. A lidar, comprising: include: The transmitting module includes multiple optical transmitting units, suitable for transmitting detection optical signals; The receiving module includes multiple optical receiving units, adapted to receive the echo optical signal returned by the probe optical signal emitted by the corresponding optical emitting unit, and generate an electrical signal; The control module is adapted to activate at least one of the optical emitting units and the corresponding optical receiving units each time. The signal readout circuit of the lidar according to any one of claims 1-14 is coupled to the receiving module and is adapted to selectively communicate with the activated optical receiving unit and transmit the electrical signal; The signal processing module is adapted to process the electrical signal output by the signal readout circuit.

18. The lidar of claim 17, wherein, The receiving module and the signal readout circuit are mounted on the same circuit board.

19. A signal readout method, characterized by, A signal readout circuit for use in lidar, the signal readout circuit comprising: multiple gating sections and a channel switching section; the method comprising: The plurality of gating units and the channel switching unit are controlled respectively, such that one of the plurality of gating units is selected, and the channel switching unit is connected to the selected gating unit; The received electrical signal is transmitted through the selected selection section and the channel switching section; wherein, according to the timing of the electrical signal input to the signal readout circuit and the position of the selection section, the logic control section in the signal readout circuit is configured so that the logic control section generates a corresponding control signal before the electrical signal is input, and the control signal is used to select the selection section and the channel switching section.

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