A method of local dynamic reconfiguration of process control

Abstract

The application discloses a local dynamic reconfiguration process control method, and belongs to the technical field of integrated circuits.The method comprises the following steps: defining a main process and local reconfigurable processes; the local reconfigurable processes have N functions according to user requirements, and the N local reconfigurable processes are independent of each other and run in parallel; dividing running stages of the main process and all the local reconfigurable processes, and the running stages of the main process and all the local reconfigurable processes are consistent; identifying any running stage of the main process and all the local reconfigurable processes; placing the main process and all the local reconfigurable processes in a preset sequence list, and sequentially running the processes placed in the sequence list.Compared with the prior art, the method improves the controllability and operability of the local dynamic reconfiguration process, realizes parallel control of the local dynamic reconfiguration process, and improves the running efficiency of the local dynamic reconfiguration process control.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, and relates to the design technology of integrated circuit software tools for programmable logic device chips, and particularly to a process control method for local dynamic reconfiguration. Background Technology

[0002] Existing local dynamic reconfiguration process control controls the process execution result by configuring the user-designed logic of the reconfigurable area. During the reconfiguration process, the user can only operate a single process, which lacks controllability and operability. Furthermore, a single process lacks parallel operations during operation, which may lead to unnecessary operations and reduce the efficiency of the process. Summary of the Invention

[0003] The purpose of this invention is to provide a process control method for local dynamic reconfiguration that enables multiple locally reconfigurable processes to operate in parallel, thereby solving the problems of weak operability and low operating efficiency of local reconfiguration process control in the prior art.

[0004] To address the above problems, this invention provides a process control method for local dynamic reconfiguration, comprising:

[0005] Define the main process and the partially reconfigurable processes; there are N partially reconfigurable processes based on the user's functional requirements. These N partially reconfigurable processes are independent of each other and run in parallel.

[0006] The main process and all locally reconfigurable processes are divided into operation phases, and the operation phases of the main process and all locally reconfigurable processes are consistent.

[0007] Identify any stage of the main process and all locally reconfigurable processes in operation;

[0008] The main process and all locally reconfigurable processes are placed in a preset sequence list, and the processes placed in the sequence list are run sequentially.

[0009] Furthermore, the main process and partially reconfigurable processes also include:

[0010] The main process is defined based on the non-reconfigurable design logic; the local reconfigurable process is defined based on the reconfigurable module and the local definition instance, and the local definition instance is used to identify the reconfigurable module; the main process and all local reconfigurable processes run as subprocesses, and the main process is used to start the subprocesses. Any process of the main process or all local reconfigurable processes can be specified to run at any time.

[0011] Furthermore, the operational phases of the main process and all locally reconfigurable processes include:

[0012] The compilation and synthesis stages are used to transform the logical expressions written in the hardware schema language in the user design into highly abstract logical units oriented towards the user.

[0013] The device mapping stage is used to convert highly abstract logic units oriented towards users into lightly abstract logic units oriented towards algorithms.

[0014] The placement and routing stage is used to arrange the logic cells transformed in the device mapping stage onto the chip;

[0015] The bitstream generation stage is used to convert the user design, after placement and routing, into a binary stream that can be written to the chip.

[0016] Furthermore, the process includes the following steps after the placement and routing stage and before the bitstream generation stage:

[0017] At least one,

[0018] The reporting sequence stage is used to report the timing of the user's design after the layout and routing are completed;

[0019] The power consumption reporting stage is used to report the power consumption of the user design after the layout and routing are completed.

[0020] The netlist generation stage is used to visualize the results of placement and routing.

[0021] Furthermore, the operational phases of the main process and all locally reconfigurable processes also include:

[0022] The next stage of the current process is determined based on the results of the current running stage of the main process and all local reconfigurable processes. The comprehensive stage of all local dynamic reconfigurable processes is determined based on the results of the reporting sequence stage of the main process. The user selects at least one of the running stages of the main process or the local reconfigurable processes as the end stage to terminate the selected process.

[0023] Furthermore, identifying any stage of the operation where the main process and all locally reconfigurable processes reside includes:

[0024] The stages that indicate whether a program is not running, is running successfully, is running with an error, has had its input, output, or result files changed, or have been stopped by the user are also identified.

[0025] Furthermore, the preset sequence list includes:

[0026] List of suspended streams, list of user-specified running streams, list of running streams, list of stopping streams, and list of dependent streams.

[0027] Furthermore, placing the main processes in different states and all locally reconfigurable processes in a predefined sequence list also includes:

[0028] Place locally reconfigurable processes that depend on the main process and require the integration phase into the sequence list;

[0029] Place the user-specified process into the sequence list;

[0030] Place the running process in the sequence list;

[0031] Place the processes that need to be stopped in the sequence list;

[0032] The processes that are depended upon are placed in the sequence list.

[0033] Furthermore, the locally reconfigurable processes in the integration phase that depend on the main process to run include:

[0034] First, run the main process up to the reporting sequence stage, and then run the locally reconfigurable processes that depend on the main process and require execution in the synthesis stage, which are placed in the sequence list.

[0035] Furthermore, executing processes sequentially within the sequence list also includes:

[0036] After any process in the main flow or any of the partially reconfigurable flows finishes running, the sequence list is searched and the processes in the dependent flow list, the suspended flow list, and the running flow list are executed in sequence.

[0037] The beneficial effects of this invention are:

[0038] The local dynamic reconfiguration process provided by this invention subdivides the main process and local reconfigurable process stages, designs N independent, parallel-running local reconfigurable processes, identifies all subdivided process stages, and presets a sequence list to hold all processes. The main process is defined according to the non-reconfigurable design logic, and the local reconfigurable processes are jointly defined according to the reconfigurable modules and local definition instances, allowing users to freely select the reconfigurable functions they need. This improves the controllability and operability of the local dynamic reconfiguration process and realizes the operational efficiency of the local dynamic reconfiguration process control. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1A diagram showing the operational phases of the main process and locally reconfigurable processes;

[0041] Figure 2 This is a flowchart of the operation of any locally reconfigurable process. Detailed Implementation

[0042] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0043] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0044] This invention provides a process control method for partial dynamic reconfiguration, enabling multiple partially reconfigurable processes to run in parallel. The specific method includes:

[0045] Define the main process and the locally reconfigurable processes; there are N locally reconfigurable processes based on the user's functional requirements. The N locally reconfigurable processes are independent of each other and run in parallel, where N is a positive integer.

[0046] The main process is defined based on non-reconfigurable design logic, while reconfigurable design logic is called reconfigurable module. The reconfigurable module and the local definition instance together define the local reconfigurable process. The local definition instance is used to identify the reconfigurable module.

[0047] The main process and all locally reconfigurable processes are divided into multiple execution phases, arranged in the order of execution: compilation phase, synthesis phase (converting the logic expressions written in the hardware schema language of the user design into highly abstract logic units oriented towards the user); device mapping phase (converting the highly abstract logic units oriented towards the user into lightly abstract logic units oriented towards the algorithm); placement and routing phase (arranging the logic units transformed in the device mapping phase onto the chip, enabling the user design to have optimized signal transmission paths); and bit stream generation phase (converting the placed and routed logic units into a binary stream that can be written to the chip). The conversion is achieved by running program code, and the binary stream is expressed using binary data. The specific implementation processes of the compilation phase, synthesis phase, device mapping phase, placement and routing phase, and bit stream generation phase can all be implemented using existing technologies, therefore only a brief description is provided.

[0048] In addition, after the placement and routing phase, there are at least one other phase: a timing report phase, which reports the timing of the user design after placement and routing is completed; a power report phase, which reports the power consumption of the user design after placement and routing is completed; and a netlist generation phase, which displays the placement and routing results in a visual manner. All three phases depend on the placement and routing phase.

[0049] The execution order of all runtime phases is as follows: Figure 1 As shown, the execution of the next stage of the current process is determined based on the execution results of the current stage of the main process and all local reconfigurable processes. That is, any stage of the same execution process depends on the execution result of the previous stage. Furthermore, users can specify the main process or local reconfigurable processes to run to any stage through settings. For example, if a user sets the process to stop running after the device mapping stage is completed before running a certain process, the process will terminate after the device mapping stage is completed. Similarly, users can also set the end stage to any running stage.

[0050] In actual operation, multiple locally reconfigurable processes can be run, such as Figure 2 As shown, the operation of the integration phase of each local reconfiguration process depends on the reporting timing phase of the main process. When some processes have already run, the user can specify the processes that have not yet started to run. The main process and all local reconfigurable processes run using subprocesses. The main process is only used to start the subprocesses. In this way, the user can continue to use the operation interface during the operation of all processes. If the main process is used to run the process, the user operation interface will be unusable, and the user can only wait for the process to finish before operating.

[0051] Identify any running stage of the main process and all locally reconfigurable processes; "Initial" indicates a stage that has not run, "OK" indicates a stage that has run successfully, "Error" indicates a stage that has encountered an error, "Outdated" indicates a stage where the input file, output file, or result file has been changed, and "Stop" indicates a stage that has been stopped by the user.

[0052] Once any process begins execution, all processes are continuously updated with their own status based on the status of the stages they depend on, associated input / output and result files, and the status of the processes they depend on. If a dependent stage is in the "Outdated" state, that stage is marked as "Outdated"; if associated input / output or result files change, that stage is also marked as "Outdated". If a dependent stage is in the "Initial" state, that stage is marked as "Initial".

[0053] The main flow and all locally reconfigurable flows are placed in a preset sequence list, which includes the suspended_flows sequence list, flows_need_running sequence list, running_flows sequence list, stopping_flows sequence list, and dependent_flows sequence list.

[0054] Specifically, locally reconfigurable processes that depend on the main process and require the synthesis phase are placed in the suspended_flows sequence list; processes that the user specifies to run are placed in the flows_need_running sequence list; processes that are currently running are placed in the running_flows sequence list; processes that need to be stopped are placed in the stopping_flows sequence list; and processes that are depended upon are placed in the dependent_flows sequence list.

[0055] First, run the main flow up to the report timing stage, then run the locally reconfigurable flows that depend on the main flow and require the synthesis stage, which are placed in the suspended_flows sequence list.

[0056] When a partially reconfigurable flow completes the compilation phase, the system will determine whether the main flow has run the reporting sequence phase. If the main flow has not yet run the reporting sequence phase, the partially reconfigurable flow will be placed in the suspended_flows sequence list. The main flow's reporting sequence phase will run first. After the main flow's reporting sequence phase is completed, the partially reconfigurable flow placed in the suspended_flows sequence list will run after the system confirms.

[0057] After the main flow or any of the partially reconfigurable flows has finished running, the processes in the dependent_flows sequence list, the suspended_flows sequence list, and the running_flows sequence list are searched and executed sequentially. Because the execution of the synthesis phase of all partially reconfigurable flows depends on the reporting sequence phase of the main flow, as long as the main flow has executed the reporting sequence phase, the subsequent execution phases of all partially reconfigurable flows can run in parallel.

[0058] The above description, in conjunction with specific embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the inventive concept, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A method of local dynamic reconfiguration of flow control, characterized in that, The application relates to a method for running a main flow and local reconfigurable flows. The main flow and the local reconfigurable flows are divided into running stages, and the running stages of the main flow and the local reconfigurable flows are consistent. The main flow and the local reconfigurable flows are placed in a preset sequence list, and the flows in the sequence list are sequentially run. The running stages of the main flow and the local reconfigurable flows include the following stages: The device mapping stage is used for converting the user-oriented highly abstract logic unit into an algorithm-oriented lightly abstract logic unit. The layout and wiring stage is used for arranging the logic unit converted by the device mapping stage on a chip. The bit stream generation stage is used for converting the logic unit arranged by the layout and wiring stage into a binary stream capable of being written onto a chip. The layout and wiring stage further includes at least one of the following stages before the bit stream generation stage: The report timing stage is used for reporting the timing of the user design after the layout and wiring are completed. The report power consumption stage is used for reporting the power consumption of the user design after the layout and wiring are completed. The netlist generation stage is used for displaying the result of the layout and wiring in a visual manner. The running stages of the main flow and the local reconfigurable flows further include the following stages: The next running stage of the current flow is determined according to the running result of the current running stage of the main flow and the local reconfigurable flows, the comprehensive stage of all the local dynamic reconfigurable flows is determined according to the running result of the report timing stage of the main flow, and any running stage of the main flow or the local reconfigurable flows is selected as an end stage. The main flow and the local reconfigurable flows further include the following stages: The main flow is defined according to the design logic which cannot be reconfigured, the local reconfigurable flow is defined according to the reconfigurable module and the local definition instance, the local definition instance is used for identifying the reconfigurable module, the main flow and all the local reconfigurable flows run in sub-processes, the main process is used for starting the sub-processes, and any flow of the main flow or all the local reconfigurable flows can be specified to run at any time. Identifying any running stage of the main flow and all the local reconfigurable flows includes the following stages: The stages include the stages which are not run, successfully run, run with errors, have changed input files or output files or result files, and are stopped by the user. The preset sequence list includes a suspended flow list, a user-specified running flow list, a running flow list, a stopping flow list and a dependent flow list. The main flow and all the local reconfigurable flows in different states are placed in the preset sequence list.

2. The method of claim 1, wherein, ​ ​ 3. The method of claim 1, wherein, ​ 4. The method of claim 3, wherein, ​ putting a local reconfigurable process which needs to run a comprehensive stage depending on the main process into a sequence list; putting a user-specified running process into a sequence list; putting a running process into a sequence list; putting a process which needs to be stopped into a sequence list; putting a depended process into a sequence list.

5. The method of claim 4, wherein, the local reconfigurable process which needs to run a comprehensive stage depending on the main process comprises: running the local reconfigurable process which needs to run a comprehensive stage depending on the main process in the sequence list after running the main process to a report timing stage.

6. The method of claim 1, wherein, sequentially running the processes in the sequence list further comprises: after any process of the main process or all the local reconfigurable processes is run, searching the sequence list to sequentially run the processes in a depended process list, the processes in a suspended process list and the processes in a running process list.

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