A method for processing a flat-edge wafer using a notch-type wafer processing device
After bonding the flat-edge wafer with the notch wafer, the processing is performed using the notch wafer processing equipment, which solves the problem that the equipment cannot process the flat-edge wafer, improves compatibility and reduces the transformation cost.
Patent Information
- Application Number
- CN202111527214.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-14
- Publication Date
- 2025-06-06
- Estimated Expiration
- 2041-12-14
AI Technical Summary
Existing notch-type wafer processing equipment cannot effectively process flat-edge wafers, resulting in poor compatibility and high modification costs.
By chemically mechanically planarizing the non-processed surface of the flat-edged wafer to be processed, and bonding and fixing it with the same sized notched wafer, the bonded flat-edged wafer is processed using the notched wafer processing equipment.
The effective processing of flat-edged wafers by notch-type wafer processing equipment is realized, which improves equipment compatibility and reduces production and manufacturing difficulties and transformation costs.
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Figure CN114242569B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor manufacturing, and in particular to a method for processing a flat-edge wafer using a notch-type wafer processing device. Background Art
[0002] At present, wafers in the semiconductor industry are divided into notch-type and flat-edge types. The two types of wafers result in wafer processing equipment that can process notch-type and flat-edge types. The price of each type of equipment generally ranges from tens to tens of millions. The two types of wafers have different shapes, which are equivalent to two types of processing objects for the equipment. When notch-type wafer processing equipment was originally designed, it could only recognize notch-type wafers. If wafers of other shapes are forcibly processed, the equipment will alarm and cannot make wafers normally. According to traditional methods, if you want to use a notch-type machine to process flat-edge wafers, you need to modify the equipment, and the cost of the modification is very high. After the modification, notch-type wafers cannot be processed, which has poor compatibility and is time-consuming and labor-intensive.
[0003] Based on the above-mentioned problems, there is an urgent need for a method for processing a flat-edge wafer using a notch-type wafer processing device. Summary of the invention
[0004] In order to solve the above problems, the present invention proposes a method for processing a flat-edge wafer using a notch-type wafer processing device. To achieve the above purpose, the present invention adopts the following specific technical solutions:
[0005] A method for processing a flat-edge wafer using a notch-type wafer processing device comprises the following steps:
[0006] S1. Prepare a notched wafer having the same size as the flat-edge wafer to be processed;
[0007] S2, chemically and mechanically planarizing the non-processed surface of the flat-edge wafer to be processed;
[0008] S3, bonding and fixing the non-processed surface to the notched wafer;
[0009] S4. Use notch-type wafer processing equipment to process the bonded flat-edge wafer.
[0010] Furthermore, when the non-processed surface is bonded to the front side of the notched wafer, the notch of the notched wafer is symmetrically placed on the center line of the flat-edge wafer to be processed.
[0011] Furthermore, after step S4, the following steps are also included:
[0012] S5. Thinning the bonded notch-shaped wafer.
[0013] Furthermore, after chemical mechanical planarization, the non-machined surface in step S2 has a surface roughness of less than 3 nm and a warpage of less than 50 um.
[0014] The present invention can achieve the following technical effects:
[0015] The present invention solves the problem that notch-type wafer processing equipment cannot process flat-edge wafers, improves the compatibility of the machine for processing different types of wafers, and reduces difficulties in production and manufacturing. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 A flowchart of the processing method disclosed in the present invention;
[0017] Figure 2 It is a structural schematic diagram of the front side of the notch-shaped wafer disclosed in the present invention;
[0018] Figure 3 It is a schematic structural diagram of a flat-edge wafer to be processed disclosed in the present invention;
[0019] Figure 4 It is a schematic diagram of the front view structure after the flat-edge wafer and the notch-shaped wafer disclosed in the present invention are bonded;
[0020] Figure 5 It is a schematic diagram of the side structure of the flat-edge wafer and the notch-shaped wafer after bonding disclosed in the present invention. DETAILED DESCRIPTION
[0021] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and do not constitute a limitation of the present invention.
[0022] The present invention provides a method for processing a flat-edge wafer using a notch-type wafer processing device, such as Figure 1 As shown, the following steps are included:
[0023] S1. Prepare a notched wafer having the same size as the flat-edge wafer to be processed.
[0024] Specifically, Figure 2 The notched wafer and Figure 3 The flat-edge wafer shown in the figure has the same diameter for the two wafers. Two wafers of the same size can be directly bonded by the machine in the subsequent bonding, which is high-precision and simple. The problem of mixed integration of the same material or different materials of different sizes is avoided, and the wafers can be directly bonded without the need for other molds.
[0025] S2. Chemically and mechanically planarize the non-processed surface of the flat-edge wafer to be processed.
[0026] Specifically, the flat-edge wafer to be processed has two surfaces, the front side and the back side. The front side is the processing side facing upward, and the back side of the non-processing side is chemically and mechanically planarized to make it smooth and flat, so as to facilitate the bonding and fixing described later. Preferably, after the treatment, the surface roughness of the non-processing side is less than 3nm, and the warpage is less than 50um.
[0027] S3. Bond and fix the non-processed surface to the notched wafer.
[0028] Specifically, when the non-processed surface of the flat-edge wafer to be processed is bonded to the front surface of the notched wafer, the notch of the notched wafer is symmetrically placed on the center line of the flat-edge wafer to be processed. Figure 2 As shown, the notched wafer has its own notch. The notched wafer processing equipment needs to scan the notch of the notched wafer to determine whether this is the type of wafer that the equipment can process. Therefore, the notch cannot be blocked by the flat-edge wafer, but needs to be exposed on the integrated wafer after bonding and symmetrically arranged on the notched wafer. Figure 4 As shown in the figure, the two wafers after bonding are geometrically symmetrical. Figure 5 As shown, the flat-edge wafer to be processed is placed on top of the notched wafer, and the two are stacked together. After bonding, the flat-edge wafer and the single notched wafer have the same front shape and contour, and the equipment can scan the notch when identifying it, and the equipment will think it is a notched wafer, so it can be identified and processed normally.
[0029] S4. Use notch-type wafer processing equipment to process the bonded flat-edge wafer.
[0030] In semiconductor manufacturing, some wafer processing equipment can only process notched wafers but not flat-edge wafers, which brings difficulties to production and manufacturing. Therefore, the chip bonding process method is used to "transform" the flat-edge wafer, and the reverse side of the flat-edge wafer to be processed is bonded to the notched wafer, so that the notched wafer processing equipment can recognize it normally and correspond normally with the wafer stage, thus realizing the function of processing flat-edge wafers.
[0031] After step S4, the following steps are also included:
[0032] S5. Thinning the bonded notch-shaped wafer.
[0033] Depending on the thickness requirements of the product, the flat-edge wafer after bonding needs to be thinned using a thinning machine or manual grinding to thin the bonded notch-type wafer, or even completely ground off; however, some products have no requirements on thickness and can be used directly after bonding.
[0034] The present invention uses reverse thinking to jump out of the technical means of high-cost transformation of equipment, and improves the product. Using the bonded wafer, the notch-shaped wafer with a price of about 100 yuan is invested and the original shape of the flat-edge wafer is retained, so that one device can process both wafers. This method has the advantages of reducing costs and high efficiency.
[0035] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.
[0036] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.
[0037] The above specific implementations of the present invention do not constitute a limitation on the protection scope of the present invention. Any other corresponding changes and modifications made based on the technical concept of the present invention should be included in the protection scope of the claims of the present invention.
Claims
1. A method for processing a flat-edge wafer using a notch-type wafer processing device, It is characterized in that The following steps are involved: S1. Prepare a notched wafer having the same size as the flat-edge wafer to be processed; S2, chemically and mechanically planarizing the non-processed surface of the flat-edge wafer to be processed; S3, bonding and fixing the non-processed surface to the notched wafer; When the non-processed surface is bonded to the front side of the notched wafer, the notch of the notched wafer is symmetrically placed on the center line of the flat-edge wafer to be processed; S4. Use notch-type wafer processing equipment to process the bonded flat-edge wafer.
2. A method for processing a flat-edge wafer using a notch-type wafer processing device according to claim 1, It is characterized in that The step S4 further includes the following steps: S5. Thinning the bonded notch-shaped wafer.
3. A method for processing a flat-edge wafer using a notch-type wafer processing device according to claim 1, It is characterized in that The non-processed surface in step S2 is subjected to chemical mechanical planarization to achieve a surface roughness of less than 3 nm and a warpage of less than 50 um.
Citation Information
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