A method for constructing a FinFET device threshold voltage model

Abstract

The present invention discloses a method for constructing a FinFET device threshold voltage model, which relates to the field of semiconductor integrated circuit technology, including: establishing a flicker noise, transconductance-channel temperature mapping model; solving the channel temperature of the FinFET device under different bias voltages through the flicker noise, transconductance-channel temperature mapping model; obtaining a bias voltage-channel temperature relationship model through an interpolation method; and establishing a FinFET device threshold voltage model. The present invention establishes a bias voltage-channel temperature relationship model, which, combined with a temperature-threshold voltage equation, accurately describes the effect of the bias voltage on the threshold voltage due to the change in the channel temperature, and solves the problem of the accuracy of the threshold voltage measurement of the FinFET device. The present invention is not limited to the size of transistors, has a wide range of applications, and has good portability.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor integrated circuits, and in particular to a method for constructing a FinFET device threshold voltage model. Background Art

[0002] With the continuous development of integrated circuit technology, the size of devices has been continuously reduced, and the short channel effect of planar transistors has once questioned Moore's Law. In 1999, FinFET devices were proposed as a new three-dimensional structure, which greatly enhanced the gate's control over the channel current and greatly alleviated the problems of large leakage current and high power consumption of planar transistors at advanced process nodes, becoming the mainstream structure at 22nm and below process nodes.

[0003] The transistor threshold voltage is not only a key parameter in model building, but also plays an important role in the design of widely used analog and mixed-signal circuits. In order to improve the accuracy of the model as much as possible and reduce the difficulty of circuit design, people have considered various factors that affect the threshold voltage, such as series parasitic resistance, surface trapped charge, device structure, material, physical size, etc., and built a physical-based model suitable for the micron level and a charge-based model suitable for the nanometer level.

[0004] Although academia and industry have made great efforts to describe the threshold voltage of transistors, people often regard temperature as a constant when establishing threshold voltage models, and ignore the impact of temperature drift caused by changes in transistor bias conditions on model accuracy. However, as device size continues to shrink, especially for today's FinFET integrated circuits with greatly increased integration and severe heat dissipation, the impact of temperature drift on transistor threshold voltage can no longer be ignored. Experience shows that different bias voltages will change the temperature of FinFET devices. Therefore, the establishment of temperature-related threshold voltage equations is of great significance to the design of circuits with high integration and advanced processes. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, a method for constructing a FinFET device threshold voltage model provided by the present invention solves the problem of threshold voltage measurement accuracy of FinFET devices.

[0006] In order to achieve the above-mentioned object of the invention, the technical solution adopted by the present invention is:

[0007] A method for constructing a FinFET device threshold voltage model comprises the following steps:

[0008] S1. Measure and obtain the flicker noise power spectrum density, transconductance and channel temperature of the FinFET device with bias voltage applied, and solve the transistor flicker noise equation group by Newton iteration method to obtain the flicker noise, transconductance-channel temperature mapping model;

[0009] S2, applying different bias voltages to the FinFET device, measuring and obtaining the flicker noise power spectrum density and transconductance of the FinFET device at each bias voltage, and solving the channel temperature of the FinFET device at each bias voltage through a flicker noise, transconductance-channel temperature mapping model;

[0010] S3, according to the channel temperature of the FinFET device under each bias voltage described in step S2, obtaining a bias voltage-channel temperature relationship model by interpolation method;

[0011] S4. Establish a FinFET device threshold voltage model based on the bias voltage-channel temperature relationship model and the temperature-threshold voltage equation.

[0012] Furthermore, the transistor flicker noise equation group in step S1 includes the following equations:

[0013] S vg|flicker ·g m 2 =A1·A2·(T1+T2+T3)

[0014]

[0015]

[0016] L c =L elec +V ds / E crit

[0017] β=kT / q

[0018] Q0=4βC si

[0019]

[0020]

[0021]

[0022]

[0023]

[0024]

[0025]

[0026]

[0027]

[0028]

[0029]

[0030]

[0031] Among them, S vg|flicker is the flicker noise power spectral density, g m is the transconductance, A1 is the first multiplier parameter, A2 is the second multiplier parameter, T1 is the first parameter, T2 is the second parameter, T3 is the third parameter, f is the operating frequency, L c is the equivalent parameter of the conductive channel length, β is the temperature voltage equivalent, Q s is the source mobile charge density, Q d is the drain mobile charge density, C ox is the unit permittivity of the gate oxide layer, C si is the unit permittivity of silicon, ln(·) is the natural logarithmic function, Q0 is the first charge density parameter, μ eff is the effective carrier mobility, N ot is the number of trapped charges per unit area, W is the effective conductive channel width, L is the effective conductive channel length, V gseff is the effective voltage between the gate and source, A bulk is the system number, L elec is the electrical length of the conductive channel, V ds is the voltage applied between the drain and source, E crit is the critical electric field strength, k is the Boltzmann constant, T is the channel temperature, g is the charge of a single electron, μ0 is the carrier low-field mobility, θ1 is the first correction factor of the carrier mobility, θ2 is the second correction factor of the carrier mobility, V gs is the voltage applied between the gate and source, is the work function difference between the gate and intrinsic silicon, Q′ is the derivative of the channel charge density, V is the quasi-electron Fermi potential, n i is the intrinsic carrier concentration, t si is the thickness of the silicon material layer, B is the fourth parameter, I ds is the drain-source current, T 1，1 is the first calculation factor of the first parameter, T 1，2 is the second calculation factor of the first parameter, n is the slope factor, C is the fifth parameter, T 2，1 is the first calculation factor of the second parameter, T 2，2is the second calculation factor of the second parameter, and arctg(·) is the inverse tangent function.

[0032] Furthermore, the temperature-threshold voltage equation in step S4 is:

[0033]

[0034] Among them, V th is the threshold voltage.

[0035] The beneficial effects of the present invention are:

[0036] 1) The present invention establishes a bias voltage-channel temperature relationship model, which, combined with the temperature-threshold voltage equation, accurately describes the effect of the bias voltage on the threshold voltage due to the change in the channel temperature, and solves the problem of threshold voltage measurement accuracy of FinFET devices.

[0037] 2) The present invention describes the scientific laws of flicker noise, transconductance and channel temperature through the independently derived and constructed transistor flicker noise equation group, and processes the difficult and complex transistor flicker noise equation group through the Newton iteration method in the numerical analysis method based on the flicker noise power spectrum density, transconductance and channel temperature obtained by the test, and obtains a nonlinear regression numerical model - flicker noise, transconductance-channel temperature mapping model, which can output the channel temperature value by inputting only the flicker noise power spectrum density value and the transconductance value.

[0038] 3) Based on the flicker noise, transconductance-channel temperature mapping model, when establishing the bias voltage-channel temperature relationship model, it is only necessary to measure the flicker noise power spectrum density and transconductance at different bias voltages to accurately calculate the channel temperature corresponding to each bias voltage, greatly reducing the difficulty of obtaining the channel temperature of nanoscale FinFET devices.

[0039] 4) The present invention is not limited to the size of transistors, has a wide range of applications, and has good portability. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 A flowchart of a method for constructing a FinFET device threshold voltage model provided by an embodiment of the present invention;

[0041] Figure 2 This is a FinFET device testing platform according to an embodiment of the present invention. DETAILED DESCRIPTION

[0042] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0043] like Figure 1 As shown, in one embodiment of the present invention, a method for constructing a FinFET device threshold voltage model includes the following steps:

[0044] S1. Measure and obtain the flicker noise power spectrum density, transconductance and channel temperature of the FinFET device with bias voltage applied, and solve the transistor flicker noise equation group through Newton iteration method to obtain the flicker noise, transconductance-channel temperature mapping model.

[0045] The transistor flicker noise equations include the following:

[0046] S vg|flicker ·g m 2 =A1·A2·(T1+T2+T3)

[0047]

[0048]

[0049] L c =L elec +V ds / E crit

[0050] β=kT / q

[0051] Q0=4βC si

[0052]

[0053]

[0054]

[0055]

[0056]

[0057]

[0058]

[0059]

[0060]

[0061]

[0062]

[0063]

[0064] Among them, S vg|flicker is the flicker noise power spectral density, g m is the transconductance, A1 is the first multiplier parameter, A2 is the second multiplier parameter, T1 is the first parameter, T2 is the second parameter, T3 is the third parameter, f is the operating frequency, L c is the equivalent parameter of the conductive channel length, β is the temperature voltage equivalent, Q s is the source mobile charge density, Q d is the drain mobile charge density, C ox is the unit permittivity of the gate oxide layer, C si is the unit permittivity of silicon, ln(·) is the natural logarithmic function, Q0 is the first charge density parameter, μ eff is the effective carrier mobility, N ot is the number of trapped charges per unit area, W is the effective conductive channel width, L is the effective conductive channel length, V gseff is the effective voltage between the gate and source, A bulk is the system number, L elec is the electrical length of the conductive channel, V ds is the voltage applied between the drain and source, E crit is the critical electric field strength, k is the Boltzmann constant, T is the channel temperature, g is the charge of a single electron, μ0 is the carrier low-field mobility, θ1 is the first correction factor of the carrier mobility, θ2 is the second correction factor of the carrier mobility, V gs is the voltage applied between the gate and source, is the work function difference between the gate and intrinsic silicon, Q′ is the derivative of the channel charge density, V is the quasi-electron Fermi potential, n i is the intrinsic carrier concentration, t si is the thickness of the silicon material layer, B is the fourth parameter, I ds is the drain-source current, T 1，1 is the first calculation factor of the first parameter, T 1，2 is the second calculation factor of the first parameter, n is the slope factor, C is the fifth parameter, T 2，1 is the first calculation factor of the second parameter, T 2，2 is the second calculation factor of the second parameter, and arctg(·) is the inverse tangent function.

[0065] The present invention describes the scientific laws of flicker noise, transconductance and channel temperature through an independently derived and constructed transistor flicker noise equation group, and processes the difficult and complex transistor flicker noise equation group through the Newton iteration method in the numerical analysis method based on the flicker noise power spectrum density, transconductance and channel temperature obtained by the test, and obtains a nonlinear regression numerical model - flicker noise, transconductance-channel temperature mapping model - which can output the channel temperature value by inputting only the flicker noise power spectrum density value and the transconductance value.

[0066] The present embodiment applies bias to the FinFET device and measures the flicker noise power spectrum density and transconductance. Figure 2 As shown. The FinFET device to be tested is used as a two-terminal network with an input terminal and an output terminal, and two bias devices are used to provide an input bias voltage and an output bias voltage respectively. The input bias voltage and the output bias voltage together constitute the bias voltage described in this embodiment, that is, in this embodiment, the bias voltage described in the present invention is a vector containing two elements; a vector network analyzer, a spectrum analyzer and a noise source whose power is controlled by an attenuator are connected to measure the flicker noise power spectrum density; a semiconductor parameter analyzer is also connected to measure and calculate the transconductance.

[0067] S2. Apply different bias voltages to the FinFET device, measure and obtain the flicker noise power spectrum density and transconductance of the FinFET device at each bias voltage, and solve the channel temperature of the FinFET device at each bias voltage through a flicker noise, transconductance-channel temperature mapping model.

[0068] The present invention is based on a flicker noise, transconductance-channel temperature mapping model. When establishing a bias voltage-channel temperature relationship model, it is only necessary to measure the flicker noise power spectrum density and transconductance at different bias voltages to accurately calculate the channel temperature corresponding to each bias voltage, thereby greatly reducing the difficulty of obtaining the channel temperature of a nanoscale FinFET device.

[0069] S3. According to the channel temperature of the FinFET device under each bias voltage described in step S2, a bias voltage-channel temperature relationship model is obtained by interpolation method.

[0070] The interpolation method of the present invention is used to fill in the bias voltage-channel temperature data between the above-mentioned measured bias voltages, and is not limited to methods such as linear interpolation and sinc function interpolation.

[0071] S4. Establish a FinFET device threshold voltage model based on the bias voltage-channel temperature relationship model and the temperature-threshold voltage equation.

[0072] The temperature-threshold voltage equation is:

[0073]

[0074] Among them, V th is the threshold voltage.

[0075] In summary, the present invention establishes a bias voltage-channel temperature relationship model, which, combined with the temperature-threshold voltage equation, accurately describes the effect of the bias voltage on the threshold voltage due to the change in the channel temperature, and solves the problem of threshold voltage measurement accuracy of FinFET devices. The present invention is not limited to transistor size, has a wide range of applications, and has good portability.

[0076] The present invention uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0077] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. A method for constructing a FinFET device threshold voltage model, characterized in that: The following steps are involved: S1. Measure and obtain the flicker noise power spectrum density, transconductance and channel temperature of the FinFET device with bias voltage applied, and solve the transistor flicker noise equation group by Newton iteration method to obtain the flicker noise, transconductance-channel temperature mapping model; S2, applying different bias voltages to the FinFET device, measuring and obtaining the flicker noise power spectrum density and transconductance of the FinFET device at each bias voltage, and solving the channel temperature of the FinFET device at each bias voltage through a flicker noise, transconductance-channel temperature mapping model; S3, according to the channel temperature of the FinFET device under each bias voltage described in step S2, obtaining a bias voltage-channel temperature relationship model by interpolation method; S4. Establish a FinFET device threshold voltage model based on the bias voltage-channel temperature relationship model and the temperature-threshold voltage equation.

2. The method for constructing a FinFET device threshold voltage model according to claim 1, characterized in that: The transistor flicker noise equation group in step S1 Includes the following: <h2 style=";text-align:left;direction:ltr">S<h2 style=";text-align:left;direction:ltr"> vg|flicker <h2 style=";text-align:left;direction:ltr"> ·g<h2 style=";text-align:left;direction:ltr"> m <h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> (A1, A2, T1, T2, T3) THE c =L elec +V ds / AND crit β=kT / q Q0=4βC si Among them, S vg|flicker is the flicker noise power spectral density, g m is the transconductance, A1 is the first multiplier parameter, A2 is the second multiplier parameter, T1 is the first parameter, T2 is the second parameter, T3 is the third parameter, f is the operating frequency, L c is the equivalent parameter of the conductive channel length, β is the temperature voltage equivalent, Q s is the source mobile charge density, Q d is the drain mobile charge density, C ox is the unit permittivity of the gate oxide layer, C si is the unit permittivity of silicon, ln(·) is the natural logarithmic function, Q0 is the first charge density parameter, μ eff is the effective carrier mobility, N ot is the number of trapped charges per unit area, W is the effective conductive channel width, L is the effective conductive channel length, V gseff is the effective voltage between the gate and source, A bulk is the system number, L elec is the electrical length of the conductive channel, V ds is the voltage applied between the drain and source, E crit is the critical electric field strength, k is the Boltzmann constant, T is the channel temperature, q is the charge of a single electron, μ0 is the carrier low-field mobility, θ1 is the first correction factor for carrier mobility, θ2 is the second correction factor for carrier mobility, V gs is the voltage applied between the gate and source, is the work function difference between the gate and intrinsic silicon, Q′ is the derivative of the channel charge density, V is the quasi-electron Fermi potential, n i is the intrinsic carrier concentration, t si is the thickness of the silicon material layer, B is the fourth parameter, I ds is the drain-source current, T 1，1 is the first calculation factor of the first parameter, T 1，2 is the second calculation factor of the first parameter, n is the slope factor, C is the fifth parameter, T 2，1 is the first calculation factor of the second parameter, T 2，2 is the second calculation factor of the second parameter, and arctg(·) is the inverse tangent function.

3. The method for constructing a FinFET device threshold voltage model according to claim 2, characterized in that: The temperature-threshold voltage equation in step S4 is: Among them, V th is the threshold voltage.

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