A power amplifier circuit and a radio frequency front-end module

Abstract

The present application discloses a power amplifier circuit and a radio frequency front-end module, relating to the technical field of electronic circuits. Among them, a power amplifier circuit includes: a signal input end, a signal output end, a first power amplification transistor, a first voltage dividing circuit, and a second voltage dividing circuit; one end of the second voltage dividing circuit is connected to the first node of the first power amplification transistor, and the other end of the second voltage dividing circuit is connected to the third node of the first power amplification transistor. The second voltage dividing circuit is configured to make the voltage difference between the first node and the third node of the first power amplification transistor decrease as the power of the amplified radio frequency signal increases, which can increase the magnitude of the current value of the radio frequency signal received by the first power amplification transistor, achieve an increase in the gain magnitude of the first power amplification transistor under the condition of a relatively large output power, avoid the phenomenon that its gain is prematurely compressed as the output power increases, and further optimize the linearity of the operation of the power amplifier circuit.

Description

Technical Field

[0001] This application belongs to the field of electronic circuit technology, and particularly relates to a power amplifier circuit and a radio frequency front-end module. Background Art

[0002] Nowadays, with the popularization of the fifth-generation mobile communication technology (5G), the performance requirements for power amplifier circuits are also getting higher and higher.

[0003] In the prior art, the design indexes of power amplifier circuits include output power, efficiency, gain, bandwidth, and linearity, etc. For mobile communication systems using linear modulation technology, any non-linearity of the power amplifier circuit is likely to generate unwanted frequency components and will affect the performance of the mobile communication system. For example, during the amplification of radio frequency signals by the power amplifier circuit, as the output power increases, the gain of the power amplifier circuit will exhibit premature compression, thereby affecting the linearity of the power amplifier circuit. Summary of the Invention

[0004] The embodiments of this application provide a power amplifier circuit and a radio frequency front-end module to solve the problem of poor linearity in the operation of power amplifier circuits in the prior art.

[0005] In a first aspect, the embodiments of this application provide a power amplifier circuit, including: a signal input end, a signal output end, a first power amplification transistor, a first voltage division circuit, and a second voltage division circuit; the signal input end is configured to receive a radio frequency signal, and the signal output end is configured to output the amplified radio frequency signal;

[0006] The first node of the first power amplification transistor is coupled to the signal input end, the second node of the first power amplification transistor is coupled to the signal output end, and the third node of the first power amplification transistor is connected to the ground end through the first voltage division circuit;

[0007] One end of the second voltage division circuit is connected to the first node of the first power amplification transistor, and the other end of the second voltage division circuit is connected to the third node of the first power amplification transistor;

[0008] The second voltage division circuit is configured to make the voltage difference between the first node and the third node of the first power amplification transistor decrease as the power of the amplified radio frequency signal increases.

[0009] Further, the second node of the first power amplification transistor is also used to connect to the power supply terminal.

[0010] Further, the first voltage dividing circuit includes a first resistor.

[0011] Further, the second voltage dividing circuit includes a first diode; an anode of the first diode is connected to a first node of the first power amplifying transistor, and a cathode of the first diode is connected to a third node of the first power amplifying transistor.

[0012] Further, the second voltage dividing circuit includes a first diode and a second resistor;

[0013] The anode of the first diode is connected to the first node of the first power amplifying transistor, the cathode of the first diode is connected to a first end of the second resistor, and a second end of the second resistor is connected to the third node of the first power amplifying transistor.

[0014] Further, when the first power amplifying transistor approaches or reaches a saturation state, the first diode is in a cut-off state.

[0015] Further, a resistance value of the second resistor is greater than a resistance value of the first resistor.

[0016] Further, the first power amplifying transistor is a BJT transistor, including a base, a collector, and an emitter. The base of the first power amplifying transistor is coupled to the signal input end; the collector of the first power amplifying transistor is coupled to the signal output end, and the emitter of the first power amplifying transistor is connected to a ground end through the first voltage dividing circuit.

[0017] Further, the power amplifying circuit further includes a second power amplifying transistor. A first node of the second power amplifying transistor is connected to a second node of the first power amplifying transistor, a second node of the second power amplifying transistor is connected to the signal output end, and a third node of the second power amplifying transistor is connected to the ground end.

[0018] In a second aspect, an embodiment of the present application further provides a radio frequency front-end module, including the power amplifying circuit provided in the first aspect.

[0019] The embodiment of the present application provides a power amplifier circuit and a radio frequency front-end module. Among them, a power amplifier circuit includes: a signal input end, a signal output end, a first power amplification transistor, a first voltage division circuit, and a second voltage division circuit; the signal input end is configured to receive a radio frequency signal, and the signal output end is configured to output an amplified radio frequency signal; since the first node of the first power amplification transistor is coupled to the signal input end, the second node of the first power amplification transistor is coupled to the signal output end, and the third node of the first power amplification transistor is connected to the ground end through the first voltage division circuit, the third node of the first power amplification transistor will change with the change of the Ibe current of the first power amplification transistor under the action of the first voltage division circuit. Also, because one end of the second voltage division circuit is connected to the first node of the first power amplification transistor and the other end of the second voltage division circuit is connected to the third node of the first power amplification transistor, the second voltage division circuit is configured to make the voltage difference between the first node and the third node of the first power amplification transistor decrease as the power of the amplified radio frequency signal increases. Thus, under the combined action of the first voltage division circuit and the second voltage division circuit, when the power of the amplified radio frequency signal output by the first power amplification transistor increases, the Ibe current of the first power amplification transistor will also increase accordingly, so that the voltage of the third node of the first power amplification transistor also increases. When the voltage of the first node of the first power amplification transistor remains unchanged, the voltage difference between the first node and the third node of the first power amplification transistor decreases, so that the current flowing from the first node of the first power amplification transistor to the first node through the second voltage division circuit decreases, and the current input to the first power amplification transistor for amplification increases, thereby increasing the gain of the first power amplification transistor when the power is close to the saturation state, avoiding the phenomenon that the gain of the first power amplification transistor is prematurely compressed as the output power increases, and further optimizing the linearity of the operation of the power amplifier circuit. Brief Description of the Drawings

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0021] Figure 1 is a schematic structural diagram of a power amplifier circuit provided by an embodiment of the present application;

[0022] Figure 2 is a schematic structural diagram of a power amplifier circuit provided by another embodiment of the present application;

[0023] Figure 3It is a specific circuit of a power amplifier circuit provided by an embodiment of the present application Figure 1 ;

[0024] Figure 4 It is a specific circuit of a power amplifier circuit provided by an embodiment of the present application Figure 2 ;

[0025] Figure 5 It is a schematic structural diagram of a radio frequency front-end module provided by an embodiment of the present application Detailed Description of the Invention

[0026] Next, the technical solutions in the embodiments of the present application will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application

[0027] Please refer to Figure 1 , Figure 1 It is a schematic structural diagram of a power amplifier circuit provided by an embodiment of the present application Figure 1 A power amplifier circuit 100 shown is applied to a radio frequency circuit

[0028] As Figure 1 shown, the power amplifier circuit 100 includes: a signal input terminal 10, a signal output terminal 20, a first power amplification transistor Q1, a first voltage division circuit 30, and a second voltage division circuit 40. Specifically:

[0029] The signal input terminal 10 is configured to receive a radio frequency signal, and the signal output terminal 20 is configured to output an amplified radio frequency signal

[0030] The first node P1 of the first power amplification transistor Q1 is coupled to the signal input terminal 10, the second node P2 of the first power amplification transistor Q1 is coupled to the signal output terminal 20, and the third node P3 of the first power amplification transistor Q1 is connected to the ground terminal through the first voltage division circuit 30

[0031] One end of the second voltage division circuit 40 is connected to the first node P1 of the first power amplification transistor Q1, and the other end of the second voltage division circuit 40 is connected to the third node P3 of the first power amplification transistor Q1

[0032] The second voltage division circuit 40 is configured to make the voltage difference between the first node P1 and the third node P3 of the first power amplification transistor Q1 decrease as the power of the amplified radio frequency signal increases

[0033] In this embodiment, the signal input terminal 10 is configured to receive a radio frequency signal. Since the first node P1 of the first power amplifying transistor Q1 is coupled to the signal input terminal 10, and one end of the second voltage dividing circuit 40 is connected to the first node P1 of the first power amplifying transistor Q1, a part of the current in the radio frequency signal is input into the first power amplifying transistor Q1 for amplification processing, and a part of the current is input into the second voltage dividing circuit 40. That is, while the first power amplifying transistor Q1 amplifies the power of the radio frequency signal, the second voltage dividing circuit 40 also shunts the equivalent current of the radio frequency signal. Also, since the third node P3 of the first power amplifying transistor Q1 is connected to the ground terminal through the first voltage dividing circuit 30, that is, the first voltage dividing circuit 30 is connected between the third node P3 of the first power amplifying transistor Q1 and the ground terminal, and one end of the second voltage dividing circuit 40 is connected to the first node P1 of the first power amplifying transistor Q1, and the other end of the second voltage dividing circuit 40 is connected to the third node P3 of the first power amplifying transistor Q1, the first voltage dividing circuit 30 and the second voltage dividing circuit 40 are commonly connected to the third node P3 of the first power amplifying transistor Q1. That is, the voltage value of the third node P3 of the first power amplifying transistor Q1 can be determined according to the magnitude of the Ibe current flowing through the first power amplifying transistor Q1 and the resistance value of the first voltage dividing circuit 30. At the same time, since the second voltage dividing circuit 40 is connected between the first node P1 and the third node P3 of the first power amplifying transistor Q1, the magnitude of the current I1 flowing through the second voltage dividing circuit 40 is affected by the voltage difference between the first node P1 and the third node P3.

[0034] As Figure 1 shown, the first node P1 of the first power amplifying transistor Q1 is coupled to the signal input terminal 10, and the second node P2 of the first power amplifying transistor Q1 is coupled to the signal output terminal 20. Since the third node P3 of the first power amplifying transistor Q1 is connected to the ground terminal through the first voltage dividing circuit 30, the voltage value at the third node P3 of the first power amplifying transistor Q1 is not equal to the ground terminal voltage value, and when the resistance value of the first voltage dividing circuit 30 remains unchanged, the voltage magnitude of the third node P3 of the first power amplifying transistor Q1 is related to the magnitude of the Ibe current of the first power amplifying transistor. The voltage of the third node P3 of the first power amplifying transistor Q1 increases as the Ibe current of the first power amplifying transistor increases, and decreases as the Ibe current of the first power amplifying transistor decreases.

[0035] It should be noted that in the actual application process, since connecting the first voltage dividing circuit 30 between the third node of the first power amplification transistor Q1 and the ground terminal will bring additional losses, thereby affecting the gain of the power amplification circuit, the application scenario of this application is mainly for the case where the gain of the power amplification circuit is relatively sufficient. By connecting the first voltage dividing circuit 30 between the third node of the first power amplification transistor Q1 and the ground terminal, the gain of the power amplification circuit can be flexibly adjusted. And because the first voltage dividing circuit 30 is connected, when the output power of the first power amplification transistor Q1 is relatively large, relatively large losses will be generated, resulting in the phenomenon that the gain of the first power amplification transistor is prematurely compressed when the output power is relatively large. Therefore, in this application, a second voltage dividing circuit 40 is connected between the first node and the third node of the first power amplification transistor Q1. The second voltage dividing circuit 40 can increase the gain of the first power amplification transistor when the output power is relatively large. Thus, under the combined action of the first voltage dividing circuit 30 and the second voltage dividing circuit 40, not only can the gain of the power amplification circuit be flexibly adjusted, but also the phenomenon that the gain of the first power amplification transistor is prematurely compressed as the output power increases can be avoided, thereby optimizing the linearity of the operation of the power amplification circuit.

[0036] In specific implementation, the first voltage dividing circuit 30 can be implemented by using an existing pure resistance circuit, so that the voltage from the third node P3 of the first power amplification transistor Q1 to the ground is not equal to 0, and the resistance value of the first voltage dividing circuit 30 is ensured to be unchanged. Furthermore, when the voltage value at the first node P1 remains unchanged, the voltage difference between the first node P1 and the third node P3 can also change. If the voltage from the third node P3 to the ground is equal to 0 and the voltage value at the first node P1 remains unchanged, then the voltage difference between the first node P1 and the third node P3 can only be constantly equal to the voltage value at the first node P1.

[0037] In this embodiment, since the second voltage dividing circuit 40 is connected between the first node P1 and the third node P3 of the first power amplification transistor Q1, when the second voltage dividing circuit 40 shunts the equivalent current in the radio frequency signal, the current value I1 passing through the second voltage dividing circuit 40 is affected by the voltage difference between the first node P1 and the third node P3 of the first power amplification transistor Q1. Specifically, when the voltage difference between the first node P1 and the third node P3 is larger, the current value passing through the second voltage dividing circuit 40 is higher; when the voltage difference between the first node P1 and the third node P3 is smaller, the current value passing through the second voltage dividing circuit 40 is smaller. It is easy to understand that in all embodiments of this application, the first node P1 and the third node P3 refer to the first node P1 and the third node P3 of the first power amplification transistor Q1.

[0038] In all embodiments of the present application, the magnitude of the Ibe current of the first power amplification transistor increases as the output power of the first power amplification transistor increases. The voltage value of the third node P3 is related to the magnitude of the Ibe current of the first power amplification transistor, and the voltage value of the third node P3 increases as the Ibe current of the first power amplification transistor increases. Since the voltage value of the first node P1 remains unchanged, the voltage value of the third node P3 affects the magnitude of the voltage difference between the first node P1 and the third node P3. When the magnitude of the current I of the radio frequency signal remains unchanged, the magnitude of the voltage difference between the first node P1 and the third node P3 affects the magnitude of the current value I1 passing through the second voltage dividing circuit 40.

[0039] It should be noted that the voltage value of the third node P3 is related to the amplification power of the first power amplification transistor Q1. During the process of gradually increasing the output power of the first power amplification transistor Q1, the radio frequency signal is amplified by the first power amplification transistor Q1, and the power of the amplified radio frequency signal also gradually increases. Therefore, the current value Ibe flowing through the first power amplification transistor Q1 also gradually increases. Since the resistance value of the first voltage dividing circuit 30 is also a constant, the voltage value of the third node P3 increases as the current value flowing through the first power amplification transistor Q1 increases, and at the same time, the voltage difference between the first node P1 and the third node P3 gradually decreases, causing the current value passing through the second voltage dividing circuit 40 to also gradually become smaller. Also, because the current value passing through the second voltage dividing circuit 40 also gradually becomes smaller, more current of the equivalent electrical signal of the radio frequency signal flows to the first power amplification transistor Q1, that is, the magnitude of the current value of the radio frequency signal received by the first power amplification transistor Q1 is increased, the gain magnitude of the first power amplification transistor Q1 when the output power increases is improved, the flatness of the output gain is ensured, and thus the linearity of the operation of the power amplification circuit is enhanced.

[0040] In some embodiments, the power amplification circuit 100 inputs a radio frequency signal through the signal input terminal 10 and outputs the amplified radio frequency signal through the signal output terminal 20. When the amplified radio frequency signal still cannot meet the signal output requirement, one or more secondary amplification circuits can be added to the power amplification circuit 100, and the secondary amplification circuit is used to further amplify the amplified radio frequency signal to meet the signal output requirement.

[0041] Figure 2 The figure shows a schematic structural diagram of a power amplification circuit provided by another embodiment of the present application. As Figure 2 shown, as an embodiment, as Figure 2As shown, the power amplifier circuit 100 further includes a second power amplifier transistor Q2. The first node of the second power amplifier transistor Q2 is connected to the second node P2 of the first power amplifier transistor Q2. The second node of the second power amplifier transistor Q2 is connected to the signal output terminal 20, and the third node of the second power amplifier transistor Q2 is connected to the ground terminal.

[0042] In this embodiment, the second power amplifier transistor Q2 is used to further amplify the amplified radio frequency signal to obtain a target radio frequency signal. Here, the second power amplifier transistor Q2 is equivalent to a secondary amplifier circuit, while the first voltage dividing circuit 30 and the second voltage dividing circuit 40 are arranged in the pre-stage amplifier circuit, that is, the first voltage dividing circuit 30, the second voltage dividing circuit 40, and the first power amplifier transistor Q1 form a pre-stage amplifier circuit.

[0043] In the solution of this embodiment, by forming a pre-stage amplifier circuit with the first voltage dividing circuit 30, the second voltage dividing circuit 40, and the first power amplifier transistor Q1, and then jointly forming the power amplifier circuit 100 with the secondary amplifier circuit where the second power amplifier transistor Q2 is located, while increasing the gain of the power amplifier circuit 100, it is possible to avoid the phenomenon of premature gain compression, and at the same time, it is possible to avoid excessive power loss caused by the addition of the first voltage dividing circuit 30 and the second voltage dividing circuit 40 in the circuit, making the applicable range of the power amplifier circuit wider.

[0044] Figure 3 The specific circuit of a power amplifier circuit provided by an embodiment of the present application is shown Figure 1 . As Figure 3 shown, as an embodiment, the second node P2 of the first power amplifier transistor Q1 is also used to connect to the power supply terminal VCC.

[0045] In this embodiment, the power supply terminal VCC is used to apply a working voltage to the second node P2 of the first power amplifier transistor Q1, so that while the first power amplifier transistor Q1 receives a radio frequency signal through the signal input terminal 10, a closed loop is formed with the ground terminal through the first voltage dividing circuit 30, realizing the conduction of the first power amplifier transistor Q1 based on the working voltage and the equivalent voltage of the radio frequency signal, and then amplifying the radio frequency signal and outputting the amplified radio frequency signal.

[0046] As an embodiment, the first voltage dividing circuit 30 includes a first resistor R1. Here, the first end of the first resistor R1 is connected to the third node P3 of the first power amplifier transistor Q1, and the second end of the first resistor R1 is connected to the ground terminal. Therefore, the voltage value of the third node P3 is equal to the product of the Ibe current value flowing through the first power amplifier transistor Q1 and the resistance value of the first resistor R1.

[0047] As Figure 3As shown, the first end of the first resistor R1 is also commonly connected to the third node P3 of the first power amplification transistor Q1 through a second voltage division circuit 40. When the equivalent current value of the radio frequency signal remains unchanged and the resistance value of the first resistor R1 remains unchanged, the voltage of the first node P1 of the first power amplification transistor Q1 remains unchanged. At this time, the voltage difference between the first node P1 and the third node P3 of the first power amplification transistor Q1 depends on the magnitude of the Ibe current flowing through the first power amplification transistor Q1. The first power amplification transistor Q1 amplifies and outputs the radio frequency signal. When the power of the amplified radio frequency signal is greater, the Ibe current value flowing through the first power amplification transistor Q1 is greater, and the voltage value of the third node P3 is higher. Correspondingly, the voltage difference between the first node P1 and the third node P3 is smaller, and the current flowing through the second voltage division circuit 40 is smaller.

[0048] As Figure 3 shown, as an embodiment, the second voltage division circuit 40 includes a first diode D1. The anode of the first diode D1 is connected to the first node P1 of the first power amplification transistor Q1, and the cathode of the first diode D1 is connected to the third node P3 of the first power amplification transistor Q1.

[0049] In this embodiment, due to the unidirectional conduction effect of the first diode D1, when a voltage is applied to the anode of the first diode D1, the current is input through the anode of the first diode D1 and flows out from the cathode of the first diode D1 to the third node P3 of the first power amplification transistor Q1.

[0050] In Figure 3 the embodiment shown, when the first power amplification transistor Q1 approaches or reaches the saturation state, the first diode D1 is in the cut-off state.

[0051] Here, the first power amplification transistor Q1 amplifies the input radio frequency signal. As the power of the amplified radio frequency signal increases, the first power amplification transistor Q1 gradually approaches or reaches the saturation state. Correspondingly, at this time, the Ibe current value flowing through the third node P3 of the first power amplification transistor Q1 also increases to approach the maximum current value, the voltage difference between the first node P1 and the third node P3 gradually decreases, and the current value from the first node P1 through the first diode D1 to the third node P3 gradually decreases. When the voltage difference between the first node P1 and the third node P3 gradually decreases to be less than the conduction voltage of the first diode D1, the first diode D1 is cut off. At this time, no current passes through the first diode D1 and is input to the third node P3 and the first resistor R1, and the equivalent current of the radio frequency signal is all transmitted to the power amplification transistor Q1 for amplification, thereby increasing the gain of the power amplification circuit 100 and improving the phenomenon of gain compression that occurs when the power amplification transistor Q1 approaches or reaches the saturation state. Preferably, the conduction voltage of the first diode D1 is equal to the conduction voltage of the first power amplification transistor Q1.

[0052] It is easy to understand that in addition to being implemented by a diode, the second voltage dividing circuit 40 can also be implemented by combining other voltage dividing components on the basis of the diode.

[0053] Figure 4 The specific circuit of a power amplification circuit provided by an embodiment of the present application is shown. Figure 2 . As Figure 4 shown, as an embodiment, the second voltage dividing circuit 40 includes: a first diode D1 and a second resistor R2.

[0054] The anode of the first diode D1 is connected to the first node P1 of the first power amplification transistor Q1, the cathode of the first diode D1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is connected to the third node P3 of the first power amplification transistor Q1.

[0055] In this embodiment, due to the unidirectional conduction effect of the first diode D1, when a voltage is applied to the anode of the first diode D1, the current is input through the anode of the first diode D1, flows out from the cathode of the first diode D1 to the second resistor R2, and then flows through the second resistor R2 to the third node P3 of the first power amplification transistor Q1.

[0056] In Figure 4 the embodiment shown, when the first power amplification transistor Q1 approaches or reaches the saturation state, the first diode D1 is in the cut-off state.

[0057] Here, the first power amplification transistor Q1 amplifies the input radio frequency signal. As the power of the amplified radio frequency signal increases, the first power amplification transistor Q1 gradually approaches or reaches the saturation state. Correspondingly, at this time, the Ibe current value flowing through the third node P3 of the first power amplification transistor Q1 also increases to approach the maximum current value, and the voltage difference between the first node P1 and the third node P3 gradually decreases. The current value from the first node P1 through the first diode D1 and the second resistor R2 to the third node P3 gradually decreases. When the voltage difference between the first node P1 and the third node P3 gradually decreases to be less than the conduction voltage of the first diode D1, the first diode D1 turns off. At this time, no current passes through the first diode D1 and the second resistor R2 to be input to the third node P3 and the first resistor R1, and the equivalent current of the radio frequency signal is all transmitted to the first power amplification transistor Q1 for amplification, thereby increasing the gain of the power amplification circuit 100 when the power is close to the saturation state, and thus improving the phenomenon of gain compression that occurs when the first power amplification transistor Q1 approaches or reaches the saturation state. Preferably, the conduction voltage of the first diode D1 is equal to the conduction voltage of the first power amplification transistor Q1.

[0058] In all embodiments of the present application, in order to prevent the first power amplification transistor Q1 from being short-circuited, the equivalent resistance value of the second voltage dividing circuit 40 is greater than the equivalent resistance value of the first voltage dividing circuit 30. Correspondingly, in Figure 4 the illustrated example, the resistance value of the second resistor R2 is greater than the resistance value of the first resistor R1. In the actual application process, if the resistance value of the first resistor R1 is too large, it will cause too much loss of the first power amplification transistor Q1. If the resistance value of the second resistor R2 is too small, it cannot play a good voltage dividing role. Therefore, preferably, in this embodiment, the second resistor R2 is a resistor with a relatively large resistance value, generally several thousand ohms, and the first resistor R1 is a resistor with a relatively small resistance value, generally several ohms.

[0059] As a possible implementation manner of this embodiment, the first power amplification transistor Q1 is a BJT transistor, including a base, a collector, and an emitter. The base of the first power amplification transistor Q1 is coupled to the signal input terminal; the collector of the first power amplification transistor Q1 is coupled to the signal output terminal, and the emitter of the first power amplification transistor Q1 is connected to the ground terminal through the first voltage dividing circuit 30.

[0060] It is easy to understand that in Figure 3 or Figure 4In the illustrated example, the first voltage dividing circuit 30 includes a first resistor R1. Here, the first resistor R1 can be regarded as the specific implementation circuit of the first voltage dividing circuit 30 or the equivalent resistance circuit of the first voltage dividing circuit 30. That is, in specific implementation, a pure resistance circuit equivalent to the first resistor R1 can be used for implementation. Correspondingly, it can be understood that the emitter of the first power amplification transistor Q1 is connected to the ground terminal through the first voltage dividing circuit 30, which is equivalent to the emitter of the first power amplification transistor Q1 being connected to the ground terminal through the first resistor R1.

[0061] The following combines Figures 1 to 4 , and details the working principle of the power amplification circuit 100 provided in this embodiment. Specifically:

[0062] As Figures 1 to 4 shown, let the equivalent current of the radio frequency signal received by the signal input terminal 10 be I. Assuming that a part of the current flowing through the second voltage dividing circuit 40 is I1, then I is greater than I1. And the current value of this part of the current I1 is affected by the voltage difference between the first node P1 and the third node P3.

[0063] In Figure 3 or Figure 4 , let the current flowing through the first power amplification transistor Q1 be Ibe, the voltage of the first node P1 of the first power amplification transistor Q1 be the equivalent voltage V1 of the radio frequency signal. Assuming that the resistance value of the first resistor R1 is R, when the first power amplification transistor Q1 is turned on, the voltage V2 of the third node P3 of the first power amplification transistor Q1 = Ibe × R.

[0064] When the output power of the power amplification circuit 100 increases, the current Ibe flowing through the first power amplification transistor Q1 increases. Since the voltage V2 of the third node P3 of the first power amplification transistor Q1 = Ibe × R, on the premise that the resistance value R of the first resistor R1 remains unchanged, the voltage V2 of the third node P3 of the first power amplification transistor Q1 increases as the current Ibe flowing through the first power amplification transistor Q1 increases. Since the voltage V1 of the first node P1 of the first power amplification transistor Q1 is the equivalent electrical signal voltage of the radio frequency signal and V1 is a fixed value or a constant, the voltage difference V = V1 - V2 between the first node P1 and the third node P3 decreases as V2 increases. At this time, the current I1 from the first node P1 of the first power amplification transistor Q1 through the second voltage dividing circuit 40 to the third node P3 of the first power amplification transistor Q1 decreases. When the equivalent current I of the radio frequency signal remains unchanged, the current I - I1 input to the first power amplification transistor Q1 increases, and the gain of the power amplification circuit 100 also increases accordingly, thus avoiding the situation that the gain of the power amplification circuit is prematurely compressed as the output power increases, and further improving the linearity of the power amplification circuit.

[0065] In Figure 3 During the process of the first power amplifier transistor Q1 amplifying the input radio frequency signal, when the first power amplifier transistor Q1 operates near or reaches the saturation state, the power of the amplified radio frequency signal increases. Correspondingly, the current value flowing through the third node P3 of the first power amplifier transistor Q1 increases, the voltage difference between the first node P1 and the third node P3 gradually decreases, and the current value from the first node P1 through the first diode D1 to the third node P3 gradually decreases. When the voltage difference between the first node P1 and the third node P3 is less than the conduction voltage of the first diode D1, the first diode D1 is cut off. At this time, no current passes through the first diode D1 and is input to the third node P3 and the first resistor R1, and the equivalent current of the radio frequency signal is all transmitted to the power amplifier transistor Q1 for amplification. At this time, the gain of the power amplifier circuit 100 is the largest, avoiding the phenomenon of premature gain compression.

[0066] In Figure 4 During the process of the first power amplifier transistor Q1 amplifying the input radio frequency signal, when the first power amplifier transistor Q1 approaches or reaches the saturation state, the power of the amplified radio frequency signal increases. Correspondingly, the current value flowing through the third node P3 of the first power amplifier transistor Q1 increases, the voltage difference between the first node P1 and the third node P3 gradually decreases, and the current value from the first node P1 through the first diode D1 and the second resistor R2 to the third node P3 gradually decreases. When the voltage difference between the first node P1 and the third node P3 is less than the conduction voltage of the first diode D1, the first diode D1 is cut off. At this time, no current passes through the first diode D1 and the second resistor R2 and is input to the third node P3 and the first resistor R1, and the equivalent current of the radio frequency signal is all transmitted to the first power amplifier transistor Q1 for amplification. At this time, the gain of the power amplifier circuit 100 is the largest, thus avoiding the phenomenon of premature gain compression.

[0067] Based on Figures 1 to 4 any one of the embodiments Figure 5 shows a schematic structural diagram of a radio frequency front-end module provided in another embodiment of the present application. As Figure 5 shown, the radio frequency front-end module 200 includes the power amplifier circuit 100 in the above solution.

[0068] It can be understood that since a radio frequency front-end module 200 provided in this embodiment, the content related to the present application and the implementation manner have been described in detail in the embodiment content of the above power amplifier circuit 100, so it will not be repeated here.

[0069] The units in the terminal of the embodiment of the present application can be combined, divided, and deleted according to actual needs.

[0070] The above are only the specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A power amplifier circuit, characterized in that, Comprising: A signal input terminal, a signal output terminal, a first power amplification transistor, a first voltage division circuit, and a second voltage division circuit; the signal input terminal is configured to receive a radio frequency signal, and the signal output terminal is configured to output an amplified radio frequency signal; A first node of the first power amplification transistor is coupled to the signal input terminal, a second node of the first power amplification transistor is coupled to the signal output terminal, and a third node of the first power amplification transistor is connected to a ground terminal through the first voltage division circuit; One end of the second voltage division circuit is connected to the first node of the first power amplification transistor, and the other end of the second voltage division circuit is connected to the third node of the first power amplification transistor; The second voltage division circuit is configured to cause the voltage difference between the first node and the third node of the first power amplification transistor to decrease as the power of the amplified radio frequency signal increases; The second voltage division circuit includes a first diode; an anode of the first diode is connected to the first node of the first power amplification transistor, and a cathode of the first diode is connected to the third node of the first power amplification transistor; When the first power amplification transistor is close to or reaches the saturation state, the first diode is in the cut-off state.

2. The power amplifier circuit according to claim 1, wherein The second node of the first power amplification transistor is further configured to be connected to a power supply terminal.

3. The power amplifier circuit according to claim 1, characterized in that The first voltage division circuit includes a first resistor.

4. The power amplifier circuit according to claim 1, characterized in that, The second voltage division circuit further includes a second resistor; The anode of the first diode is connected to the first node of the first power amplification transistor, the cathode of the first diode is connected to a first end of the second resistor, and a second end of the second resistor is connected to the third node of the first power amplification transistor.

5. The power amplification circuit according to claim 4, wherein The first voltage division circuit includes a first resistor, and the resistance value of the second resistor is greater than the resistance value of the first resistor.

6. The power amplifier circuit according to claim 1, wherein The first power amplification transistor is a BJT transistor, including a base, a collector, and an emitter. The base of the first power amplification transistor is coupled to the signal input terminal; the collector of the first power amplification transistor is coupled to the signal output terminal, and the emitter of the first power amplification transistor is connected to the ground terminal through the first voltage division circuit.

7. The power amplifier circuit according to claim 1, wherein It further includes a second power amplification transistor. A first node of the second power amplification transistor is connected to the second node of the first power amplification transistor, a second node of the second power amplification transistor is connected to the signal output terminal, and a third node of the second power amplification transistor is connected to the ground terminal.

8. A radio frequency front-end module, characterized in that, Comprising the power amplification circuit according to any one of claims 1 to 7.

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