element

Abstract

An element in which a first conductor layer, a dielectric layer, and a second conductor layer are stacked in this order has a coupling line connected to the second conductor layer to synchronize a plurality of antennas with each other at a terahertz wave frequency, and a bias line connected to the second conductor layer for supplying a bias signal to the semiconductor layer. In this case, a wiring layer in which the coupling line is provided and a wiring layer in which the bias line is provided are different layers.

Description

Technical Field

[0001] This invention relates to an element. Background Technology

[0002] As a current-injection type light source for generating electromagnetic waves (hereinafter referred to as "terahertz waves") in a frequency range of at least 30 GHz and not exceeding 30 THz, an oscillator is known in which a semiconductor element having electromagnetic wave gain for terahertz waves and a resonator are integrated. In such an oscillator, it is desirable for the oscillator, in which a resonant tunneling diode (RTD) and an antenna are integrated, to be a component that operates at room temperature in a frequency range of about 1 THz.

[0003] PTL 1 discloses an antenna array for terahertz waves in which multiple oscillators are arranged on the same substrate, wherein each oscillator integrates an RTD and an antenna.

[0004] [List of Citations]

[0005] [Patent Literature]

[0006] [PTL 1] Japanese Patent Application Publication No. 2014-200065

[0007] [Non-patent literature]

[0008] [NPL 1] Jpn. J. Appl. Phys., Vol. 47, No. 6 (2008), pp. 4375-4384. Summary of the Invention

[0009] [Technical Issues]

[0010] In the antenna array disclosed in PTL 1, an increase in antenna gain can be expected by increasing the number of antennas and synchronizing them. On the other hand, coupling lines are needed to couple adjacent antennas to synchronize the oscillators, and bias lines are needed to supply bias signals to the RTD. Therefore, as the number of antennas increases, the risk of electrical and mechanical interference between the coupling lines and bias lines of each antenna increases. Consequently, the limited number of antennas that can be arranged results in a limited effect on increasing power and gain through the antenna array, making it impossible to efficiently generate and detect terahertz waves.

[0011] In view of the above problems, one object of the present invention is to provide efficient generation or detection of terahertz waves in an element having an antenna array structure.

[0012] [Solution to the problem]

[0013] The first aspect of the present invention is:

[0014] Components, including:

[0015] Antenna array, wherein multiple antennas are arranged, each antenna including

[0016] First conductor layer,

[0017] A semiconductor layer, electrically connected to the first conductor layer, generates or detects terahertz waves.

[0018] The second conductor layer is electrically connected to the semiconductor layer and faces the first conductor layer via the semiconductor layer.

[0019] A dielectric layer is located between the first conductor layer and the second conductor layer;

[0020] The coupling line, connected to the second conductor layer, is configured to synchronize multiple antennas at terahertz wave frequencies; and

[0021] The bias line connects the power supply used to supply bias signals to the semiconductor layer to the second conductor layer, wherein...

[0022] The routing layer that forms the coupling line and the routing layer that forms the bias line are different layers.

[0023] The second aspect of the invention is:

[0024] Components, including:

[0025] Antenna array, wherein multiple antennas are arranged, each antenna including

[0026] First conductor layer,

[0027] A semiconductor layer, electrically connected to the first conductor layer, generates or detects terahertz waves.

[0028] The second conductor layer is electrically connected to the semiconductor layer and faces the first conductor layer via the semiconductor layer.

[0029] A dielectric layer is located between the first conductor layer and the second conductor layer;

[0030] Leads, connected to the second conductor layer of each antenna and narrower than the width of the antenna; and

[0031] The bias line connects to the power supply used to supply bias signals to the semiconductor layer, wherein...

[0032] A bias line is a common bias line set between adjacent antennas in an antenna array, and

[0033] The bias signal is supplied to the semiconductor layer of each antenna through the connection between the common bias line and the leads drawn from each of the adjacent antennas.

[0034] The third aspect of the present invention is:

[0035] A method for manufacturing an element, the element comprising an antenna array having a plurality of antennas arranged thereon, the method comprising:

[0036] The step of forming a semiconductor layer on a substrate to generate or detect terahertz waves;

[0037] The step of forming a first conductor layer on a substrate;

[0038] The steps to form a dielectric layer;

[0039] The step of forming a bias line, which connects a power supply for supplying a bias signal to a semiconductor layer to a second conductor layer;

[0040] The steps for forming the second and third conductor layers; and

[0041] The step of forming a coupling line, which is used to synchronize multiple antennas at terahertz wave frequencies, involves connecting to a second conductor layer and having a structure in which a dielectric layer is intermediate between a first conductor layer and a third conductor layer.

[0042] The wiring layer forming a portion of the coupling line extending in the plane of the substrate and the wiring layer forming a portion of the bias line extending in the plane of the substrate are different layers.

[0043] The fourth aspect of the present invention is:

[0044] Components, including:

[0045] Antenna array, wherein multiple antennas are arranged, each antenna including

[0046] First conductor layer,

[0047] A semiconductor layer, electrically connected to the first conductor layer, generates or detects terahertz waves.

[0048] The second conductor layer is electrically connected to the semiconductor layer and faces the first conductor layer via the semiconductor layer.

[0049] A dielectric layer is located between the first conductor layer and the second conductor layer;

[0050] A first conductor is disposed between the second conductor layers; and

[0051] The second wire, electrically connected to the power supply for supplying signals to the semiconductor layer and the second conductor layer, has a portion thicker than the first wire.

[0052] In the case of a virtual plane including a first conductor layer, the distance between the first conductor and the virtual plane is different from the distance between the second conductor and the virtual plane.

[0053] [Beneficial effects of the invention]

[0054] According to the present invention, efficient generation or detection of terahertz waves can be provided in elements having an antenna array structure. Attached Figure Description

[0055] Figure 1A This is a diagram illustrating a semiconductor element according to the first embodiment.

[0056] Figure 1B This is a diagram illustrating a semiconductor element according to the first embodiment.

[0057] Figure 1C This is a diagram illustrating a semiconductor element according to the first embodiment.

[0058] Figure 2 This is a top view of a semiconductor element according to the first embodiment.

[0059] Figure 3 This is a graph showing the relationship between dielectric layer thickness and conductor loss.

[0060] Figure 4A This is a diagram illustrating a semiconductor element according to the second embodiment.

[0061] Figure 4B This is a diagram illustrating a semiconductor element according to the second embodiment.

[0062] Figure 4C This is a diagram illustrating a semiconductor element according to the second embodiment.

[0063] Figure 5A This is a diagram illustrating a semiconductor element according to a third embodiment.

[0064] Figure 5B This is a diagram illustrating a semiconductor element according to a third embodiment.

[0065] Figure 5C This is a diagram illustrating a semiconductor element according to a third embodiment.

[0066] Figure 6A This is a diagram illustrating a semiconductor element according to the fourth embodiment.

[0067] Figure 6B This is a diagram illustrating a semiconductor element according to the fourth embodiment.

[0068] Figure 6C This is a diagram illustrating a semiconductor element according to the fourth embodiment.

[0069] Figure 7 This is a diagram illustrating a semiconductor element according to the fourth embodiment.

[0070] Figure 8 A to Figure 8C is a diagram illustrating a semiconductor element according to the fourth embodiment.

[0071] Figure 9 A and Figure 9 B is a diagram illustrating an oscillating element according to the fifth embodiment.

[0072] Figure 10 This is a diagram illustrating the oscillating element according to the second example.

[0073] Figure 11 A and Figure 11 B is a diagram illustrating the oscillating element according to the second example.

[0074] Figure 12 This is a graph showing the relationship between the third conductor layer and the oscillation frequency.

[0075] Figure 13 A to Figure 13 C is a graph showing the effect of the oscillation output of the oscillating element.

[0076] Figure 14 This is a graph showing the oscillation output of the oscillating element and a single antenna according to the second example.

[0077] Figure 15 This is a flowchart illustrating a method for manufacturing an oscillating element according to the second example.

[0078] Figure 16 A to Figure 16 H is a diagram illustrating the steps of manufacturing the oscillating element according to the second example.

[0079] Figure 17 A is a diagram illustrating the oscillating element according to the third example; and Figure 17 B is a diagram illustrating the oscillating element according to the fourth example. Specific Implementation

[0080] <First Embodiment>

[0081] Reference Figures 1A to 1C as well as Figure 2 A semiconductor element 100 according to a first embodiment is described. The semiconductor element 100 generates a frequency of f. THz A semiconductor device that oscillates terahertz waves or detects terahertz waves. Figure 1A This is a perspective view illustrating the appearance of semiconductor element 100. Figure 1B It is a cross-sectional view of semiconductor element 100 taken along line A-A', and Figure 1C This is a cross-sectional view of semiconductor element 100 taken along line B-B'. Figure 2This is a top view of the semiconductor element 100 viewed from above, in the stacking direction of the semiconductor elements. Note that in the following description, an example of the semiconductor element 100 used as an oscillator will be described. Here, terahertz waves are electromagnetic waves in a frequency range of at least 30 GHz and not exceeding 30 THz. Furthermore, the length of each of the components of the semiconductor element 100, such as substrate 113, dielectric layer 104, and semiconductor layer 115, in the stacking direction of the components is referred to as "thickness" or "height". Additionally, the orientation of the dielectric layer 104 and semiconductor layer 115 relative to substrate 113 is referred to as "upper part".

[0082] Semiconductor element 100 is provided with multiple antennas. In this embodiment, semiconductor element 100 includes an antenna array in which nine antennas 100a, 100b, 100c, 100d, 100e, 100f, 100g, 100h, and 100i are arranged in a 3×3 matrix. Antenna 100a also serves as a resonator for resonating with terahertz waves and as a radiator for transmitting or receiving terahertz waves. Antenna 100a has a semiconductor layer 115a internally for generating oscillating electromagnetic waves or detecting electromagnetic waves of terahertz waves. Each of the other eight antennas 100b to 100i has the same configuration as antenna 100a. In addition, the antennas can be arranged with a pitch not greater than the wavelength of the terahertz wave to be detected or generated, or an integer multiple of the wavelength.

[0083] The configuration of antenna 100a will be described in detail below, and detailed descriptions of the components of other antennas 100b to 100i that are identical or similar to those of antenna 100a will be omitted. Furthermore, throughout the description, a letter corresponding to the antenna will be appended to the end of the reference numerals for each component of antennas 100a to 100i. For example, in the second conductor layer 103, the corresponding component of antenna 100a is designated as second conductor layer 103a.

[0084] [antenna]

[0085] Antenna 100a has a dielectric layer 104 configured between two conductor layers (wiring layers), a first conductor layer 106 and a second conductor layer 103a. This configuration is referred to as a microstrip antenna using microstrip lines of finite length, etc. In this embodiment, an example using a patch antenna as a microstrip resonator will be described.

[0086] The second conductor layer 103a is a patch conductor for the antenna 100a, configured to face the first conductor layer 106 via the dielectric layer 104 (semiconductor layer 115a). The second conductor layer 103a is electrically connected to the semiconductor layer 115a. The antenna 100a is configured such that the width of the second conductor layer 103a in the A-A' direction (resonance direction) is λ. THz / 2 resonator operation. The first conductor layer 106 is an electrically grounded ground conductor. Note that λ THz It is the effective wavelength of the terahertz wave resonating in dielectric layer 104 of antenna 100a, and it is denoted as λ. THz =λ0×ε r -1 / 2 Where λ0 is the wavelength of the terahertz wave in vacuum, and ε r It is the effective relative permittivity of dielectric layer 104.

[0087] Semiconductor layer 115a includes an active layer 101a, which is composed of a semiconductor layer that has electromagnetic wave gain or nonlinearity for terahertz waves. Resonant tunneling diodes (RTDs) are known as typical semiconductor layers with electromagnetic wave gain in the terahertz wave frequency band. In this embodiment, an example using an RTD as the active layer 101a will be described. Hereinafter, the active layer 101a will be referred to as RTD 101a.

[0088] RTD 101a includes a resonant tunneling structure layer comprising multiple tunneling barrier layers, with quantum well layers disposed between the multiple tunneling barriers, and has a multi-quantum well structure in which terahertz waves are generated by inter-subband transitions of charge carriers. RTD 101a exhibits electromagnetic wave gain in the terahertz wave frequency range based on photon-assisted tunneling in the differential negative resistance region of the current-voltage characteristics, and self-oscillates in the differential negative resistance region.

[0089] Antenna 100a is an active antenna integrating a semiconductor layer 115a including RTD 101a and a patch antenna. The frequency f of the terahertz wave emitted from antenna 100a is... THz The resonant frequency is determined solely by the resonant frequency of the fully parallel resonant circuit, which incorporates the patch antenna and the reactance of semiconductor layer 115a. Specifically, based on the equivalent circuit of the oscillator described in NPL 1, the admittance (Y) of the circuit in which the RTD and antenna are combined is determined. RTD and Y aa The resonant circuit satisfies the condition of amplitude (expressed by Equation 1) and phase (expressed by Equation 2), and the frequency is determined as the oscillation frequency f. THz .

[0090] Re[Y RTD ] + Re[Y aa ] ≤ 0 (Equation 1)

[0091] Im[Y RTD ] + Im[Y aa ] = 0 (Equation 2)

[0092] Here, Y RTDRe is the admittance of semiconductor layer 115a, where Re is the real part and Im is the imaginary part. Semiconductor layer 115a includes RTD 101a as an active layer, which serves as a negative resistive element; therefore, Re[Y] is the admittance of semiconductor layer 115a. RTD Y has negative values. Additionally, Y... aa Indicates the admittance of the overall structure of the patch antenna 100a as seen from the semiconductor layer 115a.

[0093] Note that, as the active layer 101a, a quantum cascade laser (QCL) structure with a semiconductor multilayer structure comprising hundreds to thousands of layers can be used. In this case, semiconductor layer 115a is a semiconductor layer comprising a QCL structure. Alternatively, as the active layer 101a, negative resistance elements such as Gunn diodes or IMPATT diodes, which are commonly used in the millimeter-wave band, can be used. Furthermore, as the active layer 101a, high-frequency elements such as transistors with a single terminal termination can be used, and suitable transistors include heterojunction bipolar transistors (HBTs), compound semiconductor layer FETs, and high electron mobility transistors (HEMTs). Additionally, as the active layer 101a, a differential negative resistor using a Josephson element employing a superconducting layer can be used.

[0094] The dielectric layer 104 consists of two layers: a first dielectric layer 1041 and a second dielectric layer 1042. In microstrip resonators such as patch antennas, the large thickness of the dielectric layer 104 reduces conductor losses and improves radiation efficiency. The dielectric layer 104 is required to have a possible thick film (typically 3 μm or greater), low loss and low dielectric constant in the terahertz band, and high ease of microfabrication (planarization and etching). Here, radiation efficiency increases with increasing dielectric layer 104 thickness, but if the thickness is too large, multimode resonance may occur. Therefore, the thickness of the dielectric layer 104 is preferably designed to be within the range of 1 / 10 of the oscillation wavelength. On the other hand, since miniaturized, high-current-density diodes are needed to increase the frequency and output of the oscillator, the dielectric layer 104 needs to prevent current leakage and address migration in order to serve as an insulating structure for the diode. In this embodiment, to achieve the above two objectives, the first dielectric layer 1041 and the second dielectric layer 1042 use two types of dielectric layers with different materials.

[0095] Specific examples of materials preferably used for the first dielectric layer 1041 include organic dielectric materials, such as BCB (benzocyclobutene, available from Dow Chemical Company, ε r1 = 2) Polytetrafluoroethylene or polyimide. Here, ε r1It is the relative permittivity of the first dielectric layer 1041. Alternatively, inorganic dielectric materials such as TEOS oxide films or spin-coated glass, which are capable of forming relatively thick films and have low permittivity, can be used for the first dielectric layer 1041.

[0096] Additionally, the second dielectric layer 1042 needs to possess insulating properties (acting as an insulator that is non-conductive when a DC voltage is applied and as a high-resistance resistor), barrier properties (preventing the diffusion of metallic materials used for the electrodes), and processability (the ability to be processed with sub-micron accuracy). Specific examples of materials preferably used to satisfy these properties include silicon oxide (ε-) r2 =4), Silicon nitride (ε r2 =7), Inorganic insulating materials such as alumina and aluminum nitride. Here, ε r2 It is the relative permittivity of the second dielectric layer 1042.

[0097] Here, when the dielectric layer 104 has a two-layer structure as in this embodiment, the relative permittivity ε of the dielectric layer 104 is... r It is determined by the thickness of the first dielectric layer 1041 and the relative permittivity ε. r1 The thickness and relative permittivity ε of the second dielectric layer 1042 r2 The effective relative permittivity is determined. Furthermore, from the viewpoint of impedance matching between the antenna and space, it is preferable that the difference in permittivity between the antenna and air is small. Therefore, the first dielectric layer 1041 is made of a material different from that of the second dielectric layer 1042, and the relative permittivity of this material is preferably lower than that of the second dielectric layer 1042 (ε). r1 < ε r2 Note that in semiconductor element 100, dielectric layer 104 does not necessarily have a two-layer structure, and may have a structure consisting of only one layer made of the aforementioned material.

[0098] A semiconductor layer 115a is disposed on a first conductor layer 106 formed on a substrate 113. The semiconductor layer 115a and the first conductor layer 106 are electrically connected to each other. Note that, to reduce ohmic losses, the semiconductor layer 115a and the first conductor layer 106 are preferably connected with low resistance. An electrode 116a is disposed on the side opposite to the side where the first conductor layer 106 is disposed, and the electrode 116a and the semiconductor layer 115a are electrically connected to each other. The semiconductor layer 115a and the electrode 116a are embedded in and surrounded by a second dielectric layer 1042.

[0099] If electrode 116a is a conductor making ohmic contact with semiconductor layer 115a, then it is suitable to reduce ohmic losses and RC delay due to series resistance. Examples of preferred materials for electrode 116a used as an ohmic electrode include Ti / Pd / Au, Ti / Pt / Au, AuGe / Ni / Au, TiW, Mo, ErAs, etc. Furthermore, if the region of semiconductor layer 115a in contact with electrode 116a is a semiconductor with a high concentration of doped impurities, then the contact resistance becomes low, which is suitable for high output and high frequency. Since the absolute value of the negative resistance, which indicates the gain of RTD 101a used in the terahertz band, is on the order of approximately 1Ω to 100Ω, it is preferable to suppress electromagnetic wave losses to 1% or less. Therefore, as a guideline, it is preferable to design the contact resistance of the ohmic electrode to have 1Ω or less. Additionally, for operation in the terahertz band, the width of semiconductor layer 115a (which is almost equal to electrode 116a) is typically approximately 0.1μm to 5μm. Therefore, the resistivity of the contact interface between the semiconductor layer 115a and the electrode 116a is preferably set to 10 Ω∙μm. 2 Or even smaller, to suppress the contact resistance to the range of 0.001Ω to a few Ω.

[0100] Alternatively, it is conceivable to use a metal that forms a Schottky contact with electrode 116a instead of an ohmic contact. In this case, the contact interface between electrode 116a and semiconductor layer 115a presents rectification, and antenna 100a has a suitable structure as a terahertz wave detector. In the following, in this embodiment, the configuration using an ohmic electrode as electrode 116a will be described.

[0101] like Figure 1B As shown, inside the antenna 100a arranged above and below the RTD 101a, the substrate 113, the first conductor layer 106, the semiconductor layer 115a, the electrode 116a, the conductor 117a, and the second conductor layer 103a are stacked in sequence.

[0102] Conductor 117a is formed inside dielectric layer 104. Second conductor layer 103a and electrode 116a are electrically connected to each other via conductor 117a. Here, if the width of conductor 117a is too large, the radiation efficiency decreases due to the deterioration of the resonant characteristics of patch antenna 100a and the increase of parasitic capacitance. Therefore, the width of conductor 117a preferably has a size that does not interfere with the resonant electric field, and is typically a value corresponding to the oscillation frequency residing in antenna 100a. THzThe effective wavelength λ of the terahertz wave is 1 / 10 or less. Additionally, the width of conductor 117a can be reduced to the extent that it does not increase the series resistance, and as a guideline, it can be reduced to approximately twice the skin depth. Considering that the series resistance is reduced to no more than 1 Ω, as a guideline, the width of conductor 117a is typically in the range of at least 0.1 μm and no more than 20 μm.

[0103] The second conductor layer 103a is electrically connected to lines 108a1 and 108a2 via conductors 107a1 and 107a2. Furthermore, lines 108a1 and 108a2 are leads electrically connected to the bias circuit 120 via bias line 111, which is a common conductor formed in the chip. Lines 108 are each led out from the antenna. The bias circuit 120 is a power supply for supplying a bias signal to the RTD 101a of the antenna 100a. Therefore, the bias signal is supplied to the semiconductor layer 115 of each antenna through the connection between the bias line 111 and the lines 108, which are leads from adjacent antennas. Since the bias line 111 is shared, variations in operating voltage between antennas can be reduced, allowing for stable synchronization even with an increase in the number of antennas in the array. Furthermore, the structure around each antenna can be made symmetrical, thus preventing distortion of the radiation pattern.

[0104] Conductors 107a1 and 107a2 are connection portions used to electrically and mechanically connect lines 108a1 and 108a2 to the second conductor layer 103a. Structures electrically connecting the upper and lower layers, such as conductors 117a, 107a1, or 107a2, are referred to as vias. The first conductor layer 106 and the second conductor layer 103a serve not only as components constituting the patch antenna but also as electrodes for injecting current into the RTD 101a through the vias connected to them. For conductor 117a, which serves as a via, and conductors 107a1 and 107a2, conductors with a resistivity of 1×10⁻⁶ are preferably used. -6 Materials with Ω·m or less. Specifically, examples of preferred materials include metals such as Ag, Au, Cu, W, Ni, Cr, Ti, Al, AuIn alloys and TiN, and their compounds.

[0105] The width of each of conductors 107a1 and 107a2 is smaller than the width of the second conductor layer 103a. The width referred to herein is the width in the electromagnetic wave resonance direction (=A-A' direction) of the antenna 100a. Furthermore, the width of the portion of line 108a1 (line 108a2) connecting to conductor 107a1 (conductor 107a2) (the connecting portion) is smaller (narrower) than the width of the second conductor layer 103a (antenna 100a). Additionally, these widths are each preferably such that the oscillation frequency residing in the antenna 100a is f.THz The effective wavelength λ of the terahertz wave is 1 / 10 or smaller (λ / 10 or smaller). This is because, in order to improve radiation efficiency, the dimensions and positions of conductors 107a1, 107a2 and lines 108a1, 108a2 are preferably arranged such that they do not interfere with the resonant electric field in antenna 100a.

[0106] Furthermore, preferably, the positions of conductors 107a1 and 107a2 are arranged in the antenna 100a such that the residing oscillation frequency is f. THz In the electric field node of the terahertz wave. In this case, conductors 107a1, 107a2 and lines 108a1, 108a2 have an oscillation frequency f THz The impedance in the nearby frequency band is configured to be sufficiently higher than the absolute value of the differential negative resistance of RTD 101a. In other words, lines 108a1 and 108a2 are connected to an antenna other than antenna 100a so that at the oscillation frequency f THz The impedance to the RTD is high. In this case, other antennas and antenna 100a have high impedance at frequency f. THz They are isolated (separated) in the path via bias line 111. Therefore, an oscillation frequency f is induced in each antenna via bias line 111 and bias circuit 120. THz The current will not affect adjacent antennas. Furthermore, the oscillation frequency f residing in antenna 100a is suppressed. THz The electric field interferes with these feeding components. This also applies to the other antennas 100b to 100i and antenna 100a in semiconductor element 100.

[0107] Bias line 111 is a common bias line (wiring layer) for antennas 100a to 100i. Each of antennas 100a to 100i is connected to bias line 111 via one of lines 108a1, 108a2 to 108i1, 108i2 connected to one of antennas 100a to 100i. Figure 1B and Figure 1C In the illustration, bias line 111 is shown, wherein the conductors in the A-A' direction (resonance direction) are marked with 111x1 to 111x4, and the conductors in the B-B' direction are marked with 111y1 to 111y4. Note that in this description, the entire bias common conductor for semiconductor element 100 is referred to as bias line 111.

[0108] Bias circuit

[0109] The bias circuit 120 is located outside the chip to supply a bias signal to the power supply of the RTDs 101a to 101i. The bias circuit 120 includes a shunt resistor 121, a wire 122, a power supply 123, and a capacitor 124 (a capacitor connected in parallel with the shunt resistor 121) connected in parallel with each of the RTDs 101a to 101i.

[0110] Wire 122 in Figure 1A The circuit is shown as an inductor because it always has a parasitic inductance component. Power supply 123 supplies the current required to drive each of the RTDs 101a to 101i and adjusts the bias voltage applied to each of the RTDs 101a to 101i. The bias voltage is typically selected from the voltage in the differential negative resistance region of the RTDs 101a to 101i. Bias circuit 120 is connected to bias line 111, which serves as an in-chip conductor. For antenna 100a, the bias voltage from bias circuit 120 is supplied to RTD 101a in antenna 100a via lines 108a1 and 108a2. This also applies to the other antennas 100b to 100i and antenna 100a.

[0111] Shunt resistor 121 and capacitor 124 suppress parasitic oscillations caused by bias circuit 120 at relatively low frequencies (typically, a band from DC to 10 GHz). Shunt resistor 121 is selected to have a value equal to or slightly less than the absolute value of the combined differential negative resistance of the parallel-connected RTDs 101a to 101i. Similarly, capacitor 124 is also configured such that the impedance of the element is equal to or slightly less than the absolute value of the combined differential negative resistance of the parallel-connected RTDs 101a to 101i. In other words, bias circuit 120 is configured with this shunt structure to have an impedance lower than the absolute value of the combined negative resistance corresponding to the gain in the band from DC to 10 GHz. Generally, capacitor 124 preferably has a large capacitance, provided it is within the aforementioned range; in this example, the capacitance is approximately tens of pF. Capacitor 124 is a decoupling capacitor, and for example, an MIM (metal-insulator-metal) structure in which antenna 100a is integrated with the substrate can be used.

[0112] [Antenna Array]

[0113] Semiconductor element 100 is an antenna array comprising nine antennas 100a, 100b, 100c, 100d, 100e, 100f, 100g, 100h, and 100i arranged in a 3×3 matrix. Each of antennas 100a to 100i is individually generated at frequency f. THzThe oscillating terahertz wave is located at [location missing]. Adjacent antennas are coupled to each other via coupling line 109, causing them to oscillate at the terahertz wave oscillation frequency f. THz Mutual injection locking (mutual synchronization).

[0114] Here, mutual injection locking refers to the oscillation of multiple self-excited oscillators in a synchronized manner through their interaction. For example, antennas 100a and 100b are coupled to each other via coupling line 109ab, and antennas 100a and 100d are coupled to each other via coupling line 109ad. This also applies to other adjacent antennas. Note that "mutual coupling" refers to the phenomenon where the current induced in one antenna acts on another adjacent antenna to change their respective transmit and receive characteristics. Through synchronized in-phase or out-of-phase mutual coupling of antennas, mutual injection locking results in an enhancement or weakening of the electromagnetic field between the antennas. This allows for adjustment of antenna gain increases and decreases. Note that in this description, when referring to the entire coupling line of the antenna connecting semiconductor element 100, it is called coupling line 109. Furthermore, each coupling line included in coupling line 109 that connects antennas is designated using the letter corresponding to the antenna. For example, the coupling line connecting antennas 100a and 100b is called coupling line 109ab.

[0115] The oscillation conditions of semiconductor element 100 are determined by the mutual injection lock conditions in a configuration in which two or more individual RTD oscillators are coupled, as disclosed in J. Appl. Phys., Vol. 103, 124514 (2008) (NPL2). Specifically, the oscillation conditions of an antenna array in which antennas 100a and 100b are coupled via coupling line 109ab are now considered. In this case, two oscillation modes are possible: positive phase mutual injection lock and negative phase mutual injection lock. The oscillation conditions of the positive phase mutual injection lock oscillation mode (even mode) are expressed by equations 4 and 5, and the oscillation conditions of the negative phase mutual injection lock oscillation mode (odd mode) are expressed by equations 6 and 7.

[0116] Positive phase (even mode): Frequency f = f even

[0117] Y even = Yaa + Yab + Y RTD

[0118] Re(Y) even ) ≤ 0 (Equation 4)

[0119] Im(Y) even = 0 (Equation 5)

[0120] Negative phase (odd mode): Frequency f = f odd

[0121] Y odd = Yaa + Yab + Y RTD

[0122] Re(Y) odd ) ≤ 0 (Equation 6)

[0123] Im(Y) odd = 0 (Equation 7)

[0124] Here, Y ab It refers to the mutual conduction between antenna 100a and antenna 100b. ab It is proportional to the coupling constant, which represents the coupling strength between antennas, and ideally, -Y ab The real part is large and the imaginary part is zero. In this embodiment, the semiconductor element 100 is coupled under a positive-phase mutual injection lock-in condition, and the oscillation frequency f... THz Almost equal to f even Similarly, for other antennas, adjacent antennas are coupled to each other through coupling line 109, so that the above-mentioned conditions for positive phase mutual injection locking are satisfied.

[0125] The coupling line 109 is a microstrip line in which the dielectric layer 104 is located between the third conductor layer 110 and the first conductor layer 106. For example, as... Figure 1B As shown, coupling line 109ab has a structure in which dielectric layer 104 is located between third conductor layer 110ab and first conductor layer 106. Similarly, in coupling line 109bc, dielectric layer 104 is located between first conductor layer 106 and third conductor layer 110bc; in coupling line 109ad, dielectric layer 104 is located between first conductor layer 106 and third conductor layer 110ad; and in coupling line 109cf, dielectric layer 104 is located between first conductor layer 106 and third conductor layer 110cf.

[0126] In semiconductor element 100, adjacent antennas are coupled via DC coupling. A third conductor layer 110ab, serving as the upper conductor layer of the coupling line 109ab used for coupling antennas 100a and 100b, is directly connected to the second conductor layers 103a and 103b. In semiconductor element 100, the third conductor layer 110ab is formed in the same layer as the second conductor layers 103a and 103b. Similarly, a third conductor layer 110ae, serving as the upper conductor layer of the coupling line 109ae used for coupling antennas 100a and 100e, is directly connected to the second conductor layers 103a and 103e. The third conductor layer 110ae is formed in the same layer as the second conductor layers 103a and 103e.

[0127] Using this structure, antennas 100b and 100e are coupled to each other with respect to antenna 100a, and oscillate at the frequency f of the terahertz wave. THz They operate in a synchronized manner. In antenna arrays synchronized by such DC coupling, adjacent antennas can be synchronized through strong coupling, which facilitates robust entrainment synchronization operation to changes in the frequency and phase of the antennas.

[0128] Note that in semiconductor element 100, coupling line 109 and bias line 111 are arranged in different layers. For example, as Figure 1B As shown, the third conductor layer 110ab forming the coupling line 109ab for coupling antennas 100a and 100b and the fourth conductor layer 111x2 forming the bias line 111 are arranged in different layers. Similarly, the third conductor layer 110ad forming the coupling line 109ad for coupling antennas 100a and 100d and the fourth conductor layer 111x1 forming the bias line 111 are arranged in different layers. In other words, the wiring layers for portions of the coupling lines 109 extending in the in-plane direction (perpendicular to the stacking direction) of the substrate 113 and the wiring layers for portions of the bias lines 111 extending in the in-plane direction of the substrate 113 are arranged in different layers. Here, the wiring layers for portions of the coupling lines 109 extending in the in-plane direction are the third conductor layer 110 and the first conductor layer 106. On the other hand, the wiring layer for portions of the bias lines 111 extending in the in-plane direction is the fourth conductor layer 111. Furthermore, when an imaginary plane is taken as the plane in which the first conductor layer 106 extends, the distance between the coupling line 109 and the imaginary plane is different from the distance between the bias line 111 and the imaginary plane. Note that in this embodiment, all third conductor layers 110 and first conductor layers 106 in all antennas are arranged in a layer different from any fourth conductor layer 111. Here, the conductor constituting the bias line 111 has a portion larger than the conductor constituting the coupling line 109. This larger portion is, for example, located between multiple antennas.

[0129] In this way, high frequency (f) is transmitted THz The coupling line 109 and the bias line 111 for transmitting low frequencies (DC to tens of GHz) are arranged in different layers. This allows for free configuration of the transmission line layout in each layer, such as width, length and routing.

[0130] Furthermore, in the semiconductor device 100, a substrate 113, a first conductor layer 106, and a second conductor layer 103a are stacked sequentially from the substrate 113 side. Additionally, at least one of the coupling line 109 and the bias line 111 is disposed in the layer between the first conductor layer 106 and the second conductor layer 103a. For example, as... Figure 1BAs shown, the fourth conductor layers 111x2 and 111x1 are arranged in the layer between the first conductor layer 106 and the second conductor layer 103.

[0131] In addition, such as Figure 2 As shown, when viewed from above (in a plan view), coupling line 109 and offset line 111 intersect each other. For example, as Figure 1B and Figure 1C As shown in the diagram, in the plan view, the third conductor layer 110ab and the fourth conductor layer 111x2 intersect each other, and the third conductor layer 110ad and the fourth conductor layer 111y3 intersect each other.

[0132] In this way, by drawing the lines so that the coupling line 109 and the bias line 111 intersect each other, a more economical layout configuration can be achieved. Therefore, with such a configuration, even in an antenna array where the antennas are arranged in an m×n (m≥2, n≥2) matrix, the number of antennas that can be arranged can be increased. According to this embodiment, even with an increased number of antennas, physical interference between the coupling line (coupling line 109) used for antenna synchronization and the feed line (bias line 111) used to supply bias to each RTD 101 can be suppressed. Therefore, in the semiconductor element 100, the upper limit on the number of antennas that can be arranged can be relaxed, and it is expected that increasing the number of antennas in the array will have a significant effect on improving directivity and frontal strength.

[0133] Furthermore, a layout-saving configuration can be achieved by placing at least one of the coupling line 109 and the bias line 111 in a layer between the two conductor layers forming the antenna. Specifically, the coupling line 109 and / or the bias line 111 are embedded in the free region of the dielectric layer 104 forming the antennas 100a to 100i, excluding the antennas themselves. Therefore, multiple transmission lines can be arranged in a relatively small space between adjacent antennas arranged with a pitch of approximately wavelength, thus adequately addressing the increase in the number of lines due to the increase in the number of antennas.

[0134] It should be noted that in the terahertz band, the increased resistance due to the skin effect makes the conductor loss associated with high-frequency transmission between antennas non-negligible. Figure 3 The results of an analysis illustrating the correlation between the dielectric layer thickness and conductor loss at 0.5 THz for a microstrip line with a configuration similar to that of this embodiment are illustrated. The microstrip line used in the analysis has a structure in which the dielectric (SiO2, ε) r = 4, tanδ = 0) lies between an upper conductor layer (material Au, 1μm thickness, conductivity 2×10) with a linewidth of 10μm. 7 S / m) and grounding conductor (material Au, 1μm thickness, conductivity 2×10) 7The conductor loss was between S / m. HFSS, a finite element method solver for high-frequency electromagnetic fields, was used for analysis. It is commercially available from ANSYS.

[0135] As the current density between conductor layers increases, the conductor loss per unit length (dB / mm) increases. Additionally, as... Figure 3 As shown, for microstrip lines, the conductor loss per unit length (dB / mm) is inversely proportional to the square of the dielectric thickness. Therefore, to improve the radiation efficiency of the antenna array, it is preferable not only to thicken the antenna but also to thicken the dielectric forming the coupling line 109 to reduce conductor loss. In contrast, the semiconductor element 100 according to this embodiment has a configuration in which a bias line 111 is provided on the side of the first conductor layer 106 in the first dielectric layer 1041, and transmits a signal with a frequency f. THz The third conductor layer 110, which transmits high-frequency waves, is positioned above the dielectric layer 104. This configuration helps suppress the reduction in radiation efficiency of the antenna array due to conductor losses in the terahertz band. Using this configuration of antenna 100a, the substrate 113, the first conductor layer 106, the fourth conductor layers 111x1 and 111x2, the second conductor layer 103a, and the third conductor layers 110ad and 110ab are stacked sequentially from the substrate 113 side. This also applies to the relationship between the coupling line 109 and the bias line 111 used for coupling other antennas.

[0136] As described above, the semiconductor element 100 according to this embodiment has a configuration with high radiation efficiency. Note that, from... Figure 3 From the viewpoint of conductor loss shown, the thickness of the dielectric forming the coupling line 109 is preferably 1 μm or greater. More preferably, setting the dielectric thickness to 2 μm or greater reduces the loss caused by conductor loss in the terahertz band to about 20%. Similarly, from the viewpoint of conductor loss, it is preferable that the distance in the thickness direction between the third conductor layer 110 forming the coupling line 109 and the first conductor layer 106 is long. Additionally, it is preferable that the distance in the thickness direction between the third conductor layer 110 forming the coupling line 109 and the fourth conductor layer 111 forming the bias line 111 is long. When the dielectric is set to 2 μm or less, preferably 1 μm or less, the bias line 111 can be used as a low-impedance line up to the gigahertz band. Furthermore, even when the dielectric is set to have a thickness of 2 μm or greater, it can be used as a low-impedance line as long as it has a configuration such as in the semiconductor element 300 where the shunt component is connected to the bias line.

[0137] Furthermore, in the semiconductor element 100 according to this embodiment, adjacent antennas are fed through a common bias line 111 provided between the antennas. For example, as Figure 1CAs shown, antenna 100a is connected to bias line 111y3 via conductor 107a2 and line 108a2, and antenna 100d is connected to bias line 111y3 via conductor 107d1 and line 108d1. Similarly, antennas 100a and 100b are adjacent to each other, such that a bias signal is fed to them through a connection with a common bias line 111x2 disposed between the two antennas. This also applies to the bias lines 111 of the other antennas 100b to 100i. In this way, the common use of the bias line 111, which is a wire in the chip, between the antennas allows the antennas to be driven in the same channel, thereby simplifying the driving method. In addition, the number of wires can be reduced and each wire can be made thicker, so as to prevent the increase in wiring resistance due to the increase in the number of antennas in the array, and thus prevent the operating point from shifting between the antennas. Therefore, the frequency and phase shift between the antennas due to the increase in the number of antennas in the array can be prevented, making it easier to achieve the synchronization effect of the array.

[0138] Note that the common use of bias lines 111 is not a necessary structure. For example, for each antenna, multiple bias lines 111 can be fabricated through multilayering or miniaturization for their individual feeds. In this case, the isolation between antennas is enhanced via the bias lines 111, thereby reducing the risk of low-frequency parasitic oscillations. Furthermore, in the semiconductor element 100, lines 108a1, 108a2 to 108i1, 108i2 and bias lines 111 are preferably positioned below the oscillation frequency f. THz In the low-frequency band, the impedance is lower than the negative resistance of RTDs 101a to 101i. More preferably, the impedance is equal to or slightly less than the absolute value of the combined differential negative resistance of the RTDs 101a to 101i connected in parallel. This allows for the suppression of low-frequency multimode oscillations.

[0139] As described above, according to this embodiment, compared with the conventional case, the loss of electromagnetic waves can be reduced, and oscillating terahertz waves can be generated or detected more efficiently.

[0140] [First Example]

[0141] Reference Figures 1A to 1CAs a first example, a specific configuration of a semiconductor element 100 that generates oscillating terahertz waves according to a first embodiment is described. The semiconductor element 100 is a semiconductor device capable of single-mode oscillation in a frequency band of 0.45 THz to 0.50 THz. RTDs 101a to 101i have a multi-quantum-well structure, wherein InGaAs / AlAs are lattice-matched on an InP substrate 113, and in this example, an RTD with a double-barrier structure is used for each. The semiconductor layer heterostructure of the RTD is the structure disclosed in J Infrared Milli Terahz Waves (2014) 35: 425-431 (NPL 3).

[0142] The current-voltage characteristics of RTD 101a to 101i are 9 mA / μm. 2 Peak current density and 10 mS / μm 2 The measured value of differential negative conductance per unit area. In antenna 100a, a mesa structure is formed, consisting of a semiconductor layer 115a including RTD 101a and an electrode 116a as an ohmic electrode. In this example, the mesa structure is a circle with a diameter of 2 μm. At this time, the differential negative resistance of RTD 101a is approximately -30Ω per diode. In this case, the differential negative conductance (G) of the semiconductor layer 115a including RTD 101a is... RTD The estimated value is approximately 30ms, and the diode capacitance (C) of RTD 101a is... RTD The estimate is approximately 10fF.

[0143] Antenna 100a is a patch antenna having a structure in which a dielectric layer 104 is situated between a second conductor layer 103a serving as a patch conductor and a first conductor layer 106 serving as a ground conductor. A semiconductor layer 115a, including an RTD 101a, is integrated inside the antenna 100a. Antenna 100a is a square patch antenna with a 150 μm side of the second conductor layer 103a, and the resonator length (L) of the antenna is 150 μm.

[0144] A metal layer, primarily composed of a low-resistivity Au thin film, serves as the second conductor layer 103a as a patch conductor and the first conductor layer 106 as a ground conductor. The second conductor layer 103a is made of a metal containing Ti / Au (=5 / 300nm). A dielectric layer 104 is disposed between the second conductor layer 103a and the first conductor layer 106. The dielectric layer 104 consists of two layers: one composed of BCB (benzocyclobutene, available from Dow Chemical Company, ε...). r1 =2) The first dielectric layer 1041 with a thickness of 5 μm was fabricated, and the dielectric layer was made of SiO2 (plasma CVD, ε r2 =4) to form a second dielectric layer 1042 with a thickness of 2μm.

[0145] The first conductor layer 106 consists of a Ti / Pd / Au layer (20 / 20 / 200nm) and an electron concentration of 1×10⁻⁶. 18 cm -3 or a larger n + The semiconductor layer is composed of an InGaAs layer (100nm), and the metal and semiconductor layer are connected by a low-resistance ohmic contact.

[0146] Electrode 116a is an ohmic electrode composed of a Ti / Pd / Au layer (20 / 20 / 200 nm). Electrode 116a is connected via a low-resistance ohmic contact to a semiconductor layer 115a with an electron concentration of 1 × 10⁻⁶. 18 cm -3 or a larger n + - A semiconductor layer composed of an InGaAs layer (100nm).

[0147] Around RTD 101a, substrate 113, first conductor layer 106, semiconductor layer 115a, electrode 116a, conductor 117a made of Cu-containing conductor, and second conductor layer 103a are sequentially stacked from the substrate 113 side and electrically connected. RTD 101a is located at a position offset by 40% (60 μm) from one side of the second conductor layer 103a along the resonant direction (AA' direction) from the center of gravity of the second conductor layer 103a. Here, the input impedance when a high-frequency wave is fed from the RTD to the patch antenna depends on the position of RTD 101a in antenna 100a. The second conductor layer 103a is connected to lines 108a1 and 108a2 arranged in the lower layer via conductors 107a1 and 107a2, which are Cu-made pathways.

[0148] Lines 108a1 and 108a2 are formed from a Ti / Au (= 5 / 300 nm) metal layer stacked on the second dielectric layer 1042. Lines 108a1 and 108a2 are connected to the bias circuit 120 via bias line 111, which is a common conductor formed in the chip. Bias line 111 is formed from a Ti / Au (= 5 / 300 nm) metal layer stacked on the second dielectric layer 1042. Antenna 100a is designed to be biased in the negative resistance region of RTD 101a, so that it can be biased at f THz An oscillation with a power of 0.2mW was obtained at a frequency of 0.5THz.

[0149] Conductors 107a1 and 107a2 have cylindrical structures with a diameter of 10 μm. Lines 108a1 and 108a2 are formed by a pattern of a Ti / Au (=5 / 300nm) metal layer with a width of 10 μm and a length of 75 μm in the resonant direction (=A-A' direction). Conductors 107a1 and 107a2 are connected to the second conductor layer 103a at their center in the resonant direction (=A-A' direction) and their ends in the BB' direction. These connection locations correspond to the f-axis residing in antenna 100a. THz Electric field nodes of terahertz waves.

[0150] Semiconductor element 100 is an antenna array in which nine antennas 100a to 100i are arranged in a 3×3 matrix. Each antenna is designed to operate at only f THz The frequency generates oscillating terahertz waves, and they are arranged with a pitch (space) of 340 μm in both the A-A' and B-B' directions. Adjacent antennas are coupled to each other via coupling line 109, which includes a third conductor layer 110 made of Ti / Au (=5 / 300nm). For example, antennas 100a and 100b are coupled to each other via coupling line 109ab. The second conductor layer 103a and the second conductor layer 103b are directly connected via a third conductor layer 110ab, which has a width of 5 μm and a length of 190 μm and is formed in the same layer. In addition, antennas 100a and 100d are coupled to each other via coupling line 109ad. The second conductor layer 103a and the second conductor layer 103d are directly connected via a third conductor layer 110ad, which has a width of 5 μm and a length of 440 μm and is formed in the same layer. This also applies to other antennas. Antennas 100a to 100i are in f THz At an oscillation frequency of 0.5THz, they are mutually injected and locked in a state of being in phase (positive phase) to generate oscillation waves.

[0151] The bias line 111, which is a common conductor formed in the chip, is a bias line shared between antennas and is connected to lines 108a1, 108a2 to 108i1, 108i2 connected to antennas 100a to 100i.

[0152] In semiconductor element 100, coupling line 109 and bias line 111 are arranged in different layers, similar to the relationship between the third conductor layer 110ab of coupling line 109ab and the fourth conductor layer 111xl of bias line 111. Furthermore, in semiconductor element 100, substrate 113, first conductor layer 106, and second conductor layer 103a are stacked sequentially from the substrate 113 side. Additionally, bias line 111 is disposed in the layer between the first conductor layer 106 and the second conductor layer 103, similar to the fourth conductor layer 111xl. Furthermore, coupling line 109 and bias line 111 intersect each other. This also applies to the relationship between coupling line 109 and bias line 111 used for coupling other antennas 100b to 100i. With this configuration, physical interference between the coupling line (coupling line 109) used for antenna synchronization and the feed line (bias line 111) used to supply bias to each RTD 101 can be reduced. Therefore, by increasing the number of antennas to be deployed, it can be expected that the increased number of antennas in the array will have a significant effect on improving directivity and frontal strength.

[0153] (Methods for manufacturing semiconductor devices)

[0154] Next, a method for manufacturing the semiconductor element 100 according to this example (production method) will be described.

[0155] (1) First, an InGaAs / AlAs-based semiconductor multilayer film structure is formed by epitaxial growth on a substrate 113 made of InP, which forms semiconductor layers 115a to 115i including RTDs 101a to 101i. It is formed by molecular beam epitaxy (MBE), metal-organic vapor phase epitaxy (MOVPE), etc.

[0156] (2) A Ti / Pd / Au layer (20 / 20 / 200nm) is formed on semiconductor layers 115a to 115i by sputtering, and the Ti / Pd / Au layer forms ohmic electrodes 116a to 116i.

[0157] (3) Electrodes 116a to 116i and semiconductor layers 115a to 115i are formed into circular mesa shapes with a diameter of 2 μm to form a mesa structure. Here, photolithography and ICP (inductively coupled plasma) dry etching are used to form the mesa shape.

[0158] (4) After forming the first conductor layer 106 on the substrate 113 by etching the surface, a silicon oxide film with a thickness of 2 μm is formed as the second dielectric layer 1042 by plasma CVD.

[0159] (5) A Ti / Au layer (=5 / 300nm) is formed on the second dielectric layer 1042 as the fourth conductor layer 111 for forming lines 108a1 to i2 and bias line 111. This completes the formation of bias line 111.

[0160] (6) A 5 μm thick BCB film was embedded and planarized as the first dielectric layer 1041 using spin coating and dry etching.

[0161] (7) The portions of the BCB and silicon oxide films forming conductors 117a to 117i and conductors 107a1 to 107i2 as pathways are removed by photolithography and dry etching to form via holes (contact holes). In addition, the use of photolithography including grayscale exposure for this formation allows for optional control of the taper angle of the via holes used to form the first dielectric layer 1041 and the second dielectric layer 1042 and the coupling line 109.

[0162] (8) Conductors 117a to 117i and conductors 107a1 to 107i2, which serve as pathways, are formed by conductors containing Cu in the pathway holes. For the formation of conductors 117a to 117i and conductors 107a1 to 107i2, Cu-containing pathway holes are embedded and planarized by sputtering, electroplating and chemical mechanical polishing.

[0163] (9) Electrode Ti / Au layer films (=5 / 300nm) of the second conductor layer 103a to 103i as antenna and the third conductor layer 110 forming the coupling line 109 are formed by sputtering.

[0164] (10) The second conductor layers 103a to 103i and the third conductor layer 110 forming the coupling line 109 are patterned by photolithography and ICP (inductively coupled plasma) dry etching. This step completes the formation of the coupling line 109.

[0165] (11) Finally, a shunt resistor 121 and a MIM capacitor 124 are formed and connected to wires 122 and power supply 123 by wire bonding or the like to complete the semiconductor element 100.

[0166] Note that the power supply to the semiconductor element 100 is performed by the bias circuit 120, and typically, the semiconductor element 100 operates as an oscillator when a bias voltage that causes a region of differential negative resistance is applied to supply bias current.

[0167] <Second Embodiment>

[0168] Figure 4A , Figure 4B and Figure 4CA semiconductor element 200 according to a second embodiment is illustrated. Note that the semiconductor element 200, except as described below, has the same components with the same names as those in the semiconductor element 100 according to the first embodiment, and therefore their detailed description will be omitted. Additionally, similarly, in this embodiment, the coupling line 209 and the bias line 211 are arranged in different layers as in the first embodiment.

[0169] Semiconductor element 200 is an antenna array in which nine antennas 200a to 200i are arranged in a 3×3 matrix. Unlike the first embodiment, antenna 200a includes two active layers in one antenna that have electromagnetic wave gain or nonlinearity for terahertz waves. Specifically, antenna 200a includes a semiconductor layer 215a1 containing RTD 201a1 and a semiconductor layer 215a2 containing RTD 201a2.

[0170] Electrodes 216a1 and 216a2 are arranged on the side opposite to the side where the first conductor layer 206 is disposed, relative to semiconductor layers 215a1 and 215a2. Electrode 216a1 is electrically connected to semiconductor layer 215a1, and electrode 216a2 is electrically connected to semiconductor layer 215a2. Additionally, a bias signal is fed from bias circuit 120 to two RTDs 201a1 and 201a2 via conductor layers 217a1 and 217a2, which form a pathway connecting the second conductor layer 203a to electrodes 216a1 and 216a2.

[0171] RTD 201a1 is positioned at a length offset from the centroid of the second conductor layer 203a along the resonant direction (i.e., the AA' direction) by 40% of the length of the second conductor layer 203a. On the other hand, RTD 201a2 is positioned at a length offset from the centroid of the second conductor layer 203a along the resonant direction (i.e., the AA' direction) by -40% of the length of the second conductor layer 203a. In other words, RTD 201a1 and RTD 201a2 are arranged symmetrically with respect to a straight line (center line) perpendicular to both the resonant and stacking directions, passing through the centroid of the second conductor layer 203a. Using this configuration, RTD 201a1 and RTD 201a2 mutually inject lock-in while in opposite phase (negative phase) to generate oscillating waves. In this way, the vertically and horizontally symmetrical configuration of the RTDs in the antenna is a configuration that easily improves directivity and frontal strength when increasing the number of antennas in the array.

[0172] The coupling line 209 is composed of a microstrip line, wherein dielectric layers 204 and 217 are interposed between a fourth conductor layer 210 and a first conductor layer 206 stacked on top of dielectric layer 217, which is stacked on dielectric layer 204. For example, as Figure 4BAs shown, the coupling line 209ab has a structure in which dielectric layers 204 and 217 are located between the fourth conductor layer 210ab and the first conductor layer 206.

[0173] Similarly, coupling line 209bc has a structure in which dielectric layer 204 and dielectric layer 217 are between a fourth conductor layer 210bc and a first conductor layer 206 serving as an upper conductor layer, and coupling line 209ad has a structure in which dielectric layer 204 and dielectric layer 217 are between a fourth conductor layer 210ad and a first conductor layer 206 serving as an upper conductor layer.

[0174] Semiconductor element 200 is an antenna array configured such that antennas are coupled via AC coupling (capacitive coupling). For example, the fourth conductor layer 210ab, which is the upper conductor layer in the coupling line 209ab used to couple antennas 200a and 200b, overlaps with the second conductor layers 203a and 203b by 5 μm near the radiating end in a planar view. This also applies to the coupling between adjacent antennas of the other antennas 200b to 200i.

[0175] In the overlapping portion of the conductor layers, the second conductor layers 203a and 203b, the dielectric layer 217, and the fourth conductor layer 210ab are stacked sequentially to form a metal-insulator-metal (MIM) capacitor structure. Using this structure, the relationship between the second conductor layer 203a and the second conductor layer 203b is disconnected with respect to DC, and their coupling degree is within f... THz The following low-frequency range is small, thus ensuring isolation between components. On the other hand, at the oscillation frequency f... THz In this frequency band, the coupling between antennas can be adjusted using capacitors. This structure significantly reduces the coupling between antennas, which in turn suppresses transmission loss, thus expected to improve the radiation efficiency of the antenna array.

[0176] <Third Embodiment>

[0177] Figure 5A , Figure 5B and Figure 5C A semiconductor element 300 according to a third embodiment is illustrated. Note that the semiconductor element 300, except as described below, has the same components with the same names as the semiconductor element 200 according to the second embodiment, and therefore its detailed description will be omitted. Additionally, similarly, in this embodiment, the coupling line 309 and the bias line 311 are arranged in different layers as in the first embodiment.

[0178] Semiconductor element 300 is an antenna array in which nine antennas 300a to 300i are arranged in a 3×3 matrix. Similar to semiconductor element 200 according to the second embodiment, each of antennas 300a to 300i includes two active layers in one antenna having electromagnetic wave gain or nonlinearity for terahertz waves. However, unlike semiconductor element 200 according to the second embodiment, in semiconductor element 300, the bias line 311 has a shunt structure to suppress frequencies below the oscillation frequency f. THz Parasitic oscillations in the frequency band. The shunt structure is arranged in parallel with the RTD as a negative resistive element to short-circuit below f. THz The frequency band allows for a structure that can suppress parasitic oscillations. Additionally, a shunt structure is a structure in which resistive elements or elements connected in series with resistors and capacitors are arranged in parallel with an RTD. In a shunt structure, the resistors and capacitors have values ​​such that the impedance of the element is equal to or slightly lower than the absolute value of the combined differential negative resistance of multiple RTDs arranged near the element.

[0179] Semiconductor element 300 includes three dielectric layers as dielectric layers 304: a first dielectric layer 3041, a second dielectric layer 3042, and a third dielectric layer 3043. Note that, in order to use the third dielectric layer 3043 as the dielectric of a capacitor in a shunt structure, silicon nitride (εN) with a relatively high dielectric constant is used. r2 =7) Miniaturized MIM capacitor structure. Here, for the dielectric layer 304 with a three-layer structure, the effective relative permittivity is determined taking into account the thickness and relative permittivity of the third dielectric layer 3043.

[0180] Furthermore, the fifth conductor layer 318 is stacked on the third dielectric layer 3043. Therefore, from the substrate 313 side, a metal-insulator-metal (MIM) capacitor structure is formed in which the first conductor layer 306, the third dielectric layer 3043, and the fifth conductor layer 318 are stacked sequentially, and this capacitor structure is disposed below the bias line 311. The fifth conductor layer 318 is disposed in the layer between the first conductor layer 306 and the third conductor layer 310 and the fourth conductor layer 311.

[0181] Here, each of antennas 300a to 300i has a resistor and a capacitor as a shunt structure. For example, for antenna 300a, the resistive element 319y4a connected to the bias line 311y4 corresponds to a resistor. The MIM capacitor structure, where the third dielectric layer 3043 is located between the fifth conductor layer 318y4a connected to the resistive element 319y4a and the first conductor layer 306, corresponds to a capacitor. As described above, in this embodiment, the first conductor layer 306 and the bias line 311 are electrically connected via a capacitor and a resistor. Note that, depending on the arrangement of the bias line 311 and the third conductor layer 310, the first conductor layer 306 and the third conductor layer 310 can be electrically connected via a resistor.

[0182] Additionally, the fifth conductor layer 318y3ad is connected to the resistive element 319y3ad, which is connected to the bias line 311y3. The third dielectric layer 3043, located between the fifth conductor layer 318y3ad and the first conductor layer 306, is a MIM capacitor structure. Note that antennas 300a to 300i reside with an oscillation frequency f. THz The configuration of shunt structures in the nodes of the high-frequency electric field at frequency f THz It has high impedance at a certain point, therefore it is more suitable for selectively generating only frequencies at f. THz High-frequency oscillation waves.

[0183] However, due to the increased number of antennas in the array and the shared use of bias lines in the antenna array, there is a risk of unwanted low-frequency multimode oscillations occurring. Therefore, semiconductor element 300 has lines 308a1, 308a2 to lines 308i1, 308i2 and bias line 311 configured to operate at frequencies below the oscillation frequency f. THz It features a configuration with lower impedance than the negative resistive element (semiconductor layer 315) in the low-frequency band. Utilizing this structure, even with an increase in the number of antennas in the antenna array, oscillations in other modes can be suppressed, and stable single-frequency oscillations can be obtained in the terahertz band.

[0184] <Fourth Embodiment>

[0185] Figures 6A to 6C , Figure 7 and Figure 8 A to Figure 8C illustrates semiconductor elements 400 and 500 according to the fourth embodiment. Semiconductor elements 400 and 500 are each antenna arrays in which nine antennas are arranged in a 3×3 matrix. Here, coupling lines 409 and 509 are each disposed in the lower layer, and bias lines 411 and 511 are each disposed in the upper layer. The coupling lines need to be phase-matched between the antennas in the terahertz band, and therefore their shapes may be complex depending on the antenna configuration. On the other hand, the bias lines used for bias feeding can be relatively simple patterns. Therefore, the configuration of disposing the bias lines in the upper layer and the coupling lines in the lower layer, as in this embodiment, is a configuration that reduces interference between the metal body other than the antennas and the emitted electromagnetic waves.

[0186] Figures 6A to 6C The semiconductor element 400 shown includes nine antennas, antennas 400a to 400i. Figure 6B As shown, a third conductor layer 410ab is disposed below a fourth conductor layer 411x2, which is stacked on a first dielectric layer 4041 and forms a bias line 411. Note that the third conductor layer 410ab is stacked on the first dielectric layer 4041, forming a coupling line 409ab associated with antenna 400a. This also applies to the other antennas 400b to 400i and antenna 400a.

[0187] Therefore, in the semiconductor element 400, the substrate 413, the first conductor layer 406 serving as the ground conductor for the antenna, the third conductor layer 410ab, the second conductor layer 403a serving as the patch conductor, and the fourth conductor layer 411x2 are stacked sequentially from the substrate 413 side. Adjacent antennas of the semiconductor element 400 are coupled via DC coupling. For example, the third conductor layer 410ab, which serves as the upper conductor layer of the coupling line 409ab used to couple antennas 400a and 400b, is directly connected to the second conductor layers 403a and 403b. This also applies to coupling between other antennas. Here, in the semiconductor element 400, the third conductor layer 410ab is formed below the second conductor layers 403a and 403b to be covered by the first dielectric layer 4041. Note that in this embodiment, the second conductor layer 403 and the fourth conductor layer 411 are arranged in the same layer, but their arrangement is not limited to this, and the fourth conductor layer 411 may be formed in the layer below the second conductor layer 403.

[0188] Figures 7 to 8The semiconductor element 500 shown in C includes nine antennas, 500a to 500i. The semiconductor element 500 is an antenna array, wherein adjacent antennas are connected by coupling lines 509, which are microstrip lines including a third conductor layer 510 serving as an upper conductor layer. Note that the third conductor layer 510 is disposed between a first conductor layer 506 serving as a ground conductor and second conductor layers 503a to 503i serving as patch conductors.

[0189] In antenna 500a, a composite resonator including patch antenna and coupling line 509a is integrated in RTD 501a, and patch antenna is composed of first conductor layer 506 and second conductor layer 503a, and coupling line 509a is composed of first conductor layer 506 and third conductor layer 510a.

[0190] The coupling line 509a has a structure in which a second dielectric layer 5042 is intermediate between a first conductor layer 506 and a third conductor layer 510a, and the longitudinal direction of the coupling line 509a is perpendicular to the resonant direction (i.e., the AA' direction) (i.e., the CC' direction). The third conductor layer 510a is connected to a path 517a connecting the second conductor layer 503a and the RTD 501a. Therefore, the RTD 501a is coupled to two resonators: the patch antenna defined by the second conductor layer 503a and the coupling line 509a defined by the third conductor layer 510a. Thus, the length of the coupling line 509a and the size of the patch antenna are important parameters for determining the electromagnetic wave oscillation frequency. The oscillation frequency f of the antenna 500a... THz The length of the second conductor layer 503a in the AA' direction and the length of the third conductor layer 510a in the CC' direction can be determined. Specifically, the length of the third conductor layer 510a in the CC' direction can be set to an integer multiple of the effective length of the desired oscillation wavelength, and the length of the second conductor layer 503a in the AA' direction can be set to half the effective length of the desired oscillation wavelength. Here, the bias line 511 is composed of a fourth conductor layer 511y3 stacked on the first dielectric layer 5041, and the third conductor layer 510a is disposed below the fourth conductor layer 511y3. This also applies to the components of other antennas 500b to 500i. Note that in this embodiment, the second conductor layer 503 and the fourth conductor layer 511 are arranged in the same layer, but their arrangement is not limited to this, and the fourth conductor layer 511 can be formed in the layer below the second conductor layer 503.

[0191] Adjacent antennas are DC coupled together via coupling line 509. For example, for the coupling of antennas 500a and 500b, they are directly connected to each other via the third conductor layers 510a and 510b at the ends of the third conductor layers 510a and 510b, which are the upper conductor layers of coupling lines 509a and 509b. Similarly, for the coupling between antennas 500a and 500d, they are directly connected to each other at the ends of the third conductor layers 510a and 510d, which are the upper conductor layers of coupling lines 509a and 509d. Note that, preferably, the RTDs 501a to 501i are positioned within the coupling line 509 to store electromagnetic waves (oscillation frequency f). THz The maximum electric field is located at the point of maximum intensity to enhance the bandgap synchronization between antennas. This also applies to coupling between other antennas.

[0192] As described above, the third conductor layer 510 of the coupling line 509 is located in a different layer than the second conductor layer 503 that forms the patch antenna, thereby increasing the degree of freedom in device design for phase synchronization in the array.

[0193] <Fifth Embodiment>

[0194] Reference Figure 9 A and Figure 9 B describes an oscillating element 1000 as a semiconductor element according to the fifth embodiment. Figure 9 A is a top view of an oscillating element 1000 with 2×2 antennas. Figure 9 B is along Figure 9 A is a cross-sectional view taken by line B-B' shown in Figure A. Note that, similarly, in this embodiment, the coupling line and the offset line are arranged in different layers.

[0195] The oscillating element 1000 includes a substrate 1001, a first conductor layer 1002 (ground metal (GND)), a negative resistive element 1003, a second dielectric layer 1004, and a third conductor layer 1005 (microstrip line (MSL) coupling line). The oscillating element 1000 also includes a first dielectric layer 1006 and a second conductor layer 1007.

[0196] In this embodiment, the second dielectric layer 1004 is located between the third conductor layer 1005 and the first conductor layer 1002 to form a coupling line.

[0197] Additionally, the oscillating element 1000 may have a shunt structure 1008 (filter unit), but the shunt structure 1008 is not a necessary configuration. The shunt structure 1008 has a capacitor portion 1009 and a resistor portion 1010. The capacitor portion 1009 has a MIM structure, wherein a high dielectric constant layer 1011 is located between the conductive substrate 1001 and a conductive layer formed simultaneously during the formation of the first conductive layer 1002.

[0198] In this embodiment, the third conductor layer 1005, which is used to synchronize the phase of the second conductor layer 1007 with the adjacent antenna, is formed in a different layer than the second conductor layer 1007, thereby increasing the degree of design freedom and thus allowing multiple antennas to be arranged in the array.

[0199] As substrate 1001, n + InP substrate. In substrate 1001, the InP substrate includes a semiconductor multilayer film that generates terahertz waves and has electromagnetic wave gain in the frequency range of the terahertz waves.

[0200] As the negative resistance element 1003, for example, a resonant tunnel diode (RTD) or a Gunn diode can be used, and in this embodiment, the negative resistance element 1003 is formed by an RTD.

[0201] The substrate 1001 is connected to the first conductor layer 1002 via an ohmic contact, and on the cathode side, a structure is used in which the first conductor layer 1002 is connected to the negative resistance element via the substrate 1001. On the anode side, a bias line is connected to the second conductor layer 1007, and the second conductor layer 1007 is connected to the negative resistance element 1003 via a third conductor layer 1005. Therefore, in this embodiment, the bias line (fourth conductor layer) is formed in the same layer as the second conductor layer 1007. Applying a bias to the negative resistance element 1003 allows terahertz wave oscillations to be obtained through the second conductor layer 1007, the negative resistance element 1003, and the third conductor layer 1005, which act as resonators.

[0202] To control the phase of the electromagnetic waves oscillating at adjacent antennas, the negative resistance element 1003 is connected between adjacent antennas via the third conductor layer 1005 (MSL coupling line). Here, the negative resistance element 1003 (antenna) is located at the point of maximum electric field of the electromagnetic waves residing in the third conductor layer 1005, so that the phase of the electromagnetic waves generated at the antennas is synchronized.

[0203] Furthermore, the length of the third conductor layer 1005 and the size of the second conductor layer 1007 are important parameters for determining the electromagnetic wave oscillation frequency. The length of the third conductor layer 1005 (MSL coupling line) in the resonant direction can be set to an integer multiple of the effective wavelength λ of the desired oscillation wavelength, and the length of the second conductor layer 1007 in the resonant direction can be set to 1 / 2 of the effective length λ of the desired oscillation wavelength.

[0204] exist Figure 9In A, the antennas of the oscillating element 1000 are arranged in 2 rows × 2 columns. Here, the third conductor layer 1005 is wired such that L1 = effective wavelength λ and L2 = λ / 2, and the negative resistance element 1003 is located at a position λ / 2 away from the far end of the third conductor layer 1005. Furthermore, as described above, the negative resistance elements 1003 of adjacent antennas are located at the points of maximum electric field of the residing electromagnetic wave, that is, at distances that are integer multiples of λ from each other. In other words, in the oscillating element 1000, the antennas are arranged with a pitch that is an integer multiple of λ.

[0205] In this embodiment, since an RTD element with a gain from low frequencies to approximately 2 THz is used as a negative resistance element 1003, oscillations (parasitic oscillations) may occur at frequencies different from the desired frequency. In this regard, a filter is preferably formed to suppress parasitic oscillations. For example, to suppress parasitic oscillations, a method is known to suppress parasitic oscillations by inserting a resistor with a resistance value no greater than the absolute value of the negative resistance into the minimum point of the current of the electromagnetic wave residing in the third conductor layer 1005, thereby causing the loss of electromagnetic waves with frequencies different from the desired frequency. In this embodiment, as... Figure 9 A and Figure 9 As shown in Figure B, a shunt structure 1008 is positioned using λ / 4 wires, MIM capacitors, and resistors. The λ / 4 wires are connected to the point of minimum electric field of the electromagnetic wave residing in the third conductor layer 1005, and are connected to the first conductor layer 1002 via a resistor portion 1010 with a resistance value not greater than the absolute value of a negative resistance and a capacitor portion 1009 with sufficiently high capacitance. In the portion of the shunt structure 1008 in contact with the third conductor layer 1005, the impedance becomes high at the desired oscillation frequency, making it difficult for current to flow into the shunt structure 1008. However, at frequencies other than the desired oscillation frequency, the impedance becomes low, making it easy for current to flow through the shunt structure, thus causing losses in the resistor portion 1010, which enables the suppression of parasitic oscillations. In this way, stable oscillations can be obtained by appropriately positioning the filter.

[0206] In this way, the antennas can be arranged in an array by connecting the third conductor layer 1005 formed between the first conductor layer 1002 and the second conductor layer 1007 to the adjacent antennas. Therefore, the antennas can be arranged with a pitch of the effective wavelength, and the directivity of the electromagnetic waves can be improved.

[0207] (Second example)

[0208] Reference Figure 10 , Figure 11 A and Figure 11 B describes a specific second example of the oscillation element 1000 according to the fifth embodiment. Figure 10 This is a top view of an antenna contained in the oscillating element 1000. Figure 11 A is along Figure 10 The cross-sectional view of section C-C' shown in the figure. Figure 11 B is a top view showing the antennas arranged in a 4×4 array. For simplicity, the substrate 1001 and the first conductor layer 1002 are not shown. Figure 10 and Figure 11 As shown in B, and the shunt structure 1008 is not in Figure 11 As shown in B.

[0209] In this example, Figure 11 The oscillating element 1000 of the 4×4 antennas shown in B oscillates by connecting each to... Figure 10 The single antenna shown is implemented by arranging the antennas in the array at intervals of effective wavelength λ. Note that the oscillating element 1000 with m×n antennas (m and n are integers) can be implemented by... Figure 11 The antenna is arranged in the same way as shown in B.

[0210] First, the description Figure 10 An antenna is shown. Important parameters used to determine the oscillation frequency of the oscillating element include, for example, the lengths of the second conductor layer 1007 and the third conductor layer 1005 in the resonant direction, and the dielectric constant of each dielectric layer. Note that in this example, silicon dioxide formed by plasma CVD is used for the second dielectric layer 1004. Additionally, BCB (benzocyclobutene) is used for the first dielectric layer 1006.

[0211] As a result of estimating the oscillation frequency of this example using the HFSS electromagnetic field simulator, which is commercially available from ANSYS, the effective wavelength λ for obtaining an oscillation frequency of 500 GHz is 320 μm. Therefore, the length of the second conductor layer 1007 in the resonant direction can be set to 160 μm, which is half of the effective wavelength λ, and the length of the third conductor layer 1005 in the resonant direction can be set to 320 μm, which is also the effective wavelength λ.

[0212] Figure 12 A graph illustrating the relationship between the length of the third conductor layer 1005 (MSL) in the resonant direction and the actual oscillation frequency is shown. In this graph, the length of the patch antenna in the resonant direction is half the length of the third conductor layer 1005 in the resonant direction. When the length of the third conductor layer 1005 in the resonant direction is 320 μm, the resulting oscillation frequency is 460 GHz to 479 GHz, which is close to the aforementioned 500 GHz.

[0213] In addition, important parameters for determining the oscillation output of the oscillating element include, for example, the parasitic capacitance between the group of substrate 1001 and the first conductor layer 1002, and the group of the third conductor layer 1005 and the second conductor layer 1007, as well as the characteristics of the negative resistive element 1003. Furthermore, the position of the negative resistive element 1003 within the second conductor layer 1007 is also included among the important parameters. In this embodiment, the area of ​​the third conductor layer 1005 and the dielectric constant and film thickness of the second dielectric layer 1004 are important influencing factors. Therefore, in order to reduce parasitic resistance, the width of the MSL coupling line is made as narrow as possible, and the film thickness of the second dielectric layer 1004 is made thick.

[0214] Additionally, the impedance of the negative resistive element 1003 used in this example is 50 to 60 Ω. Here, in order to achieve impedance matching between the second conductor layer 1007 and the negative resistive element 1003, the feed point impedance of the second conductor layer 1007 is matched with the impedance of the negative resistive element 1003.

[0215] Figure 13 Example A illustrates the calculation of the effect of the thickness of the silicon dioxide film forming the second dielectric layer 1004 on the oscillation output. Figure 13 Example B illustrates the calculation of the effect of the width of the third conductor layer 1005 (MSL) on the oscillation output. Additionally, Figure 13 Example C illustrates the calculation of the effect of the distance between the centers of the negative resistive element 1003 and the second conductor layer 1007 on the oscillation output. In this example, the thickness of the silicon dioxide film is set to 2 μm, the width of the third conductor layer 1005 is set to 4 μm, and the value obtained by dividing the distance between the centers of the negative resistive element 1003 and the second conductor layer 1007 by the effective wavelength is set to 15%.

[0216] Furthermore, to achieve the oscillating element 1000 of this example, parasitic oscillations at frequencies other than the desired oscillation frequency are suppressed. Therefore, the shunt structure 1008 is positioned so as not to cause electromagnetic wave loss when oscillating at the desired oscillation frequency, and not to generate oscillating electromagnetic waves at frequencies other than the desired frequency due to loss. As described above, in this example, to suppress parasitic oscillations, a MIM capacitor with sufficiently high capacitance is connected to the third conductor layer 1005 via a resistor of 20Ω (which is 50Ω or less, the absolute value of the negative resistance of the negative resistive element 1003) and a wire of length λ / 4. The λ / 4 length wire is connected at a point in the third conductor layer 1005 to the node of the electric field of the electromagnetic wave residing at the desired frequency. In other words, in this example, it is connected at a distance of λ / 4 from the far end of the third conductor layer 1005. Therefore, parasitic oscillations can be suppressed and an oscillating element with the desired oscillation frequency can be obtained.

[0217] In addition, such as Figure 11As shown in Figure A, the central axis of conductor 1012 and the central axis of contact hole 1013 are offset from each other in the stacking direction. Conductor 1012 is an electrode formed in a contact hole in which the second dielectric layer 1004, in which the negative resistive element 1003 is removed, for electrically connecting the negative resistive element 1003 and the third conductor layer 1005. Contact hole 1013 is a hole that penetrates the second dielectric layer 1004 (in which a portion of the dielectric layer of the first dielectric layer 1006 and the second dielectric layer 1004 is combined) in the stacking direction. The third conductor layer 1005 is connected to the second conductor layer 1007 by forming a portion of the second conductor layer 1007 on the surface of contact hole 1013. Note that the central axes of conductor 1012 and contact hole 1013 can be aligned with each other. However, in this example, in order to protect the negative resistive element 1003, the two central axes are offset from each other, such that the upper part of the negative resistive element 1003 (in the stacking direction) is covered by the first dielectric layer 1006 as a protective film.

[0218] By setting the parameters in this way, an output of 460 GHz and 50 μW was obtained using a single antenna in this example.

[0219] In addition, such as Figure 11 As shown in B, the oscillating element 1000 with 4×4 antennas can be implemented by arranging antennas corresponding to the single antennas mentioned above in an array with a pitch of the effective wavelength.

[0220] Figure 14 The example illustrates the oscillation output when a voltage is applied to the oscillating element 1000. Figure 14 In the diagram, the dashed line represents the oscillation output obtained by a single antenna, while the solid line represents the oscillation output obtained by 4×4 (16) antennas. Here, for 4×4 antennas, the oscillation output is 830 μW, and the oscillation frequency is 458 GHz, which is approximately 16 times the output obtained by a single antenna. Through the third conductor layer 1005 formed in this way between the second conductor layer 1007 and the group of the substrate 1001 and the first conductor layer 1002, adjacent antennas are connected and arranged in an array, such that the phase of the electromagnetic waves oscillating at the antennas can be synchronized.

[0221] (Manufacturing method)

[0222] Next, we will refer to Figure 15 Flowchart of manufacturing steps and Figure 16 A to Figure 16 H describes the manufacturing method (production method) of the oscillating element 1000 according to this example. Here, Figure 16 A to Figure 16 H is a cross-sectional view of the antenna (oscillating element 1000) in the corresponding manufacturing step, and each illustrates the direction along... Figure 10 The cross-sectional view taken from C-C' in the figure.

[0223] In S2001, such as Figure 16 As shown in Figure A, a negative resistive element 1003 is formed. More specifically, a semiconductor multilayer film formed by epitaxial growth on an InP substrate doped with a high concentration of dopant and electrodes for ohmic contacts are processed into a mesa shape. The semiconductor multilayer film including the negative resistive element 1003 is formed of InGaAs, AlAs, etc. The electrodes for contacts are formed of metals such as Mo, W, Ti, Ta, Al, Cu, and Au, their alloys, semiconductors doped with the same concentration, and their laminates. Subsequent processing uses known semiconductor device steps. In this example, a Mo electrode is formed by sputtering on the semiconductor multilayer film formed by epitaxial growth, a photoresist with the desired shape is formed by a photolithography step, and then dry etching is performed using a chlorine-based gas.

[0224] In S2002, such as Figure 16 As shown in Figure B, a high dielectric constant layer 1011 is formed as a MIM capacitor. To reduce the area of ​​the MIM capacitor, it is desirable that the high dielectric constant layer 1011 be made of a high dielectric constant material such as silicon nitride and aluminum oxide. In this example, a silicon nitride film is formed by plasma CVD, a resist with the desired shape is formed by a photolithography step, and then dry etching is performed using a fluorine-based gas.

[0225] In S2003, such as Figure 16 As shown in S2003, a first conductor layer 1002 is formed. The first conductor layer 1002 is formed from metals such as Mo, W, Ti, Ta, Al, Cu, and Au, their alloys, semiconductors doped at the same concentration, and their laminated films. At this time, the upper electrode of the MIM capacitor is also formed simultaneously with the first conductor layer 1002. The first conductor layer 1002 is formed to make ohmic contact with the substrate 1001. In this embodiment, the Mo electrode is formed by sputtering, a photoresist with the desired shape is formed by photolithography, and then dry etching is performed using a chlorine-based gas. Furthermore, although not illustrated, the mesa structure is protected during the etching process in S2003 by the high dielectric constant layer formed in S2002.

[0226] In S2004, such as Figure 16 As shown in Figure D, a second dielectric layer 1004 is formed. It is desirable that the second dielectric layer 1004 be made of a low dielectric constant material (such as silicon dioxide, BCB, acrylic resin, and polyimide) to reduce the parasitic capacitance between the substrate 1001 and the first conductor layer 1002 and the third conductor layer 1005. In this example, a silicon dioxide film is formed by plasma CVD, a photoresist with the desired shape is formed by a photolithography step, and then dry etching is performed using a fluorine-based gas. This dry etching forms contact holes for forming conductor 1012 in the next step.

[0227] In S2005, such as Figure 16 As shown in E, conductor 1012 and a third conductor layer 1005 (MSL) are formed. The third conductor layer 1005 is formed of metals such as Mo, W, Ti, Ta, Al, Cu, and Au, their alloys, semiconductors doped at the same concentration, and their laminated films. In this example, the Au / Ti laminated electrode is formed by sputtering, a photoresist with the desired shape is formed by photolithography, and then wet etching is performed.

[0228] In S2006, such as Figure 16 As shown in Figure F, resistor portion 1010 is formed. As described above, the resistance of resistor portion 1010 preferably does not exceed the absolute value of the negative resistance of negative resistance element 1003. In this example, WTi alloy is used for resistor portion 1010 to set the resistance of resistor portion 1010 to a few Ω to tens of Ω. Examples of other materials that can be used for resistor portion 1010 include metals such as Ti, TiN, Ta, Mo, and W, their alloys, semiconductors doped at the same concentration, and their laminates. In this example, WTi electrodes are formed by sputtering, a photoresist with the desired shape is formed by a photolithography step, and then dry etching is performed using a fluorine-based gas.

[0229] In S2007, such as Figure 16 As shown in G, a first dielectric layer 1006 is formed. It is desirable that the first dielectric layer 1006 be made of a low dielectric constant material (such as silicon dioxide, BCB, acrylic resin, and polyimide) to reduce the parasitic capacitance between the substrate 1001 and the first conductor layer 1002, and the second conductor layer 1007. Additionally, a contact hole 1013 is also formed at this time, but the contact hole 1013 is formed such that the central axis of the contact hole 1013 is not aligned with the central axis of the conductor 1012 in the stacking direction. In other words, the contact hole 1013 is formed such that a portion of the conductor 1012 in the stacking direction remains covered by the first dielectric layer 1006. In this example, a photosensitive BCB is formed by coating, and the desired shape of the first dielectric layer 1006 is obtained through a photolithography step.

[0230] In S2008, such as Figure 16 As shown in H, a second conductor layer 1007 is formed. The second conductor layer 1007 is formed of metals such as Mo, W, Ti, Ta, Al, Cu, and Au, their alloys, semiconductors doped at the same concentration, and their laminated films. In this example, an Au / Ti laminated electrode is formed by sputtering, a photoresist with the desired shape is formed by photolithography, and then wet etching is performed.

[0231] By forming antennas in this way, arranging them in an array, and connecting the resulting elements through a third conductor layer 1005 (MSL), the phase of the electromagnetic waves generated at the antennas can be synchronized.

[0232] (Third example)

[0233] Reference Figure 17 A describes a third example, a modified version of the second example. For simplicity, in... Figure 17 In example A, the substrate 1001, the first conductor layer 1002, and the shunt structure 1008 are not illustrated. Furthermore, each antenna in this example has the same configuration as in the second example. This example differs from the second example in its antenna connection method.

[0234] For the connections between antennas, the connections in the row direction are the same as in the second example. Figure 11 The same applies to B. On the other hand, for connections in the column direction, adjacent antennas arranged in the column direction with a pitch of effective wavelength λ are coupled to each other by propagating electromagnetic waves through space or an insulating film, rather than by connections using the third conductor layer 1005. By arranging the antennas in an array in this way and connecting the resulting elements through the third conductor layer 1005, the phase of the electromagnetic waves generated at the antennas can be synchronized. Therefore, the antennas can be arranged with a pitch of effective wavelength, and the directivity of the electromagnetic waves can be improved.

[0235] (Fourth example)

[0236] Reference Figure 17 B describes a fourth example, a modified version of the third example. For simplicity, in... Figure 17 In example B, substrate 1001, first conductor layer 1002, and shunt structure 1008 are not illustrated. This example illustrates a connection method for an antenna having multiple negative resistive elements. In this example, as in the third embodiment, for connections in the column direction, adjacent antennas arranged in the column direction with a pitch of effective wavelength λ are coupled to each other by propagating electromagnetic waves through space or an insulating film, rather than by connections using the third conductor layer 1005. In this example, two negative resistive elements are located in a patch antenna, and they are driven with their phases reversed.

[0237] By arranging an antenna with multiple negative resistance elements in an array in this manner, and connecting the resulting elements through a third conductor layer 1005, the phase of the electromagnetic waves generated at the antenna can be synchronized. Therefore, the antenna can be arranged with a pitch of the effective wavelength, and the directivity of the electromagnetic waves can be improved.

[0238] (Other embodiments)

[0239] While preferred embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and various modifications and variations can be made within the scope and spirit of the present invention.

[0240] For example, the embodiments and examples described above depict the case where the charge carriers are electrons, but the invention is not limited thereto, and holes can also be used. Furthermore, the materials of the substrate and dielectric can be selected according to the application, and semiconductor layers such as silicon, gallium arsenide, indium arsenide, and gallium phosphide; glass; ceramics; and resins such as polytetrafluoroethylene and lithium terephthalate can be used.

[0241] Furthermore, while the terahertz resonator with a square patch antenna was used in the above embodiments and examples, the shape of the resonator is not limited to this. For example, a resonator with a structure using patch conductors having polygonal (such as rectangular and triangular), circular, or elliptical shapes can be used.

[0242] Furthermore, the number of differential negative resistive elements integrated in the semiconductor device is not limited to one, and the resonator can have multiple differential negative resistive elements. The number of lines is not limited to one, and multiple lines can be formed. The semiconductor devices described in the above embodiments and examples enable the generation and detection of oscillating terahertz waves.

[0243] Furthermore, in each of the above embodiments, a double-barrier RTD formed from InGaAs / AlAs grown on an InP substrate has been described as an RTD. However, the semiconductor device according to the present invention can be provided not only by this structure and material basis, but also by combinations of other structures and materials. For example, an RTD with a triple-barrier quantum well structure or an RTD with a quadruple or more barrier quantum wells can be used.

[0244] In addition, any of the following combinations can be used as the material for the RTD.

[0245] Materials formed on GaAs substrates, such as GaAs / AlGaAs, GaAs / AlAs, and InGaAs / GaAs / AlAs.

[0246] Materials formed on InP substrates, such as InGaAs / InAlAs, InGaAs / AlAs, and InGaAs / AlGaAsSb

[0247] Materials formed on InAs substrates, such as InAs / AlAsSb and InAs / AlSb

[0248] Materials formed on Si substrates, such as SiGe / SiGe

[0249] The aforementioned structures and materials can be appropriately selected based on the desired frequency, etc.

[0250] This invention is not limited to the embodiments described above, and various changes and modifications can be made without departing from the spirit and scope of the invention. Therefore, the appended claims are attached to disclose the scope of the invention.

[0251] This application claims priority to Japanese Patent Application No. 2019-152828, filed on August 23, 2019, the entire contents of which are incorporated herein by reference.

[0252] [List of reference numerals]

[0253] 100 Semiconductor Components

[0254] 113 base plate

[0255] 106 First Conductor Layer

[0256] 115 Semiconductor Layer

[0257] 103 Second Conductor Layer

[0258] 104 dielectric layer

[0259] 109 Coupler Line

[0260] 111 Offset Line

Claims

1. An element comprising: an antenna array in which a plurality of antennas are arranged, each antenna including a first conductor layer, a semiconductor layer electrically connected to the first conductor layer and generating or detecting a terahertz wave, a second conductor layer electrically connected to the semiconductor layer and facing the first conductor layer via the semiconductor layer, and a dielectric layer between the first conductor layer and the second conductor layer; a coupling line connected to the second conductor layer and configured to mutually synchronize between the plurality of antennas at a frequency of the terahertz wave; and a bias line connecting a power supply for supplying a bias signal to the semiconductor layer and the second conductor layer, wherein a wiring layer forming the coupling line and a wiring layer forming the bias line are different layers, and the bias line is provided in a layer between the first conductor layer and the second conductor layer.

2. The element according to claim 1, wherein The coupling line and the bias line cross each other in a plan view.

3. The element according to claim 1 or 2, further comprising a third conductor layer and a fourth conductor layer, wherein the coupling line is formed by the third conductor layer and the first conductor layer, the bias line is formed by the fourth conductor layer, and the third conductor layer and the fourth conductor layer are arranged in different layers.

4. The element according to claim 3, wherein The third conductor layer and the fourth conductor layer cross each other in a plan view.

5. The element according to claim 3, further comprising: a fifth conductor layer provided in a layer between a group of the third conductor layer and the fourth conductor layer and the first conductor layer; and a capacitor structure in which the dielectric layer is interposed between the first conductor layer and the fifth conductor layer. The third conductor layer or the fourth conductor layer is electrically connected to the fifth conductor layer via a resistor.

6. The element according to claim 5, wherein The first conductor layer, the fourth conductor layer, and the third conductor layer are stacked in this order.

7. The element according to claim 3, wherein The bias line is set to have an impedance lower than an impedance of the semiconductor layer in a frequency band lower than the frequency of the terahertz wave.

8. The element according to claim 1, wherein In the antenna array, the antennas are arranged in an m x n matrix, where m ≥ 2 and n ≥ 2.

9. The element according to claim 1, wherein The antennas are arranged with a pitch that is an integer multiple of a wavelength of the terahertz wave.

10. The element according to claim 1, wherein Each of the antennas is a patch antenna.

11. The element according to claim 1, wherein The semiconductor layer includes a negative resistance element.

12. The element according to claim 1, wherein The negative resistance element is a resonant tunneling diode.

13. The element of claim 12, wherein, 14. An element comprising: an antenna array in which a plurality of antennas are arranged, each antenna including a first conductor layer, a semiconductor layer electrically connected to the first conductor layer and generating or detecting a terahertz wave, a second conductor layer electrically connected to the semiconductor layer and facing the first conductor layer via the semiconductor layer, and a dielectric layer between the first conductor layer and the second conductor layer; a coupling line connected to the second conductor layer and configured to mutually synchronize between the plurality of antennas at a frequency of the terahertz wave; and a bias line connecting a power supply for supplying a bias signal to the semiconductor layer and the second conductor layer, wherein a wiring layer forming the coupling line and a wiring layer forming the bias line are different layers, the element further comprises a third conductor layer and a fourth conductor layer, wherein the coupling line is formed by the third conductor layer and the first conductor layer, the bias line is formed by the fourth conductor layer, the third conductor layer and the fourth conductor layer are arranged in different layers, and the first conductor layer, the third conductor layer, and the fourth conductor layer are stacked in this order.

15. The element according to claim 14, wherein a contact hole is formed through a portion of the dielectric layer in a stacking direction, ​ by forming a part of the second conductor layer on a surface of the contact hole, the second conductor layer and the third conductor layer are connected to each other, and in a stacking direction, the semiconductor layer is covered by the dielectric layer.

16. An element comprising: an antenna array in which a plurality of antennas are arranged, each antenna including a first conductor layer, a semiconductor layer electrically connected to the first conductor layer and generating or detecting a terahertz wave, a second conductor layer electrically connected to the semiconductor layer and facing the first conductor layer via the semiconductor layer, and a dielectric layer between the first conductor layer and the second conductor layer; a coupling line connected to the second conductor layer and configured to mutually synchronize the plurality of antennas at a frequency of the terahertz wave; and a bias line connecting a power source for supplying a bias signal to the semiconductor layer and the second conductor layer, wherein a wiring layer forming the coupling line and a wiring layer forming the bias line are different layers, and adjacent antennas in the antenna array are connected to a common bias line provided between the adjacent antennas. Each of the antennas is connected to the common bias line via a lead narrower than a width of the antenna.

17. The element of claim 16, wherein, ​

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