Display panels and mobile terminals

Abstract

This invention discloses a display panel and a mobile terminal. The display panel includes a substrate, an active layer on the substrate, a first insulating layer on the active layer, and a gate layer on the first insulating layer. The gate layer includes a first portion disposed parallel to the active layer and a second portion located on at least one side of the active layer. The second portion extends towards the substrate and includes an overlapping portion disposed in the same layer as the active layer. By extending the gate layer towards the substrate and creating an overlapping portion in the same layer as the active layer, this invention strengthens the control of the channel of the active layer and the carrier concentration at the channel edge through the three-dimensional gate control formed by the overlapping portion of the first and second portions, thereby further mitigating the short-channel effect and improving the stability of the display panel.

Description

Technical Field

[0001] This invention relates to the field of display, and more specifically to a display panel and a mobile terminal. Background Technology

[0002] In recent years, for high-resolution display panels, the trace patterns have become smaller and smaller. For the active layer of the display panel, the smaller line width will make the active layer channel shorter, resulting in the narrow channel effect, which will increase the leakage current of the array substrate and reduce the stability of the display panel.

[0003] Therefore, there is an urgent need for a display panel and mobile terminal to solve the above-mentioned technical problems. Summary of the Invention

[0004] This invention provides a display panel and a mobile terminal, which can alleviate the technical problem that the reduced stability of the display panel is caused by the shortening of the active layer channel.

[0005] This invention provides a display panel, comprising:

[0006] Substrate;

[0007] An active layer is located on the substrate;

[0008] A first insulating layer is located on the active layer;

[0009] A gate layer is located on the first insulating layer. The gate layer includes a first portion disposed parallel to the active layer and a second portion located on at least one side of the active layer, the second portion extending toward the substrate.

[0010] The second part includes an overlapping portion disposed on the same layer as the active layer.

[0011] Preferably, the display panel further includes a buffer layer located between the substrate and the active layer. The buffer layer includes a first unit and a second unit connected together. The thickness of the first unit is greater than the thickness of the second unit. The active layer is located on the first unit. The first insulating layer covers the side of the first unit and the surface of the second unit away from the substrate. The distance between the surface of the active layer away from the substrate and the surface of the second unit away from the substrate is greater than the thickness of the first insulating layer.

[0012] Preferably, the gate layer further includes a third portion extending from the overlapping portion onto the second unit, the third portion being parallel to the first portion.

[0013] Preferably, the sum of the thickness of the third portion, the thickness of the second unit, and the thickness of the first insulating layer located between the third portion and the second unit is less than or equal to the thickness of the first unit.

[0014] Preferably, the first insulating layer includes a plurality of first openings, and the distance between the bottom surface of the first opening and the substrate is less than the distance between the surface of the active layer away from the substrate and the substrate.

[0015] Preferably, the display panel further includes a buffer layer located between the substrate and the active layer, wherein the first opening penetrates the first insulating layer, exposing the buffer layer.

[0016] Preferably, the buffer layer includes a plurality of second openings, with one first opening corresponding to one second opening; the display panel further includes a first metal layer located within the buffer layer, the second openings exposing the first metal layer, the gate layer being electrically connected to the first metal layer through the first openings and the second openings, and the orthographic projection of the first metal layer onto the active layer having a first overlapping area with the active layer.

[0017] Preferably, the display panel further includes a second metal layer located within the buffer layer, wherein the orthographic projection of the first metal layer onto the active layer has a second overlapping area with the active layer, the buffer layer includes a plurality of first blind vias, and the second metal layer is electrically connected to the first metal layer through the first blind vias.

[0018] Preferably, the display panel further includes a second insulating layer on the gate layer, a source / drain layer on the second insulating layer, and a third metal layer within the buffer layer, wherein the third metal layer is insulated from the first metal layer; wherein the second insulating layer includes a plurality of third openings, the first insulating layer includes a plurality of fourth openings, and the buffer layer includes a plurality of fifth openings, wherein the third, fourth, and fifth openings are correspondingly connected, the fifth openings expose the third metal layer, and the source / drain layer is electrically connected to the third metal layer through the third, fourth, and fifth openings.

[0019] The present invention also provides a mobile terminal, including a display panel as described above and a terminal body, wherein the terminal body and the display panel are integrated into one unit.

[0020] The beneficial effects of this invention are as follows: By extending the gate layer closer to the substrate, the gate layer has an overlapping portion that is disposed in the same layer as the active layer. Through the three-dimensional gate control formed by the overlapping portion of the first and second portions, the control of the channel of the active layer and the carrier concentration at the channel edge is strengthened, the short channel effect is further alleviated, and the stability of the display panel is improved. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a partial top view of the display panel provided in an embodiment of the present invention;

[0023] Figure 2 yes Figure 1 A schematic diagram of the first structure along section A1A2;

[0024] Figure 3 yes Figure 1 A schematic diagram of the second structure along section A1A2;

[0025] Figure 4 yes Figure 1 A schematic diagram of the first type of structure along section B1B2;

[0026] Figure 5 yes Figure 1 A schematic diagram of the third structure along section A1A2;

[0027] Figure 6 yes Figure 1 A schematic diagram of the fourth structure along section A1A2;

[0028] Figure 7 yes Figure 1 A schematic diagram of the second structure along section B1B2;

[0029] Figure 8 yes Figure 1 A schematic diagram of the fifth structure along section A1A2;

[0030] Figure 9 yes Figure 1 A schematic diagram of the sixth structure along section A1A2;

[0031] Figure 10 yes Figure 1 A schematic diagram of the third structure along section B1B2;

[0032] Figure 11 This is a schematic diagram of the structure of a mobile terminal provided in an embodiment of the present invention. Detailed Implementation

[0033] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Furthermore, it should be understood that the specific embodiments described herein are only for illustration and explanation of the present invention and are not intended to limit the present invention. In the present invention, unless otherwise stated, directional terms such as "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, specifically the drawing directions in the accompanying drawings; while "inner" and "outer" refer to the outline of the device.

[0034] In recent years, for high-resolution display panels, the trace patterns have become smaller and smaller. For the active layer of the display panel, the smaller line width will make the active layer channel shorter, resulting in the narrow channel effect, which will increase the leakage current of the array substrate and reduce the stability of the display panel.

[0035] Please see Figures 1 to 10 This invention provides a display panel 100, comprising:

[0036] Substrate 200;

[0037] An active layer 400 is located on the substrate 200;

[0038] The first insulating layer 510 is located on the active layer 400;

[0039] A gate layer 600 is located on the first insulating layer 510. The gate layer 600 includes a first portion 610 disposed parallel to the active layer 400 and a second portion 620 located on at least one side of the active layer 400. The second portion 620 extends toward the side closer to the substrate 200.

[0040] The second part 620 includes an overlapping portion 621 disposed on the same layer as the active layer 400.

[0041] This invention extends the gate layer closer to the substrate, creating an overlapping portion between the gate layer and the active layer. By controlling the three-dimensional gate formed by the overlapping portion of the first and second parts, the control over the channel of the active layer and the carrier concentration at the channel edge is enhanced, further mitigating the short-channel effect and improving the stability of the display panel.

[0042] The technical solution of the present invention will now be described in conjunction with specific embodiments.

[0043] In this embodiment, please refer to Figure 1 , 2 The display panel 100 includes a substrate 200, an active layer 400 on the substrate 200, a first insulating layer 510 on the active layer 400, and a gate layer 600 on the first insulating layer 510.

[0044] In some embodiments, please refer to Figure 2 , Figure 4 The gate layer 600 includes a first portion 610 disposed parallel to the active layer 400 and a second portion 620 located on at least one side of the active layer 400, the second portion 620 extending toward the side closer to the substrate 200; wherein, the second portion 620 includes an overlapping portion 621 disposed in the same layer as the active layer 400.

[0045] The active layer 400 includes a channel 410 located in the middle and source-drain connection portions 420 located on both sides of the channel 410. The first portion 610 corresponds to the channel 410 of the active layer 400. By extending the gate layer 600 towards the side closer to the substrate 200, the gate layer 600 has an overlapping portion 621 disposed on the same layer as the active layer 400. The overlapping portion 621 of the first portion 610 and the second portion 620 can perform three-dimensional gate control on the active layer 400, which greatly enhances the control of the channel 410 and the edge of the channel 410 of the active layer 400, strengthens the control of the carrier concentration of the channel 410 and the edge of the channel 410 of the active layer 400, further alleviates the short channel 410 effect, improves the stability of the display panel 100, and eliminates the need for additional photomasks and other process steps, which is beneficial for the fabrication of the ultra-high resolution display panel 100.

[0046] In some embodiments, please refer to Figure 2 , Figure 4 The display panel 100 further includes a buffer layer 300 located between the substrate 200 and the active layer 400. The buffer layer 300 includes a first unit 310 and a second unit 320 connected together. The thickness of the first unit 310 is greater than the thickness of the second unit 320. The active layer 400 is located on the first unit 310. The first insulating layer 510 covers the side of the first unit 310 and the surface of the second unit 320 away from the substrate 200. The distance between the surface of the active layer 400 away from the substrate 200 and the surface of the second unit 320 away from the substrate 200 is greater than the thickness of the first insulating layer 510.

[0047] By patterning the buffer layer 300, the buffer layer 300 is recessed to form buffer layers 300 of different heights. The active layer 400 is on the first unit 310 of the higher layer. The distance between the surface of the active layer 400 away from the substrate 200 and the surface of the second unit 320 away from the substrate 200 is greater than the thickness of the first insulating layer 510. Therefore, when forming the gate layer 600, the second portion 620 extending to at least one side of the active layer 400 can have an overlapping portion 621 disposed on the same layer as the active layer 400.

[0048] An overlapping portion 621 is provided in the same layer as the active layer 400. The first portion 610 and the overlapping portion 621 can jointly provide a gate structure that controls the active layer 400 on two sides (i.e., the overlapping portion 621 is on one side of the active layer 400) or three sides (i.e., the overlapping portion 621 is on opposite sides of the active layer 400). This can help enhance the control of the channel 410 and the edge of the channel 410 of the active layer 400, strengthen the control of the carrier concentration of the channel 410 and the edge of the channel 410 of the active layer 400, and further alleviate the short-channel 410 effect.

[0049] In some embodiments, please refer to Figure 3 , Figure 4 The gate layer 600 further includes a third portion extending from the overlapping portion 621 to the second unit 320, the third portion being parallel to the first portion 610.

[0050] The third part extends from the overlapping portion 621, which can further enhance the influence of the gate structure on the side of the active layer 400. This can help enhance the control of the channel 410 and the edge of the channel 410 of the active layer 400, strengthen the control of the carrier concentration of the channel 410 and the edge of the channel 410 of the active layer 400, and further alleviate the short channel 410 effect.

[0051] In some embodiments, please refer to Figure 3 The sum of the thickness of the third portion, the thickness of the second unit 320, and the thickness of the first insulating layer 510 located between the third portion and the second unit 320 is less than or equal to the thickness of the first unit 310.

[0052] The sum of the thickness of the third portion, the thickness of the second unit 320, and the thickness of the first insulating layer 510 located between the third portion and the second unit 320 is less than or equal to the thickness of the first unit 310. The thickness difference between the first unit 310 and the second unit 320 is relatively large, for example, it can be greater than 1000 angstroms. This can increase the relative area of ​​the gate structure on the side of the active layer 400, further enhance the influence of the gate structure on the side of the active layer 400, and help to enhance the control of the channel 410 and the edge of the channel 410 of the active layer 400, strengthen the control of the carrier concentration of the channel 410 and the edge of the channel 410 of the active layer 400, and further alleviate the short-channel 410 effect.

[0053] In some embodiments, please refer to Figure 5 , Figure 7 The first insulating layer 510 includes a plurality of first openings 710, and the distance between the bottom surface of the first opening 710 and the substrate 200 is less than the distance between the surface of the active layer 400 away from the substrate 200 and the substrate 200.

[0054] By patterning the first insulating layer 510 to form a plurality of first openings 710, the distance between the bottom surface of the first opening 710 and the substrate 200 is less than the distance between the surface of the active layer 400 away from the substrate 200 and the substrate 200. This structure allows the material of the gate layer 600 to form the overlapping portion 621 disposed in the same layer as the active layer 400 through the first openings 710 when the gate layer 600 is formed. This can jointly control the active layer 400 on two sides (i.e., the overlapping portion 621 is on one side of the active layer 400) or three sides (i.e., the overlapping portion 621 is on opposite sides of the active layer 400) of the gate structure. This can help enhance the control of the channel 410 and the edge of the channel 410 of the active layer 400, strengthen the control of the carrier concentration of the channel 410 and the edge of the channel 410 of the active layer 400, and further alleviate the short-channel 410 effect.

[0055] In some embodiments, please refer to Figure 5 The display panel 100 further includes a buffer layer 300 located between the substrate 200 and the active layer 400, wherein the first opening 710 penetrates the first insulating layer 510, exposing the buffer layer 300.

[0056] The first opening 710 penetrates the first insulating layer 510, exposing the buffer layer 300. The overlapping portion 621 maximizes the area of ​​the side surface of the active layer 400, further enhancing the influence of the gate structure on the side surface of the active layer 400. This can help strengthen the control of the channel 410 and the edge of the channel 410 of the active layer 400, strengthen the control of the carrier concentration of the channel 410 and the edge of the channel 410 of the active layer 400, and further alleviate the short-channel 410 effect.

[0057] In some embodiments, please refer to Figure 6 , Figure 7 The buffer layer 300 includes a plurality of second openings 720, with one first opening 710 corresponding to one second opening 720.

[0058] Through the second opening 720, the relative area between the gate layer 600 and the side of the active layer 400 is further increased, which further enhances the influence of the gate structure on the side of the active layer 400. This can help to enhance the control of the channel 410 and the edge of the channel 410 of the active layer 400, strengthen the control of the carrier concentration of the channel 410 and the edge of the channel 410 of the active layer 400, and further alleviate the short channel 410 effect.

[0059] In some embodiments, please refer to Figure 6 , Figure 7 The display panel 100 further includes a first metal layer 810 located within the buffer layer 300, and the second opening 720 exposes the first metal layer 810. The gate layer 600 is electrically connected to the first metal layer 810 through the first opening 710 and the second opening 720. The orthographic projection of the first metal layer 810 onto the active layer 400 has a first overlapping area with the active layer 400.

[0060] The gate layer 600 is electrically connected to the first metal layer 810, and the first metal layer 810 also has the electrical signal of the gate layer 600. The orthogonal projection of the first metal layer 810 on the active layer 400 has a first overlapping area with the active layer 400. Therefore, the first metal layer 810 and the gate layer 600 together provide a gate structure that controls the active layer 400 on three sides (i.e., the overlapping portion 621 is on one side of the active layer 400) or four sides (i.e., the overlapping portion 621 is on opposite sides of the active layer 400). This can help enhance the control of the channel 410 and the edge of the channel 410 of the active layer 400, strengthen the control of the carrier concentration of the channel 410 and the edge of the channel 410 of the active layer 400, and further alleviate the short-channel 410 effect.

[0061] In some embodiments, the orthographic projection of the active layer 400 onto the first metal layer 810 lies within the first metal layer 810. Maximizing the area of ​​the bottom surface of the first metal layer 810 and the active layer 400 further enhances the influence of the gate structure on the bottom surface of the active layer 400. This can improve control over the channel 410 and its edges in the active layer 400, strengthen control over carrier concentration in the channel 410 and its edges, and further mitigate the short-channel 410 effect.

[0062] In some embodiments, please refer to Figure 8 The display panel 100 further includes a second metal layer 820 located within the buffer layer 300. The orthographic projection of the first metal layer 810 onto the active layer 400 has a second overlapping area with the active layer 400. The buffer layer 300 includes a plurality of first blind holes 790. The second metal layer 820 is electrically connected to the first metal layer 810 through the first blind holes 790.

[0063] By connecting multiple metal layers in parallel, on the one hand, the positive relative area of ​​the bottom surface of the active layer 400 can be increased, further improving the influence of the gate structure on the bottom surface of the active layer 400 and further mitigating the short-channel 410 effect; on the other hand, the resistance of the gate layer 600 can be reduced, the voltage drop can be reduced, and the display effect can be improved.

[0064] In some embodiments, the orthographic projection of the active layer 400 onto the second metal layer 820 lies within the second metal layer 820. Maximizing the area of ​​the bottom surface of the second metal layer 820 and the active layer 400 further enhances the influence of the gate structure on the bottom surface of the active layer 400. This can improve control over the channel 410 and its edges in the active layer 400, strengthen control over carrier concentration in the channel 410 and its edges, and further mitigate the short-channel 410 effect.

[0065] In some embodiments, please refer to Figure 6 , Figure 7The display panel 100 further includes a second insulating layer 520 on the gate layer 600, a source-drain layer 910 on the second insulating layer 520, and a third metal layer 830 within the buffer layer 300. The third metal layer 830 is insulated from the first metal layer 810. The second insulating layer 520 includes a plurality of third openings 730, the first insulating layer 510 includes a plurality of fourth openings 740, and the buffer layer 300 includes a plurality of fifth openings 750. The third openings 730, the fourth openings 740, and the fifth openings 750 are correspondingly connected. The fifth openings 750 expose the third metal layer 830. The source-drain layer 910 is electrically connected to the third metal layer 830 through the third openings 730, the fourth openings 740, and the fifth openings 750.

[0066] The source-drain layer 910 includes a source and a drain. Either the source or the drain is electrically connected to the third metal layer 830 to balance the voltage, improve voltage stability, and enhance the display effect of the display panel 100.

[0067] In some embodiments, please refer to Figure 4 , Figure 7 The second insulating layer 520 includes a plurality of sixth openings 760, and the first insulating layer 510 includes a plurality of seventh openings 770. The sixth openings 760 and the seventh openings 770 are correspondingly connected and disposed. The seventh openings 770 expose the source-drain connection portion 420 of the active layer 400. The source-drain layer 910 is electrically connected to the source-drain connection portion 420 of the active layer 400 through the sixth openings 760 and the seventh openings 770.

[0068] In some embodiments, the display panel 100 may be a liquid crystal display panel 100 or a self-emissive display panel 100, and no specific limitation is made here.

[0069] In some embodiments, the display panel 100 is a liquid crystal display panel 100, and the display panel 100 further includes a liquid crystal layer, a color filter layer located on the liquid crystal, a polarizing layer located on both sides of the liquid crystal layer, and a backlight unit.

[0070] In some embodiments, the display panel 100 is a self-emissive display panel 100, and the display panel 100 further includes a light-emitting functional layer. The light-emitting device layer may include OLED (Organic Light-Emitting Diode) material, or Micro LED or Mini LED, without specific limitations.

[0071] In some embodiments, please refer to Figure 9 , Figure 10 The display panel 100 includes a third insulating layer 530 on the source-drain layer 910, a common electrode layer 920 on the third insulating layer 530, a fourth insulating layer 540 on the common electrode layer 920, and a pixel electrode layer 930 on the third insulating layer 530. The third insulating layer 530 includes a plurality of eighth openings 780, and the pixel electrode layer 930 is electrically connected to the source-drain layer 910 through the eighth openings 780.

[0072] This invention extends the gate layer closer to the substrate, creating an overlapping portion between the gate layer and the active layer. By controlling the three-dimensional gate formed by the overlapping portion of the first and second parts, the control over the channel of the active layer and the carrier concentration at the channel edge is enhanced, further mitigating the short-channel effect and improving the stability of the display panel.

[0073] This invention also provides a method for manufacturing a display panel 100, comprising:

[0074] S100, An active layer 400 is formed on the substrate 200.

[0075] S200, a first insulating layer 510 is formed on the active layer 400.

[0076] S300, a gate layer 600 is formed on the first insulating layer 510, including a first portion 610 disposed parallel to the active layer 400 and a second portion 620 located on at least one side of the active layer 400.

[0077] The second portion 620 extends toward the side closer to the substrate 200, and the second portion 620 includes an overlapping portion 621 disposed in the same layer as the active layer 400.

[0078] This invention extends the gate layer closer to the substrate, creating an overlapping portion between the gate layer and the active layer. By controlling the three-dimensional gate formed by the overlapping portion of the first and second parts, the control over the channel of the active layer and the carrier concentration at the channel edge is enhanced, further mitigating the short-channel effect and improving the stability of the display panel.

[0079] The technical solution of the present invention will now be described in conjunction with specific embodiments.

[0080] In this embodiment, the method for manufacturing the display panel 100 includes:

[0081] S100, An active layer 400 is formed on the substrate 200.

[0082] In some embodiments, the gate layer 600 is formed on the side of the active layer 400 in different ways, and step S100 is divided into two formation methods. Step S100 may include:

[0083] S110a, A buffer layer 300 including a first unit 310 and a second unit 320 connected together is formed on a substrate 200.

[0084] In some embodiments, the thickness of the first unit 310 is greater than the thickness of the second unit 320.

[0085] S120a, The active layer 400 is formed in the buffer layer 300.

[0086] In some embodiments, the active layer 400 is located on the first unit 310.

[0087] Step S100 may also include:

[0088] S110b, A buffer layer 300 is formed on the substrate 200.

[0089] In some embodiments, step S110b can be divided into three categories, and step S110b includes:

[0090] S111c, A first metal layer 810 is formed on the substrate 200.

[0091] S112c. A buffer material is formed on the first metal layer 810 to cover the first metal layer 810, forming a buffer layer 300.

[0092] Step S110b includes:

[0093] S111d, A second metal layer 820 is formed on the substrate 200.

[0094] S112d, A cushioning material is formed on the second metal layer 820.

[0095] S113d, A plurality of first blind holes 790 are formed on the buffer material.

[0096] S114d, A first metal layer 810 is formed on the buffer material.

[0097] S115d, A buffer material is formed on the first metal layer 810 to form a buffer layer 300.

[0098] Step S110b includes:

[0099] S111d, A third metal layer 830 is formed on the substrate 200.

[0100] S112d, A cushioning material is formed on the third metal layer 830.

[0101] S113d, A second metal layer 820 is formed on the buffer material.

[0102] S114d, A cushioning material is formed on the second metal layer 820.

[0103] S115d, A plurality of first blind holes 790 are formed on the buffer material.

[0104] S116d, A first metal layer 810 is formed on the buffer material.

[0105] S117d. A buffer material is formed on the first metal layer 810 to form a buffer layer 300.

[0106] S120b, An active layer 400 is formed on the buffer layer 300.

[0107] In some embodiments, the active layer 400 is made of a semiconductor material.

[0108] S200, a first insulating layer 510 is formed on the active layer 400.

[0109] In some embodiments, the gate layer 600 is formed on the side of the active layer 400 in different ways, corresponding to two formation methods for step S100 and two formation methods for step S200. Step S200 may include:

[0110] S210a, A first insulating layer 510 is formed on the active layer 400. (See below) Figure 2 , Figure 3 , Figure 4 .

[0111] Step S200 may also include:

[0112] S210b, A first insulating layer 510 including a plurality of first openings 710 is formed on the active layer 400.

[0113] In some embodiments, please refer to Figure 5 , Figure 6 The distance between the bottom surface of the first opening 710 and the substrate 200 is less than the distance between the surface of the active layer 400 away from the substrate 200 and the substrate 200.

[0114] In some embodiments, please refer to Figure 5The display panel 100 further includes a buffer layer 300 located between the substrate 200 and the active layer 400, wherein the first opening 710 penetrates the first insulating layer 510, exposing the buffer layer 300.

[0115] S220b, Multiple second openings 720 are formed on the buffer layer 300.

[0116] In some embodiments, one of the first openings 710 corresponds to one of the second openings 720.

[0117] In some embodiments, please refer to Figure 6 The second opening 720 exposes the first metal layer 810. The gate layer 600 is electrically connected to the first metal layer 810 through the first opening 710 and the second opening 720. The orthographic projection of the first metal layer 810 onto the active layer 400 has a first overlapping area with the active layer 400.

[0118] S300, a gate layer 600 is formed on the first insulating layer 510, including a first portion 610 disposed parallel to the active layer 400 and a second portion 620 located on at least one side of the active layer 400.

[0119] In some embodiments, the method of manufacturing the display panel 100 further includes:

[0120] S400: Using the gate layer 600 as a mask, the active layer 400 is ionized to form a channel 410 corresponding to the first portion 610 and source-drain connection portions 420 located on both sides of the channel 410.

[0121] The active layer 400 includes a channel 410 located in the middle and source-drain connection portions 420 located on both sides of the channel 410. The first portion 610 corresponds to the channel 410 of the active layer 400. By extending the gate layer 600 towards the side closer to the substrate 200, the gate layer 600 has an overlapping portion 621 disposed on the same layer as the active layer 400. The overlapping portion 621 of the first portion 610 and the second portion 620 can perform three-dimensional gate control on the active layer 400, which greatly enhances the control of the channel 410 and the edge of the channel 410 of the active layer 400, strengthens the control of the carrier concentration of the channel 410 and the edge of the channel 410 of the active layer 400, further alleviates the short channel 410 effect, improves the stability of the display panel 100, and eliminates the need for additional photomasks and other process steps, which is beneficial for the fabrication of the ultra-high resolution display panel 100.

[0122] S500, a second insulating layer 520 and a source / drain layer 910 are sequentially formed on the gate layer 600.

[0123] In some embodiments, the display panel 100 further includes a second insulating layer 520 on the gate layer 600, a source-drain layer 910 on the second insulating layer 520, and a third metal layer 830 within the buffer layer 300, wherein the third metal layer 830 is insulated from the first metal layer 810; wherein the second insulating layer 520 includes a plurality of third openings 730, the first insulating layer 510 includes a plurality of fourth openings 740, and the buffer layer 300 includes a plurality of fifth openings 750, wherein the third openings 730, the fourth openings 740, and the fifth openings 750 are correspondingly connected, the fifth openings 750 expose the third metal layer 830, and the source-drain layer 910 is electrically connected to the third metal layer 830 through the third openings 730, the fourth openings 740, and the fifth openings 750.

[0124] The source-drain layer 910 includes a source and a drain. Either the source or the drain is electrically connected to the third metal layer 830 to balance the voltage, improve voltage stability, and enhance the display effect of the display panel 100.

[0125] In some embodiments, please refer to Figure 1 , Figure 4 The second insulating layer 520 includes a plurality of sixth openings 760, and the first insulating layer 510 includes a plurality of seventh openings 770. The sixth openings 760 and the seventh openings 770 are correspondingly connected and disposed. The seventh openings 770 expose the source-drain connection portion 420 of the active layer 400. The source-drain layer 910 is electrically connected to the source-drain connection portion 420 of the active layer 400 through the sixth openings 760 and the seventh openings 770.

[0126] S600, a third insulating layer 530, a common electrode layer 920 located on the third insulating layer 530, a fourth insulating layer 540 located on the common electrode layer 920, and a pixel electrode layer 930 located on the third insulating layer 530 are sequentially formed on the source-drain layer 910.

[0127] In some embodiments, please refer to Figure 9 , Figure 10 The display panel 100 includes a third insulating layer 530 on the source-drain layer 910, a common electrode layer 920 on the third insulating layer 530, a fourth insulating layer 540 on the common electrode layer 920, and a pixel electrode layer 930 on the third insulating layer 530. The third insulating layer 530 includes a plurality of eighth openings 780, and the pixel electrode layer 930 is electrically connected to the source-drain layer 910 through the eighth openings 780.

[0128] This invention extends the gate layer closer to the substrate, creating an overlapping portion between the gate layer and the active layer. By controlling the three-dimensional gate formed by the overlapping portion of the first and second parts, the control over the channel of the active layer and the carrier concentration at the channel edge is enhanced, further mitigating the short-channel effect and improving the stability of the display panel.

[0129] Please see Figure 11 The present invention also provides a mobile terminal 10, including a display panel 100 as described above and a terminal body 20, wherein the terminal body 20 and the display panel 100 are combined into one unit.

[0130] For the specific structure of the display panel 100, please refer to any of the above-described embodiments of the display panel 100 and... Figures 1 to 10 This will not be elaborated upon here.

[0131] In this embodiment, the terminal body 20 may include a mid-frame, frame adhesive, etc., and the mobile terminal 10 may be a mobile display terminal such as a mobile phone or tablet, which is not limited here.

[0132] This invention discloses a display panel and a mobile terminal. The display panel includes a substrate, an active layer on the substrate, a first insulating layer on the active layer, and a gate layer on the first insulating layer. The gate layer includes a first portion disposed parallel to the active layer and a second portion located on at least one side of the active layer. The second portion extends towards the substrate and includes an overlapping portion disposed in the same layer as the active layer. By extending the gate layer towards the substrate and creating an overlapping portion in the same layer as the active layer, this invention strengthens the control of the channel of the active layer and the carrier concentration at the channel edge through the three-dimensional gate control formed by the overlapping portion of the first and second portions, thereby further mitigating the short-channel effect and improving the stability of the display panel.

[0133] The above provides a detailed description of a display panel and mobile terminal provided by the embodiments of the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A display panel, characterized in that, include: Substrate; An active layer is located on the substrate; A first insulating layer is located on the active layer; A gate layer is located on the first insulating layer. The gate layer includes a first portion disposed parallel to the active layer and a second portion located on at least one side of the active layer, the second portion extending toward the substrate. Wherein, the projection of the first part onto the active layer covers the active layer, and the second part includes an overlapping portion disposed on the same layer as the active layer; The display panel further includes a buffer layer located between the substrate and the active layer. The buffer layer includes a first unit and a second unit connected together. The thickness of the first unit is greater than the thickness of the second unit, and the active layer is located on the first unit.

2. The display panel according to claim 1, characterized in that, The first insulating layer covers the side of the first unit and the surface of the second unit away from the substrate; The distance between the surface of the active layer away from the substrate and the surface of the second unit away from the substrate is greater than the thickness of the first insulating layer.

3. The display panel according to claim 2, characterized in that, The gate layer further includes a third portion extending from the overlapping portion onto the second unit, the third portion being parallel to the first portion.

4. The display panel according to claim 3, characterized in that, The sum of the thickness of the third part, the thickness of the second unit, and the thickness of the first insulating layer located between the third part and the second unit is less than or equal to the thickness of the first unit.

5. The display panel according to claim 1, characterized in that, The first insulating layer includes a plurality of first openings, the distance between the bottom surface of the first opening and the substrate being less than the distance between the surface of the active layer away from the substrate and the substrate.

6. The display panel according to claim 5, characterized in that, The display panel further includes a buffer layer located between the substrate and the active layer, and the first opening penetrates the first insulating layer to expose the buffer layer.

7. The display panel according to claim 6, characterized in that, The buffer layer includes a plurality of second openings, with one first opening corresponding to one second opening; The display panel further includes a first metal layer located within the buffer layer, the second opening exposes the first metal layer, the gate layer is electrically connected to the first metal layer through the first opening and the second opening, and the orthographic projection of the first metal layer on the active layer has a first overlap area with the active layer.

8. The display panel according to claim 7, characterized in that, The display panel further includes a second metal layer located within the buffer layer. The orthographic projection of the first metal layer onto the active layer has a second overlapping area with the active layer. The buffer layer includes a plurality of first blind vias, and the second metal layer is electrically connected to the first metal layer through the first blind vias.

9. The display panel according to claim 7, characterized in that, The display panel further includes a second insulating layer on the gate layer, a source / drain layer on the second insulating layer, and a third metal layer within the buffer layer, wherein the third metal layer is insulated from the first metal layer. The second insulating layer includes a plurality of third openings, the first insulating layer includes a plurality of fourth openings, and the buffer layer includes a plurality of fifth openings. The third, fourth, and fifth openings are connected in a corresponding manner. The fifth opening exposes the third metal layer. The source and drain layers are electrically connected to the third metal layer through the third, fourth, and fifth openings.

10. A mobile terminal, characterized in that, It includes a display panel and a terminal body as described in any one of claims 1 to 9, wherein the terminal body and the display panel are integrated into one unit.

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