Multiphase converter control system and method for interleaving multiphase converters

Abstract

The desired off-period module is configured to determine a desired off-period of a plurality of switches of the PFC circuit based on an input voltage and an output voltage. The blanking timer module is configured to: output a blanking signal, set the blanking signal to a first state when the countdown timer is greater than zero, and set the blanking signal to a second state when the countdown timer reaches zero. The switching control module is configured to: in response to (i) a measured current through an inductor of the PFC circuit being greater than a demand current through the inductor and (ii) the blanking signal being in the second state, transition a first switch of the plurality of switches from an on state to an off state; and maintain the first switch in an off state for a desired off-period after the transition.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Patent Application No. 16 / 938,219, filed on July 24, 2020, and also claims the benefit of U.S. Provisional Application No. 62 / 879,162, filed on July 26, 2019. The entire disclosures of the above-referenced applications are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to voltage converters, and more particularly, to systems and methods of controlling switching of voltage converters. Background Art

[0004] The background description provided here is for the purpose of generally presenting the context of the present disclosure. It is neither explicitly nor implicitly admitted that the work of the presently named inventors within the scope described in this background section and aspects of the description that may not otherwise be considered prior art at the time of filing are prior art against the present disclosure.

[0005] Electric motors are used in a variety of industrial and residential applications, including but not limited to heating, ventilation and air conditioning (HVAC) systems. By way of example only, an electric motor may drive a compressor in an HVAC system. One or more additional electric motors may also be implemented in an HVAC system. By way of example only, an HVAC system may include another electric motor that drives a fan associated with a condenser. Another electric motor may be included in an HVAC system to drive a fan associated with an evaporator. Summary of the invention

[0006] In one feature, a power factor correction (PFC) system includes: a desired off-period module configured to determine a desired off-period of a plurality of switches of the PFC circuit based on an input voltage of the PFC circuit and an output voltage of the PFC circuit; a blanking timer module configured to output a blanking signal to set the blanking signal to a first state when a countdown timer is greater than zero and to set the blanking signal to a second state when the countdown timer reaches zero; and a switching control module configured to: transition a first switch of the plurality of switches from an on state to an off state in response to (i) a measured current through an inductor of the PFC circuit being greater than a demand current through the inductor and (ii) the blanking signal being in the second state; and after transitioning from the on state to the off state, maintain the first switch of the plurality of switches in the off state for at least the desired off-period.

[0007] In further features, the desired disconnect period module is configured to set the desired disconnect period using one of: (i) an equation correlating input voltage and output voltage to the desired disconnect period; and (ii) a lookup table correlating input voltage and output voltage to the desired disconnect period.

[0008] In further features, the desired disconnection period module is configured to set the desired disconnection period using the following equation: Where DOP is the desired off-time, t p is the scheduled switching period, v i is the input voltage, and v o is the output voltage.

[0009] In additional features, the first timer module is configured to output a first time representing a first period of time that the first switch of the plurality of switches is in an off state, wherein the switching control module is configured to: determine a maximum off period of time for the first switch of the plurality of switches based on an off period of a converter branch associated with the first switch of the plurality of switches, and in response to determining that the first time is greater than or equal to (i) the expected off period and (ii) the maximum off period, transition the first switch of the plurality of switches from the off state to the on state.

[0010] In additional features, the second timer module is configured to output a second time representing a second period of time elapsed since a second switch of the plurality of switches transitioned from an off state to an on state, wherein the switching control module is configured to: determine a threshold associated with the second switch of the plurality of switches based on an off period of the converter branch, and transition the first switch of the plurality of switches from the off state to the on state in response to determining that (i) the first time is greater than or equal to the expected off period and (ii) the second time is greater than or equal to the determined threshold.

[0011] In further features, the switching control module is configured to delay a predetermined dead time in response to transitioning a first switch of the plurality of switches from an on state to an off state, and to transition a third switch of the plurality of switches from an off state to an on state once the predetermined dead time has elapsed.

[0012] In another feature, transitioning the first switch among the plurality of switches from an off state to an on state includes: transitioning a third switch among the plurality of switches from an on state to an off state; and delaying a predetermined dead time, after which the first switch among the plurality of switches is transitioned from an off state to an on state.

[0013] In further features, the blanking timer module is configured to reset the countdown timer in response to one of: a first switch of the plurality of switches transitioning from an on state to an off state; and a second switch of the plurality of switches transitioning from an on state to an off state.

[0014] In further features, the switching control module is configured to store a first time output by the first timer module as an off period of the converter branch in response to a measured current through an inductor of the PFC circuit being greater than a demand current through the inductor.

[0015] In further features, the desired off period module is configured to determine the desired off period based on a switching cycle associated with a first switch of the plurality of switches.

[0016] In one feature, a power factor correction (PFC) method includes: determining a desired off period of a plurality of switches of a PFC circuit based on an input voltage of the PFC circuit and an output voltage of the PFC circuit; outputting a blanking signal; setting the blanking signal to a first state when a countdown timer is greater than zero; setting the blanking signal to a second state when the countdown timer reaches zero; transitioning a first switch of the plurality of switches from an on state to an off state in response to (i) a measured current through an inductor of the PFC circuit being greater than a demanded current through the inductor and (ii) the blanking signal being in the second state; and maintaining the first switch of the plurality of switches in an off state for at least the desired off period after transitioning from the on state to the off state.

[0017] In further features, setting the desired disconnect period includes setting the desired disconnect period using one of: (i) an equation correlating input voltage and output voltage to the desired disconnect period; and (ii) a lookup table correlating input voltage and output voltage to the desired disconnect period.

[0018] In further features, setting the desired disconnection period includes setting the desired disconnection period using the following equation: Where DOP is the desired off-time, t p is the scheduled switching period, v i is the input voltage, and v o is the output voltage.

[0019] In additional features, the PFC method further includes: outputting a first time representing a first period during which a first switch among the plurality of switches is in an off state; determining a maximum off period of the first switch among the plurality of switches based on an off period of a converter branch associated with the first switch among the plurality of switches; and in response to determining that the first time is greater than or equal to (i) an expected off period and (ii) a maximum off period, transitioning the first switch among the plurality of switches from the off state to the on state.

[0020] In additional features, the PFC method further includes: outputting a second time representing a second period of time elapsed since a second switch of the plurality of switches transitioned from an off state to an on state; determining a threshold associated with the second switch of the plurality of switches based on an off period of the converter branch; and transitioning the first switch of the plurality of switches from the off state to the on state in response to determining that (i) the first time is greater than or equal to a desired off period and (ii) the second time is greater than or equal to the determined threshold.

[0021] In additional features, the PFC method further includes delaying a predetermined dead time in response to transitioning a first switch of the plurality of switches from an on state to an off state, and transitioning a third switch of the plurality of switches from an off state to an on state once the predetermined dead time has elapsed.

[0022] In another feature, transitioning the first switch among the plurality of switches from an off state to an on state includes: transitioning a third switch among the plurality of switches from an on state to an off state; and delaying a predetermined dead time, after which the first switch among the plurality of switches is transitioned from an off state to an on state.

[0023] In further features, the PFC method further includes resetting the countdown timer in response to one of: a first switch of the plurality of switches transitioning from an on state to an off state; and a second switch of the plurality of switches transitioning from an on state to an off state.

[0024] In further features, the PFC method further includes storing the output first time as an off-period of the converter branch in response to a measured current through an inductor of the PFC circuit being greater than a demand current through the inductor.

[0025] In further features, the PFC method further includes determining a desired off period based on a switching cycle associated with a first switch of the plurality of switches.

[0026] Other areas of applicability of the present disclosure will become apparent from the detailed description, claims and drawings.The detailed description and specific examples are intended for illustrative purposes only and are not intended to limit the scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The present disclosure will be more fully understood based on the detailed description and accompanying drawings, in which:

[0028] Figure 1 is a functional block diagram of an example refrigeration system.

[0029] Figure 2 yes Figure 1 A block diagram of an example implementation of a compressor motor drive.

[0030] Figure 3 yes Figure 2 A block diagram of an example implementation of a power factor correction (PFC) circuit.

[0031] Figure 4 yes Figure 3 A functional block diagram of an example implementation of a PFC circuit.

[0032] Figure 5 is a functional block diagram of an example implementation of a control module.

[0033] Figure 6 is a functional block diagram of an example implementation of a voltage control module.

[0034] Figures 7 and 8 is an example graph of current versus time.

[0035] Fig. 9 is a functional block diagram of an example implementation of a current demand module.

[0036] Fig.10 is a flow chart depicting an example method of determining final current requirements.

[0037] Fig.11 is a functional block diagram of an example implementation of a current control module.

[0038] Fig.12 is a flow chart of an example method including determining a desired off-period of a switch of a converter branch in a PFC circuit and controlling the switch based on the desired off-period.

[0039] Fig.13A and Fig. 13B is a functional block diagram of an example implementation of a reference signal generation module.

[0040] Fig. 13C and Fig.13Dis a functional block diagram of an example implementation of a reference signal generation module.

[0041] Fig.13E and Fig.13F is a functional block diagram of an example implementation of a reference signal generation module.

[0042] Fig.14 Included is an example graph of filtered AC input voltage versus time.

[0043] Fig.15 Included are example graphs of filter correction vs. supply frequency.

[0044] Fig.16 Includes an example graph of voltage versus time for a reference signal.

[0045] Fig.17 is a flow chart depicting an example method of determining an AC line zero crossing.

[0046] Fig.18 is a flow chart depicting an example method of determining a reference signal zero crossing.

[0047] Fig.19 is a flow chart depicting an example method of generating a reference signal.

[0048] Among the drawings, reference numerals may be repeated to identify similar and / or identical elements. DETAILED DESCRIPTION

[0049] Refrigeration system

[0050] Figure 1 1 is a functional block diagram of an example refrigeration system 100, which includes a compressor 102, a condenser 104, an expansion valve 106, and an evaporator 108. According to the principles of the present disclosure, the refrigeration system 100 may include additional and / or alternative components, such as a reversing valve or a filter-dryer. In addition, the present disclosure is applicable to other types of refrigeration systems, including but not limited to heating, ventilation and air conditioning (HVAC) systems, heat pump systems, refrigeration systems, and cooling systems.

[0051] The compressor 102 receives a refrigerant in vapor form and compresses the refrigerant. The compressor 102 provides the pressurized refrigerant in vapor form to the condenser 104. The compressor 102 includes a motor that drives a pump. For example only, the pump of the compressor 102 may include a scroll compressor and / or a reciprocating compressor.

[0052] All or a portion of the pressurized refrigerant is converted to liquid form within the condenser 104. The condenser 104 transfers heat from the refrigerant, thereby cooling the refrigerant. When the refrigerant vapor is cooled to a temperature lower than the saturation temperature, the refrigerant is converted into a liquid (or liquefied) refrigerant. The condenser 104 may include an electric fan that increases the rate at which heat is transferred out of the refrigerant.

[0053] The condenser 104 provides the refrigerant to the evaporator 108 via the expansion valve 106. The expansion valve 106 controls the flow rate of the refrigerant supplied to the evaporator 108. The expansion valve 106 may include a thermostatic expansion valve or may be electronically controlled by, for example, the system controller 130. The pressure drop caused by the expansion valve 106 may cause a portion of the liquefied refrigerant to be converted back into vapor form. In this way, the evaporator 108 may receive a mixture of refrigerant vapor and liquefied refrigerant.

[0054] The refrigerant absorbs heat in the evaporator 108. The liquid refrigerant transforms into vapor form when heated to a temperature higher than the saturation temperature of the refrigerant. The evaporator 108 may include an electric fan that increases the rate at which heat is transferred to the refrigerant.

[0055] The utility 120 provides power to the refrigeration system 100. For example only, the utility 120 may provide approximately 230 volts root mean square (V RMS ) single-phase alternating current (AC) power. In other implementations, the utility 120 may provide approximately 400V at a line frequency of, for example, 50 Hz or 60 Hz. RMS , 480V RMS or 600V RMS Three-phase AC power. The three-phase AC power is nominally 600V RMS The actual available voltage of the power can be 575V RMS .

[0056] The utility 120 may provide AC power to the system controller 130 via an AC line including two or more conductors. AC power may also be provided to the drive device 132 via the AC line. The system controller 130 controls the refrigeration system 100. By way of example only, the system controller 130 may control the refrigeration system 100 based on user input and / or parameters measured by various sensors (not shown). The sensors may include pressure sensors, temperature sensors, current sensors, voltage sensors, etc. The sensors may also include feedback information from the drive control, such as motor current or torque, on a serial data bus or other suitable data bus.

[0057] The user interface 134 provides user input to the system controller 130. The user interface 134 may additionally or alternatively provide user input directly to the drive device 132. For example, the user input may include a desired temperature, a request related to fan operation (e.g., a request to cause the evaporator fan to operate continuously), and / or other appropriate input. The user interface 134 may take the form of a thermostat, and some or all of the functions of the system controller (e.g., including activating a heat source) may be incorporated into the thermostat.

[0058] The system controller 130 may control the operation of the fan of the condenser 104, the fan of the evaporator 108, and the expansion valve 106. The drive device 132 may control the compressor 102 based on commands from the system controller 130. For example only, the system controller 130 may instruct the drive device 132 to operate the motor of the compressor 102 at a specific speed or to operate the compressor 102 at a specific capacity. In various implementations, the drive device 132 may also control the condenser fan.

[0059] The thermistor 140 is thermally coupled to a refrigerant line exiting the compressor 102 that delivers refrigerant vapor to the condenser 104. Thus, the variable resistance of the thermistor 140 varies with the discharge line temperature (DLT) of the compressor 102. As described in greater detail, the driver 132 monitors the resistance of the thermistor 140 to determine the temperature of the refrigerant exiting the compressor 102.

[0060] For example, the DLT can be used to control the compressor 102 by changing the capacity of the compressor 102, and can also be used to detect faults. For example, if the DLT exceeds a threshold, the drive 132 can de-energize the compressor 102 to prevent the compressor 102 from being damaged.

[0061] Drive device

[0062] exist Figure 2 , an example implementation of the driver 132 includes an electromagnetic interference (EMI) filter and protection circuit 204 that receives power from the AC line. The EMI filter and protection circuit 204 reduces EMI that may otherwise be injected back into the AC line from the driver 132. The EMI filter and protection circuit 204 may also remove or reduce EMI from the AC line. In addition, for example, the EMI filter and protection circuit 204 prevents surges that may be caused by lightning and / or other types of surges and power sags.

[0063] The charging circuit 208 controls the power supplied from the EMI filter and protection circuit 204 to the power factor correction (PFC) circuit 212. For example, when the driver 132 is initially powered on, the charging circuit 208 may place a series resistor between the EMI filter and protection circuit 204 and the PFC circuit 212 to reduce the amount of current inrush. These current or power spikes may cause various components to fail prematurely.

[0064] After the initial charge is completed, the charging circuit 208 can close a relay that bypasses the current limiting resistor. For example, the control module 220 can provide a control signal to a relay within the charging circuit 208. In various implementations, the control module 220 can assert the relay control signal to bypass the current limiting resistor after a predetermined period of time after startup or based on closed loop feedback indicating that charging is nearly complete.

[0065] The PFC circuit 212 converts the input AC power into DC power. The PFC circuit 212 may not be limited to the PFC function, for example, the PFC circuit 212 may also perform a voltage conversion function, for example, as a boost circuit and / or a buck circuit. In some implementations, the PFC circuit 212 may be replaced by a non-PFC voltage converter. The DC power may have a voltage ripple, which is reduced by the filter capacitor 224. The filter capacitor 224 may include one or more capacitors arranged in parallel and connected to the DC bus. The PFC circuit 212 may attempt to draw current from the AC line in a sinusoidal pattern that matches the sinusoidal pattern of the input voltage. When the sinusoids are aligned, the power factor is close to one, which indicates maximum efficiency and minimum demand load on the AC line.

[0066] The PFC circuit 212 includes one or more switches that are controlled by the control module 220 using one or more signals labeled as power switch control. The control module 220 determines the power switch control signal based on the measured voltage of the DC bus, the measured current in the PFC circuit 212, the AC line voltage, one or more temperatures of the PFC circuit 212, and the state of the power switch in the PFC circuit 212. Although an example of using measured values ​​is provided, the control module 220 can determine the power switch control signal based on the estimated voltage of the DC bus, the estimated current in the PFC circuit 212, the estimated AC line voltage, one or more estimated temperatures of the PFC circuit 212, and / or the estimated or expected state of the power switch in the PFC circuit 212. In various implementations, the AC line voltage is measured or estimated after the EMI filter and protection circuit 204 but before the charging circuit 208.

[0067] The control module 220 is powered by a DC-DC power supply 228, which provides a voltage suitable for the logic of the control module 220, such as 3.3 volts, 2.5 volts, etc. The DC-DC power supply 228 may also provide DC power for operating the switches of the PFC circuit 212 and the inverter power circuit 232. By way of example only, this voltage may be a higher voltage than that used for digital logic, one example of which is 15 volts.

[0068] The inverter power circuit 232 also receives power switch control signals from the control module 220. In response to the power switch control signals, switches in the inverter power circuit 232 cause current to flow into corresponding windings of the motor 236 of the compressor 102. The control module 220 can receive a measured value or an estimated value of the motor current for each winding of the motor 236 or each branch of the inverter power circuit 232. The control module 220 can also receive a temperature indication from the inverter power circuit 232.

[0069] For example only, the temperature received from the inverter power circuit 232 and the temperature received from the PFC circuit 212 are used only for fault purposes. In other words, once the temperature exceeds a predetermined threshold, a fault is reported and the drive device 132 is powered off or operated at a reduced capacity. For example, the drive device 132 may be operated at a reduced capacity, and if the temperature does not decrease at a predetermined rate, the drive device 132 transitions to a shutdown state.

[0070] The control module 220 may also use the thermistor 140 to receive an indication of the discharge line temperature from the compressor 102. The isolation circuit 260 may provide a pulse width modulated representation of the resistance of the thermistor 140 to the control module 220. The isolation circuit 260 may include electrical isolation such that there is no electrical connection between the thermistor 140 and the control module 220.

[0071] The isolation circuit 260 may also receive protection inputs indicating a fault, such as a high pressure cutoff or a low pressure cutoff, where the pressure refers to the refrigerant pressure. If any protection input indicates a fault, and in some implementations, if any protection input becomes disconnected from the isolation circuit 260, the isolation circuit 260 stops sending the PWM temperature signal to the control module 220. Thus, the control module 220 may infer that a protection input has been received based on the absence of the PWM signal. In response, the control module 220 may shut down the drive device 132.

[0072] The control module 220 controls the integrated display 264, which may include an LED grid and / or a single LED package, which may be a tri-color LED. The control module 220 may use the integrated display 264 to provide status information such as firmware version and error information. The control module 220 uses the communication transceiver 268 to communicate with external devices such as Figure 1 By way of example only, the communications transceiver 268 may conform to the RS-485 or RS-232 serial bus standards or to the Controller Area Network (CAN) bus standard.

[0073] PFC Circuit

[0074] exist Figure 3 In the PFC circuit 300, Figure 2 2. An example implementation of a PFC circuit 212 of FIG. The PFC circuit 300 includes a rectifier 304 that converts input AC into pulsating DC. In various implementations, the rectifier 304 includes a full-wave diode bridge. The DC output of the rectifier 304 is across a first terminal and a second terminal. The first terminal is connected to a first node, which is connected to a first end of a capacitor 306, a first end of a first inductor 308, a first end of a second inductor 310, and a first end of a third inductor 312. The second terminal is connected to a second node, which is connected to a second end of the capacitor 306, a first terminal of a first lower switch 314, an anode of a first lower diode 316, a first terminal of a second lower switch 318, an anode of a second lower diode 320, a first terminal of a third lower switch 322, and an anode of a third lower diode 324. In various implementations, a DC voltage (e.g., from a DC battery) may be connected to the first terminal and the second terminal, and the rectifier 304 may be omitted.

[0075] A second end of the first inductor 308 is connected to a first current sensor 326. An opposite end of the first current sensor 326 is connected to a third node connected to a first terminal of the first upper switch 328, an anode of the first upper diode 330, a second terminal of the first lower switch 314, and a cathode of the first lower diode 316. The first current sensor 326 senses a current in the first inductor 308.

[0076] The second end of the second inductor 310 is connected to the second current sensor 332. The opposite end of the second current sensor 332 is connected to a fourth node connected to the first terminal of the second upper switch 334, the anode of the second upper diode 336, the second terminal of the second lower switch 318, and the cathode of the second lower diode 320. The second current sensor 332 senses the current in the second inductor 310.

[0077] The second end of the third inductor 312 is connected to a third current sensor 338. An opposite end of the third current sensor 338 is connected to a fifth node connected to a first terminal of the third upper switch 340, an anode of the third upper diode 342, a second terminal of the third lower switch 322, and a cathode of the third lower diode 324. The third current sensor 338 senses a current in the third inductor 312. Although example locations of the first current sensor 326, the second current sensor 332, and the third current sensor 338 are shown, they may be located at another suitable location.

[0078] The PFC circuit 300 generates a voltage on a DC bus, wherein a first end of the DC bus is connected to a sixth node connected to a second terminal of the first upper switch 328, a cathode of the first upper diode 330, a second terminal of the second upper switch 334, a cathode of the second upper diode 336, a second terminal of the third upper switch 340, and a cathode of the first upper diode 330. A second end of the DC bus is connected to the first node.

[0079] The first upper driver 346, the first lower driver 348, the second upper driver 350, the second lower driver 352, the third upper driver 354 and the third lower driver 358 (collectively referred to as the driver 624) receive signals from the Figure 2 The power switch control signal of the control module 220 of the control module 220 is used to control the power of the control terminal of the first upper switch 328, the first lower switch 314, the second upper switch 334, the second lower switch 318, the third upper switch 340, and the third lower switch 322, and (for example, quickly) changes the power applied to the control terminal of the first upper switch 328, the first lower switch 314, the second upper switch 334, the second lower switch 318, the third upper switch 340, and the third lower switch 322. The first upper switch 328, the first lower switch 314, the second upper switch 334, the second lower switch 318, the third upper switch 340, and the third lower switch 322 (collectively referred to as switch 626) can be a field effect transistor with a gate terminal as a control terminal. More specifically, the switch 626 can each be a power metal oxide semiconductor field effect transistor (MOSFET), such as a STW38N65M5 power MOSFET from STMicroelectronics. The driver 624 controls the opening and closing of the switch 626 in response to the power switch control signal.

[0080] exist Figure 3 In FIG. 1 , the PFC circuit 300 includes three parallel converter branches, each of which is arranged in a bidirectional buck-boost configuration. Figure 4, the first converter branch 410 includes a first inductor 308, a first upper switch 328, a first upper diode 330, a first lower switch 314, and a first lower diode 316. The second converter branch 420 includes a second inductor 310, a second upper switch 334, a second upper diode 336, a second lower switch 318, and a second lower diode 320. The third converter branch 430 includes a third inductor 312, a third upper switch 340, a third upper diode 342, a third lower switch 322, and a third lower diode 324.

[0081] When working in boost mode, the lower switch of the branch is closed and the upper switch of the branch is disconnected, thereby increasing the current through the inductor of the branch. Subsequently, the lower switch is disconnected and the upper switch is closed, but the current through the inductor of the branch cannot be changed instantaneously, because the voltage across the inductor is proportional to the derivative of the current. The voltage across the inductor becomes negative, which means that the end of the inductor connected to the anode of the upper diode and the cathode of the lower diode experiences a voltage increase higher than the voltage output from the rectifier 304. Therefore, the current through the inductor is fed to the DC bus. The current through the inductor is reduced. Subsequently, the upper switch is disconnected and the lower switch is closed, thereby increasing the current through the inductor.

[0082] In various implementations, the lower switch of each branch can be turned on until the current measured by the current sensor associated with the inductor of the branch is greater than a predetermined current threshold. At this point, the lower switch can be turned off (the upper switch is turned on) for a specified (desired) time period (off time). The specified time period can be changed by the control module 220, for example, according to the voltage of the DC bus and / or the AC input voltage. However, the time that the lower switch remains off is a specified value. Once a time equal to the specified value has passed after the lower switch is turned off, the lower switch is turned on again (the upper switch is turned off), and the process is repeated. The off time can be fixed or variable. In the case where the off time is variable, the off time can be limited to at least a predetermined minimum off time (period).

[0083] In order to reduce the physical size and component cost of the PFC circuit 300, the inductance of the inductor of each converter branch (which may be the largest contributor to the physical size of the PFC circuit 300) can be minimized. However, with a lower inductance, the inductor will saturate faster. Therefore, the lower switch and the upper switch of each converter branch will be able to operate faster. However, faster and smaller are relative terms, and the power switching control of the present application can operate within the range of 10 kHz to 20 kHz switching frequency. In the present application, the switching frequency of the lower switch and the upper switch of each converter branch can be increased to greater than 50 kHz, greater than 100 kHz, or greater than 200 kHz. For example, the switching frequency of each switch can be controlled to be approximately 200 kHz. The inductance of the inductor of each converter branch can be minimized accordingly.

[0084] Switch 626 can be selected to allow faster switching and have low switching losses. By switching faster, the inductance of the inductor can be smaller. In addition, the upper diode and the lower diode can be faster (e.g., have a faster response time). Silicon carbide diodes can have a fast response time and can therefore be used. For example, the upper diode and the lower diode can be the STPSC2006CW silicon carbide dual diode package from STMicroelectronics.

[0085] In order to accurately drive the switch 626 when operating at a higher speed, the control strategy can be similarly accelerated. As an example only, the control module 220 can include multiple devices, such as a microcontroller configured to perform more relevant calculations and an FPGA (field programmable gate array) or PLD (programmable logic device) configured to monitor and respond to inputs in near real time. In this case, near real time can mean that the time resolution and time delay of the measurement in response to the input of the FPGA or PLD are negligible compared to the physical time scale of interest. For faster switching speeds, the near real-time response of the FPGA / PLD may introduce non-negligible delays. In this case, the delay of the FPGA / PLD and the drive circuit system can be measured and compensated. For example, if the disconnection of the switch occurs due to a delay later than required, the disconnection can be indicated earlier to compensate for the delay.

[0086] Figure 4 yes Figure 3 A simplified functional block diagram of the PFC circuit 300 and the control module 220 is shown in FIG. 1 . The rectifier 304 rectifies the AC input voltage to generate a DC voltage. Figure 4 The DC voltage is shown as DC voltage 404 . The control module 220 controls switching of the switch 626 to convert the DC voltage 404 into a DC bus voltage that is greater than the DC voltage 404 .

[0087] The control module 220 manages the phase relationship between the parallel branches (e.g., the first branch 410, the second branch 420, and the third branch 430) of the PFC circuit 300. Managing the phase relationship between the parallel branches can be referred to as interleaving. Generally, the purpose of interleaving is to distribute the phase relationship between the parallel branches as evenly as possible. For example, in the PFC circuit 300, the purpose can be to make each branch operate at the same switching frequency, but with a phase difference of 120 degrees (360 / 3) relative to each other.

[0088] Interleaving evenly distributes the ripple current between the branches so that the total current (the sum of all currents) output from the PFC circuit 300 has minimal current ripple. Reduction in ripple current can reduce stress on capacitors and other components and can reduce EMI generated by the PFC circuit 300. Reduction in ripple current can also enable reduction in size and cost of filter components (e.g., filter capacitor 224).

[0089] Although the interleaving performed by the control module 220 is described below with respect to the first branch 410, the second branch 420, and the third branch 430 of the PFC circuit 300, the description is equally applicable to converters with different numbers of parallel branches, for example, two branches or four or more branches. In converters with different numbers of branches, each branch can be phased 360 degrees with respect to each other divided by the number of branches. The present application can also be applied to converters in which the number of active branches can be changed by enabling or disabling individual branches. In these cases, the target phase offset between the branches will vary depending on the number of branches that are enabled.

[0090] Figure 5 6 is a functional block diagram of an example implementation of the control module 220. The desired voltage module 604 determines a desired DC bus voltage (the desired voltage on the DC bus). The desired DC bus voltage may be a fixed predetermined value or may be variable. The desired voltage module 604 may be based, for example, on the peak voltage of the AC line (V PEAK ) and / or at least one of a plurality of system parameters to determine a desired DC bus voltage.

[0091] By way of example only, the plurality of system parameters may include, but are not limited to, actual and indicated compressor speeds, actual and estimated inverter output powers, actual and estimated drive output powers, input and output currents, drive input voltages, inverter output voltages, estimated motor torques, various temperatures, and demands from the condenser 104. The various temperatures may include, for example, temperatures of the PFC circuit 212, the inverter power circuit 232, the circuit board, the compressor scroll, and the motor 236. By way of example, the lookup table may include values ​​corresponding to possible AC peak voltages VPEAK and the desired DC bus voltage V corresponding to each combination of different combinations of the plurality of system parameters DES . The expected voltage module 604 can use a lookup table to determine the expected DC bus voltage. For values ​​between entries of the lookup table, the expected voltage module 604 can use interpolation to determine the expected DC bus voltage. Another example discussion on setting the expected DC bus voltage is provided in U.S. Patent 10,312,798, entitled “Power Factor Correction Circuits and Methods Including Partial Power Factor Correction Operation for Boost and Buck Power Converters,” issued on June 4, 2019, the disclosure of which is incorporated herein in its entirety. Another example discussion on setting the expected DC bus voltage is provided in U.S. Patent 10,277,115, entitled “Filtering system and methods for voltage control,” issued on April 30, 2019, the disclosure of which is incorporated herein in its entirety.

[0092] Voltage control module 608 (see also Figure 6 ) determines a difference between a desired DC bus voltage and a measured DC bus voltage, and determines a first current demand based on the difference. The voltage control module 608 applies a filter to the first current demand, and determines an initial current demand based on the first current demand and the filtered current demand.

[0093] The voltage control module 608 weights the contribution of the first current demand and the filtered current demand to the initial current demand based on the size of the difference between the measured DC bus voltage and the desired DC bus voltage. More specifically, when the size of the difference is small, the voltage control module 608 applies a larger weight to the filtered current demand. As the difference increases, the voltage control module 608 increases the weight of the first current demand and decreases the weight of the filtered current demand.

[0094] Current demand module 612 (see, for example, Fig. 9) may apply a filter, such as a notch filter, to the initial current demand. The current demand module 612 may also perform one or more signal processing functions to reduce noise in the initial current demand. The current demand module 612 multiplies the (filtered) initial current demand with a reference signal to produce a final current demand. Although an example of a current demand module 612 that filters the initial current demand is provided, in other examples, the current demand module 612 may not filter the initial current demand. In this case, the initial current demand may be multiplied with a reference signal to produce a final current demand.

[0095] Reference generation module 616 (see, for example, FIG. 13A to FIG. 13E ) determines the zero crossing of the AC line and the zero crossing of the reference signal. Based on the zero crossing, the reference generation module 616 generates a reference signal to track the AC input voltage in phase and frequency. In this way, the final current demand follows the AC input voltage, for example, to maximize the power factor.

[0096] Current control module 620 (see Fig.11 ) controls the switching of switch 626. More specifically, when the measured current associated with the branch is greater than the current demand, the current control module 620 turns the lower switch of each branch to off (turns the upper switch to on). Then, the current control module 620 keeps the lower switch off (keeps the upper switch on) for at least the desired off period. The desired off period is variable, and, for example, the current control module 620 determines the desired off period based on the AC input voltage and / or the measured DC bus voltage. Although an example of a variable desired off period is described, the current control module 620 may alternatively turn the lower switch of each branch to on (turns the upper switch to off) when the measured current associated with the branch is less than the current demand, and keep the lower switch on for at least the desired on period. An example of this situation is described in commonly assigned U.S. Patent Application No. 15 / 419,423 filed on January 30, 2017, which is incorporated herein in its entirety.

[0097] Figure 6 6 is a functional block diagram of an example implementation of the voltage control module 608. As described above, the voltage control module 608 generates an initial current demand based on the desired DC bus voltage and the measured DC bus voltage. The initial current demand corresponds to a target value for the measured current. The measured DC bus voltage is measured using a voltage sensor. The desired DC bus voltage is determined by the desired voltage module 604.

[0098] The voltage control module 608 includes an error control module 704 that receives a desired DC bus voltage and a measured DC bus voltage. The error control module 704 generates a first current demand to minimize a difference between the desired DC bus voltage and the measured DC bus voltage.

[0099] For example, the subtraction module 708 subtracts the measured DC bus voltage from the desired DC bus voltage to determine the DC voltage error. The proportional module 712 multiplies the DC voltage error by a proportional constant. The integrator module 716 combines the DC voltage error with the previous output of the integrator module 716. The integrator module 716 may first multiply the DC voltage error by an integration constant. The integrator module 716 may also impose an upper and / or lower limit on its output. In various implementations, the integrator module 716 may bias its output to adjust toward the tracking input (e.g., the second current demand).

[0100] The summing module 720 adds the output of the proportional module 712 and the output of the integrator module 716. The sum from the summing module 720 is output from the error control module 704 as the first current demand. Although the error control module 704 is shown as a proportional integral (PI) controller for illustrative purposes, another suitable type of closed-loop controller may be used. In addition, a feed-forward component may also be implemented that may be added (e.g., summed) with the feedback component to generate the first current demand.

[0101] The filter module 724 applies a filter to the first current demand to generate a second current demand. For example, the filter may be a low pass filter (LPF) or another suitable type of filter. For example, the cutoff frequency of the filter may be calibrated to smooth cycle-by-cycle ripple that may be attributed to the error control module 704. The filter module 724 may reduce the bandwidth and may smooth / attenuate cycle-by-cycle ripple generated by the error control module 704 attempting to adjust the measured DC bus voltage toward the desired DC bus voltage. For example only, Figure 7 Included are example graphs of current generated using a PI controller based on a sinusoidal input voltage. Figure 8 Included is an example graph of the current produced by low pass filtering the output of a PI controller.

[0102] Return to reference Figure 6 , the voltage control module 608 also includes a weighting module that weights the contribution of the first current demand and the second current demand to the initial current demand. As the DC voltage error increases, the weighting module reduces the use of the second current demand and increases the use of the first current demand. This can minimize harmonics and minimize the response time to load changes.

[0103] The absolute value module 728 determines and outputs the absolute value (i.e., magnitude) of the DC voltage error. The bias module 732 applies a bias to the absolute value of the DC voltage error to require that the DC voltage error be greater than a predetermined bias value before reducing the contribution of the second current demand and including the contribution of the first current demand. For example, the bias module 732 can set its output based on or equal to subtracting a predetermined bias value (e.g., 10V) from the absolute value of the DC voltage error. When the absolute value of the DC voltage error is less than the predetermined bias value, the initial current demand can be set equal to the second current demand due to the bias. The bias is associated with the saturation module (740) discussed further below.

[0104] The gain module 736 applies a predetermined gain value to the output of the bias module 732. For example, the gain module 736 sets its output based on multiplying the output of the bias module 732 by the predetermined gain value or sets its output equal to the output of the bias module 732 multiplied by the predetermined gain value. For example, the predetermined gain value may be approximately 0.2 or another suitable value.

[0105] The saturation module 740 can impose limits on the output of the gain module 736. As used herein, the saturation module can impose a lower limit, an upper limit, both an upper limit and a lower limit, or no limit. The upper and lower limits can be predetermined and / or can be updated based on various parameters. In the case of the saturation module 740, the lower limit can be, for example, zero to re-impose the bias applied by the bias module 732. The upper limit of the saturation module 740 can be 1 to limit the weighted value between 0 and 1, including 0 and 1. The output of the saturation module 740 is a first weighted value for weighting the contribution of the first current demand.

[0106] Subtraction module 744 subtracts the output of saturation module 740 from a predetermined value (e.g., 1). The output of subtraction module 744 is a second weighted value for weighting the contribution of the second current demand. Multiplication module 748 multiplies the second current demand output by filter module 724 by the second weighted value output by subtraction module 744 to generate a third current demand. Multiplication module 752 multiplies the first current demand output by error control module 704 by the first weighted value output by saturation module 740 to generate a fourth current demand. Modules 728, 732, 736, 740, 744, 748, and 752 may be collectively referred to as weighting modules. Summation module 756 adds the third current demand to the fourth current demand to generate an initial current demand.

[0107] As discussed further below, the initial current demand is multiplied by a sinusoidal reference signal that is generated to be synchronized with the AC input voltage. This can provide a better power factor and minimize harmonics of the AC input current because the load can draw more sinusoidal current and power. The generation of the reference signal is also discussed below.

[0108] Fig. 9 8. A functional block diagram of an example implementation of a current demand module 612 is included. The saturation module 804 can apply one or more limits to the initial current demand before the initial current demand is input to the notch filter module 808. The notch filter module 808 applies a notch filter to the initial current demand, and the saturation module 812 can apply one or more limits to the initial current demand output by the notch filter module 808. Although examples using saturation modules 804 and 812 are shown and discussed, one or both of the saturation modules 804 and 812 can be omitted and / or replaced by other suitable types of signal processing. The application of the notch filter reduces harmonics while enabling rapid response to load changes.

[0109] For example, the notch filter may be a first-order or second-order polynomial notch filter. By way of example only, the notch filter may be represented by the following second-order transfer function.

[0110]

[0111] Wherein, b0, b1, b2, a0, a1, a2 are filter coefficients, and z is the initial current demand input to the notch filter module 808. One or more of these filter coefficients can be fixed predetermined values. For example, the filter coefficients b0, b2, a0 and a2 can be fixed predetermined values. In various implementations, the filter coefficient a0 can be 1 (one). In various implementations, the filter coefficients b0, b2, a0 and / or a2 can be variable values.

[0112] The filter coefficient module 816 determines one or more filter coefficients (e.g., a1 and b1) of the notch filter based on the frequency of the AC input voltage. Since the reference signal is generated to be synchronized with the AC input voltage, the frequency of the AC input voltage can be represented by the frequency of the reference signal. The frequency of the reference signal can be used as the supply frequency. Alternatively, the frequency of the AC input voltage can be measured and used as the supply frequency. For example, the notch can be approximately twice the supply frequency.

[0113] The filter coefficient module 816 may determine the filter coefficients using one or more lookup tables and / or functions that associate the supply frequency with the filter coefficients. For values ​​between entries in the lookup table, the filter coefficient module 816 may use interpolation to determine the filter coefficients. In various implementations, the filter coefficients a1 and b1 may be the same value or may be determined using the same lookup table or function. Examples of such functions include a second order polynomial equation using predetermined coefficients that is used to determine the filter coefficients (e.g., a1 and b1) based on the supply frequency.

[0114] As described above, the saturation module 812 can impose one or more restrictions on the initial current demand output by the notch filter module 808. The multiplication module 820 multiplies the output of the saturation module 812 by the reference signal. The absolute value module 824 determines and outputs the absolute value (e.g., magnitude) of the output of the multiplication module 820 to generate the final current demand. Alternatively, the absolute value module 824 can be omitted, and the absolute value of the reference signal can be input to the multiplication module 820. The use of the absolute value makes the final current demand correspond to the rectified current. As discussed further below, the final current demand is used to control the switching of the switch 626 based on the comparison with the measured current.

[0115] Fig.10 is a flow chart depicting an example method for determining a final current demand. Control begins at 904 where the error control module 704 determines a DC voltage error based on a difference between a desired DC bus voltage and a measured DC bus voltage. At 908, the error control module 704 determines a first current demand based on the voltage bus error using, for example, PI control as discussed above.

[0116] At 912, the absolute value module 728 determines the absolute value of the DC voltage error, and the bias module 732 applies a bias to the absolute value of the DC voltage error. For example, the bias module 732 can set its output based on or equal to the absolute value of the DC voltage error minus a predetermined bias value (e.g., 10V). The gain module 736 applies a predetermined gain value to the output of the bias module 732, and the saturation module 740 can apply a limit to the output of the gain module 736. The output of the saturation module 740 corresponds to a first weighted value for weighting the contribution of the first current demand.

[0117] Also at 912, the subtraction module 744 determines a second weighted value for weighting the contribution of the second current demand. For example, the subtraction module 744 may set the second weighted value based on 1 minus the first weighted value or set the second weighted value equal to 1 minus the first weighted value. Typically, due to bias, when the DC voltage error is less than a predetermined bias value, the first weighted value may be zero or approximately zero (so that the second weighted value may be one or approximately one). As the DC voltage error increases beyond the predetermined bias value, the second weighted value may decrease toward zero and the first weighted value may increase toward one. Although the example uses a first weighted value and a second weighted value and a first current demand and a second current demand, one or more additional filters may be applied to determine the second current demand based on the first current demand. In such an example, more weighted values ​​may be used, or the first weighted value and the second weighted value may be applied to different combinations of current demands.

[0118] At 916, the filter module 724 applies a filter to the first current demand to generate a second current demand. At 920, the multiplication module 752 multiplies the first current demand by the first weighted value to generate a third current demand, and the multiplication module 748 multiplies the second current demand by the second weighted value to generate a fourth current demand. Also at 920, the summation module 756 sets an initial current demand based on the sum of the third current demand and the fourth current demand or sets the initial current demand equal to the sum of the third current demand and the fourth current demand.

[0119] At 924, the saturation module 804 can impose an upper and / or lower limit on the initial current demand. In various implementations, the imposition of the upper and / or lower limits can be omitted or replaced with one or more other types of signal processing. At 928, the filter coefficient module 816 determines the filter coefficients of the notch filter. The filter coefficient module 816 determines the filter coefficients based on the supply frequency.

[0120] At 932, the notch filter module 808 applies a notch filter using the filter coefficients to the initial current demand. At 936, the saturation module 812 can apply upper and / or lower limits to the initial current demand output by the notch filter module 808. In various implementations, the application of upper and / or lower limits can be omitted or replaced with one or more other types of signal processing.

[0121] At 940, the multiplier module 820 sets the final current demand based on the initial current demand multiplied by the reference signal (e.g., output by the saturation module 812) or sets the final current demand equal to the initial current demand multiplied by the reference signal (e.g., output by the saturation module 812). At 944, the absolute value module 824 can determine the absolute value of the final current demand. At 948, the current control module 620 controls switching of the switch 626 based on the final current demand and the measured current. As discussed further below, when the measured current becomes greater than the final current demand, the current control module 620 can cause the first lower switch 314, the second lower switch 318, and the third lower switch 322 to transition from on to off.

[0122] Fig.11 6 is a functional block diagram of an example implementation of the current control module 620. The current control module 620 controls switching of the switch 626 based on a comparison of the final current demand and the measured currents in the first inductor 308, the second inductor 310, and the third inductor 312. The measured currents in the first inductor 308, the second inductor 310, and the third inductor 312 may be measured using the first current sensor 326, the second current sensor 332, and the third current sensor 338, respectively.

[0123] When the measured current in the first inductor 308 is less than the final current demand, the first comparison module 1004 sets the first comparison signal to the first state. When the measured current in the first inductor 308 is greater than the final current demand, the first comparison module 1004 sets the first comparison signal to the second state. Similarly, the second comparison module 1008 sets the second comparison signal based on a comparison of the final current demand with the measured current in the second inductor 310, and the third comparison module 1012 sets the third comparison signal based on a comparison of the final current demand with the measured current in the third inductor 312. When the measured current in the second inductor 310 is less than the final current demand, the second comparison module 1008 sets the second comparison signal to the first state. When the measured current in the second inductor 310 is greater than the final current demand, the second comparison module 1008 sets the second comparison signal to the second state. When the measured current in the third inductor 312 is less than the final current demand, the third comparison module 1012 sets the third comparison signal to the first state. When the measured current in the third inductor 312 is greater than the final current requirement, the third comparison module 1012 sets the third comparison signal to a second state.

[0124] The first switching control module 1016 controls switching of the first upper switch 328 and the first lower switch 314 based on a comparison of the measured current in the first inductor 308 with the final current demand. For example, when the first comparison signal transitions from the first state to the second state and the blanking signal from the blanking timer module 1020 is in the second state, the first switching control module 1016 transitions the first lower switch 314 to open (non-conducting).

[0125] The blanking timer module 1020 sets the blanking signal to a first state when the countdown timer is greater than zero, and sets the blanking signal to a second state when the countdown timer reaches zero. The blanking timer module 1020 restarts the countdown timer each time the current control module 620 turns the first lower switch 314, the second lower switch 318, or the third lower switch 322 to disconnect. In various implementations, the blanking timer module 1020 can reset the countdown timer to 0.5 microseconds to 5 microseconds or another appropriate predetermined period. The blanking timer module 1020 can be set to a sufficiently small value to avoid having to wait longer than the time required to switch another phase, but long enough to shield the noise generated by switching another phase. In other implementations, the countdown timer can be started at another time suitable for preventing common mode noise from triggering another branch when switching of one branch occurs and introducing noise into the current measurement of the branch. Although the example of using a countdown timer and zero is discussed, a positive timer and a predetermined period can be used alternatively.

[0126] After waiting for a predetermined dead-band duration (period) after transitioning the first lower switch 314 to off, the first switching control module 1016 transitions the first upper switch 328 to on (conduction). During the predetermined dead-band duration, both the first lower switch 314 and the first upper switch 328 are off. The first switching control module 1016 waits until the dead-band duration expires to transition the first upper switch to on, thereby avoiding a cross-conduction condition where both the first lower switch 314 and the first upper switch 328 are on. The length of the predetermined dead-band duration may be set to a value corresponding to the time required for the switch 626 to stop conducting after receiving a signal from the current control module 620 to transition to off.

[0127] The second switching control module 1024 controls switching of the second upper switch 334 and the second lower switch 318 based on a comparison of the measured current in the second inductor 310 with the final current demand. For example, when the second comparison signal transitions from the first state to the second state and the blanking signal from the blanking timer module 1020 is in the second state, the second switching control module 1024 transitions the second lower switch 318 to OFF. After waiting for a predetermined dead time duration after transitioning the second lower switch 318 to OFF, the second switching control module 1024 transitions the second upper switch 334 to ON.

[0128] The third switching control module 1028 controls switching of the third upper switch 340 and the third lower switch 322 based on a comparison of the measured current in the third inductor 312 with the final current demand. For example, when the third comparison signal transitions from the first state to the second state and the blanking signal from the blanking timer module 1020 is in the second state, the third switching control module 1028 transitions the third lower switch 322 to off. After waiting for a predetermined dead time duration after transitioning the third lower switch 322 to off, the third switching control module 1028 transitions the third upper switch 340 to on.

[0129] The first switching control module 1016, the second switching control module 1024, and the third switching control module 1028 respectively keep the first lower switch 314, the second lower switch 318, and the third lower switch 322 off for a period equal to or greater than the desired off period. The first switching control module 1016 keeps the first lower switch 314 off until (i) the off period of the first lower switch 314 is greater than or equal to the desired off period and the period since the third lower switch 322 was last turned on is greater than or equal to the determined first previous on delay or (ii) the off period reaches the first determined maximum allowable value. The second switching control module 1024 keeps the second lower switch 318 off until (i) the off period of the second lower switch 318 is greater than or equal to the desired off period and the period since the first lower switch 314 was last turned on is greater than or equal to the determined second previous on delay or (ii) the off period reaches the second determined maximum allowable value. The third switching control module 1028 keeps the third lower switch 322 off until (i) the off period of the third lower switch 322 is greater than or equal to the expected off period and the period since the second lower switch 318 was last turned on is greater than or equal to the determined third previous turn-on delay or (ii) the off period reaches a third determined maximum allowable value.

[0130] The off period of the first lower switch 314 corresponds to the period since the last time the measured current in the first inductor 308 became greater than the final current demand. The first switching control module 1016 determines the first previous turn-on delay and the first determined maximum allowable value based on the value of the most recent cycle of the first branch 410. The cycle of the first branch 410 corresponds to the length of time between the last two times the first comparison module 1004 transitioned the first comparison signal from the first state to the second state.

[0131] When the first comparison signal is in the second state, the first timer module 1032 increments the off period of the first lower switch 314. For example, when the first lower switch 314 is off, the first timer module 1032 increments the off period of the first lower switch 314. In this manner, the off period of the first lower switch 314 tracks the period of time that has passed since the first switching control module 1016 last transitioned the first lower switch 314 from on to off (i.e., the measured current in the first inductor 308 becomes greater than the final current demand). In response to the first comparison signal transitioning from the first state to the second state, the first switching control module 1016 stores the current value of the first timer module 1032 as the period of the first branch 410, and the first timer module 1032 resets the off period of the first lower switch 314.

[0132] The first switching control module 1016 sets the first determined maximum allowable value based on the stored period of the first branch 410. In various implementations, the first switching control module 1016 sets the first determined maximum allowable value to 17 / 16 of the stored period of the first branch 410. In other implementations, the first switching control module 1016 may set the first determined maximum allowable value to another suitable value or another suitable function of the stored period of the first branch 410.

[0133] The off period of the second lower switch 318 corresponds to the period since the last time the measured current in the second inductor 310 became greater than the final current demand. The second switching control module 1024 determines the second previous turn-on delay and the second determined maximum allowable value based on the value of the most recent cycle of the second branch 420. The cycle of the second branch 420 corresponds to the length of time between the last two times the second comparison module 1008 transitioned the second comparison signal from the first state to the second state.

[0134] When the second comparison signal is in the second state, the second timer module 1040 increments the off period of the second lower switch 318. For example, when the second lower switch 318 is off, the second timer module 1040 increases the off period of the second lower switch 318. In this manner, the off period of the second lower switch 318 tracks the period of time that has passed since the second switching control module 1024 last transitioned the second lower switch 318 from on to off (i.e., the measured current in the second inductor 310 becomes greater than the final current demand). In response to the second comparison signal transitioning from the first state to the second state, the second switching control module 1024 stores the current value of the second timer module 1040 as the period of the second branch 420, and the second timer module 1040 resets the off period of the second lower switch 318.

[0135] The second switching control module 1024 sets the second determined maximum allowable value based on the stored period of the second branch 420. In various implementations, the second switching control module 1024 sets the second determined maximum allowable value to 17 / 16 of the stored period of the second branch 420. In other implementations, the second switching control module 1024 may set the second determined maximum allowable value to another suitable value or another suitable function of the stored period of the second branch 420.

[0136] The off period of the third lower switch 322 corresponds to the period since the last time the measured current in the third inductor 312 became greater than the final current demand. The third switching control module 1028 determines the third previous turn-on delay and the third determined maximum allowable value based on the value of the most recent cycle of the third branch 430. The cycle of the third branch 430 corresponds to the length of time between the last two times the third comparison module 1012 transitioned the second comparison signal from the first state to the second state.

[0137] When the third comparison signal is in the second state, the third timer module 1048 increments the off period of the third lower switch 322. For example, when the third lower switch 322 is off, the third timer module 1048 increments the off period of the third lower switch 322. In this manner, the off period of the third lower switch 322 tracks the period of time that has passed since the third switching control module 1028 last transitioned the third lower switch 322 from on to off (i.e., the measured current in the third inductor 312 becomes greater than the final current demand). In response to the third comparison signal transitioning from the first state to the second state, the third switching control module 1028 stores the current value of the third timer module 1048 as the period of the third branch 430, and the third timer module 1048 resets the off period of the third lower switch 322.

[0138] The third switching control module 1028 sets the third determined maximum allowable value based on the stored period of the third branch 430. In various implementations, the third switching control module 1028 sets the third determined maximum allowable value to 17 / 16 of the stored period of the third branch 430. In other implementations, the third switching control module 1028 may set the third determined maximum allowable value to another suitable value or another suitable function of the stored period of the third branch 430.

[0139] The first on-timer module 1036 increments the on-period of the third lower switch 322. Specifically, in response to the third switching control module 1028 transitioning the third lower switch 322 from off to on, the first on-timer module 1036 resets and starts the timer. The first on-timer module 1036 outputs the value of the timer as the on-period to the first switching control module 1016.

[0140] The second on-timer module 1044 increments the on-period of the first lower switch 314. Specifically, in response to the first switching control module 1016 transitioning the first lower switch 314 from off to on, the second on-timer module 1044 resets and starts the timer. The second on-timer module 1044 outputs the value of the timer as the on-period to the second switching control module 1024.

[0141] The third on-timer module 1052 increments the on-period of the second lower switch 318. Specifically, in response to the second switching control module 1024 transitioning the second lower switch 318 from off to on, the third on-timer module 1052 resets and starts the timer. The third on-timer module 1052 outputs the value of the timer as the on-period to the third switching control module 1028.

[0142] The first switching control module 1016 compares the value received from the first on-timer module 1036 with the first previous on-delay. The second switching control module 1024 compares the value received from the second on-timer module 1044 with the second previous on-delay. The third switching control module 1028 compares the value received from the third on-timer module 1052 with the third previous on-delay. The first switching control module 1016, the second switching control module 1024, and the third switching control module 1028 determine the corresponding previous on-delay based on the branch cycle stored in each switching control module and the total number of branches in the PFC circuit 300. For example, the switching control modules can each set the previous on-delay based on the following formula:

[0143]

[0144] Wherein, the turn-on delay is the previous turn-on delay period, the branch period is the period of the corresponding branch stored, and n is the number of active branches in the PFC circuit 300 (three). In various implementations, the switching control module may set each previous turn-on delay to a value less than the turn-on delay. As an example, the switching control module may set the previous turn-on delay to the branch period * (9 / 32). For equal interleaving of three branches, 9 / 32 of the stored branch periods is close to a (e.g., ideal) 33.33% phase relationship. In addition, the ratio 9 / 32 is computationally easy to calculate using a power of 2 divisor in fixed-point integer mathematics. As another example, the switching control module may set the previous turn-on delay to the branch period * (21 / 64).

[0145] The expected disconnection period module 1064 determines the expected disconnection period. In general, for a bidirectional converter operating in boost mode, the expected disconnection period module 1064 can determine the expected disconnection period based on the input voltage, the output voltage, and the predetermined switching period. Given the input voltage, the output voltage, and the predetermined switching period, an equation or a lookup table can be used to determine the expected disconnection period. The predetermined switching period (t p ) corresponds to a predetermined switching frequency. The predetermined switching frequency may be, for example, approximately 200 kilohertz (kHz) or another suitable switching frequency. The predetermined switching period corresponds to 1 divided by the predetermined switching frequency. The current control module 620 may control the switch to be on (conducting) and off (not conducting) for different portions of each predetermined switching period. In various implementations, a frequency module (not shown) may randomly change the predetermined switching frequency or the predetermined switching period, for example, based on the output of a random number generator.

[0146] The input voltage may correspond to a voltage input to the PFC circuit 300. For example, the absolute value module 1068 determines and outputs the absolute value (i.e., magnitude) of the AC input voltage measured by the AC input voltage sensor. The output of the absolute value module 1068 may be used as the input voltage. The output voltage may be a measured DC bus voltage. Although an example of a sinusoidal AC input has been described, the present application may also be applicable to other types of inputs, including rectified inputs obtained by rectifying the AC input.

[0147] The expected disconnection period module 1064 may determine the expected disconnection period using one of a function and a lookup table that relates the input voltage and the output voltage to the expected disconnection time given a predetermined switching period. For values ​​between entries in the lookup table, the expected disconnection period module 1064 may determine the expected disconnection period using interpolation. As an example, for a bidirectional converter operating in boost mode (e.g., Figure 4The desired disconnection period module 1064 may set the desired disconnection period based on or equal to the following formula:

[0148]

[0149] Among them, t p is the predetermined switching period, V I is the input voltage, and V O is the output voltage.

[0150] Fig.12 is a flow chart depicting an example method of controlling the lower switch and the upper switch in a single branch of the PFC circuit 300. Although the method is described below for controlling the current control module 620 of the first branch 410 of the PFC circuit 300, the method can be used to control the lower switch and the upper switch of any branch of the PFC circuit 300, such as the first branch 410, the second branch 420, or the third branch 430. One cycle of the method can be used to control the switches of each branch. However, the cycle can be started at different times.

[0151] Control begins at 1204, where the first switching control module 1016 stores the value of the first timer module 1032 as the period of the first branch 410 and obtains the desired off time (Off_Time) (also referred to as the desired off period) of the first lower switch 314. The first switching control module 1016 may obtain the desired off time from the desired off period module 1064. At 1204, the first switching control module 1016 also determines the maximum off time (Max_Off) and the previous branch on threshold (On_Threshold) (also referred to as the previous on delay) of the first lower switch 314 based on the stored period of the first branch 410. The first switching control module 1016 may set Max_Off to 17 / 16 of the stored period and On_Threshold to 9 / 32 of the stored period. Control continues with 1208.

[0152] At 1208, the first switching control module 1016 generates an output signal for opening the first lower switch 314. At 1208, the current control module 620 resets the timer associated with the first timer module 1032 and the blanking timer module 1020. Control continues to 1212, where the first switching control module 1016 delays for a predetermined dead time. Control then proceeds to 1216, where the first switching control module 1016 generates an output signal for closing the first upper switch 328. The first switching control module 1016 delays the predetermined dead time between opening the first lower switch 314 and closing the first upper switch 328 to prevent both the first lower switch 314 and the first upper switch 328 from being closed at the same time. Control continues to 1220.

[0153] At 1220, the first switching control module 1016 determines whether the first lower switch 314 has been off for at least the desired off time (Off_Time). For example, the first switching control module 1016 determines whether the output of the first timer module 1032 is greater than or equal to the desired off time (Off_Time). If it is determined that the output of the first timer module 1032 is greater than or equal to the desired off time (Off_Time), control proceeds to 1224; otherwise, control returns to 1220.

[0154] At 1224, the first switching control module 1016 determines whether the first lower switch 314 has been off for the determined maximum off time (Max_Off). For example, the first switching control module 1016 determines whether the output of the first timer module 1032 is greater than or equal to the determined maximum off time (Max_Off). If it is determined that the output of the first timer module 1032 is greater than or equal to the determined maximum off time (Max_Off), control transfers to 1236 as described below; otherwise, control continues with 1228. At 1228, the first switching control module 1016 determines how much time has passed since the lower switch of the previous branch was turned on. In the example of the first branch, this is the third lower switch 322. For example, the first switching control module 1016 can use the output of the first on timer module 1036 as the time since the third lower switch 322 was turned on (Last_On). At 1232, the first switching control module 1016 determines whether Last_On is greater than or equal to the determined previous on threshold (On_Threshold). If it is determined that Last_On is greater than or equal to the determined previous on threshold (On_Threshold), control continues with 1236 ; otherwise, control returns to 1224 .

[0155] At 1236, the first switching control module 1016 generates an output signal for opening the first upper switch 328. Control then proceeds to 1240 where the first switching control module 1016 delays a predetermined dead time. At 1244, the first switching control module 1016 generates an output signal for closing the first lower switch 314 and resets a timer associated with the second on-timer module 1044. Control then proceeds to 1248.

[0156] At 1248, control determines whether the blanking period has passed since the second lower switch 318 and the third lower switch 322 were turned off. For example, the first switching control module 1016 determines whether the blanking signal output by the blanking timer module 1020 is in the second state. If it is determined that the blanking signal output by the blanking timer module 1020 is in the second state, control proceeds to 1252; otherwise, control returns to 1248. In various implementations, 1248 can be performed between 1252 and 1256. If 1248 is false, control will return to 1252, and if 1248 is true, control will continue to 1256.

[0157] At 1252, control measures the current through the leg (Leg_Current). For example, the first comparison module 1004 may obtain the measured current through the first inductor 308 from the first current sensor 326. At 1256, control determines whether the current through the leg (Leg_Current) is greater than or equal to the final current demand. The determination of the final current demand is discussed above. If 1256 is false, control returns to 1252; otherwise, control returns to 1204. Although Fig.12 The example is about one branch, but it can be executed for each branch. Fig.12 For example, control may return to 1204 for the next branch.

[0158] Fig.13A and Fig. 13B Together, they include a functional block diagram of an example reference generation module 616. Referring now to Fig.13A , the filter module 1304 applies a filter to the AC input voltage measured using the AC line voltage sensor to generate a filtered AC input voltage. For example only, the filter module 1304 may apply a first-order low-pass filter or a second-order low-pass filter or another suitable type of filter.

[0159] The comparison module 1308 compares the filtered AC input voltage to a first predetermined voltage less than 0 (zero) V. When the filtered AC input voltage transitions from less than the first predetermined voltage to greater than the first predetermined voltage, the comparison module 1308 transitions the storage signal from the second state to the first state. For example only, the first predetermined voltage may be approximately -50 V or another suitable voltage less than zero.

[0160] When the storage signal changes from the second state to the first state, the storage module 1312 stores the filtered AC input voltage and the current time. The stored filtered AC input voltage and the stored time are used to determine the zero crossing point of the AC input voltage. For example, the current time can be tracked by a clock.

[0161] The comparison module 1308 also compares the filtered AC input voltage to a second predetermined voltage greater than 0V. When the filtered AC input voltage transitions from less than the second predetermined voltage to greater than the second predetermined voltage, the comparison module 1308 transitions the interpolation signal from the second state to the first state. By way of example only, the second predetermined voltage may be approximately +50V or another suitable voltage greater than 0V. Although the examples of the first predetermined voltage and the second predetermined voltage are symmetrical about 0V (e.g., + / -50V), asymmetrical first predetermined voltages and second predetermined voltages may be used, or the first predetermined voltage and the second predetermined voltage may be symmetrical about a voltage other than 0V.

[0162] When the interpolated signal transitions from the second state to the first state, the zero crossing module 1316 determines the AC line zero crossing (e.g., time) based on the filtered AC input voltage at that (current) time, the current time, the stored time, and the stored filtered AC input voltage. The stored time and the stored filtered AC input voltage are provided by the storage module 1312. For example, the zero crossing module 1316 can determine the AC line zero crossing using linear interpolation based on the filtered AC input voltage, the current time, the stored time, and the stored filtered AC input voltage. The AC line zero crossing corresponds to the time when the filtered AC input voltage crosses zero as it increases from the first predetermined voltage to the second predetermined voltage. The AC line zero crossing can be determined for each rise in the AC voltage crossing zero.

[0163] Fig.14 An example graph of filtered AC input voltage versus time is included. In this example, for purposes of illustration, the input AC voltage (and therefore the filtered AC input voltage) is not a pure sinusoid. The zero crossing can be determined via linear interpolation using the first voltage, the time of the first voltage (first time), the second voltage, and the time of the second voltage (second time).

[0164] Come back for reference Fig.13A , the frequency module 1320 determines the supply frequency. As discussed above, the filter coefficient module 816 uses the supply frequency to determine the filter coefficients of the notch filter. The supply frequency corresponds to the frequency of the AC input voltage. For example, the frequency module 1320 can determine the supply frequency based on two or more values ​​in the filtered AC input voltage. For example, the frequency module 1320 can determine the supply frequency based on the period between two consecutive peaks or two consecutive zero crossings of the filtered AC input voltage. Alternatively, the frequency module 1320 can determine the supply frequency based on a reference signal.

[0165] The filtering performed by the filter module 1304 delays the filtered AC input voltage relative to the AC input voltage. The filter correction module 1324 determines a filter correction for the delay based on the supply frequency. For example, the filter correction module 1324 may determine the filter correction using a function or a lookup table that relates the supply frequency to the filter correction. For values ​​between entries in the lookup table, the filter correction module 1324 may use interpolation to determine the filter correction. Fig.15 Included are example graphs of filter correction vs. supply frequency.

[0166] The error module 1328 determines an error based on a difference between the AC line zero crossing and the reference signal zero crossing. The error module 1328 may also adjust the error of the filter correction. For example, the error module 1328 may set the error based on the AC line zero crossing plus the filter correction minus the reference signal zero crossing or set the error equal to the AC line zero crossing plus the filter correction minus the reference signal zero crossing. In various implementations, the AC line zero crossing may be adjusted based on the filter correction (e.g., summed with the filter correction), and the error module 1328 may set the error based on the (adjusted) AC line zero crossing minus the reference signal zero crossing or set the error equal to the (adjusted) AC line zero crossing minus the reference signal zero crossing.

[0167] The phase adjustment module 1332 determines a phase adjustment for the sine wave used to generate the reference signal based on the error. For example, the phase adjustment module 1332 can determine the phase adjustment using one of a function and a lookup table that associates the error with the phase adjustment. For values ​​between entries in the lookup table, the phase adjustment module 1332 can use interpolation to determine the phase adjustment. In the event that the error is greater than a predetermined period, such as about 1 period of the supply frequency, the phase adjustment module 1332 can treat the error as zero and leave the phase adjustment unchanged.

[0168] The RMS (root mean square) module 1336 determines the RMS voltage of the AC input voltage based on the supply frequency and the AC input voltage. For example, the RMS module 1336 can determine the RMS voltage using one of the functions that associate the AC input voltage and the supply frequency with the RMS voltage. As an example, the RMS module 1336 can determine the RMS voltage by determining the average value of the square of the AC input voltage obtained in one cycle (as indicated by the supply frequency) and can set the RMS voltage based on the square root of the average value. The RMS module 1336 can also multiply the RMS voltage by the square root of 2 to obtain a peak voltage. Although an example of determining the RMS voltage based on the AC input voltage is provided, a filtered AC voltage can be used instead of the AC input voltage. As discussed further below, the RMS voltage (or peak voltage) can be used to scale a reference signal so that the voltage of the reference signal corresponds to the AC input voltage.

[0169] Now refer to Fig. 13B , the sine generator module 1350 generates a sine reference signal. The sine generator module 1350 can generate the sine reference signal to form a sine wave that varies between +1 and -1 over time and has a frequency equal to the frequency of the AC input voltage. However, the sine generator module 1350 adjusts the sine reference signal based on the phase adjustment so that the zero crossing point of the reference signal is aligned with the zero crossing point of the AC input voltage. For example, as shown below in conjunction with Fig.13D As described in 1368, 1370 and 1372, the sine generator module 1350 can generate a sine reference signal.

[0170] The reference module 1354 generates a reference signal based on the sinusoidal reference signal and the RMS voltage. For example, the reference module 1354 may set the reference signal based on (the value of) the sinusoidal reference signal multiplied by the peak voltage of the RMS voltage or set the reference signal to be equal to (the value of) the sinusoidal reference signal multiplied by the peak voltage of the RMS voltage. Therefore, the reference signal changes with time, the voltage corresponds to the AC input voltage, and has a frequency equal to the AC input voltage.

[0171] The comparison module 1358 compares the reference signal with a third predetermined voltage greater than 0 (zero) V. When the reference signal transitions from greater than the third predetermined voltage to less than the third predetermined voltage, the comparison module 1358 transitions the storage signal from the second state to the first state. By way of example only, the third predetermined voltage may be approximately +50 V or another suitable voltage greater than 0 V. The third predetermined voltage may be the same as the second predetermined voltage.

[0172] When the storage signal changes from the second state to the first state, the storage module 1362 stores the reference signal (voltage) and the current time. The stored voltage of the reference signal and the stored time are used to determine the zero crossing point of the reference signal.

[0173] The comparison module 1358 also compares the reference signal to a fourth predetermined voltage less than 0V. When the reference signal transitions from being greater than the fourth predetermined voltage to being less than the fourth predetermined voltage, the comparison module 1358 transitions the interpolation signal from the second state to the first state. As an example only, the fourth predetermined voltage may be about -50V or another suitable voltage less than 0V. Although the examples of the third predetermined voltage and the fourth predetermined voltage are symmetrical about 0V (e.g., + / -50V), asymmetrical third predetermined voltages and fourth predetermined voltages may be used. The fourth predetermined voltage may be the same as the first predetermined voltage.

[0174] When the interpolation signal changes from the second state to the first state, the zero crossing module 1366 determines the reference signal zero crossing (e.g., time) based on the reference signal (e.g., voltage) at that (current) time, the current time, the stored time, and the voltage of the stored reference signal. The stored time and the voltage of the stored reference signal are provided by the storage module 1362. For example, the zero crossing module 1366 can determine the reference signal zero crossing using linear interpolation based on the voltage of the reference signal, the current time, the stored time, and the voltage of the stored reference signal. The reference signal zero crossing corresponds to the time when the reference signal crosses zero V (volt) as it decreases from the third predetermined voltage to the fourth predetermined voltage. The reference signal zero crossing can be determined for each decline of the reference signal crossing zero.

[0175] Fig.16 An example graph of voltage versus time of a reference signal is included. A zero crossing of the reference signal can be determined via linear interpolation using a first voltage of the reference signal, a time of the first voltage (first time), a second voltage of the reference signal, and a time of the second voltage (second time). While examples of using a reference signal to determine a zero crossing of the reference signal are discussed, a sinusoidal reference signal can likewise be used.

[0176] As discussed above, the reference signal zero crossings are used together with the AC line zero crossings to determine the phase correction. Since the AC line zero crossings are determined based on the rising portion of the AC input voltage and the reference signal zero crossings are determined based on the falling portion of the reference signal, each reference signal zero crossing should be approximately 180 degrees (1 / 2 cycle) out of phase with the AC line zero crossings that occur before and after the reference signal zero crossing.

[0177] The phase adjustment module 1332 can take this phase difference into account when generating the phase adjustment. For example only, each AC line zero crossing can be adjusted based on a period corresponding to 1 / 2 cycle of the supply frequency before being used by the error module 1328. For example, a period corresponding to 1 / 2 cycle of the supply frequency can be added to each AC line zero crossing before being used by the error module 1328.

[0178] Another way to generate a reference signal is described in commonly assigned U.S. Pat. No. 8,264,860, published on September 11, 2012, which is incorporated herein in its entirety. However, generating a reference signal as described herein can be performed more slowly and consume fewer computing resources. Generating a reference signal as described herein can also present a better reference signal in the event of AC input voltage distortion. The filtering provided by filter module 1304 provides additional robustness. Filtering causes delay, but this delay is compensated for by filter module 1324 as described above.

[0179] Fig. 13C and Fig.13D Together, a functional block diagram of an example reference signal generation module 616 is included. Fig. 13C Included with Fig.13A However, the reference signal zero crossing point input to the error module 1328 is determined differently.

[0180] Now refer to Fig.13D , the base module 1368 determines a base reference (signal) angle based on the supply frequency. The base reference angle corresponds to the angle of the reference signal (e.g., between 0 degrees and 360 degrees, which corresponds to 1 period of the reference signal). For example, the base module 1368 can mathematically integrate the supply frequency for each control cycle. The mathematical integration produces a change in the base reference angle. The base module 1368 can update the base reference angle for each control cycle by adding the change determined for the control cycle to the base reference angle from the previous control cycle. In various implementations, the base module 1368 can limit the base reference angle to between 0 and a predetermined maximum value (e.g., 360 degrees), thereby falling back to 0 when the base reference angle becomes greater than the predetermined maximum value. This can be performed, for example, using a modulo function.

[0181] Reference angle module 1370 determines a reference signal angle based on the phase adjustment and the base reference angle. For example, reference angle module 1370 can set the reference signal angle based on or equal to the phase adjustment plus the base reference angle.

[0182] The sine module 1372 determines the sine reference signal angle as the reference signal angle of the sine (function). As such, the sine reference signal angle varies between +1 and -1 based on the reference signal angle. The reference module 1374 generates a reference signal based on the sine reference signal angle and the RMS voltage. For example, the reference module 1374 may set the reference signal based on the sine reference signal angle (value) multiplied by the peak voltage of the RMS voltage or set the reference signal to be equal to the sine reference signal angle (value) multiplied by the peak voltage of the RMS voltage. Therefore, the reference signal varies with time, the voltage corresponds to the AC input voltage, and has a frequency equal to the AC input voltage.

[0183] The comparison module 1376 compares the reference signal angle with a first predetermined angle. When the reference signal angle changes from less than the first predetermined angle to greater than the first predetermined angle, the comparison module 1376 changes the stored signal from the second state to the first state. For example only, the first predetermined angle may be approximately 150 degrees or another suitable angle (e.g., 180 degrees) before the expected zero crossing of the reference signal.

[0184] When the storage signal changes from the second state to the first state, the storage module 1378 stores the reference signal angle and the current time. The stored reference angle and the stored time are used to determine the zero crossing point of the reference signal.

[0185] The comparison module 1376 also compares the reference angle with a second predetermined angle. When the reference angle changes from less than the second predetermined angle to greater than the second predetermined angle, the comparison module 1376 changes the interpolation signal from the second state to the first state. By way of example only, the second predetermined angle may be about 210 degrees or another suitable angle (e.g., 180 degrees) after the expected zero crossing of the reference signal. Although examples of first and second predetermined angles symmetrical about 180 degrees are provided, other asymmetrical predetermined angles and other predetermined angles may be used.

[0186] When the interpolated signal transitions from the second state to the first state, the zero crossing module 1380 determines the reference signal zero crossing (e.g., time) based on the reference signal angle at the current time, the stored time, and the stored reference signal angle. The stored time and the stored reference signal angle are provided by the storage module 1378. For example, the zero crossing module 1380 can determine the reference signal zero crossing using linear interpolation based on the reference signal angle, the current time, the stored time, and the stored reference signal angle. The reference signal zero crossing corresponds to the time when the reference signal crosses zero V (volts) as it decreases. The reference signal zero crossing can be determined for each drop in the reference signal crossing zero.

[0187] Fig.13E and Fig.13FTogether, they include a functional block diagram of an example reference generation module 616. Fig.13E and Fig.13F In the example of , the AC line zero crossing is used to determine the expected reference angle. Fig.13E and Fig.13F In the example above, the zero crossing of the reference signal is not determined.

[0188] Reference Fig.13F , the expected module 1386 determines the expected reference signal angle. The expected reference signal angle at a given time corresponds to the expected value of the reference signal angle at that time. The expected module 1386 determines the expected reference signal angle based on the AC line zero crossing and the supply frequency. For example, the expected module 1386 can set the expected reference signal angle to zero at each AC line zero crossing. The expected module 1386 can mathematically integrate the supply frequency of each control loop. Mathematical integration produces the change of the expected reference signal angle. The expected module 1386 can update the expected reference signal angle of the control loop by adding the change determined for each control loop to the expected reference signal angle from the previous control loop. In various implementations, the expected module 1386 can limit the expected reference signal angle between 0 and a predetermined maximum value (e.g., 360 degrees), so that the expected reference signal angle falls back to 0 when it becomes greater than the predetermined maximum value. This can be performed, for example, using a modulo function. The expected reference signal angle is further discussed below.

[0189] The reference angle module 1388 determines the base reference (signal) angle based on the adjusted supply frequency. Fig.13E The generation of the adjusted supply frequency is further discussed. For example, the reference angle module 1388 can determine the change of the reference signal angle based on the period between the continuous determination of the base reference signal angle and the adjusted supply frequency. The reference angle module 1388 can, for example, mathematically integrate the adjusted supply frequency of each control loop. Mathematical integration produces a change in the base reference angle. The reference angle module 1388 can update the base reference angle of the control loop by adding the change determined for each control loop to the base reference angle from the previous control loop. In various implementations, the reference angle module 1388 can limit the base reference angle to between 0 and a predetermined maximum value (e.g., 360 degrees), thereby falling back to 0 when the base reference angle becomes greater than the predetermined maximum value. This can be performed, for example, using a modulo function. The sine module 1372 and the reference module 1374 are discussed above, and the reference signal is generated using the sine module 1372 and the reference module 1374.

[0190] Reference Fig.13E, the error module 1390 determines an angle error based on the filter correction (from the filter correction module 1324), the expected reference signal angle (determined by the expectation module 1386), and the reference angle (determined by the reference angle module 1388). For example only, the error module 1390 may set the angle error based on the expected reference angle minus the reference angle plus the filter correction or set the angle error equal to the expected reference angle minus the reference angle plus the filter correction.

[0191] The frequency adjustment module 1392 determines the frequency adjustment based on the error. For example, the frequency adjustment module 1392 may increase the frequency adjustment as the error increases and decrease the frequency adjustment as the error decreases. The adjustment module 1394 adjusts the supply frequency based on the frequency adjustment to determine the adjusted supply frequency. For example, the adjustment module 1394 may set the adjusted supply frequency based on the supply frequency plus the frequency adjustment or adjust the adjusted supply frequency to be equal to the supply frequency plus the frequency adjustment. Based on the above, the reference signal will be adjusted to correspond to the AC line voltage in frequency and phase.

[0192] Fig.17 is to depict, for example, FIG. 13A to FIG. 13B 1408 , the comparison module 1308 determines whether the filtered AC input voltage has changed from less than a first predetermined voltage (e.g., -50V) to greater than a first predetermined voltage. If 1408 is true, then at 1412 the storage module 1312 stores the filtered AC input voltage and the current time, and control ends. If 1408 is false, control transfers to 1416.

[0193] At 1416, the comparison module 1308 determines whether the filtered AC input voltage has transitioned from less than a second predetermined voltage (e.g., +50V) to greater than a second predetermined voltage. If 1416 is true, at 1420 the zero-crossing module 1316 determines the AC line zero crossing (when the filtered AC input voltage increases from the first predetermined voltage toward the second predetermined voltage) using linear interpolation based on the stored filtered AC input voltage, the current filtered AC input voltage, the stored time, and the current time. Control then ends. If 1416 is false, control ends. Although control is shown as ending, Fig.17The example of 1404 shows one control loop, and control can return to 1404 for the next control loop. In addition, although the example of interpolation once the filtered AC voltage transitions to greater than the second predetermined voltage has been described, the zero-crossing module 1316 can perform interpolation based on the current filtered AC voltage for each control loop and determine the AC line zero crossing based on the interpolation at the time when the filtered AC input voltage transitions to greater than the second predetermined voltage.

[0194] Fig.18 is to depict, for example, FIG. 13A to FIG. 13B 1504, at which the reference module 1354 generates a reference signal (voltage) based on the RMS voltage multiplied by the sinusoidal reference signal (value). At 1508, the comparison module 1358 determines whether the voltage of the reference signal has changed from greater than a third predetermined voltage (e.g., +50V) to less than a third predetermined voltage. If 1508 is true, the storage module 1362 stores the reference signal voltage and the current time at 1512, and control ends. If 1508 is false, control transfers to 1516.

[0195] At 1516, the comparison module 1358 determines whether the voltage of the reference signal has transitioned from greater than a fourth predetermined voltage (e.g., -50V) to less than a fourth predetermined voltage. If 1516 is true, at 1520 the zero crossing module 1366 determines the reference signal zero crossing (when the reference signal decreases from the third predetermined voltage toward the fourth predetermined voltage) using linear interpolation based on the stored reference signal voltage, the current voltage of the reference signal, the stored time, and the current time. Then, control ends. If 1516 is false, control ends. Although control is shown as ending, Fig.18 The example shows one control loop, and control may return to 1504 for the next control loop. Fig.18 The example can be compared with Fig.17 In addition, although an example of interpolation when the voltage of the reference signal transitions to less than the fourth predetermined voltage has been described, the zero-crossing module 1366 can perform interpolation based on the current voltage of the reference signal for each control cycle, and determine the reference signal zero crossing based on the interpolation at the time when the current voltage transitions to less than the fourth predetermined voltage.

[0196] Fig.19 is to depict, for example, FIG. 13A to FIG. 13B1604, at which the sine generator module 1350 may determine whether the zero crossing module 1366 has just determined that the reference signal has crossed zero. For example, the zero crossing module 1366 may signal the sine generator module 1350 to notify such a determination, or the sine generator module 1350 may determine that the zero crossing module 1366 has determined that the reference signal has crossed zero when the reference signal has crossed zero. If 1604 is false, control may transfer to 1628, discussed further below. If 1604 is true, control may proceed to 1612.

[0197] At 1612, control can make one or more adjustments to account for approximately 1 / 2 of a cycle (e.g., 1 / supply frequency) difference between the AC line zero crossing and the reference signal zero crossing. For example, the zero crossing module 1316 can add 1 / 2 of a cycle of the AC input voltage to the AC line zero crossing, or the zero crossing module 1366 can subtract 1 / 2 of a cycle of the AC input voltage from the reference signal zero crossing. At 1616, the filter correction module 1324 determines a filter correction based on the supply frequency. The filter correction corresponds to the delay time imposed by the filter module 1304.

[0198] At 1620, the error module 1328 determines the error between the (last determined) AC line zero crossing and the (just determined) reference signal zero crossing. For example, the error module 1328 can set the error based on the AC line zero crossing plus the filter correction and minus the reference signal zero crossing or set the error equal to the AC line zero crossing plus the filter correction and minus the reference signal zero crossing. At 1624, the phase adjustment module 1332 updates the phase adjustment based on the error. For example, the phase adjustment module 1332 can determine the phase adjustment using a function or a lookup table that relates the error to the phase adjustment.

[0199] At 1628, the sine generator module 1350 generates a next value of the sinusoidal reference signal based on the phase adjustment for generating a next cycle of the sine wave. At 1632, the reference module 1354 generates a next voltage of the reference signal based on the sinusoidal reference signal and the RMS voltage (of the AC line). For example, the reference module 1354 may set the voltage of the reference signal based on the value of the sinusoidal reference signal multiplied by the peak value of the RMS voltage or set the voltage of the reference signal equal to the value of the sinusoidal reference signal multiplied by the peak value of the RMS voltage. For example, at 1628, the RMS module 1336 determines the RMS voltage based on the AC input voltage. The RMS module 1336 may set the peak voltage based on the RMS voltage multiplied by the square root of 2 or set the peak voltage equal to the RMS voltage multiplied by the square root of 2.

[0200] Although control is shown as ended, Fig.19 The example shows one control loop, and control may return to 1604 for the next control loop. Fig.19 The example can be compared with Fig.17 and Fig.18 Furthermore, while the example is to update the phase adjustment when the reference signal zero crossing is determined, additionally or alternatively, the phase adjustment may be updated using the AC line zero crossing and the last reference signal zero crossing (from about 1 / 2 of a cycle earlier) when the AC line zero crossing is determined. FIG. 13A to FIG. 13B The example discusses Figures 17 to 19 , but similar ideas apply to FIG. 13C to FIG. 13D and FIG. 13E to FIG. 13F .

[0201] The foregoing description is essentially only illustrative and is not intended to limit the present disclosure, its application or use. The broad teaching of the present disclosure can be realized in various forms. Therefore, although the present disclosure includes specific examples, the true scope of the present disclosure should not be limited thereto, because when studying the drawings, the specification and the appended claims, other modifications will become apparent. It should be understood that, without changing the principle of the present disclosure, one or more steps in the method can be performed in different orders (or in parallel). In addition, although each embodiment is described above as having specific features, any one or more features of those features described for any embodiment of the present disclosure can be realized with any features of other embodiments and / or combined with any features of other embodiments, although the combination is not clearly described. In other words, the described embodiments are not mutually exclusive, and the replacement of one or more embodiments with each other is still within the scope of the present disclosure.

[0202] Various terms including "connected", "combined", "coupled", "adjacent", "next to", "on top of", "above", "below", and "arranged" are used to describe the spatial and functional relationships between elements (e.g., between modules, circuit elements, semiconductor layers, etc.). Unless explicitly described as "direct", when describing the relationship between a first element and a second element in the above disclosure, the relationship can be a direct relationship in which there are no other intermediate elements between the first element and the second element, but can also be an indirect relationship in which there are one or more intermediate elements between the first element and the second element (spatially or functionally). As used herein, the phrase at least one of A, B, and C should be understood to mean a logic (A or B or C) using a non-exclusive logic "OR" (OR), and should not be understood to mean "at least one of A, at least one of B, and at least one of C".

[0203] In the drawings, as indicated by arrows, the direction of the arrows generally indicates the flow of information (e.g., data or instructions) of interest to the illustration. For example, when element A and element B exchange various information but the information transmitted from element A to element B is relevant to the illustration, the arrow may point from element A to element B. This unidirectional arrow does not imply that no other information is transmitted from element B to element A. In addition, for information sent from element A to element B, element B may send a request for the information to element A or send a confirmation of receipt of the information to element A.

[0204] In this application, including the following definitions, the term "circuit" replaces the term "module" or the term "controller". The term "module" may refer to, be part of, or include: an application specific integrated circuit (ASIC); a digital, analog, or mixed analog / digital discrete circuit; a digital, analog, or mixed analog / digital integrated circuit; a combinational logic circuit; a field programmable gate array (FPGA); a processor circuit (shared, dedicated, or group) that executes code; a memory circuit (shared, dedicated, or group) that stores code executed by the processor circuit; other suitable hardware components that provide the described functionality; or a combination of some or all of the above, for example, in a system on a chip.

[0205] Module can include one or more interface circuits.In some examples, interface circuit can include being connected to local area network (LAN), Internet, wide area network (WAN) or its combination of wired or wireless interface.The function of any given module of the present disclosure can be distributed in multiple modules connected via interface circuit.For example, multiple modules can allow load balancing.In another example, server (also referred to as remote or cloud) module can complete some functions on behalf of client module.

[0206] Some or all features of a module may be defined using a language for hardware description, such as IEEE Standard 1364-2005 (commonly known as "Verilog") and IEEE Standard 1076-2008 (commonly known as "VHDL"). Hardware description languages ​​may be used to manufacture and / or program hardware circuits. In some implementations, some or all features of a module may be defined by a language that includes both code and hardware descriptions as described below, such as IEEE 1666-2005 (commonly known as "System C").

[0207] The term code used above may include software, firmware and / or microcode, and may refer to a program, a routine, a function, a class, a data structure and / or an object. The term shared processor circuit includes a single processor circuit that executes some or all of the code from multiple modules. The term group processor circuit includes a processor circuit that executes some or all of the code from one or more modules in combination with an additional processor circuit. References to multiple processor circuits include multiple processor circuits on discrete dies, multiple processor circuits on a single die, multiple cores of a single processor circuit, multiple threads of a single processor circuit, or a combination of the above. The term shared memory circuit includes a single memory circuit that stores some or all of the code from multiple modules. The term group memory circuit includes a memory circuit that stores some or all of the code from one or more modules in combination with an additional memory.

[0208] The term memory circuit is a subset of the term computer-readable medium. The term computer-readable medium as used herein does not include transient electrical or electromagnetic signals propagated through a medium (e.g., on a carrier wave); therefore, the term computer-readable medium may be considered to be tangible and non-transitory. Non-limiting examples of non-transitory computer-readable media are non-volatile memory circuits (e.g., flash memory circuits, erasable programmable read-only memory circuits, or mask read-only memory circuits), volatile memory circuits (e.g., static random access memory circuits or dynamic random access memory circuits), magnetic storage media (e.g., analog or digital tape or hard disk drive), and optical storage media (e.g., CD, DVD, or Blu-ray disc).

[0209] The apparatus and methods described in this application may be implemented in part or in whole by a special purpose computer created by configuring a general purpose computer to perform one or more specific functions embodied in a computer program. The functional blocks and flow chart elements described above serve as software specifications that can be compiled into a computer program by the routine work of a skilled technician or programmer.

[0210] The computer program includes processor executable instructions stored on at least one non-transitory computer readable medium. The computer program may also include or rely on stored data. The computer program may include a basic input / output system (BIOS) that interacts with the hardware of the special-purpose computer, device drivers that interact with specific devices of the special-purpose computer, one or more operating systems, user applications, background services, background applications, etc.

[0211] A computer program may include: (i) a descriptive text to be parsed, such as HTML (Hypertext Markup Language), XML (Extensible Markup Language), or JSON (JavaScript Object Notation) (ii) assembly code, (iii) object code generated by a compiler based on source code, (iv) source code executed by an interpreter, (v) source code compiled and executed by a just-in-time compiler, etc. By way of example only, source code may be written using a syntax according to a language including: C, C++, C#, Objective-C, Swift, Haskell, Go, SQL, R, Lisp, Fortran, Perl, Pascal, Curl, OCaml, HTML5 (Hypertext Markup Language Version 5), Ada, ASP (Active Server Pages), PHP (PHP: Hypertext Preprocessor), Scala, Eiffel, Smalltalk, Erlang, Ruby, Lua, MATLAB, SIMULINK, and

Claims

1. A power factor correction system, comprising: a desired off-period module configured to determine a desired off-period of a plurality of switches of the power factor correction circuit based on an input voltage of the power factor correction circuit and an output voltage of the power factor correction circuit; a blanking timer module configured to output a blanking signal to set the blanking signal to a first state when a countdown timer is greater than zero and to set the blanking signal to a second state when the countdown timer reaches zero; and A switching control module is configured to: in response to (i) a measured current through an inductor of the power factor correction circuit being greater than a demand current through the inductor and (ii) the blanking signal being in the second state, transitioning a first switch of the plurality of switches from an on state to an off state; as well as After transitioning from the on-state to the off-state, the first of the plurality of switches is maintained in the off-state for at least the desired off period.

2. The power factor correction system according to claim 1, wherein: The desired disconnection period module is configured to set the desired disconnection period using one of the following: (i) equations relating input voltage and output voltage to desired off-periods; and (ii) A look-up table relating input voltage and output voltage to a desired off period.

3. The power factor correction system according to claim 1, wherein: The desired disconnection period module is configured to set the desired disconnection period using the following equation: Where DOP is the desired off-time, t p is the predetermined switching period, V I is the input voltage, and V O is the output voltage.

4. The power factor correction system according to claim 1, further comprising a first timer module, the first timer module being configured to output a first time, the first time representing a first period of time during which the first switch among the plurality of switches is in the off state, wherein: The switching control module is configured to: determining a maximum off-period of the first of the plurality of switches based on an off-period of a converter branch associated with the first of the plurality of switches, and In response to determining that the first time is greater than or equal to (i) the desired off period and (ii) the maximum off period, the first switch of the plurality of switches is transitioned from the off state to the on state.

5. The power factor correction system according to claim 4, further comprising a second timer module, the second timer module being configured to output a second time, the second time representing a second period of time elapsed since a second switch of the plurality of switches transitions from the off state to the on state, in, The switching control module is configured to: determining a threshold associated with the second of the plurality of switches based on the off period of the converter branch, and In response to determining that (i) the first time is greater than or equal to the desired off period and (ii) the second time is greater than or equal to a determined threshold, transitioning the first of the plurality of switches from the off state to the on state.

6. The power factor correction system according to claim 5, wherein: The switching control module is configured to: in response to transitioning the first switch among the plurality of switches from the on state to the off state, delay a predetermined dead time, and once the predetermined dead time has passed, transition a third switch among the plurality of switches from the off state to the on state.

7. The power factor correction system according to claim 6, wherein: Transitioning the first switch of the plurality of switches from the off state to the on state comprises: transitioning a third switch of the plurality of switches from the on state to the off state; and Delaying the predetermined dead time, After the predetermined dead time has elapsed, the first switch among the plurality of switches is transitioned from the off state to the on state.

8. The power factor correction system according to claim 5, wherein: The blanking timer module is configured to reset the countdown timer in response to one of: The first switch of the plurality of switches is changed from the on state to the off state; and The second switch of the plurality of switches transitions from the on state to the off state.

9. The power factor correction system according to claim 4, wherein: The switching control module is configured to store the first time output by the first timer module as the off period of the converter branch in response to a measured current through an inductor of the power factor correction circuit being greater than a demand current through the inductor.

10. The power factor correction system according to claim 1, wherein: The desired off period module is configured to determine the desired off period based on a switching cycle associated with the first switch of the plurality of switches.

11. A power factor correction method, comprising: determining a desired off period of a plurality of switches of the power factor correction circuit based on an input voltage of the power factor correction circuit and an output voltage of the power factor correction circuit; Output blanking signal; When the countdown timer is greater than zero, setting the blanking signal to a first state; When the countdown timer reaches zero, setting the blanking signal to a second state; in response to (i) a measured current through an inductor of the power factor correction circuit being greater than a demand current through the inductor and (ii) the blanking signal being in the second state, transitioning a first switch of the plurality of switches from an on state to an off state; as well as After transitioning from the on-state to the off-state, the first of the plurality of switches is maintained in the off-state for at least the desired off period.

12. The power factor correction method according to claim 11, wherein: Setting the expected disconnection period includes setting the expected disconnection period using one of the following: (i) equations relating input voltage and output voltage to the desired off period; as well as (ii) A look-up table relating input voltage and output voltage to a desired off period.

13. The power factor correction method according to claim 11, wherein setting the expected disconnection period comprises using the following equation to set the expected disconnection period: in, DOP is the desired off-period, t p is the predetermined switching period, V I is the input voltage, and V O is the output voltage.

14. The power factor correction method according to claim 11, further comprising: outputting a first time, wherein the first time indicates a first time period during which the first switch among the plurality of switches is in the disconnected state; determining a maximum off-period of the first of the plurality of switches based on an off-period of a converter branch associated with the first of the plurality of switches; as well as In response to determining that the first time is greater than or equal to (i) the desired off period and (ii) the maximum off period, the first switch of the plurality of switches is transitioned from the off state to the on state.

15. The power factor correction method according to claim 14, further comprising: outputting a second time, the second time representing a second period of time that has passed since a second switch among the plurality of switches transitioned from the off state to the on state; determining a threshold associated with the second switch of the plurality of switches based on the off period of the converter branch; as well as In response to determining that (i) the first time is greater than or equal to the desired off period and (ii) the second time is greater than or equal to a determined threshold, transitioning the first of the plurality of switches from the off state to the on state.

16. The power factor correction method according to claim 15, further comprising: In response to transitioning the first switch of the plurality of switches from the on state to the off state, a predetermined dead time is delayed, and once the predetermined dead time has elapsed, a third switch of the plurality of switches is transitioned from the off state to the on state.

17. The power factor correction method according to claim 16, wherein: Transitioning the first switch of the plurality of switches from the off state to the on state comprises: transitioning a third switch of the plurality of switches from the on state to the off state; and Delaying the predetermined dead time, After the predetermined dead time has elapsed, the first switch among the plurality of switches is transitioned from the off state to the on state.

18. The power factor correction method of claim 15, further comprising resetting the countdown timer in response to one of: The first switch of the plurality of switches is changed from the on state to the off state; and The second switch of the plurality of switches transitions from the on state to the off state.

19. The power factor correction method according to claim 14, further comprising: In response to a measured current through an inductor of the power factor correction circuit being greater than a demand current through the inductor, the outputted first time is stored as the off-period of the converter branch.

20. The power factor correction method of claim 11, further comprising determining the desired off period based on a switching cycle associated with the first of the plurality of switches.

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