A cross-eye interference system and interference generation method based on digital amplitude and phase control

By adopting digital amplitude phase regulation technology in cross-eye interference systems, precise control of signals is achieved, which solves the problem that existing systems are difficult to achieve phase opposites in the wavefront of radar antennas, and significantly improves the interference effect and accuracy.

CN114325604BActive Publication Date: 2025-02-28NANJING CHANGFENG AEROSPACE ELECTRONICS SCI & TECH
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Patent Information

Application Number
CN202111677513.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-31
Publication Date
2025-02-28
Estimated Expiration
2041-12-31

AI Technical Summary

Technical Problem

The existing cross-eye interference system is difficult to achieve opposite phases in the wavefront of the radar antenna, resulting in the problem of zero traps causing wavefront distortion.

Method used

A cross-eye interference system based on digital amplitude phase regulation is adopted. Through two pairs of interference antennas and signal processing chassis, the FPGA chip and computer control board are used to realize coarse phase shift and amplitude control of the signal, as well as fine phase shift and amplitude control, ensuring that the amplitudes of the two signals are approximately equal and opposite at the radar antenna port surface.

Benefits of technology

High-precision amplitude control is achieved to ensure good interference effect. By receiving external target position information, combining the current position and attitude information of the system, the antenna pointing angle can be calculated to achieve better interference effect.

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Abstract

The present invention discloses a cross-eye interference system and interference generation method based on digital amplitude and phase control. Two signal processing boards are used to measure the frequency of the radio frequency signals of the two transceiver paths; according to the obtained frequency, the coarse calibration phase value and amplitude value and the fine calibration phase value and amplitude value of the corresponding two paths are searched in the pre-stored coarse calibration table and fine calibration table; according to the coarse calibration phase value and amplitude value, attenuators and phase shifters are used to roughly adjust the phase and amplitude of the two paths at the radio frequency end; according to the fine calibration phase value and amplitude value, two signal processing boards are used to fine-tune the phase and amplitude of the two paths after the coarse adjustment. The present invention adopts a reverse cross-eye system, and the radio frequency signals of the two transceiver paths are roughly adjusted in amplitude and phase at the radio frequency end, and then fine-tuned in the baseband signal, to achieve the effect of approximately equal amplitude and opposite phase, high amplitude and phase control accuracy, and good interference effect.
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Description

Technical Field

[0001] The invention relates to a cross-eye interference system based on digital amplitude and phase regulation and an interference generation method, belonging to the technical field of electronic countermeasures. Background Art

[0002] Monopulse radar measures the distance and angle of the target through sum and difference beams, and has strong anti-interference ability. It is widely used in missile terminal guidance systems to carry out precise strikes on targets such as aircraft and ships. How to deal with missile threats and use electronic means to attack the electromagnetic sensors of missile terminal guidance so that they cannot accurately track the target is a hot issue in the current electronic warfare field.

[0003] With the development of technology, cross-eye jamming is based on the angle measurement principle of single-pulse radar, and is considered to be one of the most effective jamming methods for single-pulse radar. Reverse cross-eye jamming is a single-pulse angle deception jamming technology that has received widespread attention in recent years. How to achieve that the amplitudes of the two jamming signals reaching the threat target are approximately equal and the phases are opposite has become the technical difficulty of cross-eye jamming. Summary of the invention

[0004] The purpose of the present invention is to provide a cross-eye jammer system and jammer generation method based on digital amplitude and phase control, so as to solve the problem that the existing methods are difficult to achieve phase opposition in the radar antenna wavefront to form a null and generate wavefront distortion.

[0005] In order to achieve the above-mentioned purpose, the technical solution provided by the implementation case of the present invention is:

[0006] On the one hand, a cross-eye interference system based on digital amplitude and phase control includes: two pairs of interference antennas, a signal source microwave plug-in box, a signal processing board 1, a signal processing board 2 and a computer control board, wherein one pair of interference antennas includes a transmitting antenna 1 and a receiving antenna 1, and the other pair of interference antennas includes a transmitting antenna 2 and a receiving antenna 2, the signal source microwave plug-in box includes a down-conversion module 1, a down-conversion module 2, an up-conversion module 1 and an up-conversion module 2, the signal processing board 1 includes a first A / D conversion module, a first D / A conversion module, a first AD sampling module and a first FPGA chip, the signal processing board 2 includes a second A / D conversion module, a second D / A conversion module, a second A / D sampling module and a second FPGA chip, the signal received by the receiving antenna 1 is sequentially output to the transmitting antenna 1 through the down-conversion module 1, the first A / D conversion module, the first D / A conversion module, and the up-conversion module 1 to form a first link, the signal received by the receiving antenna 2 is sequentially output to the transmitting antenna 2 through the down-conversion module 2, the second A / D conversion module, the second D / A conversion module, and the up-conversion module 2 to form a second link; the up-conversion module The output end of module 1 is connected to the input end of down-frequency module 1, and the output end of up-conversion module 2 is connected to the input end of down-frequency module 2; the first AD sampling module is used to perform AD sampling on the down-conversion signal output by down-frequency module 1 and input it into the first FPGA chip, the second AD sampling module is used to perform AD sampling on the down-conversion signal output by down-frequency module 2 and input it into the second FPGA chip, the first FPGA chip and the second FPGA chip respectively perform parameter measurement on the AD sampling signal to obtain the current frequency of the signal, and the first FPGA chip and the second FPGA chip are both connected to a computer control board; the computer control board performs coarse phase shifting and amplitude control on the signals of the first link and the second link respectively based on the pre-stored coarse calibration table by controlling the attenuators and phase shifters in up-conversion module 1 and up-conversion module 2 according to the frequency measured by the first FPGA chip or the second FPGA chip, and performs fine phase shifting and amplitude control on the signals of the first link and the second link respectively based on the pre-stored fine calibration table.

[0007] Furthermore, the coarse calibration table and the fine calibration table are obtained by the following method:

[0008] The input end of the transmitting antenna 1 and the output end of the receiving antenna 1 are short-circuited to form a first loop, and a baseband linear frequency modulation signal of a certain bandwidth is generated by controlling the signal processing board 1, and sent to the down-conversion module 1 through the up-conversion module 1, the transmitting antenna 1, and the receiving antenna 1, and converted to a baseband signal. The baseband signal is A / D converted by the first A / D conversion module, and pulse compression is performed based on the signal generated by the signal processing board 1 itself and the received signal after A / D conversion, and the phase difference and amplitude difference between the receiving and transmitting signals of the first loop are extracted, and the same sampling method is used to obtain the phase difference and amplitude difference between the receiving and transmitting signals of the second loop; traverse according to the signal bandwidth to obtain the phase difference and amplitude difference between the receiving and transmitting signals of the first loop and the second loop in all working frequency bands, and obtain a frequency-phase difference / amplitude difference test table;

[0009] According to the test table, the signals of the first loop and the second loop in all working frequency bands are coarsely phase-shifted and amplitude-controlled by controlling the attenuators and phase shifters in the up-conversion module 1 and the up-conversion module 2, respectively, to obtain a coarse calibration table;

[0010] The signals output by the up-conversion module 1 and the up-conversion module 2 are respectively input to the down-conversion module 1 and the down-conversion module 2, and the first D / A conversion module and the second D / A conversion module are respectively controlled by the first FPGA chip and the second FPGA chip to perform precise phase shifting and amplitude control on the two signals, wherein the phases of the two loops need to differ by 180°, so as to obtain a fine calibration table.

[0011] Furthermore, the phase accuracy of the coarse phase shift and amplitude control is 0.5° and the amplitude accuracy is -0.25dB, and the phase accuracy of the fine phase shift and amplitude control is 0.2° and the amplitude accuracy is -0.01dB.

[0012] Furthermore, the radio frequency cables used in the cross-eye jammer system are all amplitude- and phase-stabilized cables.

[0013] Furthermore, the microwave channels of the first link and the second link are consistent in electrical length with the radio frequency cables.

[0014] Furthermore, the signal processing board 1 and the signal processing board 2 both include a VPX carrier board and two FMC+ daughter cards, and the VPX carrier board and the FMC+ daughter cards adopt an interconnected structure design.

[0015] Furthermore, the cross-eye interference system based on digital amplitude and phase control also includes two servo pan-tilts, the transmitting antenna 1 and the receiving antenna 2 are installed on one of the servo pan-tilts, the transmitting antenna 2 and the receiving antenna 1 are installed on the other servo pan-tilt, and both servo pan-tilts are connected to the computer control board.

[0016] Furthermore, the computer control board also calculates the antenna pointing angle by receiving external guidance data and combining the antenna's own position and attitude information, and controls the servo gimbal to rotate so that the antenna points to the target position according to the calculated antenna pointing angle.

[0017] On the other hand, a method for generating cross-eye interference based on digital amplitude and phase control includes:

[0018] The threat target signal is received simultaneously by receiving antenna 1 and receiving antenna 2. The signals received by receiving antenna 1 and receiving antenna 2 are transmitted via the first link and the second link respectively. The signal collected by the first AD sampling module is measured by the first FPGA chip, or the signal collected by the second AD sampling module is measured by the second FPGA chip to obtain the current frequency of the signal.

[0019] According to the obtained frequency, searching the coarse calibration phase value and amplitude value and the fine calibration phase value and amplitude value of the corresponding first link and second link in the pre-stored coarse calibration table and fine calibration table;

[0020] According to the coarse calibration phase value and amplitude value of the first link, the attenuator and phase shifter in the up-conversion module 1 are controlled by the first FPGA chip to adjust the phase and amplitude of the signal of the first link; and according to the coarse calibration phase value and amplitude value of the second link, the attenuator and phase shifter in the up-conversion module 2 are controlled by the second FPGA chip to coarsely adjust the phase and amplitude of the second link;

[0021] The signals outputted by the up-conversion module 1 and the up-conversion module 2 after completing the coarse phase shift and amplitude adjustment are respectively inputted into the down-conversion module 1 and the down-conversion module 2;

[0022] According to the precisely calibrated phase value and amplitude value of the first link, the first D / A conversion module is controlled by the first FPGA chip to fine-tune the phase and amplitude of the first link after the coarse adjustment. According to the precisely calibrated phase value and amplitude value of the second link, the second D / A conversion module is controlled by the second FPGA chip to fine-tune the phase and amplitude of the second link after the coarse adjustment.

[0023] The beneficial technical effects achieved by the present invention are as follows: Different from the traditional cross-eye jamming system, the present invention adopts a reverse cross-eye system, and the RF signals of the two transmitting and receiving paths are firstly coarsely adjusted in amplitude and phase at the RF end, and then finely adjusted in the baseband signal, so as to achieve the effect of approximately equal amplitude and opposite phase; the amplitude and phase control of the present invention is high in precision and good in jamming effect; and by receiving the position information of the test target provided by the outside, combining the current position and attitude information of the system, the antenna pointing angle is calculated to achieve a better jamming effect; in addition, in addition to achieving the cross-eye jamming effect, deception, suppression and other jamming can also be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 This is the reverse cross-eye schematic;

[0025] Figure 2 A working principle diagram of a cross-eye interference system based on digital amplitude and phase control according to an embodiment of the present invention;

[0026] Figure 3 A schematic diagram of the composition of a cross-eye interference system based on digital amplitude and phase control according to an embodiment of the present invention;

[0027] Figure 4 Provide a block diagram for the signal processing chassis;

[0028] Figure 5 This is the schematic diagram of the signal processing board. DETAILED DESCRIPTION

[0029] The present invention will be further described below in conjunction with specific examples. The following examples are only used to more clearly illustrate the technical solutions of the present invention, and are not intended to limit the scope of protection of the present invention.

[0030] like Figures 1 to 5 As shown, a cross-eye jamming system based on digital amplitude and phase control includes: two pairs of jamming antennas and a signal processing chassis 4.

[0031] Of the two pairs of interference antennas, one pair includes a transmitting antenna 1 and a receiving antenna 1, and the other pair includes a transmitting antenna 2 and a receiving antenna 2.

[0032] The signal processing chassis 4 includes a signal source microwave plug-in box, a signal processing board 1, a signal processing board 2 and a computer control board.

[0033] The signal source microwave plug-in box comprises a down-conversion module 1, a down-conversion module 2, an up-conversion module 1, an up-conversion module 2, a frequency synthesis module and a clock module.

[0034] Down-conversion module 1 and down-conversion module 2 include filters, amplifiers, mixers, etc., and are used to perform processing such as filtering, down-conversion, and amplification on received signals.

[0035] The up-conversion module 1 and the up-conversion module 2 include a mixer, an attenuator, a phase shifter, etc., which are used to realize up-conversion processing of the signal and adjust the phase and amplitude of the signal.

[0036] Down-conversion module 1, down-conversion module 2, up-conversion module 1, up-conversion module 2 are all connected to the frequency synthesis module. The frequency synthesis module provides frequency conversion local oscillator for down-conversion module 1, down-conversion module 2, up-conversion module 1, up-conversion module 2.

[0037] The clock module is used to provide clock signals to the system.

[0038] The signal processing board 1 includes a first A / D conversion module (ADC1), a first D / A conversion module (DAC1), a first AD sampling module and a first FPGA chip.

[0039] The signal processing board 2 includes a second A / D conversion module (ADC2), a second D / A conversion module (DAC2), a second AD sampling module and a second FPGA chip.

[0040] Signal processing board 1 and signal processing board 2 perform AD sampling on the down-converted signal and send it to FPGA for digital down-conversion to measure signal parameters and complete signal amplitude and phase control. Signal processing board 1 and signal processing board 2 are both composed of a VPX carrier board and two FMC+ daughter cards. The VPX carrier board and the FMC+ daughter card are designed as interconnected structures and use standard FMC+ interfaces. In this way, the I / O interfaces of A / D and D / A are separated from the FPGA, which not only simplifies the design of the I / O interface module, but also maximizes the reuse rate of the carrier board. The board design of signal processing board 1 and signal processing board 2 is shown in the figure. Figure 5 shown.

[0041] The computer control board is integrated with the signal processing board. The board is equipped with a high-performance POWER PC processor and runs a real-time operating system. It obtains system configuration and control parameters through interfaces such as Ethernet, obtains control data for each module through analysis and calculation, and transmits it to the FPGA in the board through the SRIO bus to realize the control of each device in the board.

[0042] like Figure 2 As shown, the signal received by the receiving antenna 1 is filtered, amplified, down-converted, etc. by the down-frequency module 1 to obtain a down-converted signal. The down-converted signal enters the signal processing board 1, is converted into analog / digital by the first A / D conversion module in the signal processing board 1, and then is converted into digital / analog by the first D / A conversion module to obtain an analog signal, and is output to the up-conversion module 1. The up-conversion module 1 adjusts the phase and amplitude of the signal and performs up-conversion before outputting it to the transmitting antenna 1. Finally, it is transmitted through the transmitting antenna 1, thereby forming a first link.

[0043] The signal received by the receiving antenna 2 is filtered, amplified, and down-converted by the down-frequency module 2 to obtain a down-converted signal. The down-converted signal enters the signal processing board 2, is converted into digital by the second A / D conversion module in the signal processing board 2, and is converted into digital by the second D / A conversion module to obtain an analog signal, which is output to the up-conversion module 2. The up-conversion module 2 adjusts the phase and amplitude of the signal and performs up-conversion processing on the signal before outputting it to the transmitting antenna 2. Finally, it is transmitted via the transmitting antenna 2, thereby forming a second link.

[0044] At the same time, the output end of the up-conversion module 1 is connected to the input end of the down-conversion module 1, and the output end of the up-conversion module 2 is connected to the input end of the down-conversion module 2, so that the signals output by the up-conversion module 1 and the up-conversion module 2 can be respectively fed back to the down-conversion module 1 and the down-conversion module 2.

[0045] The first AD sampling module is used to perform AD sampling on the down-converted signal output by the down-frequency module 1 and input it into the first FPGA chip. The second AD sampling module is used to perform AD sampling on the down-converted signal output by the down-frequency module 2 and input it into the second FPGA chip. The first FPGA chip and the second FPGA chip respectively perform parameter measurement on the AD sampling signal to obtain the current frequency of the signal.

[0046] The first FPGA chip and the second FPGA chip are both connected to the computer control board.

[0047] The computer control board performs coarse adjustment on the phase and amplitude of the first link and the second link signals respectively by controlling the attenuators and phase shifters in the up-conversion module 1 and the up-conversion module 2 according to the frequency measured by the first FPGA chip or the second FPGA chip based on a pre-stored coarse calibration table; and performs fine adjustment on the phase and amplitude of the first link and the second link signals respectively by controlling the first D / A conversion module and the second D / A conversion module based on a pre-stored fine calibration table.

[0048] The radio frequency cables used in the system of the present invention are all amplitude-stable and phase-stable cables. When designing the first link and the second link, the microwave channels and radio frequency cables are designed to be consistent in electrical length.

[0049] like Figure 3 As shown, the system of the present invention also includes two servo platforms 3, the transmitting antenna 1 and the receiving antenna 2 are installed on one of the servo platforms 3, the transmitting antenna 2 and the receiving antenna 1 are installed on the other servo platform 3, and the two servo platforms 3 are connected to the computer control board.

[0050] The computer control board can calculate the antenna pointing angle by receiving external guidance data and combining the antenna's own position and attitude information, and control the servo gimbal to rotate so that the antenna points to the target position based on the calculated antenna pointing angle.

[0051] The above coarse calibration table and fine calibration table are obtained by the following method:

[0052] like Figure 2As shown, a stable amplitude and phase RF cable is used to short-circuit the input end of the transmitting antenna 1 and the output end of the receiving antenna 1 to form a first loop, and a baseband linear frequency modulation signal with a bandwidth of 50MHz is generated by controlling the signal processing board 1, which is sent to the down-conversion module 1 through the up-conversion module 1, the transmitting antenna 1, and the receiving antenna 1, and converted to a baseband signal. The baseband signal is A / D converted by the first A / D conversion module, and the signal generated by the signal processing board 1 itself and the signal after A / D conversion received by the down-conversion module are pulse compressed to extract the phase difference and amplitude difference between the receiving and transmitting signals of the first loop; the same sampling method is used to obtain the phase difference and amplitude difference between the receiving and transmitting signals of the second loop.

[0053] Traverse according to the signal bandwidth to obtain the phase difference and amplitude difference between the first loop and the second loop receiving and transmitting signals in all working frequency bands, and obtain a frequency-phase difference / amplitude difference test table.

[0054] After completing the above work, perform coarse and fine calibration on the phase and amplitude of the two loops according to the test table. Coarse calibration is performed on the analog end, and fine calibration is performed on the digital signal, as follows:

[0055] Firstly, according to the test table, the signals of the first loop and the second loop in all working frequency bands are roughly phase-shifted and amplitude-controlled by controlling the attenuators and phase shifters in the up-conversion module 1 and the up-conversion module 2 respectively.

[0056] Then, the signals output by the up-conversion module 1 and the up-conversion module 2 are respectively fed back to the down-conversion module 1 and the down-conversion module 2, and the first FPGA chip and the second FPGA chip are used to control the first D / A conversion module and the second D / A conversion module to perform precise phase shift and amplitude control on the two signals (wherein, the D / A conversion is quantized according to 8 bits, 1 bit is 6.02 dB, and the dynamic range is 6.02×8=48.16 dB. The program is internally calculated according to 10 bits conversion, and the amplitude accuracy is 20×log10(1023 / 1024)≈-0.01 dB; the phase accuracy is obtained by the formula arctan(Q / I) arctan(1 / 256)≈0.2°, and the phase range is 0°~180°). During the link calibration process, the phases of the two loops need to differ by 180°.

[0057] Finally, the rough calibration and fine calibration are made into calibration tables and bound in the equipment in advance for real-time calibration when the system is working.

[0058] Among them, the phase accuracy of coarse phase shift and amplitude control is 0.5° and the amplitude accuracy is -0.25dB, and the phase accuracy of fine phase shift and amplitude control is 0.2° and the amplitude accuracy is -0.01dB.

[0059] In another embodiment, a method for generating cross-eye interference based on digital amplitude and phase control includes:

[0060] The threat target signal is received simultaneously by receiving antenna 1 and receiving antenna 2. The signals received by receiving antenna 1 and receiving antenna 2 are transmitted through the first link and the second link respectively. The signal collected by the first AD sampling module is measured by the first FPGA chip, or the signal collected by the second AD sampling module is measured by the second FPGA chip to obtain the current frequency of the signal.

[0061] According to the obtained frequency, searching the coarse calibration phase value and amplitude value and the fine calibration phase value and amplitude value of the corresponding first link and second link in the pre-stored coarse calibration table and fine calibration table;

[0062] According to the coarse calibration phase value and amplitude value of the first link, the attenuator and phase shifter in the up-conversion module 1 are controlled by the first FPGA chip to coarsely adjust the phase and amplitude of the signal of the first link; and according to the coarse calibration phase value and amplitude value of the second link, the attenuator and phase shifter in the up-conversion module 2 are controlled by the second FPGA chip to coarsely adjust the phase and amplitude of the second link;

[0063] The signals outputted by the up-conversion module 1 and the up-conversion module 2 after completing the coarse phase shift and amplitude adjustment are respectively inputted into the down-conversion module 1 and the down-conversion module 2;

[0064] According to the precisely calibrated phase value and amplitude value of the first link, the first D / A conversion module is controlled by the first FPGA chip to fine-tune the phase and amplitude of the first link after the coarse adjustment. According to the precisely calibrated phase value and amplitude value of the second link, the second D / A conversion module is controlled by the second FPGA chip to fine-tune the phase and amplitude of the second link after the coarse adjustment.

[0065] In a specific implementation, after the system calibration is completed, the system connection is restored. During the system operation, the antenna pointing angle can be calculated by receiving external guidance data and combining its own position and attitude information to point to the target position in real time.

[0066] When the two loops receive the threat target signal at the same time (the first link is used as the main channel and the second link is used as the slave channel), digital channelization is used in the main channel signal processing to realize signal parameter measurement. According to the current frequency information, the link phase shift and amplitude attenuation are controlled simultaneously in the analog and digital links to realize the amplitude and phase regulation of the link, ensuring that the amplitudes of the two transmitted signals are approximately equal and the phases are opposite at the radar antenna aperture, forming a null.

[0067] Considering that the distance between the receiving antenna and the transmitting antenna is very small, this system can use intermittent sampling to control the timing of the receiving and transmitting signals when realizing cross-eye interference to ensure the isolation between the receiving and transmitting signals. The specific sampling time, playback time, and interval time of the two signals need to be comprehensively considered according to the system reaction time, the interference deception distance or angle, and the duration of the interference. There are differences for different hardware platforms and processing algorithms, which will not be elaborated in detail in this article. In addition to achieving the effect of cross-eye interference, the present invention also has the ability to generate other conventional interferences, such as deception interference. Through a separate first link or a second link, according to the different interference powers, a transmitter is installed at the output end of the RF signal to achieve power amplification. The system needs to have the function of independent link control when designing. When generating broadband suppression interference, the RF outputs of the two links are connected to the transmitter output at the same time, and the interference signals of the two point sources are realized through the transmitting antennas on the two servo pan-tilt platforms.

[0068] The present invention has been disclosed above with preferred embodiments, but they are not intended to limit the present invention. Any technical solutions obtained by adopting equivalent replacement or equivalent transformation solutions fall within the protection scope of the present invention.

Claims

1. A cross-eye jammer system based on digital amplitude and phase control, characterized in that: include: Two pairs of interference antennas, a signal source microwave plug-in box, a signal processing board 1, a signal processing board 2 and a computer control board, wherein one pair of interference antennas includes a transmitting antenna 1 and a receiving antenna 1, and the other pair of interference antennas includes a transmitting antenna 2 and a receiving antenna 2, the signal source microwave plug-in box includes a down-conversion module 1, a down-conversion module 2, an up-conversion module 1 and an up-conversion module 2, the signal processing board 1 includes a first A / D conversion module, a first D / A conversion module, a first AD sampling module and a first FPGA chip, the signal processing board 2 includes a second A / D conversion module, a second D / A conversion module, a second A / D sampling module and a second FPGA chip, the signal received by the receiving antenna 1 is sequentially output to the transmitting antenna 1 through the down-conversion module 1, the first A / D conversion module, the first D / A conversion module and the up-conversion module 1 to form a first link, the signal received by the receiving antenna 2 is sequentially output to the transmitting antenna 2 through the down-conversion module 2, the second A / D conversion module, the second D / A conversion module and the up-conversion module 2 to form a second link; the output end of the up-conversion module 1 is connected to the down-conversion module 1 is connected to the input end of the up-conversion module 2, and the output end of the up-conversion module 2 is connected to the input end of the down-conversion module 2; the first AD sampling module is used to perform AD sampling on the down-conversion signal output by the down-conversion module 1 and input it into the first FPGA chip, the second AD sampling module is used to perform AD sampling on the down-conversion signal output by the down-conversion module 2 and input it into the second FPGA chip, the first FPGA chip and the second FPGA chip respectively measure parameters of the AD sampling signal to obtain the current frequency of the signal, and the first FPGA chip and the second FPGA chip are both connected to the computer control board; the computer control board performs coarse phase shift and amplitude control on the signals of the first link and the second link respectively by controlling the attenuators and phase shifters in the up-conversion module 1 and the up-conversion module 2 based on the frequency measured by the first FPGA chip or the second FPGA chip based on the pre-stored coarse calibration table, and performs fine phase shift and amplitude control on the signals of the first link and the second link respectively by controlling the first D / A conversion module and the second D / A conversion module based on the pre-stored fine calibration table.

2. A cross-eye interference system based on digital amplitude and phase control according to claim 1, characterized in that: The coarse calibration table and the fine calibration table are obtained by the following method: The input end of the transmitting antenna 1 and the output end of the receiving antenna 1 are short-circuited to form a first loop, and a baseband linear frequency modulation signal of a certain bandwidth is generated by controlling the signal processing board 1, and sent to the down-conversion module 1 through the up-conversion module 1, the transmitting antenna 1, and the receiving antenna 1, and converted to a baseband signal. The baseband signal is A / D converted by the first A / D conversion module, and pulse compression is performed based on the signal generated by the signal processing board 1 itself and the received signal after A / D conversion, and the phase difference and amplitude difference between the receiving and transmitting signals of the first loop are extracted, and the same sampling method is used to obtain the phase difference and amplitude difference between the receiving and transmitting signals of the second loop; traverse according to the signal bandwidth to obtain the phase difference and amplitude difference between the receiving and transmitting signals of the first loop and the second loop in all working frequency bands, and obtain a frequency-phase difference / amplitude difference test table; According to the test table, the signals of the first loop and the second loop in all working frequency bands are coarsely phase-shifted and amplitude-controlled by controlling the attenuators and phase shifters in the up-conversion module 1 and the up-conversion module 2, respectively, to obtain a coarse calibration table; The signals output by the up-conversion module 1 and the up-conversion module 2 are respectively input to the down-conversion module 1 and the down-conversion module 2, and the first D / A conversion module and the second D / A conversion module are respectively controlled by the first FPGA chip and the second FPGA chip to perform precise phase shifting and amplitude control on the two signals, wherein the phases of the two loops need to differ by 180°, so as to obtain a fine calibration table.

3. A cross-eye interference system based on digital amplitude and phase control according to claim 2, characterized in that: The phase accuracy of the coarse phase shift and amplitude control is 0.5° and the amplitude accuracy is -0.25dB, and the phase accuracy of the fine phase shift and amplitude control is 0.2° and the amplitude accuracy is -0.01dB.

4. A cross-eye interference system based on digital amplitude and phase control according to claim 1, characterized in that: The radio frequency cables used in the cross-eye jammer system are all amplitude- and phase-stable cables.

5. A cross-eye interference system based on digital amplitude and phase control according to claim 4, characterized in that: The microwave channels of the first link and the second link are consistent with the radio frequency cables in terms of electrical length.

6. A cross-eye interference system based on digital amplitude and phase control according to claim 1, characterized in that: The signal processing board 1 and the signal processing board 2 both include a VPX carrier board and two FMC+ daughter cards, and the VPX carrier board and the FMC+ daughter cards adopt an interconnection structure design.

7. A cross-eye interference system based on digital amplitude and phase control according to claim 1, characterized in that: It also includes two servo pan-tilt platforms, wherein a transmitting antenna 1 and a receiving antenna 2 are mounted on one of the servo pan-tilt platforms, and a transmitting antenna 2 and a receiving antenna 1 are mounted on the other servo pan-tilt platform, and both servo pan-tilt platforms are connected to a computer control board.

8. A cross-eye interference system based on digital amplitude and phase control according to claim 7, characterized in that: The computer control board also calculates the antenna pointing angle by receiving external guidance data and combining the antenna's own position and attitude information, and controls the servo gimbal to rotate so that the antenna points to the target position according to the calculated antenna pointing angle.

9. A method for generating cross-eye interference based on digital amplitude and phase control, characterized in that: Based on the cross-eye interference system implementation according to any one of the preceding claims 1-8, the method comprises: The threat target signal is received simultaneously by receiving antenna 1 and receiving antenna 2. The signals received by receiving antenna 1 and receiving antenna 2 are transmitted via the first link and the second link respectively. The signal collected by the first AD sampling module is measured by the first FPGA chip, or the signal collected by the second AD sampling module is measured by the second FPGA chip to obtain the current frequency of the signal. According to the obtained frequency, searching the coarse calibration phase value and amplitude value and the fine calibration phase value and amplitude value of the corresponding first link and second link in the pre-stored coarse calibration table and fine calibration table; According to the coarse calibration phase value and amplitude value of the first link, the attenuator and phase shifter in the up-conversion module 1 are controlled by the first FPGA chip to adjust the phase and amplitude of the signal of the first link; and according to the coarse calibration phase value and amplitude value of the second link, the attenuator and phase shifter in the up-conversion module 2 are controlled by the second FPGA chip to coarsely adjust the phase and amplitude of the second link; The signals outputted by the up-conversion module 1 and the up-conversion module 2 after completing the coarse phase shift and amplitude adjustment are respectively inputted into the down-conversion module 1 and the down-conversion module 2; According to the precisely calibrated phase value and amplitude value of the first link, the first D / A conversion module is controlled by the first FPGA chip to fine-tune the phase and amplitude of the first link after the coarse adjustment. According to the precisely calibrated phase value and amplitude value of the second link, the second D / A conversion module is controlled by the second FPGA chip to fine-tune the phase and amplitude of the second link after the coarse adjustment.

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