Readout Circuit, Readout Method and Readout System for SiPM Array

Through the SiPM array partitioned self-conforming readout circuit, the false triggering of noise events is reduced, and the problem of high dark noise in SiPM array is solved, a lower energy detection lower limit is achieved, and its application range in photoelectric detection is expanded.

CN114325806BActive Publication Date: 2025-08-01WUXI TOFTEK OPTOELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202111531611.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-14
Publication Date
2025-08-01
Estimated Expiration
2041-12-14

AI Technical Summary

Technical Problem

SiPM arrays have high dark noise levels in large-area applications, resulting in a high lower limit of energy detection, making it difficult to replace the effective application of traditional photomultiplier tubes (PMTs) in low-energy X-ray or gamma-ray measurements.

Method used

The SiPM array partitioned self-conforming readout circuit is adopted. By dividing the SiPM array into multiple packets, the signal processing is performed using components such as operational amplifiers, comparators, AND gates and analog switches. The signal is output only when all packet results exceed the threshold, reducing the false triggering of noise events, and achieving accurate signal merging and delay control.

Benefits of technology

Effectively reduce the dark noise level and energy detection lower limit of SiPM arrays, improve the accuracy and efficiency of signal processing, and enable it to replace PMT for photoelectric detection in more applications.

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Abstract

The present application provides a SiPM array readout circuit, method and system. The readout circuit includes: a SiPM array, which is divided into a predetermined number of groups, and SiPM chips in the SiPM array detect optical signals emitted by a light emitter coupled to the SiPM chips; an operational amplifier, which sums the optical signals for each of the groups and outputs the summation result of each of the groups; a total operational amplifier, which operates on the summation results of the operational amplifier to obtain a total summation signal; a comparator, which compares the summation results from the operational amplifier with preset thresholds respectively and outputs the comparison results of the comparator; an AND gate, which combines all the comparison results to generate a control signal; and an analog switch, which outputs the total summation signal according to the control signal. According to the present application, false triggering of noise events can be reduced, and the energy detection lower limit of the SiPM array can be greatly reduced.
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Description

Technical Field

[0001] This application relates to the field of radiation detectors, and particularly to a readout circuit, a readout method, and a readout system for a SiPM array. Background Art

[0002] With the development of semiconductor technology, silicon photomultipliers (SiPMs) have been increasingly widely used in the field of radiation detectors due to their advantages such as small size, low operating voltage, insensitivity to magnetic fields, good response uniformity, easy packaging, and low cost. Compared with traditional photomultiplier tubes (PMTs), SiPM devices can solve the problems of detecting, timing, and quantifying low light signals to the single photon level, and almost have all the advantages of solid-state sensors.

[0003] However, since the dark noise count rate of SiPMs is much higher than that of PMTs, there is still room for further improvement in applications with high requirements for the lower limit of energy detection. For example, when measuring low-energy X-rays or gamma rays after coupling a large-area SiPM array with a bulk scintillator, there is obviously a problem of a relatively high lower limit of energy detection. Summary of the Invention

[0004] The purpose of this application is to provide a SiPM array readout circuit and a SiPM array readout system, which can reduce the mis-triggering of noise events, effectively improve the problem that the larger the area of the SiPM array, the higher the dark noise level, and can significantly reduce the lower limit of energy detection of the SiPM array.

[0005] The purpose of this application is achieved by the following technical solutions:

[0006] One aspect of this application provides a SiPM array readout circuit, including: a SiPM array divided into a predetermined number of groups, where the SiPM chips in the SiPM array are used to detect the optical signals emitted by the light-emitting body coupled to the SiPM chip; an operational amplifier for summing the optical signals for each group and outputting the summation result of each group; a total operational amplifier for operating on the summation result of the operational amplifier to obtain a total summation signal; a comparator for comparing the summation results from the operational amplifier with a preset threshold respectively and outputting the comparison result of the comparator; an AND gate for combining all the comparison results to generate a control signal; and an analog switch for outputting the total summation signal according to the control signal.

[0007] According to one aspect of the present application, by means of self - coincidence of the SiPM array partition, false triggering of noise events can be reduced, effectively improving the problem that the dark noise level increases with the increase of the SiPM array area, greatly reducing the lower limit of energy detection of the SiPM array, and enabling more application directions to use the SiPM array to replace the traditional PMT for photoelectric detection.

[0008] Preferably, in the SiPM array readout circuit of the present application, the comparator outputs the comparison result only when the sum results of each of the groups exceed the threshold.

[0009] According to this structure, the comparison result is output only when the sum results of all groups exceed the threshold, which can reduce the number of outputs and lower the energy consumption.

[0010] Preferably, in the SiPM array readout circuit of the present application, the SiPM array readout circuit further includes a delay module, and the analog switch outputs the total sum signal after passing through the delay module according to the control signal.

[0011] According to this structure, since the delay module is passed through during the output process of the control signal, signal transmission delay can be achieved.

[0012] Preferably, in the SiPM array readout circuit of the present application, the number of comparators is the same as the number of groups into which the SiPM array is divided, and each comparator uses the same threshold.

[0013] According to this structure, by making the number of comparators the same as the number of groups into which the SiPM array is divided and making the thresholds of each comparator the same, the result of the comparator can be made more accurate and it is easier to master the result of the comparator.

[0014] Preferably, in the SiPM array readout circuit of the present application, the analog switch is a single - channel analog switch.

[0015] According to this structure, signal switching in the signal link can be achieved, and it has fast and accurate response, no mechanical contacts, small volume and long service life.

[0016] Preferably, in the SiPM array readout circuit of the present application, the sum results of the predetermined number respectively pass through the predetermined number of comparators.

[0017] According to this structure, the result of the comparator can be made more accurate and it is easier to master the result of the comparator.

[0018] Preferably, in the SiPM array readout circuit of the present application, the SiPM array is formed by arranging the SiPM chips divided into a predetermined number of groups in a certain order.

[0019] According to this structure, the SiPM chip array can be freely designed according to the product requirements, and the design is more flexible.

[0020] Preferably, in the SiPM array readout circuit of the present application, the number of SiPM chips in each of the grouped SiPM chips is the same; the SiPM array is provided with a plurality of annular structures from the inside to the outside, and the number of SiPM chips in each of the annular structures is one time or multiple times of a predetermined number.

[0021] According to this structure, the SiPM array can be set as a multi-layer annular structure, and a multiple number of SiPM chips of a predetermined number are arranged in each layer of the annular structure. Users can set the number and density of SiPM chips in each layer of the annular structure according to the performance requirements and cost requirements in actual applications, and the applicable range is wide.

[0022] Preferably, in the SiPM array readout circuit of the present application, in each of the annular structures, the axial extension lines of all SiPM chips from the outside to the inside intersect at one point.

[0023] According to this structure, the arrangement of SiPM chips is more regular, which is easy to process and helps to improve the product yield.

[0024] Preferably, in the SiPM array readout circuit of the present application, the number of SiPM chips corresponding to each group in each annular structure is the same.

[0025] According to this structure, each group has a relatively equal probability of receiving radioactive substances, and the amount of operations of the operational amplifiers and comparators corresponding to each group in the subsequent stage is relatively average, avoiding the situation that the devices corresponding to some groups bear a large amount of operations while the devices corresponding to some other groups are idle, and improving the data processing efficiency as a whole.

[0026] Another aspect of the present application provides a SiPM array readout method, which is characterized by including: using the SiPM chips in the SiPM array divided into a predetermined number of groups to detect the optical signals emitted by the light-emitting bodies coupled to the SiPM chips; summing the optical signals for each of the groups and outputting the summation results of each of the groups; performing operations on the summation results to obtain a total summation signal; comparing the summation results with a preset threshold respectively and outputting the comparison results; combining all the comparison results to generate a control signal; and outputting the total summation signal according to the control signal.

[0027] According to one aspect of the present application, by means of self - coincidence of the SiPM array partition, the false triggering of noise events can be reduced, effectively improving the problem that the dark noise level is higher as the SiPM array area is larger, significantly reducing the energy detection lower limit of the SiPM array, and enabling more application directions to use the SiPM array to replace the traditional PMT for photoelectric detection.

[0028] Another aspect of the present application provides a SiPM array readout system, which is characterized by including the above - mentioned SiPM array readout circuit.

[0029] According to one aspect of the present application, by means of self - coincidence of the SiPM array partition, the false triggering of noise events can be reduced, effectively improving the problem that the dark noise level is higher as the SiPM array area is larger, significantly reducing the energy detection lower limit of the SiPM array, and enabling more application directions to use the SiPM array to replace the traditional PMT for photoelectric detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The present application will be further described below in conjunction with the drawings and embodiments.

[0031] Figure 1 is a structural block diagram of a SiPM array readout circuit provided by an embodiment of the present application;

[0032] Figure 2 is a structural schematic diagram of a SiPM array readout circuit provided by an embodiment of the present application;

[0033] Figure 3 is a flow schematic diagram of a SiPM array readout circuit provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0034] Hereinafter, in conjunction with the drawings and specific embodiments, the present application will be further described. It should be noted that, on the premise of no conflict, the following - described embodiments or technical features can be arbitrarily combined to form new embodiments.

[0035] An embodiment of the present application provides a SiPM array readout circuit 100, which can reduce the false triggering of noise events, effectively reduce the dark noise level of the SiPM array, and significantly reduce the energy detection lower limit of the SiPM array.

[0036] Figure 1 is a structural block diagram of a SiPM array readout circuit provided by an embodiment of the present application. Figure 2 is a structural schematic diagram of a SiPM array readout circuit provided by an embodiment of the present application. As Figure 1 and Figure 2As shown in the figure, the SiPM array readout circuit 100 of the embodiment of the present application includes: a SiPM array 101, an operational amplifier 102, a total operational amplifier 103, a comparator 104, an AND gate 105, and an analog switch 106.

[0037] The SiPM array 101 is divided into a predetermined number of groups, and the SiPM chips therein are used to detect the optical signals emitted by the light-emitting bodies coupled to the SiPM chips. The silicon photomultiplier (SiPM for short) is composed of an avalanche diode array operating in Geiger mode, and has the characteristics of high gain, high sensitivity, low bias voltage, insensitivity to magnetic fields, and compact structure, and is widely used in high-energy physics and nuclear medicine (PET) and other fields. Moreover, the SiPM array is formed by arranging SiPM chips divided into M groups in a certain order. Thus, the user can freely design the SiPM chip array according to the product needs, and the design is more free.

[0038] The operational amplifier 102 is used to sum the optical signals for each of the M groups and output the summation result of each group. The operational amplifier 102 (abbreviation: "op-amp") is a circuit unit with a very high amplification factor, and its output signal can be the result of mathematical operations such as addition, subtraction, differentiation, and integration of the input signal. Most operational amplifiers 102 exist in the form of a single chip. There are many types of op-amps, for example, high-impedance type, low-temperature drift type, high-speed type, low-power consumption type, high-voltage high-power type, programmable control type, etc., and are widely used in the electronics industry.

[0039] The total operational amplifier 103 is used to operate on the summation result of the operational amplifier 102 to obtain a total summation signal. The total operational amplifier 103 can be the same amplifier as the operational amplifier 102, or different from the operational amplifier 102. The total operational amplifier 103 is an amplifier located downstream of the operational amplifier 102.

[0040] Comparator 104 is configured to compare the summation result from the operational amplifier with a preset threshold respectively, and output the comparison result of the comparator. Comparing two or more data items by the comparator 104 to determine whether they are equal, or to determine the magnitude relationship and sorting order between them is called comparison. Preferably, the comparator 104 is a circuit that compares an analog voltage signal with a reference voltage. This threshold, namely the so-called reference voltage, can be set as needed. The two inputs of the comparator 104 are analog signals, and the output is a binary signal 0 or 1. In the embodiment of the present application, the number of comparators 104 is also M, and the comparator 104 outputs the comparison result only when the summation results of all M groups exceed the threshold. Here, preferably, the thresholds of each comparator 104 are the same. And, preferably, the M summation results pass through the M comparators 104 respectively.

[0041] AND gate 105 is configured to combine the comparison results of the above M comparators to generate a control signal. The AND gate, also known as the "AND circuit", is a basic logic gate circuit that performs the "AND" operation. The AND gate 105 has multiple input terminals and one output terminal. When all the inputs are high level (logic 1) simultaneously, the output is high level, otherwise the output is low level (logic 0). The function of the AND gate can be implemented by using CMOS logic, NMOS logic, PMOS logic, and diode implementation, etc. This control signal is the control signal required for the subsequent analog switch 106, such as a single-channel analog switch.

[0042] Analog switch 106 is configured to output the total summation signal according to the control signal. The analog switch 106 completes the signal switching function in the signal link, and it realizes the turn-off or turn-on of the signal link by using a switching method such as MOS transistors. According to different application requirements, the analog switch 106 can be divided into audio analog switches, video analog switches, digital switches, general analog switches, etc. Here, the analog switch 106 is preferably a single-channel analog switch.

[0043] The SiPM array readout circuit 100 further includes a delay module 107, and the analog switch 106 outputs the total summation signal after passing through the delay module 107 according to the control signal. The delay module 107 is located downstream of the total operational amplifier 103 and performs delay processing on the total summation signal from the total operational amplifier 103, so as to achieve precise control of the output of the SiPM array readout circuit.

[0044] Figure 3 It is a schematic flow chart of a SiPM array readout method provided by an embodiment of the present application. As Figure 3As shown, the SiPM array readout method of the present application includes: Step S101, detecting the optical signal emitted by the light-emitting body coupled to the SiPM chip in the SiPM array divided into a predetermined number of groups by using the SiPM chips; Step S102, summing the optical signals for each of the groups and outputting the summation result of each group; Step S103, performing an operation on the summation result to obtain a total summation signal; Step S104, comparing the summation result with a preset threshold respectively and outputting the comparison result; Step S105, combining all the comparison results to generate a control signal; and Step S106, outputting the total summation signal according to the control signal.

[0045] Referring to Figure 2 and Figure 3 , the specific implementation process of the SiPM array readout method will be described. The SiPM array readout method of the present application is applied to a SiPM summation readout circuit with a self-coincidence function. The following is only an embodiment for explaining the SiPM array readout method of the present application and is not used to limit the present invention.

[0046] First, the front-end SiPM array is composed of SiPM chips in M groups arranged in a certain order. Among them, in this example, it is a circular SiPM array, and actually it can also be square. Then, the SiPM signals corresponding to each group are summed and M group summation signals are output. Then, these M signals respectively pass through M comparators, and each comparator uses the same threshold. And only when the M group summation signals all exceed the threshold at the same time is it judged as a valid event (self-coincidence between M groups), and the outputs of the M comparators are combined through an AND GATE to generate the control signal required for the single-channel analog switch. In addition, only the total summation signals of the M groups that meet the conditions and have passed through the delay module are output.

[0047] Among them, M is an integer greater than 1. M is, for example, 2, 3, 4, 5, 6, 8, 9, 16, etc.

[0048] In some embodiments, the number of SiPM chips in each group can be the same; the SiPM array is provided with a plurality of annular structures from the inside to the outside, and the number of SiPM chips in each annular structure is one time or multiple times of the predetermined number. Thus, the SiPM array can be set as a multi-layer annular structure, and each layer of the annular structure is provided with a multiple number of SiPM chips of the predetermined number. Users can set the number and density of SiPM chips in each layer of the annular structure according to the performance requirements and cost requirements in actual applications, and the applicable range is wide.

[0049] Figure 3A specific embodiment is shown, in which the innermost ring structure includes M SiPM chips, the next innermost ring structure includes 2M SiPM chips, and the outermost ring structure includes M SiPM chips.

[0050] In a specific application, in each of the ring structures, the axial extension lines of all SiPM chips from outside to inside can intersect at one point. In this way, the arrangement of the SiPM chips is more regular, easy to process, and helpful to improve product yield.

[0051] In a specific application, the number of SiPM chips corresponding to each group in each ring structure can be the same. This ensures that each group has a relatively equal chance of receiving radioactive material. Subsequently, the computational load of the operational amplifiers and comparators corresponding to each group is more evenly distributed, avoiding situations where the components corresponding to some groups bear a large computational load while those corresponding to other groups are idle, thereby improving overall data processing efficiency.

[0052] The present application also provides a SiPM array readout system, which includes the above-mentioned SiPM array readout circuit 100. The specific implementation method and technical effects achieved are consistent with those described in the above-mentioned method embodiment, and some contents are not repeated here.

[0053] This application is explained from the perspectives of purpose of use, effectiveness, progress and novelty. The practical progress it has is in line with the functional enhancement and use requirements emphasized by the Patent Law. The above description and drawings of this application are only preferred embodiments of this application and are not intended to limit this application. Therefore, all structures, devices, features, etc. that are similar or identical to those of this application, that is, all equivalent replacements or modifications made in accordance with the scope of the patent application of this application, should fall within the scope of protection of the patent application of this application.

Claims

1. A SiPM array readout circuit, characterized in that, Comprising: An SiPM array, which is divided into a predetermined number of groups, and the SiPM chips in the SiPM array are used to detect the optical signals emitted by the light emitters coupled to the SiPM chips; An operational amplifier, which is used to sum the optical signals for each of the groups and output the summation result of each of the groups; A total operational amplifier, which is used to operate on the summation results of the operational amplifier to obtain a total summation signal; A comparator, which is used to compare the summation results from the operational amplifier with a preset threshold respectively, and output the comparison result of the comparator; wherein, the comparator compares two or more data items to determine whether they are equal, or to determine the magnitude relationship and sorting order between them; An AND gate, which is used to combine all the comparison results to generate a control signal; and an analog switch, which is used to output the total summation signal according to the control signal.

2. The SiPM array readout circuit according to claim 1, wherein: The comparator outputs the comparison result only when the summation result of each of the groups exceeds the threshold.

3. The SiPM array readout circuit according to claim 1 or 2, wherein: The SiPM array readout circuit further includes a delay module, and the analog switch outputs the total summation signal after passing through the delay module according to the control signal.

4. The SiPM array readout circuit according to claim 1 or 2, wherein: The number of the comparators is the same as the number of groups into which the SiPM array is divided, and each comparator uses the same threshold.

5. The SiPM array readout circuit according to claim 1 or 2, wherein: The analog switch is a single-channel analog switch.

6. The SiPM array readout circuit according to claim 1 or 2, wherein: The summation results of the predetermined number pass through the predetermined number of comparators respectively.

7. The SiPM array readout circuit according to claim 1 or 2, wherein: The SiPM array is formed by arranging the SiPM chips divided into a predetermined number of groups in a certain order.

8. The SiPM array readout circuit according to claim 7, wherein: The number of SiPM chips in each group is the same; The SiPM array is provided with a plurality of annular structures from the inside to the outside, and the number of SiPM chips in each annular structure is one time or multiple times of the predetermined number.

9. A SiPM array readout method, characterized in that, Comprising: Using the SiPM chips in the SiPM array divided into a predetermined number of groups to detect the optical signals emitted by the light emitters coupled to the SiPM chips; Summing the optical signals for each of the groups and outputting the summation result of each of the groups; Operating on the summation results to obtain a total summation signal; Comparing the summation results with a preset threshold respectively, including: comparing two or more data items to determine whether they are equal, or to determine the magnitude relationship and sorting order between them, and outputting the comparison result; Combine all the comparison results to generate a control signal; and Output the total summation signal according to the control signal.

10. A SiPM array readout system, characterized in that, It includes the SiPM array readout circuit according to any one of claims 1 to 8.

Citation Information

Patent Citations

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