A method for preparing a microwave thin film integrated circuit

Abstract

The present invention provides a method for preparing a microwave thin film integrated circuit. After metallization, a photoresist is applied and selectively removed to form a circuit pattern. Gold is then selectively electroplated, and then a vacuum sputtering method is used to prepare an etch-resistant TiW mask protective layer. The etch-resistant metal mask protective layer in the non-patterned area is effectively removed using a photoresist stripping process. The remaining film layers are then removed in a predetermined order, thereby obtaining a microwave thin film integrated circuit board. The preparation method provided by the present invention can be used for composite films containing a Ni layer, breaking the limitations of the prior art and having wider applicability. Furthermore, even if gold seepage occurs during the adhesive electroplating process, a qualified thin film circuit can be prepared using the preparation method of the present invention. Furthermore, the preparation method of the present invention can improve adhesion, overcoming the problem that electroplating on a gold layer reduces circuit adhesion and is not suitable for metallizing polished ceramic substrates.

Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and in particular to a method for preparing a microwave thin film integrated circuit. Background Art

[0002] Compared with other types of circuits, microwave thin film circuits have the advantages of high interconnection density and high line precision. They can realize small hole metallization, integrate passive components such as resistors, capacitors and inductors, and manufacture high-power circuits. The entire packaging structure has outstanding features such as system-level functions. It has a wide range of applications in microwave and millimeter wave circuits in the fields of communications and aerospace, and is a very promising microwave circuit substrate technology.

[0003] Thin-film circuit substrates are fabricated on glass / ceramic substrates using thin-film processes such as vacuum evaporation, sputtering, photolithography, and electroplating to create passive components such as thin-film resistors, inductors, plated-through holes, and interconnects. Depending on the application, ceramic / glass substrates include: 99.6% alumina (polished / fired), 96% alumina (fired), aluminum nitride, beryllium oxide, ferrite, titanate ceramics, quartz glass, high-resistance silicon, sapphire, and diamond. Due to the superior microwave performance of ceramic / glass substrates, thin-film circuit substrates are commonly used in military microwave applications, depending on the substrate's properties, for microwave devices such as low-noise amplifiers, high-power amplifiers, high-speed digital circuits, high-gain planar antennas, thick microstrip antennas, power dividers, frequency couplers, bandpass filters, isolators, circulators, and phase shifters.

[0004] In actual processing, for circuit patterns with isolated islands, adhesive plating is required to achieve circuit conduction plating. The specific processing process is: first, a TaN / TiW / Au or TaN / TiW / Ni / Au composite film (or other film structure that meets the design requirements) is deposited on the ceramic substrate using a vacuum coating method. Then, a layer of photoresist is applied to the composite film using a glue coater or glue sprayer. Through mask exposure and development, the photoresist attached to the circuit pattern is removed, exposing the underlying metal layer. According to the characteristics of the photoresist, a hardening treatment is performed before adhesive plating is performed. Because the non-graphic area is covered by the photoresist, gold cannot be electroplated, and the exposed graphic area is thickened by electroplating. After the adhesive plating is completed, the thickened circuit pattern needs to be protected by etching to remove the metal layer of the non-graphic area. Protecting the circuit pattern during the etching process is a key point in circuit production. If the circuit pattern is not adequately protected, it will cause corrosion of the circuit pattern, the circuit dimensional accuracy will deteriorate, and the circuit performance will be affected. The commonly used process method is to electroplating after the electroplating process is completed, and then electroplating is performed to form an etching pattern protection layer, and then the pattern protection layer is removed by a post-etching method. Currently, the most widespread method is to use electroplating copper to form a pattern anti-etching layer.

[0005] Electroplating for patterned resists currently has several limitations: ① During adhesive electroplating, gold bleed-through can occur due to environmental issues with the plating solution, resulting in substrate failure. ② Because the gold etching solution reacts slowly with resists like copper, the thickness of the patterned copper directly affects the etching effect, often leading to corrosion penetration of the copper layer. ③ During the copper removal process, the ferric chloride solution generates a small amount of ferric hydroxide, which can affect the surface of the electroplated gold. ④ Due to the high stress of metals like copper, electroplating on gold can significantly reduce circuit adhesion, making it unsuitable for metallization on polished ceramic substrates. ⑤ Because the surface resist must be removed using an etchant that corrodes copper, which can damage nickel thin films. Therefore, this copper electroplating process is limited to TaN / TiW / Au composite films and is not suitable for TaN / TiW / Ni / Au or TiW / Ni / Au composite films containing Ni, or other composite film structures where this is a concern. In summary, although using copper as an anti-etching layer can meet some production requirements, due to process limitations, production control is relatively difficult and the process breadth is not high.

[0006] Therefore, a new, simple, and easy-to-use photolithography pattern protection process is needed to easily form a protective metal mask on the pattern surface. This metal mask can corrode the plated substrate without corrosion penetration, is easily removable, and poses no secondary risks. Ultimately, this method does not affect the adhesion of the circuit. This can further ensure pattern processing quality, improve production efficiency, and reduce production costs. Summary of the Invention

[0007] In view of this, the present invention aims to provide a method for fabricating a microwave thin film integrated circuit. The method provides a method for easily forming a protective metal mask on the surface of a pattern. Even if the metal mask corrodes the plated substrate, it does not corrode through. It is also easy to remove without creating secondary risks or affecting the adhesion of the circuit. Furthermore, the method has a wider applicability.

[0008] The present invention provides a method for preparing a microwave thin film integrated circuit, comprising the following steps:

[0009] S1. Performing metallization treatment on the surface of the ceramic substrate to form a metal composite film layer;

[0010] In the metal composite film layer, the bottom layer contacts the surface of the ceramic substrate, and the surface layer faces away from the ceramic substrate;

[0011] The surface layer of the metal composite film layer is an Au film layer;

[0012] S2, attaching a photoresist to the surface of the metal composite film layer, removing the photoresist in the circuit pattern area to expose the metal composite film layer in the circuit pattern area, and retaining the photoresist in the non-circuit pattern area;

[0013] S3, electroplating the circuit board obtained in step S2 with gold to form a gold-plated layer on the surface of the metal composite film layer exposed in the circuit pattern area;

[0014] S4, vacuum sputtering the circuit board obtained in step S3 to form an anti-etching metal mask protection layer on the surface of the gold-plated layer in the circuit pattern area and the surface of the photoresist in the non-circuit pattern area;

[0015] The anti-etching metal mask protection layer is a TiW alloy layer;

[0016] S5, removing the photoresist in the non-circuit pattern area and the anti-etching metal mask protective layer on the surface of the photoresist to expose the metal composite film layer;

[0017] S6, removing the surface layer of the metal composite film layer exposed in the non-circuit pattern area;

[0018] S7, removing the anti-etching metal mask protective layer attached to the circuit pattern area;

[0019] S8. Removing other layers of the metal composite film layer exposed in the non-circuit pattern area to obtain a microwave thin film integrated circuit substrate.

[0020] Preferably, in step S1, the metal composite film layer is selected from: TaN-TiW-Au composite film, TaN-TiW-Ni-Au composite film, TiW-Au composite film, TiW-Ni-Au composite film, TaN-TiW-Ni-Au composite film, Ti-Pt-Au composite film, NiCr-Au composite film or NiCr-Ni-Au composite film.

[0021] Preferably, in step S3, the gold electroplating process includes:

[0022] a) First clean with degreaser and water, then activate with acid leaching, and then clean with water again;

[0023] b) At a current density of 0.1 to 0.3 A / dm 2 Electroplating is performed to form a gold-plated layer.

[0024] Preferably, in step a), the mass concentration of the acid solution is 5% to 10%;

[0025] The acid solution is selected from hydrochloric acid solution;

[0026] In the step b), the thickness of the gold-plated layer is 3 to 5 μm.

[0027] Preferably, in step S4, the conditions for the vacuum sputtering are:

[0028] Drying the circuit board before sputtering; the drying temperature is 80-120°C;

[0029] The target material used for sputtering is TiW alloy target;

[0030] Sputtering is carried out in a protective gas environment with a flow rate of 10 to 60 sccm and a sputtering vacuum of 0.1 to 0.2 Pa.

[0031] The thickness of the sputtered anti-etching metal mask protection layer is 0.2-0.5 μm.

[0032] Preferably, in step S5, the removal method is:

[0033] The circuit board obtained in step S4 is first immersed in acetone solution for the first time, then placed in an ultrasonic device for the first ultrasonic treatment, then immersed in another acetone solution for the second time, and then placed in an ultrasonic device for the second ultrasonic treatment; thereafter, it is washed with water, boiled in boiling water, and finally dried.

[0034] Preferably, in step S6, the removal method is:

[0035] The circuit board obtained in step S5 is immersed in a corrosive solution until the surface layer of the metal composite film layer exposed in the non-circuit pattern area is completely corroded;

[0036] The etching solution is a mixture of iodine, potassium iodide and water; the usage ratio of the iodine, potassium iodide and water is 1g:4g:(20-40)mL.

[0037] Preferably, in step S7, the removal method is:

[0038] Placing the circuit board obtained in step S6 in a titanium-tungsten etching solution for etching;

[0039] The titanium-tungsten etching solution is a hydrogen peroxide solution, the etching temperature is 80-100° C., and the etching time is 30-50 seconds.

[0040] Preferably, in step S1, metallization treatment is performed on both the front and back surfaces of the ceramic substrate, so that metal composite film layers are formed on both surfaces of the ceramic substrate;

[0041] The processing in step S2 is to process only the metal composite film layer on the front side of the ceramic substrate;

[0042] In step S3, after the gold electroplating, a gold-plated layer is formed on the surface of the metal composite film layer exposed in the circuit pattern area on the front side of the ceramic substrate, and a gold-plated layer is formed on the surface of the entire metal composite film layer on the back side of the ceramic substrate;

[0043] In the steps S4 to S8 , only the front surface of the ceramic substrate is processed, and finally a circuit pattern is formed on the front surface of the ceramic substrate.

[0044] Preferably, the thickness of the gold-plated layer on the front side of the ceramic substrate is 3 to 5 μm, and the thickness of the gold-plated layer on the back side is 2 to 4 μm.

[0045] The preparation method provided by the present invention has a process as shown in the above steps S1 to S6. After the metallization treatment, a photoresist is attached and the photoresist is selectively removed to form a circuit pattern. Then, gold is selectively electroplated. Then, an etch-resistant TiW mask protective layer is prepared by vacuum sputtering. The etch-resistant metal mask protective layer in the non-patterned area is well removed by a photoresist stripping process. Then, the other film layers are removed in sequence according to a certain order, thereby obtaining a microwave thin film integrated circuit board. The preparation method provided by the present invention can be used for composite films containing a Ni layer, breaking the limitations of the prior art and having a wider applicability. Moreover, even if gold seepage occurs during the adhesive electroplating process, a qualified thin film circuit can be prepared using the preparation method of the present invention. At the same time, the preparation method of the present invention does not reduce adhesion, overcomes the problem that electroplating on a gold layer reduces circuit adhesion and is not suitable for metallization of polished ceramic substrates, and also breaks the limitations of the prior art and broadens applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0047] Figure 1 A flow chart for preparing a microwave thin film integrated circuit according to the present invention;

[0048] Figure 2 is a structural diagram of the circuit after processing in step S1;

[0049] Figure 3 is a structural diagram of the circuit after processing in step S2;

[0050] Figure 4 is a schematic structural diagram of the circuit after processing in step S3;

[0051] Figure 5is a structural diagram of the circuit after processing in step S4;

[0052] Figure 6 is a schematic structural diagram of the circuit after processing in step S5;

[0053] Figure 7 is a structural diagram of the circuit after processing in step S6;

[0054] Figure 8 is a structural diagram of the circuit after processing in step S7;

[0055] Figure 9 is a schematic structural diagram of the circuit after processing in step S8;

[0056] Figure 10 Schematic diagram of the circuit structure after processing in step S4 in Example 2;

[0057] Figure 11 Schematic diagram of the circuit structure after processing in step S5 in Example 2. DETAILED DESCRIPTION

[0058] The present invention provides a method for preparing a microwave thin film integrated circuit, comprising the following steps:

[0059] S1. Performing metallization treatment on the surface of the ceramic substrate to form a metal composite film layer;

[0060] In the metal composite film layer, the bottom layer contacts the surface of the ceramic substrate, and the surface layer faces away from the ceramic substrate;

[0061] The surface layer of the metal composite film layer is an Au film layer;

[0062] S2, attaching a photoresist to the surface of the metal composite film layer, removing the photoresist in the circuit pattern area to expose the metal composite film layer in the circuit pattern area, and retaining the photoresist in the non-circuit pattern area;

[0063] S3, electroplating the circuit board obtained in step S2 with gold to form a gold-plated layer on the surface of the metal composite film layer exposed in the circuit pattern area;

[0064] S4, vacuum sputtering the circuit board obtained in step S3 to form an anti-etching metal mask protection layer on the surface of the gold-plated layer in the circuit pattern area and the surface of the photoresist in the non-circuit pattern area;

[0065] The anti-etching metal mask protection layer is a TiW alloy layer;

[0066] S5, removing the photoresist in the non-circuit pattern area and the anti-etching metal mask protective layer on the surface of the photoresist to expose the metal composite film layer;

[0067] S6, removing the surface layer of the metal composite film layer exposed in the non-circuit pattern area;

[0068] S7, removing the anti-etching metal mask protective layer attached to the circuit pattern area;

[0069] S8. Removing other layers of the metal composite film layer exposed in the non-circuit pattern area to obtain a microwave thin film integrated circuit.

[0070] See also Figure 1 , Figure 1 The present invention is a flow chart for preparing microwave thin film integrated circuits.

[0071] About step S1 : Metallization treatment is performed on the surface of the ceramic substrate to form a metal composite film layer.

[0072] In the present invention, the type of ceramic substrate is not particularly limited and can be any conventional ceramic substrate in the art, including but not limited to a polished alumina substrate, a polished aluminum nitride substrate, a polished ferrite substrate, a polished quartz substrate, a polished sapphire substrate, or a polished microwave dielectric ceramic. In the present invention, the thickness of the ceramic substrate is not particularly limited and can be any conventional specification for circuit boards in the art, specifically 0.1 to 2.5 mm.

[0073] The present invention performs metallization treatment on the surface of a ceramic substrate, thereby forming a metal composite film layer on the surface of the ceramic substrate. In the present invention, the metal composite film layer includes a bottom layer and a surface layer (if there are more than two layers, it also includes an intermediate layer located between the bottom layer and the surface layer), wherein the bottom layer contacts the surface of the ceramic substrate and the surface layer faces away from the ceramic substrate. In the present invention, the surface layer of the metal composite film layer is an Au film layer, that is, the surface layer facing away from the ceramic substrate is the Au film layer. In the present invention, the metal composite film layer includes but is not limited to: TaN-TiW-Au composite film, TaN-TiW-Ni-Au composite film, TiW-Au composite film, TiW-Ni-Au composite film, TaN-TiW-Ni-Au composite film, Ti-Pt-Au composite film, NiCr-Au composite film, NiCr-Ni-Au composite film. Taking the TaN-TiW-Au composite film as an example, this composite film comprises a TaN layer, a TiW layer, and an Au layer in contact with each other in sequence. Since the surface layer of the metal composite film is defined as the Au film layer, the TaN layer is the bottom layer and the Au layer is the surface layer. The structures of other composite films are similar. In the present invention, the thickness of each layer of the metal composite film is preferably 0.1 to 0.4 μm.

[0074] In the present invention, the metallization treatment is preferably performed by vacuum sputtering, i.e., each metal film layer is sequentially vacuum sputtered onto the surface of the ceramic substrate to form a metal composite film layer. Prior to vacuum sputtering, contaminants on the surface of the ceramic substrate are preferably removed using a cleaning agent before vacuum sputtering. In the present invention, vacuum sputtering is preferably performed by vacuum magnetron sputtering or vacuum evaporation sputtering. The present invention does not specifically limit the vacuum sputtering process and can be performed according to conventional sputtering coating methods.

[0075] In the present invention, the surface of the ceramic substrate includes two upper and lower surfaces, namely, the front and back surfaces. In other words, the front and back surfaces of the ceramic substrate are metallized to form metal composite film layers on both surfaces of the ceramic substrate, which are denoted as the front metal composite film layer and the back metal composite film layer. The present invention does not specifically limit the orientation of the front and back surfaces. If any one of the two surfaces of the ceramic substrate is designated as the front surface, the other surface is automatically designated as the back surface. In the present invention, the front metal composite film layer and the back metal composite film layer can have the same film structure or different film structures.

[0076] See also Figure 2 , Figure 2 Schematic diagram of the circuit structure after step S1, wherein 101 is a ceramic substrate, 102-103-104-105 are metal composite film layers, and 105 is the surface layer of the metal composite film (which is an Au film layer).

[0077] About step S2 : Attaching photoresist to the surface of the metal composite film layer, removing the photoresist in the circuit pattern area to expose the metal composite film layer in the circuit pattern area, and retaining the photoresist in the non-circuit pattern area.

[0078] In the present invention, the method for attaching the photoresist is preferably: spraying a photoresist solution followed by heat treatment to form a photoresist layer. In the present invention, the photoresist solution is a solution of photoresist dissolved in a solvent; the photoresist is preferably a positive photoresist, more preferably AZP4620 positive photoresist; the solvent is preferably acetone; and the volume ratio of photoresist to solvent is preferably 1:10. In the present invention, the spraying temperature is preferably 85±2°C; the spraying flow rate is preferably 0.8-1.5 mL / min, more preferably 1.2 mL / min; and the number of sprayings is preferably 2-6, more preferably 4. In the present invention, the heat treatment temperature is preferably 115±2°C; the heat treatment time is preferably 2-10 minutes, more preferably 5 minutes. The heat treatment can specifically be performed by placing the sample on a hot plate for heat treatment. After the heat treatment, a photoresist layer is formed on the surface of the metal composite film layer. In the present invention, the thickness of the photoresist layer is preferably 5-7 μm.

[0079] In the present invention, it is preferred that the photoresist layer is attached only to the surface of the front metal composite film layer, and the surface of the back metal composite film layer is not treated, that is, the back of the ceramic substrate is still the metal composite film layer. Figure 3 , Figure 3 106 is a schematic diagram of the structure of the circuit after processing in step S2, wherein 106 is a photoresist layer.

[0080] In the present invention, after the photoresist is attached, the photoresist in the circuit pattern area is removed to expose the metal composite film layer in the circuit pattern area, while the photoresist in the non-circuit pattern area is retained. In the present invention, the method used for the localized removal of the photoresist is preferably an exposure and development method; specifically, a mask defining a pattern set on the photoresist layer is exposed by ultraviolet light, and then developed using a developer. The light intensity of the exposure is preferably 10 to 30 mW / cm 2 , more preferably 20 mW / cm 2 The exposure time is preferably 5 to 30 seconds, more preferably 20 seconds. The developer is preferably a NaOH aqueous solution; the mass concentration of the NaOH aqueous solution is preferably 3‰ to 10‰, more preferably 5‰. The development temperature is not particularly limited and can be performed at room temperature. The development time is preferably 10 to 50 seconds, more preferably 20 seconds.

[0081] In the present invention, after the above-mentioned development, rinsing and drying are preferably performed. The rinsing is preferably performed by rinsing with deionized water. The drying is preferably performed by first drying with air blows and then drying in an oven. The drying is preferably performed by drying with nitrogen. The drying temperature is preferably 100 to 150°C, more preferably 115°C; the drying time is preferably 10 to 30 minutes, more preferably 20 minutes. The present invention forms a pattern before selective electroplating through a series of processes of the above-mentioned coating, pre-baking, exposure, development and hardening, that is, the photoresist in the non-circuit pattern area is not processed and remains in the non-circuit pattern area, while the photoresist in the circuit pattern area is removed, forming a circuit pattern corresponding to the pattern defined by the mask plate, that is, a circuit wiring pattern is produced through step S2.

[0082] About step S3 : The circuit board obtained in step S2 is electroplated with gold to form a gold-plated layer on the surface of the metal composite film layer exposed in the circuit pattern area.

[0083] In the present invention, the gold electroplating process preferably includes:

[0084] a) First clean with degreaser and water, then activate with acid leaching, and then clean with water again;

[0085] b) At a current density of 0.1 to 0.3 A / dm 2Electroplating is performed to form a gold-plated layer.

[0086] In step a), the degreasing agent treatment time is preferably 30 to 60 seconds; the water rinsing time is preferably 60 seconds; and the water is preferably high-purity water. The acid solution is preferably a hydrochloric acid solution, formed by mixing concentrated hydrochloric acid (30% concentration) with water. The mass concentration of the acid solution is preferably 5% to 10%, more preferably 6%. The acid immersion activation time is preferably 30 to 60 seconds. The second water rinsing time is preferably 60 seconds; and the water is preferably high-purity water. The temperature of the various treatments in step a) is not particularly limited and can be performed at room temperature.

[0087] Step b): The type of gold plating solution used in the electroplating is not particularly limited and can be any conventional gold plating solution in the art. In the present invention, the current density of the electroplating is 0.1 to 0.3 A / dm 2 Selective electroplating is performed under the above conditions to form a gold-plated layer on the surface of the metal composite film layer exposed in the circuit pattern area, while no gold-plated layer is formed on the surface of the photoresist in the non-circuit pattern area.

[0088] In the present invention, during the gold electroplating, a gold-plated layer is also formed on the surface of the integral metal composite film layer on the back of the ceramic substrate. In the present invention, the thickness of the gold-plated layer on the front of the ceramic substrate is preferably 3 to 5 μm, and the thickness of the gold-plated layer on the back is preferably 2 to 4 μm. Figure 4 , Figure 4 Schematic diagram of the circuit structure after the process of step S3, wherein 107 is a gold-plated layer.

[0089] In the present invention, after the electroplating is completed, it is preferred to further perform cleaning and drying. The cleaning is preferably performed with water; the water is preferably high-purity water. The drying is preferably performed with a spin dryer.

[0090] About step S4 : The circuit board obtained in step S3 is subjected to vacuum sputtering to form an anti-etching metal mask protection layer on the gold-plated layer surface in the circuit pattern area and the photoresist surface in the non-circuit pattern area.

[0091] In the present invention, the circuit board is preferably dried before vacuum sputtering. The drying temperature is preferably 80-120° C., more preferably 80° C.; and the drying time is preferably ≥30 min.

[0092] In the present invention, the anti-etching metal mask protection layer formed by vacuum sputtering is a TiW alloy layer.

[0093] In the present invention, the vacuum sputtering is preferably magnetron sputtering or evaporation sputtering. In the present invention, the target material used in the vacuum sputtering is preferably a TiW alloy target. In the TiW alloy target, the mass ratio of Ti:W is preferably 10:90; the target material with the above ratio is easy to remove in the subsequent corrosion removal process. In the present invention, the vacuum sputtering is preferably carried out in a protective gas environment; the protective gas is preferably nitrogen; the flow rate of the protective gas is 10 to 60 sccm, more preferably 20 sccm; the vacuum pressure during sputtering is 0.1 to 0.2 Pa. After sputtering treatment, an etch-resistant metal mask protective layer is formed on the surface of the gold-plated layer in the circuit pattern area and the surface of the photoresist in the non-circuit pattern area, that is, an etch-resistant metal mask protective layer is formed on the entire surface of the front side of the circuit board, while no etch-resistant metal mask protective layer is formed on the back side of the circuit board. See Figure 5 , Figure 5 108 is a schematic structural diagram of the circuit after processing in step S4, wherein 108 is an anti-etching metal mask protection layer.

[0094] In the present invention, the thickness of the anti-etching metal mask protection layer is preferably 0.2 to 0.5 μm.

[0095] About step S5 : Remove the photoresist in the non-circuit pattern area and the anti-etching metal mask protective layer on the photoresist surface to expose the metal composite film layer.

[0096] In the present invention, the method for removing the photoresist is preferably as follows: the circuit board obtained in step S4 is first immersed in an acetone solution for a first time, then placed in an ultrasonic device for a first ultrasonic treatment, then, another acetone solution is taken for a second time, and then placed in an ultrasonic device for a second ultrasonic treatment; thereafter, it is washed with water, then boiled in boiling water, and finally dried.

[0097] Wherein, the time of the first immersion is preferably ≥30 min. The ultrasonic power of the first ultrasonic treatment is preferably 800-1200 W, more preferably 900 W; the time of the first ultrasonic treatment is preferably ≥20 min, more preferably 20-25 min. The second immersion is to take a new acetone solution for immersion, and the time of the second immersion is preferably 20-25 min. The ultrasonic power of the second ultrasonic treatment is preferably 800-1200 W, more preferably 900 W; the time of the second ultrasonic treatment is preferably ≥20 min, more preferably 20-25 min. The ultrasonic treatment refers to transferring the circuit board sample together with the acetone immersion solution into the ultrasonic equipment for ultrasonic treatment, that is, ultrasonic treatment is carried out in acetone solution; specifically, the container containing the acetone solution and the circuit board sample is directly transferred into the ultrasonic equipment for ultrasonic treatment.

[0098] After the ultrasonic treatment, the substrate is rinsed with water, preferably high-purity water. The substrate is then boiled in boiling water for 10 to 20 minutes. Finally, the substrate is dried, preferably using a spin dryer. Through the above treatment, the photoresist in the non-circuit pattern area is removed, along with the anti-etching metal mask protective layer on the surface of the photoresist, which is separated from the circuit board, thereby exposing the metal composite film layer in the non-circuit pattern area. Figure 6 , Figure 6 FIG. 1 is a schematic structural diagram of the circuit after processing in step S5 . It can be seen that the metal composite film layer in the non-circuit pattern area is exposed.

[0099] About step S6 : Remove the surface layer of the metal composite film layer exposed in the non-circuit pattern area.

[0100] In the present invention, the surface layer of the metal composite film is a sputtered Au film. The preferred method for removing this film is to immerse the circuit board obtained in step S5 in an etching solution for 20 to 60 seconds, depending on the thickness of the gold film, until the surface layer of the metal composite film exposed in the non-circuit pattern area is completely etched away. In the present invention, the etching solution is preferably a mixture of iodine, potassium iodide, and water. The preferred ratio of iodine, potassium iodide, and water is 1 g:4 g:20 to 40 mL.

[0101] See also Figure 7 , Figure 7 is a schematic diagram of the structure of the circuit after the processing in step S6 . It can be seen that the Au film layer 105 in the metal composite film layer exposed in the non-circuit pattern area is corroded away.

[0102] Regarding step S7 : Remove the anti-etching metal mask protective layer attached to the circuit pattern area.

[0103] In the present invention, the method for removing the anti-etching metal mask protective layer is preferably: using titanium tungsten etching solution for etching. Specifically, the entire circuit board is immersed in the titanium tungsten etching solution for etching. In the present invention, the titanium tungsten etching solution is preferably a hydrogen peroxide solution. The mass concentration of the hydrogen peroxide solution is preferably 30%. In the present invention, the etching temperature is preferably 80 to 100°C, more preferably 90°C; the etching time is preferably 30 to 50s. After the above-mentioned etching treatment, the anti-etching metal mask protective layer attached to the circuit pattern area is corroded away; see Figure 8 , Figure 8 FIG. 1 is a schematic structural diagram of the circuit after the processing in step S7 . It can be seen that the anti-etching metal mask protection layer 108 is removed.

[0104] In the present invention, before the above-mentioned removal operation is performed, if the topmost layer (see Figure 7, i.e., layer 104) is a TiW alloy film layer, then in the above-mentioned process of removing the anti-etching metal mask protection layer 108, the uppermost layer 104 in the metal composite film will also be removed.

[0105] In the present invention, before the above-mentioned removal operation is performed, if the metal composite film exposed in the non-circuit pattern area is the top layer (see Figure 7 , i.e., layer 104) is a TiW alloy film layer. In this case, the top layer (i.e., layer 104) is typically a Ni film layer. After removing the Au surface layer in the metal composite film layer exposed in the non-circuit pattern area in step S6, the circuit board is first corroded with a Ni etching solution to remove the Ni film layer (i.e., layer 104). Then, a titanium-tungsten etching solution is used to remove the anti-etching metal mask protective layer (i.e., layer 108) and the TiW alloy film layer (i.e., layer 103) in the metal composite film. The Ni etching solution is preferably a mixture of sodium persulfate, concentrated nitric acid, and water. The dosage ratio of sodium persulfate, concentrated nitric acid, and water is preferably 15 g:40 mL:100 mL. In the present invention, the etching time of the Ni etching solution is preferably 25 to 35 seconds. In some embodiments of the present invention, the etching temperature is 35°C. The etching operation using the titanium-tungsten etching solution is consistent with that described above and will not be repeated here.

[0106] Regarding step S8 : Removing other layers of the metal composite film layer exposed in the non-circuit pattern area to obtain a microwave thin film integrated circuit.

[0107] In the present invention, when removing the other layers of the metal composite film layer exposed in the non-circuit pattern area, wet etching can be performed using corresponding special etching liquids. The present invention has no special restrictions on the type of the special etching liquid, and any conventional corresponding etching liquid well known to those skilled in the art can be used. Through the above treatment, the metal composite film layer in the non-circuit pattern area is completely removed, see Figure 9 , Figure 9 Schematic diagram of the circuit structure after step S8. It can be seen that the metal composite film layer in the non-circuit pattern area has been completely removed. The final circuit board has a circuit pattern formed on the front and an overall metallized structure on the back.

[0108] The preparation method provided by the present invention has the following beneficial effects:

[0109] 1. The method of the present invention completely overlaps the anti-etching metal mask protective layer under the same defined pattern (i.e., the mask plate pattern), so there is no problem of misalignment deviation. Moreover, the photoresist is removed after the anti-etching metal mask protective layer is formed. Since the circuit pattern is protected by the anti-etching metal mask protective layer, the non-patterned part can be directly etched away, and then the anti-etching metal mask protective layer is removed to form the final required circuit pattern. This method is simple to operate and low in cost.

[0110] 2. During the electroplating process with glue, the phenomenon of gold seepage will occur due to problems such as the environmental plating solution, resulting in a portion of gold being plated on the non-graphic area. Due to inconsistent thickness, the gold layer will be difficult to remove, resulting in the scrapping of the substrate. The traditional electroplating method as a metal mask protective layer will still cause the seepage phenomenon. Electroplating is through a liquid flow method. Through the liquid flow method, the mask metal layer will still be plated on the non-graphic area, and the gold layer in the non-graphic area will be difficult to remove. The sputtering method of the present invention is vapor deposition. As long as there is a surface barrier layer, it will not cause the mask metal layer to be deposited on the non-graphic area. Therefore, after de-glueing, the mask metal layer will still exist in the graphic area. Therefore, even if there is a gold seepage phenomenon, the method of the present invention can still produce a qualified thin film circuit.

[0111] 3. The present invention uses a specific titanium-tungsten alloy layer as an etch-resistant metal mask protective layer, which can prevent the corrosion of other subsequent processes from affecting it, ensuring the smooth progress of the entire processing flow. For example, in step S6, an iodine-potassium iodide mixed solution is used to wet-etch the Au film layer. Many conventional metals are difficult to electroplate with corrosion resistance, but the present invention uses a TiW alloy layer that does not react with the above-mentioned etching solution, thus ensuring that the removal target of each step is carried out smoothly without affecting other film layers and the processing flow.

[0112] 4. The present invention uses a specific corrosive liquid - hydrogen peroxide for treatment in step S7, which will not affect the electroplated gold layer on the back of the circuit board, thereby smoothly removing the anti-etching metal mask protective layer on the front without affecting the performance of the microwave circuit.

[0113] 5. The present invention adopts vacuum sputtering in step S4 to form an anti-etching metal mask protective layer, which can improve adhesion compared with other methods such as electroplating. However, the electroplating method causes greater metal stress. Electroplating on the gold layer will further reduce the adhesion of the circuit. It is not suitable for metallization on polished ceramic substrates, which limits the metallization and further limits the circuit preparation. The present invention adopts vacuum sputtering to well solve the above problem and has wider applicability.

[0114] 6. Because the surface anti-etching metal mask protective layer needs to be removed, an etchant capable of corroding copper must be used. However, etchants that corrode copper can damage nickel thin films. Therefore, the use of electroplated copper as an anti-etching layer is limited to TaN / TiW / Au or TiW / Au composite films and is not suitable for TaN / TiW / Ni / Au or TiW / Ni / Au composite films, or other composite film structures that may have adverse effects. The present invention, however, uses a vacuum-sputtered TiW alloy layer as a metal mask, which has wider applicability and can be applied to various metal composite films mentioned above.

[0115] 7. The preparation method provided by the present invention can perform etching of thin film circuits more quickly, and can be applied to the preparation of thin film circuits of all ceramic substrates and all composite film systems that use gold as wiring metal on the current market. It can be industrialized, has a wide range of applications, and is easy to carry out large-scale quantitative industrial production.

[0116] In order to further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, rather than limiting the claims of the present invention.

[0117] Example 1

[0118] S1. Polished 99 alumina is used as the ceramic substrate 101 (thickness 0.381 mm). First, a cleaning agent is used to remove contaminants on the surface of the ceramic substrate 101. Then, a TaN layer, a TiW layer, a Ni layer, and an Au layer are sequentially formed on the surface (including the front and back surfaces) of the ceramic substrate 101 by vacuum sputtering, thereby obtaining a metal composite film layer.

[0119] See also Figure 2 , where 101 is a ceramic substrate, 102 to 105 are metal composite film layers, 102 is a TaN layer, 103 is a TiW layer, 104 is a Ni layer, and 105 is an Au layer. The thickness of each layer 102 to 105 is 0.3 μm.

[0120] S2. A solution of AZP4620 positive photoresist and acetone = 1 mL: 10 mL is used as a photoresist solution. The photoresist solution is sprayed on the surface of the metal composite film layer on the front side of the ceramic substrate. The spraying temperature is 85° C., the spraying flow rate is 1.2 mL / min, and the number of sprays is 4. The solution is then baked on a hot plate at 115° C. for 5 minutes to form a photoresist layer 106 with a thickness of 6 μm on the surface of the metal composite film layer on the front side of the ceramic substrate. Figure 3 shown.

[0121] Then, a mask with a defined pattern is placed on the surface of the metal composite film layer on the front side, and ultraviolet contact exposure is used with an exposure intensity of 20mW / cm 2 , the exposure time is 20 seconds. The cross-sectional structure is as follows Figure 3 After exposure, the film was developed using a 5‰ NaOH aqueous solution at room temperature for 20 seconds. After rinsing with deionized water for 30 seconds, the film was dried with nitrogen. The film was then placed in a 115°C constant temperature drying oven and post-baked for 20 minutes. This removed the photoresist in the circuit pattern area, exposing the metal composite film layer in the circuit pattern area, while retaining the photoresist in the non-circuit pattern area. This resulted in a circuit pattern formed on the front surface of the metal composite film layer.

[0122] S4. At room temperature, the circuit board obtained in step S3 was treated with a degreasing agent (Chongqing Renfa Technology Co., Ltd., degreasing agent S-15S) for 40 seconds, then rinsed with high-purity water for 60 seconds, and then activated with hydrochloric acid solution (mass concentration of 10%) for 40 seconds, and rinsed with high-purity water for 60 seconds. After that, it was placed in a gold plating solution (model PA-300, purchased from Chongqing Renfa Technology Co., Ltd.) at a current density of 0.2A / dm 2 Selective electroplating is performed to form a gold-plated layer 107 on the surface of the metal composite film layer exposed in the circuit pattern area on the front side, and a gold-plated layer 107 is formed on the entire surface of the metal composite film layer on the back side. Figure 4 As shown, the thickness of the gold-plated layer 107 on the front side is 4 μm, and the thickness of the gold-plated layer 107 on the back side is 3 μm. After the electroplating is completed, it is washed with high-purity water for 60 seconds and placed in a spin dryer to dry.

[0123] S5, baking the circuit board obtained in step S4 at 80° C. for 30 min, and then using TiW alloy as a target (Ti:W mass ratio is 10:90), under nitrogen conditions (nitrogen flow rate is 20 sccm, vacuum degree is 0.2 Pa), depositing an anti-etching TiW mask protection layer 108 on the front gold-plated layer 107 and the photoresist 106 by vacuum magnetron sputtering, as shown in FIG. Figure 5 Wherein, the thickness of the anti-etching TiW mask protection layer 108 is 0.5 μm.

[0124] S6, the circuit board obtained in step S5 is placed in an acetone solution and soaked for 30 minutes, then placed in a 900W ultrasonic device and ultrasonically treated for 20 minutes, then soaked in a new acetone solution and soaked for 20 minutes, and then transferred to a 900W ultrasonic device and ultrasonically treated for 20 minutes. Afterwards, it is washed with high-purity water for 60 seconds, then boiled in boiling water for 10 minutes, and finally placed in a spin dryer to dry, thereby removing the photoresist 106 in the non-circuit pattern area and separating the anti-etching metal mask protective layer on the surface of the photoresist 106 from the circuit board, so that the metal composite film layer in the non-circuit pattern area is exposed, thereby forming a circuit pattern on the front side of the ceramic substrate. Figure 6 shown.

[0125] S7, using a mixture of iodine, potassium iodide and water (the preferred ratio of iodine: potassium iodide: water is 1g: 4g: 30mL) as an etching solution, immersing and etching at room temperature for 35 seconds until the Au film layer 105 in the non-patterned area on the front side of the ceramic substrate is completely etched. Figure 7 shown.

[0126] S8, using a mixture of sodium sulfate, concentrated nitric acid, and water (sodium persulfate: concentrated nitric acid: water in a ratio of 15 g: 40 mL: 100 mL) as a Ni etching solution, the circuit board obtained in step S7 is etched at a temperature of 35° C. and a time of 30 seconds. The Ni film 104 in the non-patterned area of ​​the front side of the ceramic substrate is etched away. Thereafter, a hydrogen peroxide solution (mass concentration of 30%) is used as a titanium-tungsten etching solution to etch the circuit board at a temperature of 90° C. and a time of 40 seconds. The anti-etching TiW mask protective layer 108 in the patterned area of ​​the front side of the ceramic substrate and the TiW film layer 103 in the non-patterned area are etched away.

[0127] S9, using a mixture of hydrofluoric acid, concentrated nitric acid and water (the amount ratio of hydrofluoric acid: concentrated nitric acid: water is 1g: 10mL: 10mL) as an etching solution, the remaining metal layer 102 (i.e., TaN layer) in the non-patterned area on the front side of the ceramic substrate is corroded at a temperature of 40° C. and a corrosion time of 5s to remove the metal layer 102 in the non-patterned area, thereby obtaining a microwave thin film integrated circuit board, as shown in FIG. Figure 9 shown.

[0128] Example 2

[0129] S1 to S3: Same as Example 1. Afterwards, the obtained circuit board was placed in an environment with a humidity of 75% and a temperature of 28° C. for 10 minutes.

[0130] S4, adhesive plating: specifically according to step S4 in Example 1, the results are as follows Figure 10 As shown, Figure 10 Schematic diagram of the structure of the circuit after the processing of step S4 in Example 2; wherein, 109 is the gold-plated part, that is, the gold-plating phenomenon has occurred.

[0131] S5, sputtering anti-etching TiW mask protection layer 108: specifically according to step S5 in embodiment 1, the result is as follows Figure 11 As shown, Figure 11 This is a schematic diagram of the circuit structure after step S5 in Example 2. It can be seen that no anti-etching TiW masking layer is formed in the non-patterned area, and no masking layer exists on the surface of the infiltrated gold portion. This indicates that the vacuum sputtering vapor deposition method employed in the present invention does not result in the deposition of a masking metal layer on the non-patterned area or the infiltrated gold portion as long as a blocking surface exists.

[0132] S6 to S9: Same as in Example 1. The final circuit structure is the same as Figure 9 consistent.

[0133] Adhesion testing of the adhesive film layer on the front ceramic substrate of the circuit board products obtained in Examples 1 and 2 was conducted. Following bonding with a 200-micron gold wire according to GJB548B-2005, a tensile test was performed. The results showed that the adhesion of the products in Examples 1 and 2 exceeded the 50g tensile limit of the gold wire. The surface circuitry showed no delamination. Destructive scraping of the surface circuitry with a blade revealed that the gold layer remained on the surface. Therefore, both Examples 1 and 2 exhibited good adhesion.

[0134] As can be seen from Examples 1 and 2 above, the preparation method of the present invention can be used for composite thin films containing a Ni layer, breaking the limitations of the prior art and having wider applicability. Furthermore, even if gold seepage occurs during the adhesive electroplating process, the preparation method of the present invention can still produce qualified thin-film circuits. Furthermore, the preparation method of the present invention can improve adhesion, overcoming the problem that electroplating on a gold layer reduces circuit adhesion and is unsuitable for metallizing polished ceramic substrates. This also breaks the limitations of the prior art and broadens its applicability.

[0135] Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core ideas, including the best mode, and also enable any technician in the field to practice the present invention, including making and using any device or system, and implementing any combined method. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention. The scope of patent protection of the present invention is defined by the claims and may include other embodiments that can be thought of by those skilled in the art. If these other embodiments have structural elements similar to the literal description of the claims, or if they include equivalent structural elements that are not substantially different from the literal description of the claims, then these other embodiments should also be included in the scope of the claims.

Claims

1. A method for preparing a microwave thin film integrated circuit, characterized in that: The following steps are involved: S1. Performing metallization treatment on the surface of the ceramic substrate to form a metal composite film layer; In the metal composite film layer, the bottom layer contacts the surface of the ceramic substrate, and the surface layer faces away from the ceramic substrate; The surface layer of the metal composite film layer is an Au film layer; The metal composite film layer is selected from: TaN-TiW-Ni-Au composite film, TiW-Ni-Au composite film, TaN-TiW-Ni-Au composite film or NiCr-Ni-Au composite film; S2, attaching a photoresist to the surface of the metal composite film layer, removing the photoresist in the circuit pattern area to expose the metal composite film layer in the circuit pattern area, and retaining the photoresist in the non-circuit pattern area; S3, electroplating the circuit board obtained in step S2 with gold to form a gold-plated layer on the surface of the metal composite film layer exposed in the circuit pattern area; S4, vacuum sputtering the circuit board obtained in step S3 to form an anti-etching metal mask protection layer on the surface of the gold-plated layer in the circuit pattern area and the surface of the photoresist in the non-circuit pattern area; The anti-etching metal mask protection layer is a TiW alloy layer; S5, removing the photoresist in the non-circuit pattern area and the anti-etching metal mask protective layer on the surface of the photoresist to expose the metal composite film layer; S6, removing the surface layer of the metal composite film layer exposed in the non-circuit pattern area; S7, removing the anti-etching metal mask protective layer attached to the circuit pattern area; the removal method is: placing the circuit board obtained in step S6 in a titanium tungsten etching solution for etching; the titanium tungsten etching solution is a hydrogen peroxide solution; S8. Removing other layers of the metal composite film layer exposed in the non-circuit pattern area to obtain a microwave thin film integrated circuit substrate.

2. The preparation method according to claim 1, characterized in that In step S3, the gold electroplating process includes: a) First clean with degreaser and water, then activate with acid, and then clean with water again; b) At a current density of 0.1 to 0.3 A / dm 2 Electroplating is performed to form a gold-plated layer.

3. The preparation method according to claim 2, characterized in that In step a), the mass concentration of the acid solution is 5% to 10%; The acid solution is selected from hydrochloric acid solution; In the step b), the thickness of the gold-plated layer is 3-5 μm.

4. The preparation method according to claim 1, characterized in that In step S4, the conditions for the vacuum sputtering are: Dry the circuit board before sputtering; the drying temperature is 80~120℃; The target material used for sputtering is TiW alloy target; Sputtering is performed in a protective gas environment with a flow rate of 10-60 sccm and a sputtering vacuum of 0.1-0.2 Pa. The thickness of the sputtered anti-etching metal mask protection layer is 0.2-0.5 μm.

5. The preparation method according to claim 1, characterized in that In step S5, the removal method is: The circuit board obtained in step S4 is first immersed in acetone solution for the first time, then placed in an ultrasonic device for the first ultrasonic treatment, then immersed in another acetone solution for the second time, and then placed in an ultrasonic device for the second ultrasonic treatment; thereafter, it is washed with water, boiled in boiling water, and finally dried.

6. The preparation method according to claim 1, characterized in that In step S6, the removal method is: The circuit board obtained in step S5 is immersed in a corrosive solution until the surface layer of the metal composite film layer exposed in the non-circuit pattern area is completely corroded; The etching solution is a mixture of iodine, potassium iodide and water; the usage ratio of the iodine, potassium iodide and water is 1g:4g:(20-40)mL.

7. The preparation method according to claim 1, characterized in that In the step S7, The corrosion temperature is 80-100° C., and the corrosion time is 30-50 seconds.

8. The preparation method according to claim 1, characterized in that In step S1, metallization treatment is performed on both the front and back surfaces of the ceramic substrate, so that metal composite film layers are formed on both surfaces of the ceramic substrate; The processing in step S2 is to process only the metal composite film layer on the front side of the ceramic substrate; In step S3, after the gold electroplating, a gold-plated layer is formed on the surface of the metal composite film layer exposed in the circuit pattern area on the front side of the ceramic substrate, and a gold-plated layer is formed on the surface of the entire metal composite film layer on the back side of the ceramic substrate; In the steps S4 to S8 , only the front surface of the ceramic substrate is processed, and finally a circuit pattern is formed on the front surface of the ceramic substrate.

9. The preparation method according to claim 8, characterized in that The thickness of the gold-plated layer on the front side of the ceramic substrate is 3-5 μm, and the thickness of the gold-plated layer on the back side is 2-4 μm.

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