Display module, display module manufacturing method, and electronic device

Abstract

The display module, the display module manufacturing method and the electronic equipment provided by the embodiments of the present application relate to the display technical field. In the display module, a bias electrode and a switching unit are arranged between adjacent light emitting units, the bias electrode is connected with a signal lead wire providing a bias voltage signal through the switching unit, and the switching unit can be turned on when any one of the light emitting units corresponding to the adjacent light emitting units is lighted, so that the bias electrode can inhibit the lateral movement of the carriers in the common layer between the corresponding adjacent light emitting units based on the electric field formed by the bias voltage signal and the second electrode. Compared with the prior art, the composition material or the film layer structure of the common layer does not need to be improved, the crosstalk caused by the lateral movement of the carriers in the common layer can be avoided, and the display performance of the display module is improved. In addition, the switching unit is only turned on when any one of the light emitting units corresponding to the adjacent light emitting units is lighted, so that the power consumption of the display module can be reduced.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a display module, a method for manufacturing a display module, and an electronic device. Background Technology

[0002] When the display module is in use, pixel crosstalk may occur. For example, when the display module is required to display a monochrome image (e.g., a green image), the sub-pixels around the green sub-pixel (e.g., red sub-pixels) will emit light slightly, resulting in poor crosstalk and affecting the display performance of the display module. Summary of the Invention

[0003] In order to overcome the technical problems mentioned in the above technical background, this application provides a display module, a method for manufacturing a display module, and an electronic device.

[0004] A first aspect of this application provides a display module, including an array substrate and a plurality of light-emitting units disposed on the array substrate. Each light-emitting unit includes a first electrode, a second electrode, and a common layer and a light-emitting layer located between the first electrode and the second electrode, wherein the plurality of light-emitting units share the same common layer and the second electrode.

[0005] The display module further includes a bias electrode and a switching unit disposed between adjacent light-emitting units. The bias electrode is disposed on the array substrate, and the bias electrode is connected to a signal lead that provides a bias voltage signal through the switching unit.

[0006] The switching unit is turned on when any one of the adjacent light-emitting units is lit. The bias electrode forms a suppression electric field with the second electrode through the bias voltage signal to suppress the lateral movement of charge carriers in the common layer between the adjacent light-emitting units.

[0007] In the above structure, a bias electrode and a switching unit are provided between adjacent light-emitting units. The bias electrode is connected to a signal lead that provides a bias voltage signal through the switching unit. The switching unit can be turned on when any one of the adjacent light-emitting units is lit, so that the bias electrode can suppress the lateral movement of charge carriers in the common layer between the adjacent light-emitting units based on the electric field formed by the bias voltage signal and the second electrode, so as to avoid crosstalk caused by the lateral movement of charge carriers in the common layer and improve the display performance of the display module.

[0008] In one possible embodiment of this application, the bias electrode is connected to the common layer;

[0009] Preferably, the bias electrode is in contact with the common layer;

[0010] Preferably, the bias electrode is located between adjacent light-emitting units of different colors.

[0011] In one possible embodiment of this application, a pixel defining layer is provided on the array substrate, and the pixel defining layer defines pixel openings on the array substrate for accommodating the light-emitting layer in the light-emitting unit;

[0012] A notch is provided in the pixel defining layer located between adjacent light-emitting units, and the common layer located between adjacent light-emitting units is connected to the bias electrode through the notch;

[0013] Preferably, the size of the notch is less than or equal to the size of the pixel opening.

[0014] In one possible embodiment of this application, the array substrate includes a pixel driving layer and a planarization layer located on the pixel driving layer;

[0015] The bias electrode is located between the pixel defining layer and the planarization layer, or in a notch in the pixel defining layer;

[0016] The switching unit and the signal lead that provides the bias voltage signal are located in the array substrate, and one end of the switching unit is electrically connected to the signal lead;

[0017] The other end of the switching unit is electrically connected to the bias electrode through a planarization layer via;

[0018] Preferably, the planarization layer includes a first planarization layer and a second planarization layer stacked sequentially on the pixel driving layer, the switching unit is located on the side of the first planarization layer away from the pixel driving layer, and the switching unit is connected to the bias electrode through a via in the second planarization layer;

[0019] Preferably, the signal lead is made of any one of the metal layers in the array substrate;

[0020] Preferably, the signal lead is located in the planarization layer and on the side of the first planarization layer away from the pixel driving layer.

[0021] In one possible embodiment of this application, the bias electrode is a transparent electrode;

[0022] Preferably, the bias electrode is made of indium tin oxide.

[0023] In one possible embodiment of this application, the switching unit is a photodiode, with the anode of the photodiode connected to the signal lead and the cathode of the photodiode connected to the bias electrode.

[0024] In one possible embodiment of this application, the light-emitting unit is a single-layer OLED light-emitting device;

[0025] The common layer includes at least one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer stacked in sequence.

[0026] In one possible embodiment of this application, the light-emitting unit is a multilayer OLED light-emitting device, and the light-emitting unit includes a plurality of light-emitting layers;

[0027] The common layer includes at least one of the following: a hole injection layer, a hole transport layer, a charge generation layer, an electron transport layer, and an electron injection layer, which are stacked sequentially.

[0028] Preferably, the charge generation layer has at least one layer;

[0029] A second aspect of this application provides a method for manufacturing a display module, the method comprising:

[0030] An array substrate is fabricated, wherein the array substrate includes a bias electrode, a switching unit, and a signal lead that provides a bias voltage signal, and the bias electrode is connected to the signal lead through the switching unit;

[0031] Multiple light-emitting units are fabricated on the array substrate. Each light-emitting unit includes a first electrode, a common layer, a light-emitting layer, and a second electrode. The multiple light-emitting units share the same common layer and the second electrode. A bias electrode is located between adjacent light-emitting units. A switching unit is turned on when any one of the adjacent light-emitting units is lit. The bias electrode forms a suppression electric field with the second electrode through the bias voltage signal to suppress the lateral movement of charge carriers in the common layer between the adjacent light-emitting units.

[0032] Preferably, the step of fabricating an array substrate includes:

[0033] Create the pixel-driving layer;

[0034] Create the first planarization layer on the pixel driving layer;

[0035] The signal lead is fabricated on the side of the first planarization layer away from the pixel driving layer;

[0036] A switching unit with one end connected to the signal lead is fabricated on the side of the first planarization layer away from the pixel driving layer;

[0037] A second planarization layer is fabricated on the first planarization layer and the switching unit;

[0038] A planarization layer via is formed on the second planarization layer to expose the other end of the switching unit;

[0039] The bias electrode is fabricated on the side of the second planarization layer away from the first planarization layer, and the bias electrode is connected to the other end of the switching unit through the planarization layer via.

[0040] A third aspect of this application provides an electronic device, the electronic device comprising the display module described in the first aspect.

[0041] Compared to existing technologies, this application provides a display module, a method for manufacturing a display module, and an electronic device. In the display module, a bias electrode and a switching unit are disposed between adjacent light-emitting units. The bias electrode is connected to a signal lead providing a bias voltage signal via the switching unit. The switching unit can be turned on when any one of the adjacent light-emitting units is lit, allowing the bias electrode to suppress the lateral movement of charge carriers in the common layer between the adjacent light-emitting units based on the electric field formed by the bias voltage signal and the second electrode. Compared to existing technologies, this avoids crosstalk caused by the lateral movement of charge carriers in the common layer without requiring improvements to the constituent materials or film structure, thus improving the display performance of the display module. Furthermore, since the switching unit is only turned on when any one of the adjacent light-emitting units is lit, the power consumption of the display module can be reduced. Attached Figure Description

[0042] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 This is one of the schematic diagrams of a partial film layer structure of a display module provided in an embodiment of this application;

[0044] Figure 2 Equivalent circuit diagram of the technical solution provided in the embodiments of this application;

[0045] Figure 3 This is the second schematic diagram of a portion of the film layer structure of the display module provided in the embodiments of this application;

[0046] Figure 4 This is a schematic diagram of the specific film layer structure of a display module in the prior art;

[0047] Figure 5 This is one of the schematic diagrams of the specific film layer structure of the display module provided in the embodiments of this application;

[0048] Figure 6 A schematic diagram of the equivalent driving circuit for adjacent light-emitting units provided in an embodiment of this application;

[0049] Figure 7 This is the second schematic diagram of the specific film layer structure of the display module provided in the embodiments of this application;

[0050] Figure 8 This is the third schematic diagram of the specific film layer structure of the display module provided in the embodiments of this application;

[0051] Figure 9 A flowchart illustrating the method for manufacturing a display module according to an embodiment of this application;

[0052] Figure 10 This is a process diagram of the array substrate provided in the embodiments of this application.

[0053] Icons: 10 - Display module; 110 - Array substrate; 1101 - Substrate layer; 1102 - Buffer layer; 1103 - Pixel driving layer; 11031 - Active layer; 11032 - Gate insulating layer; 11033 - Gate; 11034 - Source; 11035 - Drain; 11036 - First insulating layer; 11037 - Second insulating layer; 11038 - Third electrode; 11039 - Fourth electrode; 1104 - Planarization layer; 11041 - First planarization layer; 11042 - Second planarization layer 12-Light-emitting device layer; 120-Light-emitting unit; 1201-Anode film layer; 1202-Cathode film layer; 1204-Pixel limiting layer; 121-First electrode; 122-Second electrode; 123-Common layer; 1231-Hole injection layer; 1232-Hole transport layer; 1233-Electron transport layer; 1234-Electron injection layer; 1235-Charge generation layer; 124-Light-emitting layer; 125-Charge generation layer; 130-Bias electrode; 140-Switching unit; 150-Signal lead. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0055] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0056] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0057] In the description of this application, it should be noted that the terms "upper" and "lower" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of this application is usually placed when in use. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0058] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0059] OLED display modules use a large number of light-emitting units to emit light and form a display image. Generally, the light-emitting units in an OLED display module can include an array of red light-emitting units (R subpixels), green light-emitting units (G subpixels), and blue light-emitting units (B subpixels). Full-color display images can be achieved through the coordinated emission of light from the R, G, and B subpixels. In terms of film structure, each light-emitting unit includes an anode film layer, a cathode film layer, and a light-emitting layer and a common layer located between the anode and cathode film layers. The R, G, and B subpixels each have independent light-emitting layers to emit red, green, and blue light, respectively. The common layer and cathode film layer are shared by all light-emitting units in the OLED display module. The common layer can include a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, etc.

[0060] The inventors discovered that one of the main reasons for the poor crosstalk in the OLED display module mentioned in the background art is the presence of a film layer with high conductivity (such as a hole injection layer) in the common layer. Taking the display of a red image as an example, when the R sub-pixel is lit, the hole concentration in the region where the R sub-pixel is located will be higher than the hole concentration in the region where the adjacent G sub-pixel is located. This may cause the holes to diffuse laterally in the hole injection layer, resulting in a lateral current. This can cause the adjacent G sub-pixel to emit weak light, leading to poor display crosstalk.

[0061] To address the aforementioned display crosstalk issues, the existing technology offers the following two technical solutions.

[0062] The first technical solution involves using materials with poor electrical conductivity to fabricate the various film layers in the common layer.

[0063] The second technical solution involves fabricating the existing common layer into independent film layers corresponding to the R sub-pixels, G sub-pixels, and B sub-pixels.

[0064] The first technical solution leads to an increase in the driving voltage of the light-emitting unit, which increases power consumption. The second technical solution has two possible implementations. The first is to fabricate using a photomask, which increases the number of steps, reduces manufacturing efficiency, and increases manufacturing costs. The second is to remove the common layer between adjacent light-emitting units after the existing common layer has been fabricated (for example, by using ultraviolet light to remove the common layer between adjacent light-emitting units). However, the ultraviolet light used in this method may damage the thin-film transistor devices in the array substrate.

[0065] To address the aforementioned technical problems, this application innovatively designs a display module, a display module manufacturing method, and an electronic device. A bias electrode and a switching unit are disposed between adjacent light-emitting units. When any one of the adjacent light-emitting units is lit, the switching unit is turned on. The electric field formed by the bias electrode and the shared electrode of the light-emitting unit suppresses the lateral movement of charge carriers in the common layer between corresponding adjacent light-emitting units. Compared to existing technologies, this avoids crosstalk caused by the lateral movement of charge carriers in the common layer without requiring improvements to the constituent materials or film structure of the common layer, thereby improving the display performance of the display module. The specific implementation scheme of this application will be described in detail below with reference to the accompanying drawings.

[0066] Please refer to Figure 1 , Figure 1 This illustration shows one of the partial film layer structures of a display module 10 provided in an embodiment of this application. The display module 10 may include an array substrate 110 and a plurality of light-emitting units 120 disposed on the array substrate 110. Each light-emitting unit 120 includes a first electrode 121, a second electrode 122, and a common layer 123 and a light-emitting layer 124 located between the first electrode 121 and the second electrode 122. The light-emitting units 120 in the display module 10 share the same common layer 123 and the second electrode 122. The common layer 123 is conductive and is used to transport charge carriers (including holes and electrons) so that when the first electrode 121 provides a data voltage, the electric field formed by the first electrode 121 and the second electrode 122 causes the holes and electrons in the common layer 123 to combine in the light-emitting layer 124, thereby exciting the light-emitting layer 124 to emit light for display.

[0067] The display module 10 also includes a bias electrode 130 and a switching unit 140 disposed between adjacent light-emitting units 120. The bias electrode 130 is disposed on the array substrate 110, and the bias electrode 130 is connected to a signal lead 150 providing a bias voltage signal Vbias through the switching unit 140. The distance between adjacent light-emitting units 120 can be the distance between the geometric centers of the light-emitting units 120. Adjacent light-emitting units 120 can belong to the same pixel or different pixels. The number of light-emitting units 120 adjacent to a target light-emitting unit 120 can be one or more. In this embodiment, the bias voltage signal Vbias can be a constant voltage signal, and the signal lead 150 can be a single lead or share other leads with the same voltage signal.

[0068] Combination Figure 2 In this embodiment, the switching unit 140 is turned on when any one of the adjacent light-emitting units 120 is lit. The bias electrode 130 forms a suppression electric field with the second electrode 122 through the bias voltage signal Vbias to suppress the lateral movement of charge carriers in the common layer 123 between the adjacent light-emitting units 120. Under the action of the suppression electric field, the charge carriers in the common layer 123 move vertically. The switching unit 140 can be controlled to turn on and off by a control circuit. For example, the control circuit may include a light-collecting device, and the state of the switching unit 140 is controlled by whether the light-collecting device collects a light signal. Alternatively, a device with optical characteristics can be used as the switching unit 140 to control the turning on and off of the switching unit 140 according to the light emitted by any one of the adjacent light-emitting units 120.

[0069] The display module 10 described above includes a bias electrode 130 and a switching unit 140 disposed between adjacent light-emitting units 120. The bias electrode 130 is connected to a signal lead 150 providing a bias voltage signal Vbias via the switching unit 140. The switching unit 140 can be turned on when any one of the adjacent light-emitting units 120 is lit, allowing the bias electrode 130 to suppress the lateral movement of charge carriers in the common layer 123 between the adjacent light-emitting units 120 based on the electric field formed by the bias voltage signal Vbias and the second electrode 122. Compared to existing technologies, this avoids crosstalk caused by the lateral movement of charge carriers in the common layer 123 without requiring improvements to the constituent materials or film structure of the common layer 123, thus improving the display performance of the display module 10. Furthermore, since the switching unit 140 is only turned on when any one of the adjacent light-emitting units 120 is lit, the power consumption of the display module 10 can be reduced.

[0070] In this embodiment, the bias electrode 130 and the common layer 123 may or may not be conductive. When the bias electrode 130 and the common layer 123 are not conductive, a spacer layer (e.g., a pixel defining layer) may be provided between the bias electrode 130 and the common layer 123. When the bias electrode 130 and the common layer 123 are conductive, a spacer layer may not be provided between the bias electrode 130 and the common layer 123, and the bias electrode 130 and the common layer 123 may be in direct contact. Alternatively, a spacer layer may be provided between the bias electrode 130 and the common layer 123, and the bias electrode 130 and the common layer 123 may be in direct contact at the notch location by creating a notch in the spacer layer.

[0071] In this embodiment of the application, when the bias electrode 130 and the common layer 123 are connected through a gap in the spacer film, the size of the gap is less than or equal to the size of the pixel opening. For example, when the spacer film is a pixel defining layer, the size of the gap is set to be smaller than the size of the pixel opening, so as to ensure that the aperture ratio of the pixel opening is not affected.

[0072] Please refer to Figure 3 , Figure 3 This is a second schematic diagram of a partial film layer structure of the display module 10 provided in an embodiment of this application. In this embodiment, to further reduce the power consumption of the display module 10, the common layer 123 located between the bias electrode 130 and the second electrode 122 can be connected to both the bias electrode 130 and the second electrode 122. By reducing the distance between the bias electrode 130 and the second electrode 122, the electric field strength formed between them can be increased without increasing the bias voltage signal Vbias, thereby improving the suppression of lateral movement of charge carriers in the common layer 123. Furthermore, the charge carriers in the common layer 123 can be extracted from the common layer 123 via the bias electrode 130, the switching unit 140, and the signal lead 150. Specifically, a notch can be formed in the pixel defining layer at the location of the bias electrode 130 so that the common layer 123 can be directly connected to the bias electrode 130 through the notch.

[0073] In this embodiment, the bias electrode 130 can be disposed between adjacent light-emitting units 120 of different colors to solve the crosstalk problem caused by the lateral movement of charge carriers in the common layer 123. For example, the bias electrode 130 can be disposed between adjacent blue light-emitting units and other color light-emitting units, such as between adjacent blue light-emitting units and red light-emitting units, or between adjacent blue light-emitting units and green light-emitting units.

[0074] For ease of description, the specific film structure of the existing display module 10 is described below. Please refer to [link / reference]. Figure 4 , Figure 4A schematic diagram illustrating the specific film layer structure of an existing display module 10 is provided.

[0075] The display module 10 may include an array substrate 110 and a light-emitting device layer 12, wherein the array substrate 110 may include a substrate layer 1101, a buffer layer 1102 and a pixel driving layer 1103.

[0076] The substrate layer 1101 can be a glass substrate or a flexible substrate. The buffer layer 1102 is located on one side of the substrate layer 1101, and the pixel driving layer 1103 is located on the side of the buffer layer 1102 away from the substrate layer 1101. In this embodiment, the buffer layer 1102 can be formed from inorganic materials, such as silicon oxide, silicon nitride, and silicon oxynitride. In this embodiment, the buffer layer 1102 can be a two-layer structure consisting of a silicon nitride (SiNx) layer and a silicon oxide (SiOx) layer sequentially formed on the substrate layer 1101.

[0077] The pixel driving layer 1103 may include an active layer 11031, a gate insulating layer 11032, a gate 11033, a source 11034, a drain 11035, a first insulating layer 11036, a second insulating layer 11037, and a third electrode 11038 and a fourth electrode 11039 for forming a capacitor.

[0078] An active layer 11031 is formed on a buffer layer 1102. The active layer 11031 can be formed of an inorganic semiconductor (e.g., amorphous silicon or polycrystalline silicon), an organic semiconductor, or an oxide semiconductor. The active layer 11031 may include a source region (S), a drain region (D), and a channel region (p-si).

[0079] A gate insulating layer 11032 is formed on the active layer 11031 and the buffer layer 1102 not covered by the active layer 11031, so as to insulate and isolate the active layer 11031 and the gate 11033. The gate insulating layer 11032 may be made of materials such as silicon oxide or silicon nitride, but is not limited thereto.

[0080] A gate 11033 is formed on one side of the gate insulating layer 11032 at the corresponding position of the active layer 11031. The gate 11033 can be formed using one or more of the following metals: Al, Mo, Cu, Ti, or other low-resistivity metals. Simultaneously, a third electrode 11038 of a capacitor is also formed on the gate insulating layer 11032. This third electrode 11038 is formed on the gate insulating layer 11032, and the material of the third electrode 11038 and the gate 11033 can be the same. A first metal layer M1 can be fabricated on the gate insulating layer 11032 to simultaneously fabricate the gate 11033 and the third electrode 11038 on the gate insulating layer 11032.

[0081] A first insulating layer 11036 is formed on the gate insulating layer 11032 and covers the gate 11033 and the third electrode 11038. A fourth electrode 11039 is located on the side of the first insulating layer 11036 away from the substrate layer 1101. The first insulating layer 11036 serves to insulate the gate 11033 from the source 11034 and drain 11035, and to insulate the third electrode 11038 from the fourth electrode 11039. The first insulating layer 11036 electrically insulates the gate 11033 from the source 11034 and drain 11035, respectively, and forms a capacitor between the third electrode 11038 and the fourth electrode 11039. The first insulating layer 11036 can also be formed of inorganic materials, such as silicon nitride and silicon oxide. The fourth electrode 11039 is located in a second metal layer M2 formed above the first insulating layer 11036.

[0082] The second insulating layer 11037 is formed on the first insulating layer 11036 and covers the fourth electrode 11039, serving to isolate the source electrode 11034, drain electrode 11035, and fourth electrode 11039, thus insulating them from each other. The second insulating layer 11037 can also be formed of inorganic materials (such as silicon nitride and silicon oxide). The structure of the second insulating layer 11037 can be a two-layer or three-layer structure formed of silicon nitride and silicon oxide.

[0083] Source 11034 and drain 11035 are formed on the second insulating layer 11037. Source 11034 is electrically connected to the source region (S) in the active layer 11031 through a via, and drain 11035 is electrically connected to the drain region (D) in the active layer 11031 through a via. The electrode materials of gate 11033, source 11034, drain 11035, third electrode 11038, and fourth electrode 11039 can all be one or more of metals such as Al, Mo, Cu, Ti, or other low resistivity metals. Source 11034 and drain 11035 are located in the third metal layer M3 fabricated on the second insulating layer 11037.

[0084] A planarization layer 1104 and a light-emitting device layer 12 located on the side of the pixel driving layer 1103 away from the substrate layer 1101 can also be disposed. The driving element includes a TFT (Thin Film Transistor) formed by a gate 11033, a source 11034, a drain 11035, and an active layer 11031.

[0085] The light-emitting device layer 12 may include an anode film layer 1201, a pixel defining layer 1204, a light-emitting layer 124, and a cathode film layer 1202. The anode film layer 1201 is located on the array substrate 110, the pixel defining layer 1204 is located on the array substrate 110, the pixel defining layer 1204 forms a pixel opening on the anode film layer 1201, the light-emitting layer 124 is located within the pixel opening, and the cathode film layer 1202 is located on the side of the light-emitting layer 124 away from the array substrate 110.

[0086] Specifically, the anode film layer 1201 is located on the side of the planarization layer 1104 away from the substrate layer 1101, and the anode film layer 1201 is electrically connected to the drain of the driving element 11035 through a via in the planarization layer. The pixel defining layer 1204 is located on the side of the planarization layer 1104 and the anode film layer 1201 away from the substrate layer 1101.

[0087] In this embodiment, the planarization layer 1104 may include a first planarization layer 11041 and a second planarization layer 11042. A fourth metal layer M4 may also be disposed between the first planarization layer 11041 and the second planarization layer 11042. The fourth metal layer M4 can be connected to the drain 11035 and the anode film layer 1201 of the driving element through the film vias of the planarization layer 1104. For example, in Figure 4 In the process, the anode film layer 1201 can first be connected to the fourth metal layer M4 through the film layer through-hole of the second planarization layer 11042, and the fourth metal layer M4 can then be connected to the drain of the driving element located in the third metal layer M3 through the film layer through-hole of the first planarization layer 11041.

[0088] In this embodiment of the application, the first electrode 121 corresponds to Figure 4 The anode film layer 1201 and the second electrode 122 correspond to Figure 4 The cathode film layer 1202 in the middle.

[0089] Please refer to Figure 5 Furthermore, the switching unit 140 and the signal lead 150 providing the bias voltage signal Vbias can be located in the array substrate 110. Exemplarily, the switching unit 140 and the signal lead 150 can be located in the planarization layer 1104 or between the planarization layer 1104 and the pixel defining layer 1204. One end of the switching unit 140 is electrically connected to the signal lead 150, and the other end of the switching unit 140 is electrically connected to the bias electrode 130 through a via in the planarization layer. Exemplarily, the signal lead 150 can be fabricated from a fourth metal layer M4 on the first planarization layer 11041, and the switching unit 140 can be fabricated on the signal lead 150. The switching unit 140 can be electrically connected to the bias electrode 130 through a via in the second planarization layer 11042. It is understood that in other embodiments of this application, the signal lead 150 can also be... Figure 4It can be fabricated from any one of the first metal layer M1, the second metal layer M2, and the third metal layer M3.

[0090] In this embodiment, the bias electrode 130 can be either a transparent electrode or a non-transparent electrode. Preferably, the bias electrode 130 is a transparent electrode, and it can be made of indium tin oxide. By setting the bias electrode 130 as a light-transmitting electrode, the light emitted by the light-emitting unit 120 can be reflected and transmitted through the bias electrode 130, so that the control circuit can switch the switching unit 140 between on and off states according to the received light signal. Exemplarily, the bias electrode 130 can be located between the planarization layer 1104 and the pixel defining layer 1204, or in a notch of the pixel defining layer 1204.

[0091] Furthermore, the switching unit 140 can be a photodiode, with its anode connected to the signal lead 150 and its cathode connected to the bias electrode 130. Using a photodiode allows for direct switching between on and off states based on the received light signal, eliminating the need for additional control circuitry and thus saving manufacturing costs. Additionally, the introduction of a photodiode facilitates the integration of optical fingerprint recognition functionality into the display module 10. Please refer to... Figure 6 , Figure 6 The example illustrates the equivalent driving circuit diagram of adjacent light-emitting units 120 when the switching unit 140 is a photodiode PD. As shown in the figure, the cathode of the photodiode PD is connected between the anodes of the two OLED devices. When either OLED device emits light, the photodiode PD is turned on. The connection between the anodes of the two OLED devices can be broken by the electric field formed by the bias voltage signal Vbias and the second electrode 122. This can avoid the transverse current formed between the anodes of adjacent light-emitting units 120 due to the uneven carrier concentration after the light-emitting unit 120 is lit.

[0092] Please refer to this again. Figure 5 In one embodiment of this application, the light-emitting unit 120 can be a single-layer OLED light-emitting device, and the common layer 123 can include a stacked hole injection layer 1231, a hole transport layer 1232, an electron transport layer 1233, and an electron injection layer 1234. In the light-emitting unit 120, the first electrode 121, the hole injection layer 1231, the hole transport layer 1232, the light-emitting layer 124, the electron transport layer 1233, the electron injection layer 1234, and the second electrode 122 are stacked. Between adjacent light-emitting units 120, the electric field formed by the second electrode 122 and the bias electrode 130 can suppress the lateral diffusion of charge carriers in the common layer 123 between adjacent light-emitting units 120.

[0093] In another embodiment of this application, the light-emitting unit 120 can be a multilayer OLED light-emitting device. The light-emitting unit 120 can have multiple light-emitting layers 124. The common layer 123 can include stacked hole injection layer 1231, hole transport layer 1232, charge generation layer (CGL) 1235, electron transport layer 1233 and electron injection layer 1234. The charge generation layer 1235 located between the hole transport layer 1232 and the electron transport layer 1233 has at least one layer. The charge generation layer 1235 can generate electrons and holes. The generated electrons and holes combine with the holes injected by the first electrode 121 and the electrons injected by the second electrode 122 in the light-emitting layer 124 to emit light. That is, the charge generation layer 1235 also has good conductivity. When any one of the adjacent light-emitting units 120 is lit, there will be a problem of lateral diffusion of charge carriers. Thus, in this embodiment, when any one of the adjacent light-emitting units 120 emits light, the switching unit 140 is turned on, so that the electric field formed between the bias electrode 130 and the second electrode 122 can effectively suppress the lateral diffusion of charge carriers in the charge generation layer 1235, thereby avoiding the problem of display crosstalk.

[0094] For example, in this embodiment, when the light-emitting unit 120 is a two-layer OLED light-emitting device, please refer to... Figure 7 The light-emitting unit 120 may have two light-emitting layers 124, and the charge-generating layer 1235 located between the hole transport layer 1232 and the electron transport layer 1233 is one layer. In the light-emitting unit 120, the two light-emitting layers 124 are respectively located between the hole transport layer 1232 and the charge-generating layer 1235 near the hole transport layer 1232, and between the charge-generating layer 1235 near the electron transport layer 1233 and the electron transport layer 1233. When the light-emitting unit 120 is a three-layer OLED light-emitting device, please refer to... Figure 8 The light-emitting unit 120 may have three light-emitting layers 124, and the number of charge-generating layers 1235 located between the hole transport layer 1232 and the electron transport layer 1233 is two. In the light-emitting unit 120, the three light-emitting layers 124 are respectively located between the hole transport layer 1232 and the charge-generating layer 1235 near the hole transport layer 1232, between adjacent charge-generating layers 1235, and between the charge-generating layer 1235 near the electron transport layer 1233 and the electron transport layer 1233.

[0095] This application also provides a method for manufacturing a display module; please refer to... Figure 9 , Figure 9The flowchart illustrating the manufacturing process of display module 10 is shown below. The manufacturing process of display module 10 will be introduced in conjunction with the flowchart.

[0096] Step S11: Fabricate an array substrate 110.

[0097] The array substrate 110 fabricated in this step includes a bias electrode 130, a switching unit 140, and a signal lead 150 that provides a bias voltage signal Vbias. The bias electrode 130 is connected to the signal lead 150 through the switching unit 140.

[0098] Please refer to Figure 10 The process diagram of the array substrate 110 shown is illustrated. In this embodiment of the application, step S11 can be fabricated in the following manner.

[0099] First, create pixel driving layer 1103.

[0100] Before fabricating the pixel driving layer 1103, a substrate layer 1101 and a buffer layer 1102 can also be fabricated.

[0101] Next, a first planarization layer 11041 is fabricated on the pixel driving layer 1103.

[0102] Next, signal leads 150 are fabricated on the side of the first planarization layer 11041 away from the pixel driving layer 1103.

[0103] In the embodiments of this application, the signal lead 150 can be fabricated using the fourth metal layer M4.

[0104] Next, a switching unit 140 with one end connected to the signal lead 150 is fabricated on the side of the first planarization layer 11041 away from the pixel driving layer 1103.

[0105] In this embodiment, the switch unit 140 may be located on the signal lead 150, and one end of the switch unit 140 is in contact with the signal lead 150.

[0106] Next, a second planarization layer 11042 is fabricated on the first planarization layer 11041 and the switching unit 140.

[0107] Then, planarization layer vias are made on the second planarization layer 11042 to expose the other end of the switching unit 140.

[0108] Finally, a bias electrode 130 is fabricated on the side of the second planarization layer 11042 away from the first planarization layer 11041, and the bias electrode 130 is connected to the other end of the switching unit 140 through a planarization layer via.

[0109] Step S12: A plurality of light-emitting units 120 are fabricated on the array substrate 110.

[0110] In this step, the light-emitting unit 120 includes a first electrode 121, a common layer 123, a light-emitting layer 124, and a second electrode 122. Multiple light-emitting units 120 share the same common layer 123 and the second electrode 122. The bias electrode 130 is located between adjacent light-emitting units 120. The switching unit 140 is turned on when any one of the adjacent light-emitting units 120 is lit. The bias electrode 130 forms a suppression electric field with the second electrode 122 through the bias voltage signal Vbias to suppress the lateral movement of charge carriers in the common layer 123 between the adjacent light-emitting units 120.

[0111] The process of fabricating the light-emitting unit 120 in this step is the same as in the prior art, and will not be described again.

[0112] This application also provides an electronic device, which may include the aforementioned display module 10. The electronic device using the display module 10 has the characteristics of low crosstalk and excellent display performance.

[0113] In summary, the display module, display module manufacturing method, and electronic device provided in this application embodiment have a bias electrode and a switching unit disposed between adjacent light-emitting units. The bias electrode is connected to a signal lead providing a bias voltage signal through the switching unit. The switching unit can be turned on when any one of the adjacent light-emitting units is lit, so that the bias electrode can suppress the lateral movement of charge carriers in the common layer between the adjacent light-emitting units based on the electric field formed by the bias voltage signal and the second electrode. Compared with the prior art, this avoids crosstalk caused by the lateral movement of charge carriers in the common layer without modifying the constituent materials or film structure of the common layer, thereby improving the display performance of the display module. In addition, since the switching unit is turned on only when any one of the adjacent light-emitting units is lit, the power consumption of the display module can be reduced.

[0114] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A display module, characterized in that, The system includes an array substrate and a plurality of light-emitting units disposed on the array substrate. Each light-emitting unit includes a first electrode, a second electrode, and a common layer and a light-emitting layer located between the first electrode and the second electrode. The plurality of light-emitting units share the same common layer and the second electrode. The display module further includes a bias electrode and a switching unit disposed between adjacent light-emitting units, wherein the bias electrode is connected to a signal lead that provides a bias voltage signal through the switching unit; The switching unit is turned on when any one of the adjacent light-emitting units is lit. The bias electrode forms a suppression electric field with the second electrode through the bias voltage signal to suppress the lateral movement of charge carriers in the common layer between the adjacent light-emitting units. The switching unit is a photodiode, with the anode of the photodiode connected to the signal lead and the cathode of the photodiode connected to the bias electrode.

2. The display module as described in claim 1, characterized in that, The bias electrode is connected to the common layer.

3. The display module as described in claim 1, characterized in that, The bias electrode is in contact with the common layer.

4. The display module as described in claim 1, characterized in that, The bias electrode is located between adjacent light-emitting units of different colors.

5. The display module as described in claim 2, characterized in that, A pixel defining layer is provided on the array substrate, and the pixel defining layer defines pixel openings on the array substrate for accommodating the light-emitting layer in the light-emitting unit. A notch is provided in the pixel defining layer located between adjacent light-emitting units, and the common layer located between adjacent light-emitting units is connected to the bias electrode through the notch.

6. The display module as described in claim 5, characterized in that, The size of the notch is less than or equal to the size of the pixel opening.

7. The display module as described in claim 5, characterized in that, The array substrate includes a pixel driving layer and a planarization layer located on the pixel driving layer; The bias electrode is located between the pixel defining layer and the planarization layer, or in a notch in the pixel defining layer; The switching unit and the signal lead that provides the bias voltage signal are located in the array substrate, and one end of the switching unit is electrically connected to the signal lead; The other end of the switching unit is electrically connected to the bias electrode through a planarization layer via.

8. The display module as described in claim 7, characterized in that, The planarization layer includes a first planarization layer and a second planarization layer stacked sequentially on the pixel driving layer. The switching unit is located on the side of the first planarization layer away from the pixel driving layer, and the switching unit is connected to the bias electrode through a via in the second planarization layer.

9. The display module as described in claim 7, characterized in that, The signal leads are made from any one of the metal layers in the array substrate.

10. The display module as described in claim 8, characterized in that, The signal lead is located in the planarization layer and on the side of the first planarization layer away from the pixel driving layer.

11. The display module as described in claim 1, characterized in that, The bias electrode is a transparent electrode.

12. The display module as described in claim 11, characterized in that, The bias electrode is made of indium tin oxide.

13. The display module as described in any one of claims 1-12, characterized in that, The light-emitting unit is a single-layer OLED light-emitting device; The common layer includes at least one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer.

14. The display module as described in any one of claims 1-12, characterized in that, The light-emitting unit is a multilayer OLED light-emitting device, and the light-emitting unit includes multiple light-emitting layers; The common layer includes at least one of a hole injection layer, a hole transport layer, a charge generation layer, an electron transport layer, and an electron injection layer.

15. The display module as described in claim 14, characterized in that, The charge generation layer has at least one layer.

16. A method for manufacturing a display module, characterized in that, The method includes: An array substrate is fabricated, wherein the array substrate includes a bias electrode, a switching unit, and a signal lead that provides a bias voltage signal, and the bias electrode is connected to the signal lead through the switching unit; Multiple light-emitting units are fabricated on the array substrate. Each light-emitting unit includes a first electrode, a common layer, a light-emitting layer, and a second electrode. The multiple light-emitting units share the same common layer and the second electrode. A bias electrode is located between adjacent light-emitting units. A switching unit is turned on when any one of the adjacent light-emitting units is lit. The bias electrode forms a suppression electric field with the second electrode through the bias voltage signal to suppress the lateral movement of charge carriers in the common layer between the adjacent light-emitting units. The switching unit is a photodiode. The anode of the photodiode is connected to the signal lead, and the cathode of the photodiode is connected to the bias electrode.

17. The method for manufacturing a display module as described in claim 16, characterized in that, The steps for fabricating an array substrate include: Create the pixel-driving layer; Create the first planarization layer on the pixel driving layer; The signal lead is fabricated on the side of the first planarization layer away from the pixel driving layer; A switching unit with one end connected to the signal lead is fabricated on the side of the first planarization layer away from the pixel driving layer; A second planarization layer is fabricated on the first planarization layer and the switching unit; A planarization layer via is formed on the second planarization layer to expose the other end of the switching unit; The bias electrode is fabricated on the side of the second planarization layer away from the first planarization layer, and the bias electrode is connected to the other end of the switching unit through the planarization layer via.

18. An electronic device, characterized in that, The electronic device includes the display module as described in any one of claims 1-15.

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