Semiconductor-superconductor heterostructure
By introducing nonmagnetic elements with high atomic number Z, such as platinum, gold, and silver, into a semiconductor-superconductor heterostructure, the spin-orbit interaction is enhanced, solving the problem of insufficient topological gap and improving the quality of qubits and the performance of topological quantum computing.
Patent Information
- Application Number
- CN202080063813.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-09-13
- Filing Date
- 2020-06-09
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2040-06-09
AI Technical Summary
In the prior art, insufficient topological gaps in semiconductor-superconductor heterostructures limit the protection of Majorana zero modes and the quality of qubits.
Introducing nonmagnetic elements with high atomic number Z, such as platinum, gold, and silver, into semiconductor-superconductor heterostructures enhances spin-orbit interactions, thereby increasing the size of the topological gap.
It significantly increases the size of the topological gap, improves the protection of Majorana zero modes, and enhances the quality of qubits and the performance of topological quantum computing.
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Figure CN114375504B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to a heterostructure, such as a nanowire comprising a combination of a semiconductor and a superconductor. BACKGROUND
[0002] Topological quantum computing is based on the phenomenon that non-Abelian anyons can form in the form of "Majorana zero modes" (MZMs) in regions where a semiconductor is coupled to a superconductor. A non-Abelian anyon is a quasiparticle, meaning that it is not a particle in itself, but an excitation in an electron liquid whose behavior is at least partially similar to that of a particle. An MZM is a particular bound state of such a quasiparticle. Under certain conditions, these states can be formed in a nanowire close to the interface of the semiconductor-superconductor, the nanowire being formed of a length of semiconductor coated with a superconductor. When MZMs are induced in the nanowire, it is said to be in a "topological regime". Inducing this requires a magnetic field, conventionally an external magnetic field, and also cooling the nanowire to a temperature at which the superconducting behavior is induced in the superconductor material. It can also involve gating a section of the nanowire with an electrostatic potential.
[0003] By forming a network of such nanowires and inducing the topological regime in sections of the network, qubits can be created that can be manipulated for quantum computing purposes. A qubit or quantum bit is an element on which a measurement with two possible outcomes can be performed, but which at any given time (when not measured) can actually be in a quantum superposition of the two states corresponding to the different outcomes.
[0004] To induce MZMs, the device is cooled to a temperature at which the superconductor (e.g. aluminum, Al) exhibits superconducting behavior. The superconductor causes a proximity effect in the adjacent semiconductor, whereby the region of the semiconductor near the interface with the superconductor also exhibits superconducting properties. That is, a topological phase behavior is induced in the adjacent semiconductor as well as in the superconductor. It is in this region of the semiconductor that the MZMs are formed.
[0005] Another condition for inducing a topological phase where a MZM can form is to apply a magnetic field in order to lift the spin degeneracy in the semiconductor. Degeneracy in the context of quantum systems refers to the situation where different quantum states have the same energy level. Lifting the degeneracy means making these states take on different energy levels. Spin degeneracy refers to the situation where different spin states have the same energy level. Spin degeneracy can be lifted with the help of a magnetic field, splitting the energy levels between different spin polarized electrons. This is known as the Zeeman effect. The g-factor refers to the coefficient between the applied magnetic field and the spin splitting. Typically, the magnetic field is applied by an external electromagnet. However, US 16 / 246287 also discloses a heterostructure where a layer of ferromagnetic insulator is placed between the superconductor and the semiconductor in order to apply the magnetic field internally to lift the spin degeneracy without the need for an external magnet. Examples of ferromagnetic insulators given include heavy element compounds in the form of EuS, GdN, Y3Fe5O12, Bi3Fe5O12, YFeO3, Fe2O3, Fe3O4, GdN, Sr2CrReO6, CrBr3 / CrI3, YTiO3, where the heavy elements are europium, gadolinium, yttrium, iron, strontium, and rhenium.
[0006] Inducing a MZM also typically requires gating the nanowire with an electrostatic potential. However, US 16 / 120433 also discloses a structure that is able to exhibit topological behaviour including a MZM without the need for gating. In this case, the nanowire has a complete shell of superconductor around the perimeter of the nanowire, which removes the need for gating.
[0007] As Figure 1 illustrated in Fig. 1, in order to create a long-lived high-quality device with a MZM, it is preferable to have a large topological gap E g The material in the topological phase, whether a superconductor or a proximally induced superconducting region in a semiconductor, exhibits different energy bands: a lower band 11 and an upper band 12. The lower band 11 is the band where the quasiparticle energy E falls in the lower range, and the upper band (or “excitation band”) 12 is the band of higher quasiparticle energy. The topological gap E g is the window of energy between the upper and lower bands 11, 12, in which quasiparticles cannot exist due to the quantum (discrete) nature of the quasiparticle energy levels. The lower band 11, the upper band 12, and the topological gap E g are analogous to the valence band, conduction band, and band gap in a semiconductor for electrons. In the upper excitation band 12, quasiparticles can propagate freely through the superconductor (or proximally induced region in a semiconductor), analogous to electrons in the valence band in a semiconductor.
[0008] Its state forms an MZM. The Majorana forms the lower band 11. Majorana is part of the computational space, i.e. the property of the system that is used for the quantum computing application in question. In other words, the MZM is the operating element of the qubit. On the other hand, the quasi-particle excitations (quasi-particles) in the upper band 12 are not part of the computational space. If these quasi-particles cross the topological energy gap E g into the lower band 11 due to thermal fluctuations, then they will destroy at least some of the MZMs. This is sometimes referred to as "poisoning" the MZMs. The gap E g protects the MZMs from such poisoning. Quasi-particles exist in the upper band and cross the gap E g into the lower band with a probability that is proportional to where T is the temperature converted to energy using the Boltzmann constant. Thus, the larger the topological gap, the more protection is provided for the MZMs from the harmful quasi-particles in the upper band 12. SUMMARY
[0009] The inventors have realised that the presence of a relatively high-Z element adjacent to the semiconductor-superconductor interface helps to increase the topological gap in the semiconductor-superconductor heterostructure.
[0010] Thus, according to one aspect disclosed herein, there is provided a device comprising: a portion of semiconductor; a portion of superconductor arranged such that a topological phase with a topological gap is able to be induced in the semiconductor region by a proximity effect; a portion of non-magnetic material comprising an element with an atomic number Z greater than or equal to 26 arranged to increase the topological gap in the topological region of the semiconductor.
[0011] By increasing the topological gap as referred to herein is meant compared to an otherwise identical device that does not comprise the portion of the element.
[0012] This summary is provided to introduce a selection of concepts that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. The claimed subject matter is not limited to implementations that solve any or all of the disadvantages mentioned herein. BRIEF DESCRIPTION OF DRAWINGS
[0013] In order to assist the understanding of embodiments of the present disclosure and to show how the same can be implemented, reference is made by way of example to the accompanying drawings, in which:
[0014] Figure 1 schematically illustrates the concept of a topological gap, and
[0015] Figure 2 schematically illustrates some example heterostructures. DETAILED DESCRIPTION
[0016] The present disclosure discloses using heavy elements in contact with a superconductor to increase the topological gap in a hybrid semiconductor-superconductor device, such as a device for forming a qubit. The disclosed arrangement provides a way to significantly increase the spin-orbit interaction in a topological heterostructure, and thereby significantly increase the potential topological gap, and thereby improve the properties of a qubit or other such device that relies on the topological gap. This can be exploited, for example, to support the goal of building a scalable topological quantum computer by improving the properties of individual qubits.
[0017] As discussed previously, Majorana zero modes (MZMs) can be created in a semiconductor-superconductor heterostructure by the application of a magnetic field, typically an externally applied magnetic field. Such a combined system experiences the properties of both materials: a) the spin-orbit interaction and g-factor from the semiconductor, and b) the superconducting pairing from the superconductor. The spin-orbit interaction in the semiconductor is only modest, and is the main limiting factor for the size of the topological gap. Thus, the size of the spin-orbit interaction limits the protection of the MZMs and the quality of the qubits that can be built using them.
[0018] The disclosed approach is to add heavy element atoms - e.g., platinum, gold, silver, bismuth - in contact with the superconductor in other conventional settings. The location of the heavy elements can be on top of the superconductor, inside the superconductor, or between the superconductor and the semiconductor. Heavy elements carry very strong atomic spin-orbit interactions, and it is known that superconductors doped with those elements can inherit this spin-orbit interaction. The magnitude of the spin-orbit interaction induced by the heavy elements can be much larger than that inherent to the underlying semiconductor. Thus, the disclosed idea provides a way to have a much larger spin-orbit interaction in the hybrid system, and thus a much larger topological gap and much better MZM topological protection.
[0019] Reference is now made to Figure 2 Some embodiments are described by way of example with reference to the following figures.
[0020] Figure 2 (a) shows an example of an existing superconductor-semiconductor heterostructure. This structure can be used to form part of a device 1, such as a quantum computing device for forming and manipulating qubits. For example, the illustrated structure 3 can represent a cross-section of a nanowire in a network of nanowires used to form one or more qubits.
[0021] The structure 3 (e.g. nanowire) includes a portion of a semiconductor 4 formed over a substrate 2. A layer of a superconductor 6 is formed over at least a portion of the semiconductor. Figure 2(a) shows an example in which the superconductor 6 covers substantially all of the semiconductor core 4 of the nanowire. Alternatively, the superconductor 6 can cover only a portion of the semiconductor core 4, for example one side or face of the semiconductor core 4 (for example, this can be achieved by depositing the superconductor 6 with an angled beam, leaving a shadow on one side of the nanowire). In the latter case, the exposed area of the semiconductor 4 can be used for example for side-gating.
[0022] Figure 2 (b) and Figure 2 (c) shows the same structure 3, but now with a thin layer of material 5, comprising an element with high atomic number Z, such as Pt (platinum), in order to enhance the spin-orbit coupling. This layer 5 can be on top of the superconductor 6 as shown in Figure 2 (b), or between the semiconductor 4 and the superconductor 6 or inside the superconductor 6 as shown in Figure 2 (c).
[0023] In order to maximize the effect of increasing the topological gap, preferably the thickness of the high-Z material 5 is small, most preferably not more than one or two monolayers, in order to avoid the creation of subgap states due to the heavy element, thereby reducing the topological gap. Furthermore, the distance between the high-Z material layer 5 and the SE-SU interface (the interface between the semiconductor 4 and the superconductor layer 6) is preferably not more than the coherence length of the superconductor (e.g. 100 nm). However, more preferably, a thinner layer of superconductor 6 is used, in order to enable it to better sustain a magnetic field.
[0024] Figure 2 (b) and Figure 2 (c) all three arrangements can work well, as the properties of the control material are felt through the superconductor coherence length, which is typically much longer than the thickness of the superconductor.
[0025] Each of the semiconductor 4, the superconductor 6 and the high-Z material 5 can be formed by any suitable known fabrication technique, such as photolithography, sputtering or epitaxial growth techniques, for example selective area growth (SAG). Example techniques for deposition per se include for example electron beam physical vapor deposition, plasma-enhanced chemical vapor deposition or atomic layer deposition, and molecular beam epitaxy.
[0026] The substrate 2 herein refers to the wafer plus any additional layers formed on or above the substrate at any point in the manufacturing prior to deposition of the semiconductor 4. "Above" herein can mean formed directly thereon or indirectly thereabove with any one or more intervening layers therebetween. "On" herein means directly thereon, i.e. in contact therewith, without any intervening layers. Note also that the terms "on" or "above" and the like as used herein do not necessarily imply a particular orientation with respect to gravity. Rather, they refer to the position with respect to the surface of the substrate 2 on which the structure 3 is being formed.
[0027] Optionally, one or more further layers can be formed above the structure 3. For example, an oxide layer 8 can be formed above some or all of each structure 3 (or at least some of the heterostructures). The oxide layer can be used to protect the heterostructure from O2or H2O in the air. Alternatively or additionally, chemical and / or mechanical protection can be provided by one or more other upper layers of the wafer or IC package (not shown). Other alternative or additional layers can also be formed above the heterostructures, such as conductive vias between the heterostructures and / or between the heterostructures and one or more other components.
[0028] Figure 2 A coating of superconductor material 6 is illustrated formed above some or all of the structure 3. At least some of the superconductor 6 can be formed directly on at least some of the high-Z material 5. And / or, at least some of the superconductor 6 can be formed directly on at least some of the high-Z material 5. The high-Z material 5 can be formed directly on some or all of the semiconductor cores 4.
[0029] In embodiments, at least some of the heterostructures in the structure 3 each comprise a length or wire of semiconductor material 4, with the high-Z material 5 covering some or all of the perimeter (i.e. edges in the plane perpendicular to the wire) of the wire along some or all of the length of the wire (i.e. in a direction parallel to the length of the wire). In this case, Figure 2 represents a cross-section along the wire. The superconductor 6 is then formed above each such structure 3, covering some or all of the perimeter of the wire along some or all of the length of the wire. Each such structure 3 thus forms a respective semiconductor-superconductor nanowire. A network of such nanowires can be formed above the substrate 2, which can be arranged to form a topological quantum computing device comprising one or more topological qubits. In operation, Majorana zero modes (MZMs) and thus topological structures can be induced in portions of some or all of the nanowires by means of a magnetic field and cooling to a temperature at which the superconductor 6 exhibits superconducting behaviour. In embodiments, the induction of the topological structures and MZMs can further comprise gating with an electromagnetic potential. The structures for forming the qubits and the induction of the topological structures and MZMs in the semiconductor-superconductor nanowires are known per se in the art.
[0030] Note that, Figure 2 (a)- Figure 2 (c) is schematic and wherein the shapes and sizes shown are not intended to be limiting.
[0031] A layer of high-Z material 5 is introduced to enhance the spin-orbit interaction in the topological region of the semiconductor 4 and thereby increase the topological gap therein. As such, the high-Z material should be disposed within the superconducting coherence length of the junction between the semiconductor 4 and the superconductor 6. The material 5 should include an element with a relatively high atomic number Z, as heavy elements carry a strong spin-orbit interaction. The inventors have identified that the topological region in the semiconductor 4 can inherit this spin-orbit interaction from the adjacent high-Z material 5. This effect can be achieved with Z as low as 26 (iron, Fe), but for a stronger effect, it is preferred that Z is at least 46 (palladium). Copper (Cu, Z = 29) in the former range and silver (Ag, Z = 47) in the latter range are examples that the inventors have identified will be particularly effective. In most applications, the high-Z element can be a metal, although high-Z non-metals can be effective as well. In particular embodiments, the high-Z element can be platinum (Pt, Z = 78), gold (Au, Z = 79), or bismuth (Z = 83). These particular examples are known in the literature to introduce spin-orbit interaction into Al.
[0032] Preferably, the high-Z material 5 comprises a high-Z element as a pure element, i.e. the high-Z element does not form a compound. Preferably, the high-Z material layer 5 comprises only the high-Z element (not in a mixture or compound). However, using a compound or mixture can still obtain a somewhat weaker effect. Unlike disclosed in 16 / 246287, the high-Z material is non-magnetic. In embodiments, the high-Z material 5 is a conductor. Conductors are slightly preferred because conductors can more easily transfer their properties to the superconductor (e.g. Al). In embodiments, the high-Z element can be an element other than one of the elements disclosed in 16 / 246287 as a ferromagnetic insulator, i.e. other than Eu, Gd, Y, Fe, Sr and Re. Non-magnetic materials are necessary. Magnetic materials would create additional subgap states in the superconductor, effectively reducing rather than increasing the topological gap. Even outside of compounds, iron (Fe), cobalt (Co), nickel (Ni) and gadolinium (Gd) can have magnetism. Therefore, these are less preferred candidates. However, they can form non-magnetic compounds, so can be used in these forms. Yttrium (Y), strontium (Sr), rhenium (Re) and europium (Eu) can have magnetism, but only in certain compounds. Therefore, these can be used in non-magnetic compounds or as pure elements (i.e. when not in a compound).
[0033] It will be appreciated that the above embodiments have been described by way of example only.
[0034] For example, structures other than nanowires can be used to induce MZM in the topological region formed at the semiconductor-superconductor interface. Or more generally, the present disclosure can be applied to other quantum and spintronic devices that exploit the existence of a topological gap. For example. Device types to which the disclosed technology can be applicable can include qubits, nanowires, quantum Hall effect devices, spintronic devices or quantum sensing devices, or any group of quantum hardware systems that transfer to topologically protected.
[0035] More generally, according to one aspect disclosed herein, there is provided a device comprising: a portion of semiconductor; a portion of superconductor arranged such that a topological phase having a topological gap is capable of being induced in a region of the semiconductor by a proximity effect; a portion of non-magnetic material comprising an element having an atomic number Z greater than or equal to 26, arranged to increase the topological gap in the region.
[0036] In embodiments, the portion of non-magnetic material can be disposed between the portion of semiconductor and the portion of superconductor.
[0037] In some such embodiments, the portion of non-magnetic material can be in direct contact with at least a portion of the semiconductor on one face and in direct contact with at least a portion of the superconductor on the other face. In embodiments, no other layers can be disposed between the portion of non-magnetic material and the portion of the semiconductor. In embodiments, no other layers can be disposed between the portion of non-magnetic material and the portion of the superconductor.
[0038] In alternative embodiments, the portion of non-magnetic material can be sandwiched between two layers of the portion of superconductor.
[0039] In some such embodiments, one of the layers of superconductor can be in direct contact with at least a portion of the semiconductor. In embodiments, no other layers can be disposed between the portion of non-magnetic material and one or both of the layers of superconductor.
[0040] In further alternative embodiments, the portion of non-magnetic material can be disposed above the portion of superconductor.
[0041] In some such embodiments, no other layers can be disposed between the portion of non-magnetic material and the portion of superconductor.
[0042] In embodiments, in the portion of non-magnetic material, the element is preferably not in a compound.
[0043] In embodiments, the non-magnetic material can be a conductor. In embodiments, the element can be a metal.
[0044] In embodiments, the atomic number Z of the element can be greater than or equal to 29. In embodiments, the element can be Cu (Z = 29).
[0045] In embodiments, the atomic number Z of the element can be greater than or equal to 46. In embodiments, the element can be Ag (Z = 47).
[0046] In embodiments, the atomic number Z of the element can be greater than or equal to 78. For example, in embodiments, the element can be Pt, Au, or Bi (Z = 78, 79, 83, respectively). In embodiments, the atomic number Z of the element can be greater than or equal to 83.
[0047] In embodiments, the element can be an element other than Fe. In embodiments, the element can be an element other than Co. In embodiments, the element can be an element other than Ni. In embodiments, the element can be an element other than Gd. As pure elements (when not in a compound), all of these elements have the ability to be magnetized and are therefore not preferred candidates.
[0048] In embodiments, the element can be an element other than Sr. In embodiments, the element can be an element other than Y. In embodiments, the element can be an element other than Eu. And / or, in embodiments, the element can be an element other than Re. These can only have magnetic properties in certain compounds.
[0049] In embodiments, the semiconductor can comprise InAs, InSb, GaAs or GaSb.
[0050] In embodiments, the superconductor can comprise Al.
[0051] In embodiments, the device can take the form of a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least a portion of the semiconductor. In this case, the portion of semiconductor comprises the semiconductor of each nanowire, the portion of superconductor comprises the coating of superconductor of each nanowire, and the portion of the element is disposed within one, some or all of the nanowires.
[0052] According to another aspect disclosed herein, there is provided a method of operating a topological quantum computing device, the method comprising: cooling the device to a temperature at which superconductivity is induced in the superconductor; applying a magnetic field to the region so as to lift spin degeneracy in the region; thereby creating the proximity effect in the region and inducing a Majorana zero mode in the region.
[0053] In embodiments, the magnetic field can be applied from a magnet external to the device. Alternatively, the magnetic field can be applied from a source internal to the device, such as a layer of ferromagnetic material, such as EuS.
[0054] In embodiments, the method can further comprise gating one, some or all of the nanowires with an electrostatic potential.
[0055] According to another aspect disclosed herein, there is provided a method of manufacturing a device, the method comprising: forming a portion of semiconductor over a substrate; and forming a portion of superconductor over the semiconductor, the portion of superconductor being arranged so that a topological phase having a topological gap is capable of being induced in a region of the semiconductor by a proximity effect; wherein the method comprises forming a portion of non-magnetic material comprising an element having an atomic number Z greater than or equal to 26 on the portion of semiconductor, between the portion of semiconductor and the portion of superconductor, or between two layers of superconductor, the portion of the element thereby being arranged to increase the topological gap in the region.
[0056] Once the disclosure herein has been given, other variations and uses of the disclosed technology can become apparent to those skilled in the art. The scope of the disclosure is not to be limited by the described embodiments but only by the claims that follow.
Claims
1. A device comprising: a portion of semiconductor; a portion of superconductor formed over the portion of semiconductor to enable a topological phase with a topological gap to be induced in the portion of semiconductor by proximity effect; and a portion of non-magnetic material comprising an element with atomic number Z greater than or equal to 26 formed on the portion of semiconductor, between the portion of semiconductor and the portion of superconductor, or between two layers of the portion of superconductor to increase the topological gap in the portion of semiconductor, the portion of non-magnetic material having a thickness less than or equal to two monolayers, a distance between the portion of non-magnetic material and an interface between the portion of semiconductor and the portion of superconductor being less than or equal to a coherence length of the portion of superconductor.
2. The device of claim 1, wherein the element is Bi and is disposed between the portion of semiconductor and the portion of superconductor.
3. The device of claim 1, wherein the portion of non-magnetic material comprising the element is sandwiched between two layers of the portion of superconductor.
4. The device of claim 1, wherein the portion of non-magnetic material comprising the element is disposed over the portion of superconductor.
5. The device of claim 1, wherein in the portion of non-magnetic material comprising the element, the element is not in a compound.
6. The device of claim 1, wherein the portion of non-magnetic material comprising the element is a conductor.
7. The device of claim 1, wherein the element is a metal.
8. The device of claim 1, wherein the atomic number Z of the element is greater than or equal to 46.
9. The device of claim 8, wherein the element is Ag.
10. The device of claim 8, wherein the atomic number Z of the element is greater than or equal to 78.
11. The device of claim 10, wherein the element is Pt, Au, or Bi.
12. The device of claim 1, wherein the element is an element other than Fe, Ni, Co, and Gd.
13. The device of claim 1, wherein the element is an element other than Eu, Y, Sr, and Re.
14. The device of claim 1, wherein the semiconductor comprises InAs, InSb, GaAs, or GaSb.
15. The device of claim 1, wherein the superconductor comprises Al.
16. The device of claim 1 in the form of a topological quantum computing device, the device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least a portion of the semiconductor; wherein the portion of semiconductor comprises the semiconductor of each nanowire, the portion of superconductor comprises the coating of superconductor of each nanowire, and the portion of element is disposed within one, a portion, or all of the nanowires.
17. A method of operating a topological quantum computing device according to claim 16, comprising: cooling the device to a temperature at which superconductivity is induced in the superconductor; and applying a magnetic field to a portion of the semiconductor so as to lift spin degeneracy in the portion of the semiconductor, thereby creating the proximity effect in the portion of the semiconductor and inducing Majorana zero modes in the portion of the semiconductor.
18. The method of claim 17, wherein the magnetic field is applied from a magnet external to the device.
19. The method of claim 17, further comprising gating one, a portion, or all of the nanowires with an electrostatic potential.
20. A method of fabricating a device, the method comprising: forming a portion of a semiconductor over a substrate; and forming a portion of a superconductor over the portion of the semiconductor, so as to enable a topological phase having a topological gap to be induced in the portion of the semiconductor by a proximity effect; wherein the method comprises forming a portion of a non-magnetic material comprising an element having an atomic number Z greater than or equal to 26 on the portion of the semiconductor, between the portion of the semiconductor and the portion of the superconductor, or between two layers of the portion of the superconductor, to increase the topological gap in the portion of the semiconductor, the portion of the non-magnetic material having a thickness less than or equal to two monolayers, a distance between the portion of the non-magnetic material and an interface between the portion of the semiconductor and the portion of the superconductor being less than or equal to a coherence length of the portion of the superconductor.
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