A cast silicon heterojunction solar cell and its fabrication method

Abstract

This invention discloses a cast silicon heterojunction solar cell, comprising: a cast silicon substrate containing multiple grains with different growth directions; a pyramidal textured surface disposed on the surface of the cast silicon substrate, wherein the adjacent grain boundaries at the bottom of the pyramidal textured surface have a smooth arcuate structure; an intrinsic amorphous silicon film and a doped amorphous silicon film disposed on the surface of the pyramidal textured surface, wherein the thickness of the intrinsic amorphous silicon film and the doped amorphous silicon film on the arcuate structure is greater than the thickness of the intrinsic amorphous silicon film and the doped amorphous silicon film on the slope of the pyramidal textured surface; a transparent conductive film disposed on the doped amorphous silicon film; and a metal electrode disposed on the transparent conductive film.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of silicon-based heterojunction solar cells, and particularly relates to a silicon-based heterojunction solar cell made of ingot silicon as a substrate and a manufacturing method thereof. BACKGROUND

[0002] Under the form of increasingly nervous energy demand, the solar cell industry develops rapidly. The heterojunction technology has a prominent efficiency advantage, the mass production efficiency has reached 24%, and the laboratory efficiency has reached more than 26%, and the further efficiency improvement potential is huge, and has been paid close attention to in recent years. However, the cost of the heterojunction technology is relatively high, which is still the main obstacle for the current large-scale mass production. Compared with the conventional crystalline silicon solar cell, the cost is relatively high mainly in three parts: equipment depreciation, silver paste consumption and silicon wafer cost.

[0003] The conventional silicon-based heterojunction solar cell is made of a Czochralski single crystal silicon wafer as a substrate, and has a very high requirement for the silicon wafer quality, so that the silicon wafer cost is high. The silicon-based heterojunction solar cell made of a low-quality ingot single crystal silicon wafer or a polycrystalline silicon wafer instead of the Czochralski single crystal silicon wafer can significantly reduce the cost of the heterojunction solar cell.

[0004] However, there are a large number of impurities and defects in the ingot silicon, a large number of recombination centers are formed, and the migration of the carriers is greatly limited, so that the efficiency of the heterojunction solar cell made of the ingot single crystal silicon wafer or the polycrystalline silicon wafer is much lower than that of the heterojunction solar cell made of the conventional Czochralski single crystal silicon wafer. Reducing and eliminating the influence of the impurities and the defects is the key to the ingot single crystal silicon wafer or the polycrystalline silicon wafer for making the heterojunction solar cell. The grain boundary defect existing between different grains is the main defect area in the ingot single crystal silicon wafer or the polycrystalline silicon wafer. The grain boundary defect not only generates a large number of dislocation and lattice defects to cause serious recombination, but also causes the growth direction of the pyramidal texture to be different at the grain boundary position of the adjacent grains after texturing, and the pyramidal texture at the grain boundary position of the adjacent grains is often formed into a sharp angle structure. For the plasma vapor deposition equipment, the sharp angle structure H + is deep, the passivation effect of the ion and the amorphous silicon film is poor, the passivation defect is easily formed to form a recombination center, and the transmission of the carrier is affected.

[0005] Therefore, in order to solve the poor passivation defect caused by the sharp angle structure of the pyramidal texture at the grain boundary position of the adjacent grains due to the different growth directions of the grains, a manufacturing method is needed to eliminate the sharp angle structure and form a structure beneficial to passivation, so as to perform good passivation on the grain boundary position of the adjacent grains. SUMMARY

[0006] In order to solve the above problems, the application provides a cast ingot crystal silicon heterojunction solar cell and a manufacturing method thereof, by eliminating the sharp angle structure of the bottom of the pyramid shape at the position of the adjacent grain boundary, forming a smooth arc structure of the bottom of the pyramid shape, so as to improve the passivation effect at the position of the adjacent grain boundary, and to improve the conversion efficiency of the heterojunction solar cell manufactured by the cast ingot crystal silicon.

[0007] The application provides a cast ingot crystal silicon heterojunction solar cell, which comprises a cast ingot crystal silicon substrate containing a plurality of grains with different growth directions, a pyramid texture provided on the surface of the cast ingot crystal silicon substrate, wherein the position of the adjacent grain boundary of the bottom of the pyramid texture has a smooth arc structure, an intrinsic amorphous silicon film layer and a doped amorphous silicon film layer provided on the surface of the pyramid texture, wherein the thickness of the intrinsic amorphous silicon film layer and the doped amorphous silicon film layer on the arc structure is thicker than that of the intrinsic amorphous silicon film layer and the doped amorphous silicon film layer on the slope of the pyramid texture, a transparent conductive film layer provided on the doped amorphous silicon film layer, and a metal electrode provided on the transparent conductive film layer.

[0008] Preferably, the cast ingot crystal silicon substrate is a cast ingot single crystal silicon wafer or a cast ingot polycrystalline silicon substrate, and the doping type is N type or P type.

[0009] Preferably, the height of the pyramid texture is 0.5-10 microns, and the arc length of the arc structure is 0.1-1 micron.

[0010] The application further provides a manufacturing method of the cast ingot crystal silicon heterojunction solar cell, which comprises the following steps: removing impurities from the cast ingot crystal silicon substrate; manufacturing a pyramid texture on the cast ingot crystal silicon substrate after the impurities are removed; performing regional smoothing treatment on the cast ingot crystal silicon substrate with the pyramid texture, so as to form a smooth arc structure at the position of the adjacent grain boundary of the bottom of the pyramid texture; cleaning the cast ingot crystal silicon substrate and removing the oxide layer; depositing an intrinsic amorphous silicon film layer and a doped amorphous silicon film layer on both sides of the cast ingot crystal silicon substrate to perform passivation and form a PN junction; depositing a transparent conductive film layer on the doped amorphous silicon film layer; and forming a metal electrode on the transparent conductive film layer.

[0011] Preferably, the impurities are removed from the cast ingot crystal silicon substrate by solution pre-cleaning to remove organic contamination and large particles, and then a mixed film layer containing phosphorus and silicon oxide is deposited on the surface and high-temperature diffusion is performed to remove the impurities.

[0012] Preferably, the pyramid texture is manufactured on the cast ingot crystal silicon substrate after the impurities are removed by using an anisotropic etching liquid to manufacture the pyramid texture, and the anisotropic etching liquid comprises a mixed solution formed by at least one of a surfactant, an inhibitor, sodium hydroxide, potassium hydroxide and ammonia.

[0013] Preferably, the ingot single crystal silicon substrate with the fabricated pyramid texture is subjected to a regional smoothing treatment to form a smooth arc structure at the position of the adjacent grain boundary at the bottom of the pyramid texture, so as to directly re-etch the pyramid texture by using an acidic etching solution; or the pyramid texture is subjected to a preliminary etching by using an acidic etching solution, and then subjected to a further etching by using an alkaline micro-etching solution.

[0014] Preferably, the acidic etching solution comprises a mixed solution of a surfactant and an inhibitor, and at least one of hydrofluoric acid, nitric acid, ozone or hydrogen peroxide; and the alkaline micro-etching solution comprises a mixed solution formed by a surfactant and an inhibitor, and at least one of sodium hydroxide, potassium hydroxide and ammonia water.

[0015] Preferably, the concentration of the alkaline micro-etching solution is lower than that of the alkaline etching solution.

[0016] Preferably, the ingot single crystal silicon substrate is cleaned and the oxide layer is removed, so as to remove the surface residual stains and ions by RCA cleaning, and then remove the surface oxide layer by using an aqueous solution of HF.

[0017] As can be seen from the above description of the structure of the present application, compared with the prior art, the present application has the following advantages: after the pyramid texture is fabricated, the smoothing treatment method of first performing a preliminary etching by using an acidic etching solution and then performing a further etching by using an alkaline micro-etching solution is adopted, so as to eliminate the sharp angle structure at the position of the adjacent grain boundary on the ingot single crystal silicon wafer or polycrystalline silicon wafer substrate due to the different growth directions of the grains, and form a smooth arc structure at the bottom of the pyramid texture; the smooth arc structure is beneficial to improving the subsequent H + ion treatment and passivation effect of the amorphous silicon film layer; the thickness of the intrinsic amorphous silicon layer and the doped amorphous silicon film layer deposited on the above smooth arc structure is thicker than that of the intrinsic amorphous silicon film layer and the doped amorphous silicon film layer on the pyramid inclined surface, so as to further inhibit the recombination of carriers at the interface of the pyramid bottom at the position of the adjacent grain boundary, and improve the overall passivation level. BRIEF DESCRIPTION OF DRAWINGS

[0018] The accompanying drawings, which form a part of this application, are included to provide a further understanding of the application and are incorporated in and constitute a part of this application. The embodiments illustrated in the drawings are provided to explain the present application and are not intended to limit the present application. In the drawings:

[0019] Figure 1 FIG. 1 is a structural schematic diagram of an ingot single crystal silicon heterojunction solar cell according to the present application;

[0020] Figure 2 FIG. 2 is a structural schematic diagram of the arc structure at the bottom of the pyramid texture at the position of the adjacent grain boundary of the ingot single crystal silicon heterojunction solar cell according to the present application;

[0021] Figure 3SEM image of the smooth arc structure of the pyramid-shaped bottom of the ingot cast silicon heterojunction solar cell substrate of the present application;

[0022] Figure 4 PL image of the ingot cast silicon heterojunction solar cell substrate after passivation of the present application;

[0023] Figure 5 Structural schematic diagram of the comparative example;

[0024] Figure 6 Structural schematic diagram of the sharp angle structure of the pyramid-shaped bottom of the comparative example;

[0025] Figure 7 SEM image of the sharp angle structure of the pyramid-shaped bottom of the comparative example;

[0026] Figure 8 PL image of the ingot cast silicon substrate after passivation of the comparative example. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical scheme and advantages of the present application more clear, the present application is further described in detail below in combination with the drawings, examples and comparative examples. It should be understood that the specific examples and comparative examples described herein are only used to explain the present application, and are not used to limit the present application.

[0028] Example:

[0029] An ingot cast silicon heterojunction solar cell, such as Figure 1 and Figure 2As shown, its structure is as follows: An N-type doped ingot silicon substrate 1 contains multiple grains (1-a / 1-b / 1-c) with different growth directions. The surface of the ingot silicon substrate is provided with a continuous alternating pyramidal textured surface. The bottom of the pyramidal shape at the boundary position A between adjacent grains 1-b and 1-c is connected by a smooth arc-shaped structure, and the bottom of the pyramidal shape at the boundary position B between adjacent grains 1-a and 1-b is also connected by a smooth arc-shaped structure (the structure at the boundary position A between adjacent grains is described below only). Intrinsic amorphous silicon films 2 and 3 are disposed on the pyramidal textured surface, wherein the bottom of the pyramidal shape at the boundary position A between adjacent grains 1-b and 1-c is connected by a smooth arc-shaped structure. The thickness d1 of the intrinsic amorphous silicon film layer 3 is greater than the thickness d2 of the intrinsic amorphous silicon film layer 3 on the pyramid slope; the N-type doped amorphous silicon film layer 4 is disposed on the intrinsic amorphous silicon film layer 3, wherein the thickness d3 of the N-type doped amorphous silicon film layer 4 on the smooth arc structure at the bottom of the pyramid shape at the boundary position A between adjacent grains 1-b and 1-c is greater than the thickness d4 of the N-type doped amorphous silicon film layer 4 on the pyramid slope; the P-type doped amorphous silicon film layer 5 is disposed on the intrinsic amorphous silicon film layer 2; the transparent conductive film layer 6 is disposed on the N-type doped amorphous silicon film layer 4 and the P-type doped amorphous silicon film layer 5; and the metal electrode 7 is disposed on the transparent conductive film layer 6. The ingot crystalline silicon substrate is an ingot monocrystalline silicon wafer or an ingot polycrystalline silicon substrate, and the doping type is N-type or P-type. The height of the pyramid textured surface is 0.5-10 micrometers; the arc length of the arc structure is 0.1-1 micrometers.

[0030] A method for fabricating a cast silicon heterojunction solar cell includes the following steps: removing impurities from a cast silicon substrate; fabricating a pyramidal textured surface on the impurity-removed cast silicon substrate; performing regional rounding treatment on the cast silicon substrate with the pyramidal textured surface, forming a smooth arc-shaped structure at the adjacent grain boundary position at the bottom of the pyramidal textured surface; cleaning the cast silicon substrate and removing the oxide layer; depositing an intrinsic amorphous silicon film layer and a doped amorphous silicon film layer on both sides of the cast silicon substrate for passivation and forming a PN junction; depositing a transparent conductive film layer on the doped amorphous silicon film layer; and forming a metal electrode on the transparent conductive film layer. Preferably, the removal of impurities from the cast silicon substrate involves pre-cleaning with a solution to remove organic contaminants and large particles, followed by depositing a mixed film layer containing phosphorus, silicon, and oxygen on the surface, and then removing impurities through high-temperature diffusion.

[0031] The process of creating a pyramid textured surface on a cast silicon substrate with impurities removed involves anisotropic etching using an alkaline etching solution. The alkaline etching solution comprises a mixed solution of a surfactant, an inhibitor, and at least one of sodium hydroxide, potassium hydroxide, and ammonia.

[0032] The process of smoothing the areas of the cast silicon substrate with the pyramid textured surface to form a smooth arc-shaped structure at the adjacent grain boundary at the bottom of the pyramid textured surface involves either directly etching the pyramid textured surface with an acidic etching solution, or first performing preliminary etching of the pyramid textured surface with an acidic etching solution, and then further etching the pyramid textured surface with an alkaline micro-etching solution.

[0033] The acidic etching solution contains a surfactant and an inhibitor, and a mixture of at least one of hydrofluoric acid, nitric acid, ozone, or hydrogen peroxide; the alkaline micro-etching solution contains a mixture of a surfactant and an inhibitor, and at least one of sodium hydroxide, potassium hydroxide, or ammonia.

[0034] The concentration of the alkaline micro-etching solution is lower than that of the alkaline etching solution.

[0035] The process of cleaning and removing the oxide layer from the cast silicon substrate involves removing residual dirt and ions from the surface using RCA cleaning, followed by removing the oxide layer from the surface using an aqueous solution of HF.

[0036] The specific implementation is as follows: Step 1, the N-type doped cast monocrystalline silicon wafer substrate is immersed and cleaned in an aqueous solution of ammonia and hydrogen peroxide at a temperature above 70°C to remove organic contaminants. After drying, a mixed layer of phosphorus, silicon, and oxygen is deposited on the substrate surface using chemical vapor deposition (LPCVD / PECVD / Hot wire CVD) and annealed at a high temperature of 700-1000°C. Then, the surface mixed layer is removed with HF solution to remove internal impurities and eliminate some defects. Step 2, the cast monocrystalline silicon wafer substrate is anisotropically etched using an alkaline texturing solution to create a continuously alternating pyramid-shaped textured surface. Due to the presence of grains with different growth directions in the cast monocrystalline silicon wafer substrate, sharp angle structures easily form at the bottom of the pyramids at the boundaries of adjacent grains. Step 3, the pyramid shape on the surface is further refined using an acidic etching solution. In the process of etching, the etch rate of the pyramid's slope is faster than that of the pyramid's base, especially the sharp angled structural areas, under the combined action of surfactants and inhibitors. This results in a smooth, arc-shaped structure at the base. The substrate surface is then treated with an alkaline micro-etching solution. Due to the low concentration of the alkaline micro-etching solution, the top of the pyramid can be effectively modified to control the curvature and length of the arc-shaped structure, ensuring a smooth arc-shaped base. Step four involves removing the oxide layer from the surface using an HF solution. Step five involves using PECVD to etch the surface of the cast single-crystal substrate with HF. + Processing and depositing intrinsic amorphous silicon and doped amorphous silicon, wherein the smooth, arc-shaped structure at the bottom is perpendicular to the deposition direction, which is beneficial for enhancing H +The passivation treatment is effective, and the thickness of the intrinsic amorphous silicon film and the doped amorphous silicon film deposited on the smooth arc structure will be significantly greater than the thickness of the intrinsic amorphous silicon film and the doped amorphous silicon film on the pyramid slope; Step six, a transparent conductive film is deposited using PVD; Step seven, a metal electrode is fabricated using low-temperature silver paste printed by screen printing.

[0037] The above embodiments employ a cast-in-place crystalline silicon heterojunction solar cell and its fabrication method. After the cast-in-place monocrystalline silicon wafer substrate is smoothed, the SEM image of the smooth, arc-shaped structure at the base of the pyramid shape is shown below. Figure 3 As shown in the figure, circle a indicates a smooth arc-shaped structure connecting two adjacent pyramid shapes; the PL image of the cast single-crystal silicon wafer substrate after PECVD passivation is shown below. Figure 4 As shown, after passivation improvement, the black areas at the grain boundaries on the PL image are significantly reduced.

[0038] Comparative example:

[0039] To further illustrate the substantial effects of the cast-in-ingot crystalline silicon heterojunction solar cell and its fabrication method of the present invention, a pair of proportional cast-in-ingot crystalline silicon heterojunction solar cell structures not fabricated using the present invention are provided as follows: Figure 5 and Figure 6 As shown, its structure is as follows: An N-type doped cast single-crystal silicon wafer substrate 8 contains multiple grains (8-a / 8-b / 8-c) with different growth directions. The surface of the substrate is provided with a continuous, alternating pyramid-shaped textured surface. The pyramid-shaped bottoms at the boundary C between adjacent grains 8-b and 8-c are connected by a sharp angle structure, and the pyramid-shaped bottoms at the boundary D between adjacent grains 1-a and 1-b are also connected by a sharp angle structure (the structure at the boundary C between adjacent grains is described below only). Intrinsic amorphous silicon films 9 and 10 are disposed on the textured surface, wherein the intrinsic amorphous silicon film on the sharp angle structure at the bottom of the pyramid-shaped bottom of the boundary C between adjacent grains 1-b and 1-c... The thickness d5 of layer 10 is smaller than the thickness d6 of the intrinsic amorphous silicon film layer 10 on the pyramid slope; the N-type doped amorphous silicon film layer 11 disposed on the intrinsic amorphous silicon film layer 10, wherein the thickness d7 of the N-type doped amorphous silicon film layer 11 on the sharp structure at the bottom of the pyramid shape at the boundary position C between adjacent grains 8-b and 8-c is smaller than the thickness d8 of the N-type doped amorphous silicon film layer 11 on the pyramid slope; the P-type doped amorphous silicon film layer 12 disposed on the intrinsic amorphous silicon film layer 10; the transparent conductive film layer 13 disposed on the N-type doped amorphous silicon film layer 11 and the P-type doped amorphous silicon film layer 12; and the metal electrode 14 disposed on the transparent conductive film layer 13.

[0040] The comparative method is as follows: Step 1: The N-type doped cast monocrystalline silicon wafer substrate is immersed and cleaned in an aqueous solution of ammonia and hydrogen peroxide at a temperature above 70°C to remove organic contaminants. After drying, a mixed phosphorus-silicon-oxygen layer is deposited on the substrate surface using chemical vapor deposition (LPCVD / PECVD / Hot wire CVD) and annealed at a high temperature of 700-1000°C. Then, the surface mixed layer is removed with HF solution to remove internal impurities and eliminate some defects. Step 2: The cast monocrystalline silicon wafer substrate is anisotropically etched using an alkaline etching solution to create a continuously alternating pyramid-shaped textured surface. Due to the presence of grains with different growth directions in the cast monocrystalline silicon wafer substrate, sharp angle structures easily form at the bottom of the pyramids at the boundaries of adjacent grains. Step 3: The oxide layer on the surface is removed using HF solution. Step 4: Intrinsic amorphous silicon films and doped amorphous silicon films are deposited using PECVD. The sharp angle structure at the bottom of the pyramids is not conducive to H… + Ion passivation and deposition of amorphous silicon films, H + The ion treatment effect is poor, and the thickness of the intrinsic amorphous silicon film and the doped amorphous silicon film deposited at the bottom sharp angle position will be significantly smaller than the thickness of the intrinsic amorphous silicon film and the doped amorphous silicon film on the pyramid slope; Step 5, a transparent conductive film layer is deposited by PVD; Step 6, a metal electrode is fabricated by screen printing low temperature silver paste.

[0041] The above-described comparative model of cast monocrystalline silicon wafer substrates, after texturing but without rounding, shows the sharp angles at the base of the pyramid shape in the SEM image. Figure 7 As shown in the figure, circle b indicates a sharp angle structure connecting two adjacent pyramid shapes; the PL image of the cast single-crystal silicon wafer substrate after PECVD passivation is shown below. Figure 8 As shown, due to poor passivation at the boundaries of adjacent grains, there are significantly more black areas at the grain boundaries in the PL image, and these areas are continuously distributed.

[0042] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for fabricating a cast silicon heterojunction solar cell, characterized in that, The method comprises the following steps: removing impurities from the ingot crystal silicon substrate; making a pyramid surface on the ingot crystal silicon substrate after removing the impurities; performing regional smoothing treatment on the ingot crystal silicon substrate after making the pyramid surface, so as to form a smooth arc structure at the position of the adjacent grain boundaries at the bottom of the pyramid surface; cleaning and removing the oxide layer from the ingot crystal silicon substrate; depositing intrinsic amorphous silicon film and doped amorphous silicon film on both sides of the ingot crystal silicon substrate to perform passivation and form a PN junction; depositing a transparent conductive film on the doped amorphous silicon film; and forming a metal electrode on the transparent conductive film. The impurities are removed from the ingot crystal silicon substrate by solution pre-cleaning to remove organic contamination and large particles, and then a high-temperature diffusion is performed after depositing a mixed film layer containing phosphorus and silicon oxide on the surface. The regional smoothing treatment is performed on the ingot crystal silicon substrate after making the pyramid surface, so as to form a smooth arc structure at the position of the adjacent grain boundaries at the bottom of the pyramid surface, which is achieved by first performing preliminary etching on the pyramid surface with an acidic etching solution, and then performing further etching on the pyramid surface with an alkaline micro-etching solution. The ingot crystal silicon heterojunction solar cell comprises: an ingot crystal silicon substrate containing a plurality of crystal grains with different growth directions; a pyramid surface arranged on the surface of the ingot crystal silicon substrate, wherein the position of the adjacent grain boundaries at the bottom of the pyramid surface has a smooth arc structure; intrinsic amorphous silicon film and doped amorphous silicon film arranged on the surface of the pyramid surface, wherein the thickness of the intrinsic amorphous silicon film and the doped amorphous silicon film on the arc structure is thicker than the thickness of the intrinsic amorphous silicon film and the doped amorphous silicon film on the inclined surface of the pyramid surface; a transparent conductive film arranged on the doped amorphous silicon film; and a metal electrode arranged on the transparent conductive film. The height of the pyramid surface is 0.5-10 microns, and the arc length of the arc structure is 0.1-1 micron.

2. The method according to claim 1, wherein the ingot of crystalline silicon heterojunction solar cell is produced by the steps of: The ingot crystal silicon substrate is an ingot single crystal silicon wafer or an ingot polycrystalline silicon substrate, and the doping type is N-type or P-type. ​ 3. The method of claim 1, wherein the ingot of crystalline silicon heterojunction solar cell is produced by the steps of: The pyramid surface is made by anisotropic etching with an alkaline etching solution, which comprises a mixed solution formed by a surfactant, an inhibitor, and at least one of sodium hydroxide, potassium hydroxide, and ammonia. ​ 4. The method of claim 1, wherein the ingot of crystalline silicon heterojunction solar cell is made by the steps of: The acidic etching solution comprises a mixed solution formed by a surfactant, an inhibitor, and at least one of hydrofluoric acid, nitric acid, ozone, or hydrogen peroxide; and the alkaline micro-etching solution comprises a mixed solution formed by a surfactant, an inhibitor, and at least one of sodium hydroxide, potassium hydroxide, and ammonia. ​ 5. The method according to claim 3, wherein the ingot of crystalline silicon heterojunction solar cell is made by the steps of: The concentration of the alkaline micro-etching solution is lower than the concentration of the alkaline etching solution. ​ 6. The method of claim 1, wherein the ingot of crystalline silicon heterojunction solar cell is produced by the steps of: The ingot crystal silicon substrate is cleaned and the oxide layer is removed by RCA cleaning to remove surface residual stains and ions, and then an aqueous solution of HF is used to remove the surface oxide layer. ​

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