A Capacitance Calibration Method for a Successive Approximation ADC
The self-calibration method for capacitors in SAR ADCs addresses precision issues by iteratively adjusting digital weights, enhancing resolution without additional arrays, thus overcoming the precision bottleneck.
Patent Information
- Application Number
- CN202210014377.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-07
- Publication Date
- 2025-07-15
- Estimated Expiration
- 2042-01-07
AI Technical Summary
Existing successive approximation analog-to-digital converters (SAR ADCs) at high resolutions, capacitance mismatch leads to accuracy limitations, traditional methods increase layout area and reduce speed, and capacitance calibration requires additional calibration of the capacitor array to increase area.
By using the self-calibration method, the digital weights of the switching capacitor module are initialized, and the actual digital weights of each capacitor to be calibrated are obtained in turn, and the capacitors are added in the digital domain to realize self-calibration, without the need for an additional calibration capacitor array.
It realizes improving the accuracy of SAR ADC without increasing the area, supports differential and single-ended input signal modes, compensates for the accuracy loss caused by capacitor array mismatch, and avoids becoming an accuracy bottleneck for high-precision ADCs.
Smart Images
Figure CN114401006B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of analog-to-digital converters, and particularly to a capacitance calibration method for a successive approximation (SAR) type ADC (analog-to-digital converter). Background Art
[0002] Figure 2 As a schematic diagram of a conventional successive approximation analog-to-digital converter (SAR ADC), it generally includes a switched capacitor, a comparator, and SAR logic. The switched capacitor module is used for sampling and converting the digital output result of the comparator into an analog signal with an analog weight. The comparator is used to judge the analog signal of the switched capacitor module into a digital signal. The SAR logic module is used for the logical control of successive approximation, feeding back the result of the comparator bit by bit to the switched capacitor module, and at the same time outputting the quantization result of the ADC. When the resolution of the ADC is relatively high, a calibration module is required to assist in improving the analog performance of the ADC.
[0003] In a SAR ADC, one of the important accuracy limitations lies in capacitance mismatch. To solve the limitation of matching accuracy, one of the traditional solutions is to increase the capacitance size to physically obtain a higher matching accuracy. However, this will increase the layout area and reduce the speed of the ADC. The increased area using this solution will increase exponentially with the increase in resolution. When the resolution is greater than 12 bits, the required area is huge. Another method is capacitance calibration. Traditional capacitance calibration requires an additional calibration capacitor array, which increases the layout area. Summary of the Invention
[0004] The purpose of the present invention is to provide a capacitance calibration method for a successive approximation type ADC, which can realize self-calibration of capacitance and does not require an additional calibration capacitor array.
[0005] The technical solution to achieve the above purpose is as follows:
[0006] A capacitance calibration method for a successive approximation type ADC, the successive approximation type ADC includes a switched capacitor module, a comparator, and a SAR logic module connected in sequence, and the capacitance calibration method includes:
[0007] Initializing the differential-mode digital weight W i_diff [N:1] and the single-ended mode digital weight W i_sing [N:1] of all the capacitances to be calibrated in the switched capacitor module with the digital weight of the ideal capacitance; where N represents the resolution of the successive approximation type ADC, and i represents the capacitance serial number;
[0008] Successively obtaining the actual digital weight in the differential mode of each capacitance to be calibrated and assigning it to the corresponding differential-mode digital weight;
[0009] Successively obtain the actual digital weights of each capacitor to be calibrated in the single-ended mode, and assign them to the corresponding single-ended mode digital weights;
[0010] According to the selected differential mode or single-ended mode, assign each of the differential mode digital weights or each of the single-ended mode digital weights to each actual final digital weight;
[0011] Perform bitwise addition on the analog output signal of the successive approximation ADC using each actual final digital weight to obtain a digital output signal.
[0012] Preferably, the capacitor array in the switched capacitor module includes an array of capacitors to be calibrated arranged in sequence and a binary capacitor array C3 that does not require calibration; the array of capacitors to be calibrated includes a temperature code capacitor array C1 to be calibrated and a binary capacitor array C2 to be calibrated arranged in sequence.
[0013] Preferably, the step of successively obtaining the actual digital weights of each capacitor to be calibrated in the differential mode and assigning them to the corresponding differential mode digital weights includes:
[0014] Turn on the differential mode of the successive approximation ADC;
[0015] Successively traverse each capacitor to be calibrated in the binary capacitor array C2 starting from the least significant bit, and obtain the actual digital weights of each capacitor to be calibrated in the binary capacitor array C2 in the differential mode;
[0016] Successively traverse each capacitor to be calibrated in the temperature code capacitor array C1, and obtain the actual digital weights of each capacitor to be calibrated in the temperature code capacitor array C1 in the differential mode;
[0017] Assign the actual digital weights of each capacitor to be calibrated in the differential mode to each corresponding differential mode digital weight.
[0018] Preferably, obtaining the actual digital weight of a certain capacitor to be calibrated in the binary capacitor array C2 includes:
[0019] Set the polarity flag bit cap_pn to 1, set the capacitor to be calibrated at the P end to 1, and set the capacitor to be calibrated at the N end to 0;
[0020] Connect other uncalibrated capacitors in front of this capacitor to the equivalent 1 / 2 potential, and perform normal SAR conversion on other capacitors behind this capacitor with this as the initial state to obtain a first analog output result;
[0021] Take out the normal SAR conversion part of the first analog output result, and multiply it by the differential mode digital weight W i_diff [x:1] to obtain the first calibration result of this capacitor to be calibrated; where x represents the number of bits of normal SAR conversion;
[0022] Set the polarity flag bit cap_pn to 0, set the capacitor to be calibrated at the P terminal to 0, and set the capacitor to be calibrated at the N terminal to 1;
[0023] Connect other uncalibrated capacitors in front of the capacitor to be calibrated to the equivalent 1 / 2 potential. With this as the initial state, perform normal SAR conversion on other capacitors behind the capacitor to be calibrated to obtain a second analog output result;
[0024] Take out the normal SAR conversion part of the second analog output result and multiply it by the differential mode digital weight W i_diff [x:1] to obtain a second calibration result for the capacitor to be calibrated;
[0025] Subtract the first calibration result from the second calibration result and take the absolute value to obtain the actual digital weight of the capacitor to be calibrated in the differential mode, and update it to the corresponding bit of W i_diff [N:1].
[0026] Preferably, obtaining the actual digital weight of a certain capacitor to be calibrated in the differential mode in the temperature code capacitor array C1 includes:
[0027] Set the polarity flag bit cap_pn to 1, set the capacitor to be calibrated at the P terminal to 1, and set the capacitor to be calibrated at the N terminal to 0;
[0028] Connect all other uncalibrated capacitors in the temperature code capacitor array C1 to the equivalent 1 / 2 potential. With this as the initial state, perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 to obtain a third analog output result;
[0029] Take out the normal SAR conversion part of the third analog output result and multiply it by the differential mode digital weight W i_diff [y:1] to obtain a third calibration result for the capacitor to be calibrated; y represents the number of bits of normal SAR conversion;
[0030] Set the polarity flag bit cap_pn to 0, set the capacitor to be calibrated at the P terminal to 0, and set the capacitor to be calibrated at the N terminal to 1;
[0031] Connect all other capacitors to be calibrated in the temperature code capacitor array C1 to the equivalent 1 / 2 potential. With this as the initial state, perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 to obtain a fourth analog output result;
[0032] Take out the normal SAR conversion part of the fourth analog output result and multiply it by the differential mode digital weight W i_diff [y:1] to obtain a fourth calibration result for the capacitor to be calibrated;
[0033] Subtract the third calibration result from the fourth calibration result and take the absolute value to obtain the actual digital weight of the capacitor to be calibrated in the differential mode, and update it to W i_diff In the corresponding bit of [N:1].
[0034] Preferably, obtaining the actual digital weight of each capacitor to be calibrated in the single-ended mode and assigning it to the corresponding single-ended mode digital weight includes:
[0035] The successive approximation ADC enables the single-ended mode;
[0036] Successively traverse each capacitor to be calibrated in the temperature code capacitor array C1, and obtain the actual digital weight of each capacitor to be calibrated in the temperature code capacitor array C1 in the single-ended mode;
[0037] Assign the actual digital weight of each capacitor to be calibrated in the single-ended mode to each corresponding single-ended mode digital weight.
[0038] Preferably, obtaining the actual digital weight of a certain capacitor to be calibrated in the temperature code capacitor array C1 includes:
[0039] All capacitors to be calibrated in the temperature code capacitor array C1 at the N end are always connected to the equivalent 1 / 2 potential;
[0040] Set the polarity flag bit cap_pn to 1 and set the capacitor to be calibrated at the P end to 1;
[0041] Connect all other capacitors to be calibrated in the temperature code capacitor array C1 at the P end to the equivalent 1 / 2 potential, and perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 with this as the initial state to obtain the fifth analog output result;
[0042] Take out the normal SAR conversion part of the fifth analog output result and multiply it by the single-ended mode digital weight W i_sing [z:1] to obtain the fifth calibration result of the capacitor to be calibrated; z represents the number of bits of normal SAR conversion;
[0043] Set the polarity flag bit cap_pn to 0 and set the capacitor to be calibrated at the P end to 0;
[0044] Connect all other capacitors to be calibrated in the temperature code capacitor array C1 at the P end to the equivalent 1 / 2 potential, and perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 with this as the initial state to obtain the sixth analog output result;
[0045] Take out the normal SAR conversion part of the sixth analog output result and multiply it by the single-ended mode digital weight W i_sing [z:1] to obtain the sixth calibration result of the capacitor to be calibrated;
[0046] Subtract the sixth calibration result from the fifth calibration result and take the absolute value to obtain the actual digital weight of the capacitor to be calibrated in the single-ended mode, and update it to W i_sing In the corresponding bit of [N:1].
[0047] Preferably, before successively obtaining the actual digital weights of each capacitor to be calibrated in the differential mode and assigning them to the corresponding differential-mode digital weights, and before successively obtaining the actual digital weights of each capacitor to be calibrated in the single-ended mode and assigning them to the corresponding single-ended mode digital weights, a sampling stage is performed
[0048] In the sampling stage, the temperature-code capacitor array C1 is short-circuited to the common-mode level of the input signal, and the binary capacitor arrays C2 and C3 are connected to the equivalent 1 / 2 potential.
[0049] Preferably, the first calibration result, the second calibration result, the third calibration result, the fourth calibration result, the fifth calibration result, and the sixth calibration result are obtained multiple times and averaged separately.
[0050] The beneficial effects of the present invention are as follows: Through effective design, the present invention can cooperate with the SAR ADC circuit to achieve self-calibration of capacitors, without the need for an additional calibration capacitor array, and support for the differential input signal mode and single-ended input signal mode of the SAR ADC. Thus, it can compensate for the accuracy loss caused by capacitor array mismatch in the digital domain and avoid capacitor mismatch from becoming the accuracy bottleneck of high-precision SAR ADCs. BRIEF DESCRIPTION OF THE DRAWINGS
[0051] Figure 1 is a schematic flowchart of the capacitor calibration method of the present invention;
[0052] Figure 2 is a schematic block diagram of a successive approximation ADC;
[0053] Figure 3 is a schematic diagram of the capacitor array in the switched-capacitor module of the present invention;
[0054] Figure 4 is a calibration flowchart for the differential mode and single-ended mode of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0055] The present invention will be further described below with reference to the accompanying drawings.
[0056] Please refer to Figure 1 、 Figure 3 and Figure 4 . For the capacitor calibration method of the successive approximation ADC of the present invention, the successive approximation ADC includes a switched-capacitor module, a comparator, and a SAR logic module connected in sequence.
[0057] In the switched-capacitor module, the capacitor array includes an array of capacitors to be calibrated arranged in sequence and a binary capacitor array C3 that does not need to be calibrated; the array of capacitors to be calibrated includes a temperature-code capacitor array C1 to be calibrated and a binary capacitor array C2 to be calibrated arranged in sequence. In the temperature-code capacitor array C1, the capacitor sequence C tm to C t0 , in the binary capacitor array C2, the capacitor sequence C n to C k+1 , in the binary capacitor array C3, the capacitor sequence C k to C0; switches S tm -S t0 ; where LSB represents the least significant bit; MSB represents the most significant bit. The switched capacitors are mainly divided into two phases: sampling and conversion. In the sampling phase, C1 participates in sampling, and switches S tm -S t0 are switched to the input signal, and C2 and C3 are connected to the equivalent 1 / 2 potential according to the specific switch structure (according to the circuit structure, the capacitor can be split into two equal capacitors, one connected to 1 and the other connected to 0; or connected to V cm_in potential). Among them, the input signal switch Sin at the N end (the corresponding input signal switch Sip at the P end) is connected to Vin (the corresponding input signal switch Vip at the P end) according to the input signal mode, and V cm_in or gnd (ground). During sampling, the upper plate of the capacitor is connected to the common-mode level Vcm_top of the capacitor top plate; in the conversion phase, C1, C2, and C3 are connected to 1 / 0 one by one according to the output result of the comparator. In the figure, V cn represents the top plate level of the capacitor, that is, the input end of the comparator; Vrefn represents the reference level at the N end; Vrefp represents the reference level at the P end.
[0058] The capacitor calibration method of the present invention includes the following steps:
[0059] Step S1, initialize the differential-mode digital weights W i_diff [N:1] and the single-ended mode digital weights W i_sing [N:1] of all capacitors to be calibrated in the switched-capacitor module with the digital weights of ideal capacitors; where N represents the resolution of the successive approximation ADC; i represents the capacitor serial number.
[0060] Step S2, sequentially obtain the actual digital weights of each capacitor to be calibrated in the differential mode and assign them to the corresponding differential-mode digital weights W i_diff .
[0061] In this embodiment, the input signal switch Sin at the N end and the corresponding input signal switch Sip at the P end are both connected to the input signal common-mode voltage V cm_in, calibration starts from the lowest bit to be calibrated, i.e., C k+1 . During the entire capacitor calibration process, the operations in all sampling stages are the same, i.e., the lower plate of C1 is shorted to the common-mode voltage of the input signal V through a switch cm_in , and the capacitances of C2 and C3 are connected to the equivalent 1 / 2 potential. As Figure 4 , step S2 specifically includes the following steps:
[0062] 1) The successive approximation ADC turns on the differential mode.
[0063] 2) Traverse each capacitor to be calibrated in the binary capacitor array C2 in sequence starting from the lowest bit, and obtain the actual digital weight of each capacitor to be calibrated in the binary capacitor array C2 in the differential mode.
[0064] In this embodiment, to obtain the actual digital weight of a certain capacitor to be calibrated in the binary capacitor array C2 in the differential mode, as follows:
[0065] Set the polarity flag bit cap_pn to 1, set the capacitor to be calibrated at the P terminal (taking C k+1 as an example) to 1, and set the capacitor to be calibrated at the N terminal (taking C k+1 as an example) to 0. Connect the other uncalibrated capacitors (C tm to C k+2 ) in front of this capacitor to be calibrated to the equivalent 1 / 2 potential. Taking this as the initial state, perform normal SAR conversion on the other capacitors (C k to C0) behind this capacitor to be calibrated, and obtain the first analog output result (SAR ADC analog output result Qana). The other capacitors behind this capacitor to be calibrated refer to the capacitors that have been calibrated and the C3 capacitor. Take out the normal SAR conversion part of the first analog output result, multiply it by the differential mode digital weight W i_diff [x:1], and obtain the first calibration result (calibration result Dout_p of Ck+1 when cap_pn = 1) of this capacitor to be calibrated. Where x represents the number of bits of normal SAR conversion. To eliminate the influence of noise, perform multiple samplings and conversions, and average the obtained first calibration result (Dout_p). Then, set the polarity flag bit cap_pn to 0, set the capacitor to be calibrated at the P terminal (taking C k+1 as an example) to 0, and set the capacitor to be calibrated at the N terminal to 1. Connect the other uncalibrated capacitors (C tm to C k+2 ) in front of this capacitor to be calibrated to the equivalent 1 / 2 potential. Taking this as the initial state, perform normal SAR conversion on the other capacitors (C k to C0) behind this capacitor to be calibrated, and obtain the second analog output result (SAR ADC analog output result Qana). Take out the normal SAR conversion part of the second analog output result, multiply it by the differential mode digital weight Wi_diff [x:1], the second calibration result of the capacitor to be calibrated is obtained (C with cap_pn = 0 k+1 calibration result Dout_n). To eliminate the influence of noise, multiple conversions are performed, and the obtained Dout_n is averaged. Subtract the first calibration result from the second calibration result (subtract Dout_p from Dout_n) and take the absolute value to obtain the actual digital weight of the capacitor to be calibrated in differential mode (C k+1 's W k+1_diff ), and update it to the corresponding bit of W i_diff [N:1].
[0066] After completing the capacitor calibration of C k+1 , using the same sampling and similar conversion steps, gradually calibrate the capacitor digital weights from C k+2 to C n to obtain W k+2_diff to W n_diff .
[0067] 3) Traverse each capacitor to be calibrated in the temperature code capacitor array C1 in turn, and obtain the actual digital weight of each capacitor to be calibrated in the temperature code capacitor array C1 in differential mode.
[0068] In this embodiment, the method for obtaining the actual digital weight of a certain capacitor to be calibrated in the temperature code capacitor array C1 in differential mode is as follows:
[0069] Set the polarity flag bit cap_pn to 1, set the capacitor to be calibrated at the P end to 1, and set the capacitor to be calibrated at the N end to 0; connect all other capacitors to be calibrated in the temperature code capacitor array C1 to the equivalent 1 / 2 potential, and perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 with this as the initial state to obtain the third analog output result; take out the normal SAR conversion part of the third analog output result and multiply it by the differential mode digital weight W i_diff [y:1] to obtain the third calibration result of the capacitor to be calibrated; y represents the number of bits of normal SAR conversion. To eliminate the influence of noise, multiple samplings and conversions are performed, and the third calibration result is averaged; set the polarity flag bit cap_pn to 0, set the capacitor to be calibrated at the P end to 0, and set the capacitor to be calibrated at the N end to 1; connect all other capacitors to be calibrated in the temperature code capacitor array C1 to the equivalent 1 / 2 potential, and perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 with this as the initial state to obtain the fourth analog output result; take out the normal SAR conversion part of the fourth analog output result and multiply it by the differential mode digital weight W i_diff[y:1], obtain the fourth calibration result of the capacitor to be calibrated. To eliminate the influence of noise, perform multiple samplings and conversions, and average the four calibration results; subtract the third calibration result from the fourth calibration result and take the absolute value to obtain the actual digital weight of the capacitor to be calibrated in the differential mode, and update it to W i_diff [N:1] in the corresponding bit. In this way, gradually calibrate the capacitor digital weights from C t0 to C tm to obtain W t0_diff to W tm_diff .
[0070] 4) Assign the actual digital weights of each capacitor to be calibrated in the differential mode to the corresponding differential mode digital weights W i_diff .
[0071] Figure 4 Among them, cap - num corresponds to the capacitor sequence.
[0072] Step S3, sequentially obtain the actual digital weights of each capacitor to be calibrated in the single-ended mode, and assign them to the corresponding single-ended mode digital weights.
[0073] In this embodiment, the input signal switch Sin at the N end and the corresponding input signal switch Sip at the P end are both connected to the input signal common-mode level V cm_in , and only the C1 capacitor needs to be calibrated in the single-ended mode. The calibration starts from the lowest bit to be calibrated, that is, C t0 . During the entire capacitor calibration process, the operations in all sampling stages are the same, that is, the lower plate of C1 is short-circuited to the input signal common-mode level V cm_in , and the capacitors of C2 and C3 are connected to the equivalent 1 / 2 potential. During the conversion stage of the entire single-ended calibration, the temperature code capacitor array C1 at the N end is always connected to the equivalent 1 / 2 potential. As Figure 4 , step S3 specifically includes the following steps:
[0074] 1) The successive approximation ADC turns on the single-ended mode.
[0075] 2) Sequentially traverse each capacitor to be calibrated in the temperature code capacitor array C1, and obtain the actual digital weights of each capacitor to be calibrated in the temperature code capacitor array C1 in the single-ended mode.
[0076] In this embodiment, to obtain the actual digital weight of a certain capacitor to be calibrated (taking C t0 as an example) in the single-ended mode of the temperature code capacitor array C1, it is as follows:
[0077] All capacitors to be calibrated in the temperature code capacitor array C1 at the N end are always connected to the equivalent 1 / 2 potential; set the polarity flag bit cap_pn to 1, and the capacitor to be calibrated at the P end (taking C t0For example) set it to 1; for the other capacitors to be calibrated (C tm to C t1 ) in the temperature code capacitor array C1 at the P end, connect them all to the equivalent 1 / 2 potential. Taking this as the initial state, perform normal SAR conversion on the capacitors (C n to C0) in the binary capacitor array C2 and the binary capacitor array C3 to obtain the fifth analog output result (SAR ADC analog output result Qana); extract the normal SAR conversion part from the fifth analog output result and multiply it by the single-ended mode digital weight W i_sing [z:1] to obtain the fifth calibration result of the capacitor to be calibrated; (the calibration result Dout_p of C t0 with cap_pn = 1), where z represents the number of bits of normal SAR conversion. To eliminate the influence of noise, perform multiple samplings and conversions and average the fifth calibration result; set the polarity flag bit cap_pn to 0 and set the capacitor to be calibrated at the P end to 0; for the other capacitors to be calibrated in the temperature code capacitor array C1 at the P end, connect them all to the equivalent 1 / 2 potential. Taking this as the initial state, perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 to obtain the sixth analog output result (the calibration result Dout_n of C t0 with cap_pn = 0); extract the normal SAR conversion part from the sixth analog output result and multiply it by the single-ended mode digital weight W i_sing [z:1] to obtain the sixth calibration result of the capacitor to be calibrated. To eliminate the influence of noise, perform multiple samplings and conversions and average the sixth calibration result; subtract the fifth calibration result from the sixth calibration result and take the absolute value to obtain the actual digital weight of the capacitor to be calibrated in the single-ended mode, and update it to the corresponding bit of W i_sing [N:1]. In this way, gradually calibrate the digital weights of the capacitors from C t0 to C tm to obtain W t0_sing to W tm_sing .
[0078] 3) Assign the actual digital weights of each capacitor to be calibrated in the single-ended mode to the corresponding single-ended mode digital weights W i_sing .
[0079] Step S4, according to the selected differential mode or single-ended mode, assign each differential mode digital weight or each single-ended mode digital weight to each actual final digital weight W i ; that is: W i =W i_sing or W i =W i_diff ; use each actual final digital weight W iAdd bit by bit to obtain the digital output signal Dout of the successive approximation ADC.
[0080] In summary, the present invention can cooperate with the SAR ADC circuit to achieve self-calibration of capacitors without the need for an additional calibration capacitor array.
[0081] The above embodiments are only for illustrating the present invention and not for limiting the present invention. Those skilled in the relevant technical fields can also make various transformations or modifications without departing from the spirit and scope of the present invention. Therefore, all equivalent technical solutions should also fall within the scope of the present invention, which should be defined by each claim.
Claims
1. A capacitance calibration method for a successive approximation ADC, the successive approximation ADC comprising a switched capacitor module, a comparator, and a SAR logic module connected in sequence, characterized in that, The capacitance calibration method includes: Initialize the differential-mode digital weights W of all capacitors to be calibrated in the switched-capacitor module with the digital weights of ideal capacitors i_diff [N:1] and the single-ended mode digital weights W i_sing [N:1]; where N represents the resolution of the successive approximation ADC and i represents the capacitor serial number; Successively obtain the actual digital weights of each capacitance to be calibrated in the differential mode, and assign them to the corresponding differential mode digital weights; Successively obtain the actual digital weights of each capacitance to be calibrated in the single-ended mode, and assign them to the corresponding single-ended mode digital weights; According to the selected differential mode or single-ended mode, assign each of the differential mode digital weights or each of the single-ended mode digital weights to each actual final digital weight; Perform bitwise addition on the analog output signal of the successive approximation ADC using each actual final digital weight to obtain a digital output signal; The capacitance array in the switched capacitor module includes an array of capacitances to be calibrated arranged in sequence and a binary capacitance array C3 that does not need to be calibrated; the array of capacitances to be calibrated includes a temperature code capacitance array C1 to be calibrated and a binary capacitance array C2 to be calibrated arranged in sequence; The step of successively obtaining the actual digital weights of each capacitance to be calibrated in the differential mode and assigning them to the corresponding differential mode digital weights includes: Turn on the differential mode of the successive approximation ADC; Successively traverse each capacitance to be calibrated in the binary capacitance array C2 starting from the lowest bit, and obtain the actual digital weights of each capacitance to be calibrated in the binary capacitance array C2 in the differential mode; Successively traverse each capacitance to be calibrated in the temperature code capacitance array C1, and obtain the actual digital weights of each capacitance to be calibrated in the temperature code capacitance array C1 in the differential mode; Assign the actual digital weights of each capacitance to be calibrated in the differential mode to each corresponding differential mode digital weight; Obtaining the actual digital weight of a certain capacitance to be calibrated in the binary capacitance array C2 in the differential mode includes: Set the polarity flag bit cap_pn to 1, set the P-terminal of this capacitance to be calibrated to 1, and set the N-terminal of this capacitance to be calibrated to 0; Connect other uncalibrated capacitances in front of this capacitance to be calibrated to an equivalent 1 / 2 potential, and perform normal SAR conversion on other capacitances behind this capacitance to be calibrated with this as the initial state to obtain a first analog output result; Take out the normal SAR conversion part from the first analog output result and multiply it by the differential-mode digital weight W i_diff [x:1] to obtain the first calibration result of the capacitor to be calibrated; where x represents the number of bits of the normal SAR conversion; Set the polarity flag bit cap_pn to 0, set the P-terminal of this capacitance to be calibrated to 0, and set the N-terminal of this capacitance to be calibrated to 1; Connect other uncalibrated capacitances in front of this capacitance to be calibrated to an equivalent 1 / 2 potential, and perform normal SAR conversion on other capacitances behind this capacitance to be calibrated with this as the initial state to obtain a second analog output result; Take out the normal SAR conversion part from the second analog output result and multiply it by the differential-mode digital weight W i_diff [x:1] to obtain the second calibration result of the capacitor to be calibrated; Subtract the first calibration result from the second calibration result and take the absolute value to obtain the actual digital weight of the capacitor to be calibrated in the differential mode, and update it to the corresponding bit in W i_diff in the corresponding bit of [N:1].
2. The capacitive calibration method of the successive approximation type ADC according to claim 1, characterized in that, Obtaining the actual digital weight of a certain capacitance to be calibrated in the temperature code capacitance array C1 in the differential mode includes: Set the polarity flag bit cap_pn to 1, set the P-terminal of this capacitance to be calibrated to 1, and set the N-terminal of this capacitance to be calibrated to 0; Connect all other uncalibrated capacitances in the temperature code capacitance array C1 to an equivalent 1 / 2 potential, and perform normal SAR conversion on the capacitances in the binary capacitance array C2 and the binary capacitance array C3 with this as the initial state to obtain a third analog output result; Take out the normal SAR conversion part from the third analog output result and multiply it by the differential mode digital weight W i_diff [y:1] to obtain the third calibration result of the capacitor to be calibrated; y represents the number of bits of normal SAR conversion; Set the polarity flag bit cap_pn to 0, set the P-terminal of this capacitance to be calibrated to 0, and set the N-terminal of this capacitance to be calibrated to 1; Connect all other capacitors to be calibrated in the temperature code capacitor array C1 to the equivalent 1 / 2 potential, and perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 with this as the initial state to obtain the fourth analog output result; Take out the normal SAR conversion part from the fourth analog output result and multiply it by the differential-mode digital weight W i_diff [y:1] to obtain the fourth calibration result of the capacitor to be calibrated; Subtract the third calibration result from the fourth calibration result and take the absolute value to obtain the actual digital weight of the capacitor to be calibrated in the differential mode, and update it to the corresponding bit in W i_diff in the corresponding bit of [N:1].
3. The capacitive calibration method of the successive approximation ADC according to claim 1, wherein The step of sequentially obtaining the actual digital weights of each capacitor to be calibrated in the single-ended mode and assigning them to the corresponding single-ended mode digital weights includes: The successive approximation ADC enables the single-ended mode; Sequentially traverse each capacitor to be calibrated in the temperature code capacitor array C1, and obtain the actual digital weights of each capacitor to be calibrated in the temperature code capacitor array C1 in the single-ended mode; Assign the actual digital weights of each capacitor to be calibrated in the single-ended mode to the corresponding single-ended mode digital weights.
4. The capacitive calibration method of the successive approximation type ADC according to claim 3, wherein Obtaining the actual digital weight of a certain capacitor to be calibrated in the temperature code capacitor array C1 in the single-ended mode includes: All capacitors to be calibrated in the temperature code capacitor array C1 at the N end are always connected to the equivalent 1 / 2 potential; Set the polarity flag bit cap_pn to 1 and set the capacitor to be calibrated at the P end to 1; Connect all other capacitors to be calibrated in the temperature code capacitor array C1 at the P end to the equivalent 1 / 2 potential, and perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 with this as the initial state to obtain the fifth analog output result; Take out the fifth analog output result for the normal SAR conversion part and multiply it by the single-ended mode digital weight W i_sing [z:1] to obtain the fifth calibration result of the capacitor to be calibrated; z represents the number of bits of normal SAR conversion; Set the polarity flag bit cap_pn to 0 and set the capacitor to be calibrated at the P end to 0; Connect all other capacitors to be calibrated in the temperature code capacitor array C1 at the P end to the equivalent 1 / 2 potential, and perform normal SAR conversion on the capacitors in the binary capacitor array C2 and the binary capacitor array C3 with this as the initial state to obtain the sixth analog output result; Take out the normal SAR conversion part from the sixth analog output result and multiply it by the single-ended mode digital weight W i_sing [z:1] to obtain the sixth calibration result of the capacitor to be calibrated; Subtract the fifth calibration result from the sixth calibration result and take the absolute value to obtain the actual digital weight of the capacitor to be calibrated in single-ended mode, and update it to the corresponding bit in W i_sing in the [N:1].
5. The capacitance calibration method of the successive approximation type ADC according to any one of claims 1-3, characterized in that, Before the step of sequentially obtaining the actual digital weights of each capacitor to be calibrated in the differential mode and assigning them to the corresponding differential mode digital weights, and before the step of sequentially obtaining the actual digital weights of each capacitor to be calibrated in the single-ended mode and assigning them to the corresponding single-ended mode digital weights, a sampling stage is performed, In the sampling stage, the temperature code capacitor array C1 is short-circuited to the input signal common-mode level, and the binary capacitor array C2 and the binary capacitor array C3 are connected to the equivalent 1 / 2 potential.
6. The capacitive calibration method of the successive approximation ADC according to any one of claims 1-3, characterized in that Obtain the first calibration result, the second calibration result, the third calibration result, the fourth calibration result, the fifth calibration result and the sixth calibration result multiple times, and calculate their respective averages.
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Patent Citations
Digital-to-analog converter (DAC) circuit and weight error estimation / calibration method thereof
US20140167988A1