Deflectable pressure plate and method of deflecting a pressure plate
By using a multi-laminated plate structure in the electrostatic clamping of semiconductor wafers, the pressure plate is deflected by the difference in thermal expansion coefficient, the problem of poor electrostatic clamping caused by uneven surfaces of the wafer and the pressure plate is solved, and stronger electrostatic coupling is achieved under high temperature conditions.
Patent Information
- Application Number
- CN202080061974.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-10-18
- Filing Date
- 2020-09-10
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2040-09-10
AI Technical Summary
During the electrostatic clamping process of semiconductor wafers, the surface unevenness between the wafer and the pressure plate leads to poor electrostatic clamping, which is especially serious under high-temperature process conditions, which affects the clamping effect.
Using a multi-laminate structure with different coefficients of thermal expansion, one layer consists of a low CTE material (such as quartz) and the other layer consists of a high CTE material (such as ceramic) and deflects the platen by heating or cooling to match the wafer surface, thereby Reduce clamping gap and improve electrostatic coupling.
Through the controllable thermal expansion and cold shrinkage effect, the pressure plate is closer in contact with the wafer surface, enhance the electrostatic clamping force, and improve the electrostatic clamping effect of semiconductor wafers, which is suitable for high-temperature process conditions.
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Figure CN114402427B_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure relate generally to the field of semiconductor device fabrication, and more particularly, to deflectable platens and methods of deflecting platens that facilitate effective electrostatic clamping of semiconductor wafers. Background Art
[0002] During ion implantation and certain other processes performed during semiconductor device fabrication, a semiconductor wafer is typically placed on a flat platen. Typically, the semiconductor wafer is secured to the platen by electrostatic clamping, where a voltage is applied between electrodes embedded in the platen and the resulting electric field holds the semiconductor wafer to the platen. Electrostatic clamping is preferred over mechanical clamping because mechanical clamping can damage and / or contaminate the semiconductor wafer.
[0003] The ability of the platen to securely clamp the semiconductor wafer to the platen via electrostatic clamping depends largely on the proximity of the bottom surface of the semiconductor wafer to the top surface of the platen. Ideally, both surfaces are flat and are placed in flat, continuous contact with each other. In some cases, the semiconductor wafer may warp (e.g., deflect by up to 20 thousandths of an inch (thou)), thereby forming a relatively large gap between the bottom surface of the semiconductor wafer and the top surface of the platen. This may result in weak or ineffective electrostatic clamping. This problem may be exacerbated if the semiconductor wafer and platen are exposed to high temperature processes (e.g., during high temperature ion implantation), where incoherent deflection of the semiconductor wafer and the platen may cause the size of the gap between the semiconductor wafer and the platen to increase.
[0004] Therefore, minimizing the surface-to-surface proximity between the semiconductor wafer and the platen is desirable to facilitate safe electrostatic clamping between the semiconductor wafer and the platen.With respect to these and other considerations, the present improvements may be useful. Summary of the invention
[0005] This Summary is provided to introduce a selection of concepts in a simplified form. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is this Summary intended to be an aid in determining the scope of the claimed subject matter.
[0006] A deflectable pressure plate according to a non-limiting embodiment of the present disclosure may include: a first layer formed of a material having a first coefficient of thermal expansion (CTE); and a second layer bonded to the first layer and having a second CTE, the second layer including a plurality of electrodes embedded in the second layer to facilitate electrostatically clamping a wafer to the second layer, wherein the second CTE is different from the first CTE.
[0007] A deflectable pressure plate according to another non-limiting embodiment of the present disclosure may include: a first layer, formed of a material having a first CTE; a second layer, bonded to the first layer and having a second CTE greater than the first CTE, the second layer including a plurality of electrodes embedded in the second layer to facilitate electrostatically clamping a wafer to the second layer; and a heating trace disposed between the first layer and the second layer and suitable for heating the first layer and the second layer in a controllable manner.
[0008] A method of deflecting a platen according to a non-limiting embodiment of the present disclosure may include: providing a first layer, the first layer being formed of a material having a first CTE; and providing a second layer, the second layer being bonded to the first layer and having a second CTE, the second layer comprising a plurality of electrodes embedded in the second layer to facilitate electrostatically clamping a wafer to the second layer, wherein the second CTE is different from the first CTE; and one of: heating the first layer and the second layer to a temperature in a range of 300 degrees Celsius to 600 degrees Celsius; and cooling the first layer and the second layer to a temperature in a range of -50 degrees Celsius to -150 degrees Celsius. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] By way of example, various embodiments of the disclosed apparatus will now be described with reference to the accompanying drawings, in which:
[0010] Figure 1A is a cross-sectional side view illustrating an exemplary embodiment of a deflectable pressure plate with a semiconductor wafer disposed thereon in accordance with the present disclosure.
[0011] Figure 1B is shown in a deflected state Figure 1A A cross-sectional side view of a deflectable pressure plate is shown with a semiconductor wafer disposed thereon.
[0012] Figure 1C is shown to have elastically returned to the undeflected state Figure 1A A cross-sectional side view of a deflectable pressure plate is shown.
[0013] Figure 2 is a flow chart illustrating a method of deflecting a platen according to an embodiment of the present disclosure.
[0014] Figure 3A is a cross-sectional side view illustrating another exemplary embodiment of a deflectable pressure plate with a semiconductor wafer disposed thereon in accordance with the present disclosure.
[0015] Figure 3B is shown in a deflected state Figure 3A A cross-sectional side view of a deflectable pressure plate is shown with a semiconductor wafer disposed thereon.
[0016] Figure 3C is shown to be elastically maintained in a deflected state Figure 3A A cross-sectional side view of a deflectable pressure plate is shown.
[0017] Figure 4 is a flow chart illustrating another method of deflecting a platen according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0018] The present embodiment will now be described more fully below with reference to the accompanying drawings, in which some embodiments are shown. The subject matter of the present disclosure can be implemented in many different forms and should not be considered to be limited to the embodiments set forth herein. These embodiments are provided so that the present disclosure will be thorough and complete and will fully convey the scope of the subject matter to those skilled in the art. In all figures, the same reference numerals refer to the same elements.
[0019] Reference Figure 1A , shows a cross-sectional side view of a deflectable pressure plate 10 (hereinafter "pressure plate 10") according to an exemplary embodiment of the present disclosure. The pressure plate 10 can be elastically deformable (as further described below) to provide a close clearance relationship between the top surface of the pressure plate 10 and the bottom surface of a warped or curved semiconductor wafer disposed on the pressure plate 10, thereby facilitating effective electrostatic clamping between the top surface of the pressure plate 10 and the bottom surface of the semiconductor wafer.
[0020] The press plate 10 may include: a generally planar first layer 12 formed of a first material; and a generally planar second layer 14 formed of a second material disposed on top of the first layer 12. The first material may have a first coefficient of thermal expansion (CTE) and the second material may have a second CTE, wherein the second CTE may be greater than the first CTE. The first layer 12 and the second layer 14 may be flatly bonded together, for example, by brazing or other techniques suitable for bonding the first material to the second material. In various embodiments, the press plate 10 may include a heating trace 15 disposed or "sandwiched" between the first layer 12 and the second layer 14. The heating trace 15 may include an electrical heating element (e.g., one or more wires, cables, plates, ribbons, etc.) connected to an electrical power source (not shown). For example, the heating trace 15 may be flexible and may be adapted to withstand deflections of the press plate 10 of up to at least 20 thou (as described below). By activating the heating trace 15, the adjacent first layer 12 and second layer 14 of the press plate 10 may be heated in a controllable manner as further described below.
[0021] In one example, the first layer 12 of the pressboard 10 may be composed of a -7 / ℃(for example, between 2.0×10 -7 / ℃ and 4.0×10 -7 In a specific example, the first layer 12 may be formed of quartz. The present disclosure is not limited thereto. The first layer 12 may alternatively be formed of other relatively low CTE materials, including but not limited to carbon, silicon, silicon nitride, silicon carbide, aluminum nitride, INVAR, KOVAR, molybdenum, tungsten, tantalum, titanium, and alloys thereof. In one example, the second layer 14 of the press plate 10 may be formed of a material having a relatively higher CTE than the first layer 12 (e.g., having a CTE between 6.0×10 -7 / ℃ and 8.0×10 -7 / °C). In a specific example, the second layer 14 can be formed of a ceramic, including but not limited to alumina. The present disclosure is not limited thereto. The second layer 14 can alternatively be formed of other materials with relatively high CTE, including but not limited to aluminum, silver, copper, and alloys thereof.
[0022] The second layer 14 of the platen 10 may have a plurality of electrodes 16 embedded therein. The electrodes 16 may be connected to an electrical power source (not shown) and may be arranged and configured to operate in a conventional electrostatic clamping manner familiar to those skilled in the art. Specifically, by applying a voltage across the electrodes 16, an electric field may be generated and a semiconductor wafer 18 (hereinafter "wafer 18") may be held to the platen 10 by electrostatic forces. The strength of the electrostatic forces acting on the wafer 18 will depend in part on the proximity of the wafer 18 to the electrodes 16. Ideally, the contour of the bottom surface of the wafer 18 will match or nearly match the contour of the top surface of the platen 10 (e.g., if both surfaces are flat or nearly flat), thereby establishing the shortest possible distance between the electrodes 16 and the wafer 18 to provide a strong electrostatic coupling between the electrodes 16 and the wafer 18. In some cases, the wafer (e.g., Figure 1A The wafer 18 shown in FIG. 1 may warp or bow (e.g., deflect up to 20 thou, and possibly more than 20 thou), and may present a concave bottom surface relative to the generally flat top surface of the platen 10 (for purposes of illustration, Figure 1A The deflection of wafer 18 shown in FIG. 1 is exaggerated). The resulting gap 20 between wafer 18 and platen 10 may weaken the electrostatic force acting on wafer 18 , thereby resulting in poor electrostatic clamping between platen 10 and wafer 18 .
[0023] Reference Figure 1B , the platen 10 is shown in a deflected state. Specifically, the heating trace 15 has been activated, thereby heating the first layer 12 and the second layer 14 of the platen 10. Since the CTE of the second layer 14 is greater than the CTE of the first layer 12, the heated second layer 14 may expand more (i.e., faster and / or to a greater extent) than the heated first layer 12, thereby causing the convex deflection of the platen 10. Therefore, relative to Figure 1A In the undeflected state of the platen 10 shown in FIG, the top surface of the platen 10 may be contoured to more closely match the bottom surface of the wafer 18 to reduce the size of the gap 20 between the top surface of the platen 10 and the bottom surface of the wafer 18. In various examples, the platen 10 may be heated to a temperature between 300 degrees Celsius and 600 degrees Celsius. In a specific non-limiting example, the platen 10 may exhibit a deflection of 18thou when heated to a temperature of 500 degrees Celsius. The present disclosure is not limited in this regard. With respect to the Figure 1A The electrostatic force applied by the undeflected platen 10 shown in FIG. 1 is due to the smaller gap 20 and closer proximity of the electrode 16 of the deflected platen 10 to the wafer 18, which provides a stronger electrostatic force acting on the wafer 18, thereby forming a better electrostatic coupling between the platen 10 and the wafer 18.
[0024] The degree of deflection in the heated platen 10 will depend on many factors including, but not limited to, the CTE of the first layer 12 and the second layer 14, the amount of heat applied to the first layer 12 and the second layer 14, the diameter of the first layer 12 and the second layer 14, and the thickness of the first layer 12 and the second layer 14. In a non-limiting embodiment, the thickness of the first layer 12 may be 4 millimeters and the thickness of the second layer 14 may be 4 millimeters. In another non-limiting embodiment, the thickness of the first layer 12 may be 6 millimeters and the thickness of the second layer 14 may be 4 millimeters. In another non-limiting embodiment, the thickness of the first layer 12 may be 8 millimeters and the thickness of the second layer 14 may be 4 millimeters. The present disclosure is not limited in this regard, and the thickness of the first layer 12 and the second layer 14 may be different from the thickness of the first layer 12 and the second layer 14 described above. Additionally, while the platen 10 has been described as including integrated heating traces 15 for controllably heating the platen 10, embodiments of the platen 10 are contemplated where the heating traces 15 are omitted and the platen 10 is heated by an external heating source (eg, a furnace).
[0025] In various embodiments, the deflection stress on the press plate 10 during heating may be less than the yield strength of the material of the first layer 12 and / or the second layer 14. Thus, when the heating traces 15 (or other heating source) are deactivated and the press plate 10 is allowed to cool to room temperature, the press plate 10 may be as described above. Figure 1C Thus, by varying the amount of heat applied to the first layer 12 and the second layer 14, the platen 10 can be controllably deflected to different degrees (e.g., from 0 thou to 20 thou) to match or approximate the contour of a wafer on which the different degrees of deflection are disposed, thereby providing effective electrostatic clamping between the platen and the wafer.
[0026] Reference Figure 2 , a flow chart showing an exemplary method of deflecting a pressure plate according to the present disclosure is shown. Figure 1A to Figure 1C The method is illustrated using the example of the press plate 10 shown in FIG.
[0027] At block 100 of the exemplary method, a first layer 12 may be provided and may be formed of a material having a first CTE. At block 110 of the method, a second layer 14 may be provided and may be formed of a material having a second CTE and may be flatly bonded to the first layer 12, such as by brazing or other suitable techniques as described above. The second CTE may be greater than the first CTE. In various examples, the first layer 12 may be formed of a material having a CTE less than 6.0×10 -7 / ℃(for example, between 2.0×10 -7 / ℃ and 4.0×10 -7 / ℃) and the second layer 14 may have a CTE between 6.0×10 -7 / ℃ and 8.0×10 -7 The second layer 14 may have the plurality of electrodes 16 embedded in the second layer 14. The electrodes 16 may be connected to a power source and may be arranged and configured to operate in a conventional electrostatic clamping manner familiar to those skilled in the art.
[0028] At block 120 of the exemplary method, a heating trace 15 may be disposed (e.g., sandwiched) between the first layer 12 and the second layer 14. This may be performed prior to bonding the second layer 14 to the first layer 12 or during bonding the second layer 14 to the first layer 12. The heating trace 15 may include an electrical heating element (e.g., one or more wires, cables, plates, ribbons, etc.) connected to a source of electrical power.
[0029] At block 130 of the exemplary method, the heating trace 15 may be activated, thereby heating the first layer 12 and the second layer 14. Since the CTE of the second layer 14 is greater than the CTE of the first layer 12, the heated second layer 14 may expand more (i.e., faster and / or to a greater extent) than the heated first layer 12, thereby causing the convex deflection of the press plate 10. Figure 1B As shown in Figure 1A In the undeflected state of the pressure plate 10 shown in FIG, the contour of the top surface of the pressure plate 10 can be made to more closely match the contour of the bottom surface of the wafer 18 to reduce the size of the gap 20 between the top surface of the pressure plate 10 and the bottom surface of the wafer 18.
[0030] Reference Figure 3A , a cross-sectional side view showing a deflectable pressure plate 200 (hereinafter "pressure plate 200") according to another exemplary embodiment of the present disclosure is shown. The pressure plate 200 can be elastically deformable (as further described below) to provide a close clearance relationship between the top surface of the pressure plate 200 and the bottom surface of a warped or curved semiconductor wafer disposed on the pressure plate 200, thereby facilitating effective electrostatic clamping between the top surface of the pressure plate 200 and the bottom surface of the semiconductor wafer.
[0031] The press plate 200 may include a generally planar first layer 212 formed of a first material and a generally planar second layer 214 formed of a second material disposed on top of the first layer 212. The first material may have a first coefficient of thermal expansion (CTE) and the second material may have a second CTE, wherein the first CTE may be greater than the second CTE. The first layer 212 and the second layer 214 may be flatly bonded together, for example, by epoxy or other suitable techniques for bonding the first material to the second material.
[0032] In one example, the first layer 212 of the press plate 200 may be made of a material having a thickness greater than 20.0×10 -7 / °C (e.g., a material with a CTE of approximately 24.0×10 -7 / °C CTE). In a specific example, the first layer 212 may be formed of a porous aluminum alloy. The present disclosure is not limited thereto. The first layer 212 may alternatively be formed of other materials with relatively high CTE, including but not limited to aluminum, silver, copper, and alloys thereof. In one example, the second layer 214 of the press plate 200 may be formed of a material having a relatively lower CTE than the first layer 112 (e.g., having a CTE between 6.0×10 -7 / ℃ and 8.0×10 -7 / °C). In a specific example, the second layer 214 can be formed of a ceramic, including but not limited to alumina. The present disclosure is not limited thereto. The second layer 214 can alternatively be formed of other materials with relatively low CTE, including but not limited to carbon, silicon, silicon nitride, silicon carbide, aluminum nitride, Invar, Kovar, molybdenum, tungsten, tantalum, titanium, and alloys thereof.
[0033] The second layer 214 of the platen 200 may have a plurality of electrodes 216 embedded therein. The electrodes 216 may be connected to an electrical power source (not shown) and may be arranged and configured to operate in a conventional electrostatic clamping manner familiar to those skilled in the art. Specifically, by applying a voltage across the electrodes 216, an electric field may be generated and a semiconductor wafer 218 (hereinafter "wafer 218") may be held to the platen 200 by electrostatic forces. The strength of the electrostatic forces acting on the wafer 218 will depend in part on the proximity of the wafer 218 to the electrodes 216. Ideally, the contour of the bottom surface of the wafer 218 will match or nearly match the contour of the top surface of the platen 200 (e.g., if both surfaces are flat), thereby establishing the shortest possible distance between the electrodes 216 and the wafer 218 to provide a strong electrostatic coupling between the electrodes 216 and the wafer 218. In some cases, the wafer (e.g., Figure 3A The wafer 218 shown in FIG. 210 may warp or bow (e.g., deflect up to 20 thou, and possibly more than 20 thou), and may present a concave bottom surface relative to the generally flat top surface of the platen 200 (for purposes of illustration, Figure 3A The deflection of the wafer 218 shown in FIG. 2 is exaggerated). The resulting gap 220 between the wafer 218 and the platen 200 may weaken the electrostatic force acting on the wafer 218, thereby resulting in poor electrostatic clamping between the platen 200 and the wafer 218.
[0034] Reference Figure 3B, the press plate 200 is shown in a deflected state. Specifically, the press plate has been cooled quickly and thoroughly. In a non-limiting example, the press plate 200 may be immersed in liquid nitrogen. The present disclosure is not limited thereto. Since the CTE of the first layer 212 is greater than the CTE of the second layer 214, the cooled first layer 212 may contract much more (i.e., faster and / or to a greater extent) than the cooled second layer 214, thereby causing the convex deflection of the press plate 200. Therefore, relative to Figure 3A 218, the top surface of the press plate 200 may be contoured to more closely match the bottom surface of the wafer 218 to reduce the size of the gap 220 between the top surface of the press plate 200 and the bottom surface of the wafer 218. In various examples, the press plate 200 may be cooled to a temperature between -50 degrees Celsius and -150 degrees Celsius. In a specific non-limiting example, the press plate 200 may exhibit a deflection of 220 when cooled to a temperature of -100 degrees Celsius. The present disclosure is not limited in this regard. With respect to the Figure 3A The electrostatic force applied by the undeflected platen 200 shown in FIG. 2 is due to the smaller gap 220 and closer proximity of the electrode 216 of the deflected platen 200 to the wafer 218, which provides a stronger electrostatic force acting on the wafer 218, thereby forming a better electrostatic coupling between the platen 200 and the wafer 218.
[0035] The degree of deflection of the heated platen 200 will depend on many factors including, but not limited to, the CTE of the first layer 212 and the second layer 214, the amount of cooling applied to the first layer 212 and the second layer 214, the diameter of the first layer 212 and the second layer 214, and the thickness of the first layer 212 and the second layer 214. In a non-limiting embodiment, the thickness of the first layer 212 may be 4 millimeters and the thickness of the second layer 214 may be 4 millimeters. In another non-limiting embodiment, the thickness of the first layer 212 may be 6 millimeters and the thickness of the second layer 214 may be 4 millimeters. In another non-limiting embodiment, the thickness of the first layer 212 may be 8 millimeters and the thickness of the second layer 214 may be 4 millimeters. The present disclosure is not limited in this regard, and the thickness of the first layer 212 and the second layer 214 may be different from the thickness of the first layer 212 and the second layer 214 described above.
[0036] In various embodiments, the deflection stress on the press plate 200 during cooling can be greater than the yield strength of the material of the first layer 212 and / or the yield strength of the material of the second layer 214. Thus, when the press plate 200 is allowed to warm to room temperature, the press plate 200 can maintain its Figure 3C214 ). The press plate 200 may be heated, for example, by an external heating source (e.g., a furnace). Since the CTE of the first layer 212 is greater than the CTE of the second layer 214, the heated first layer 212 may expand more (i.e., faster and / or to a greater extent) than the heated second layer 214, thereby causing a reverse deflection of the press plate 200 (i.e., relative to when the press plate 200 was cooled), thereby reducing the convexity of the press plate 200. The deflection stress on the press plate 200 during heating may be greater than the yield strength of the material of the first layer 212 and / or greater than the yield strength of the material of the second layer 214, thereby causing elastic deformation. The above-described cooling and heating of the press plate 200 may be repeated as needed until the press plate 200 reaches the desired amount of deflection. Thus, by varying the amount of cooling and heating applied to the first layer 212 and the second layer 214, the platen 200 can be controllably deflected to different degrees (e.g., from 0 thou to 22 thou) to match or approximate the contour of a wafer having different degrees of deflection disposed thereon, thereby providing effective electrostatic clamping between the platen and the wafer.
[0037] Reference Figure 4 , a flow chart showing an exemplary method of deflecting a pressure plate according to the present disclosure is shown. FIG. 3A to FIG. 3C The method is illustrated using the example of the press plate 200 shown in FIG.
[0038] At block 300 of the exemplary method, a first layer 212 may be provided and may be formed of a material having a first CTE. At block 310 of the method, a second layer 214 may be provided and may be formed of a material having a second CTE, and the second layer 214 may be flatly bonded to the first layer 212, such as by epoxy or other suitable techniques as described above. The first CTE may be greater than the second CTE. In various examples, the first layer 212 may be formed of a material having a CTE between 6.0×10 -7 / ℃ and 8.0×10 -7 / ℃ and the second layer 214 may have a CTE of less than 6.0×10 -7 / ℃(for example, between 2.0×10 -7 / °C and 4.0×10-7 / °C). The second layer 214 may have the plurality of electrodes 216 embedded in the second layer 214. The electrodes 216 may be connected to an electrical power source and may be arranged and configured to operate in a conventional electrostatic clamping manner familiar to those skilled in the art.
[0039] At block 320 of the exemplary method, the press plate 200 may be quickly and thoroughly cooled. In a non-limiting example, the press plate 200 may be immersed in liquid nitrogen. The present disclosure is not limited in this regard. Since the CTE of the first layer 212 is greater than the CTE of the second layer 214, the cooled first layer 212 may contract more (i.e., faster and / or to a greater extent) than the cooled second layer 214, thereby causing the convex deflection of the press plate 200. Therefore, relative to Figure 3A In the undeflected state of the pressure plate 200 shown in FIG, the contour of the top surface of the pressure plate 200 can be made to more closely match the contour of the bottom surface of the wafer 218 to reduce the size of the gap 220 between the top surface of the pressure plate 200 and the bottom surface of the wafer 218.
[0040] As will be appreciated by one of ordinary skill in the art, the deflectable pressure plates 10, 200 and related methods described above provide significant advantages over conventional pressure plates. For example, in the case of the elastically deformable pressure plate 10 described above, the pressure plate 10 can be dynamically deflected by selectively applying heat (e.g., by heating traces 15) to quickly and conveniently facilitate effective electrostatic clamping of wafers having different degrees of deflection. In the case of the elastically deformable pressure plate 200 described above, the pressure plate 200 can be deformed once (by applying cooling and heating) to achieve a desired degree of deflection, and will thereafter retain its deflected shape to facilitate effective electrostatic clamping with similarly deflected wafers in the absence of any further cooling or heating.
[0041] The scope of the present disclosure is not limited by the specific embodiments described herein. In fact, by reading the foregoing description and drawings, various other embodiments of the present disclosure and various modifications to the present disclosure other than the embodiments and modifications described herein will also be apparent to those of ordinary skill in the art. Therefore, these other embodiments and modifications are intended to fall within the scope of the present disclosure. In addition, although the present disclosure has been described herein in the context of a specific implementation in a specific environment for a specific purpose, it should be recognized by those of ordinary skill in the art that its validity is not limited thereto. The embodiments of the present disclosure may be beneficially implemented in any number of environments for any number of purposes. Therefore, the claims set forth above should be interpreted in light of the full breadth and spirit of the present disclosure as described herein.
Claims
1. A deflectable pressure plate, comprising: A first layer formed of a material having a first coefficient of thermal expansion; as well as a second layer bonded to the first layer and having a second coefficient of thermal expansion, the second layer comprising a plurality of electrodes embedded in the second layer to facilitate electrostatic clamping of a wafer to the second layer, wherein the second coefficient of thermal expansion is different from the first coefficient of thermal expansion, Wherein, when the first layer and the second layer are heated to a temperature in a range of 300 degrees Celsius to 600 degrees Celsius to deflect the deflectable platen, the first thermal expansion coefficient is in a range of 2.0×10 -7 / °C and 4.0× 10 -7 / °C, and the second thermal expansion coefficient is between 6.0 × 10 -7 / °C and 8.0 × 10 -7 / °C, In the case where the first layer and the second layer are cooled to a temperature in the range of -100 degrees Celsius to -150 degrees Celsius to deflect the deflectable platen, the first thermal expansion coefficient is in the range of 6.0×10 -7 / °C and 8.0 × 10 -7 / °C, and the second thermal expansion coefficient is between 2.0 × 10 -7 / °C and 4.0 × 10 -7 / °C.
2. The deflectable pressure plate of claim 1, further comprising a heating trace disposed between the first layer and the second layer and adapted to controllably heat the first layer and the second layer.
3. The deflectable pressure plate of claim 2, wherein the heating trace comprises at least one of a wire, a cable, a plate, and a ribbon connected to a power source.
4. A method for deflecting a pressure plate, comprising: providing a first layer, the first layer being formed of a material having a first coefficient of thermal expansion; as well as providing a second layer bonded to the first layer and having a second coefficient of thermal expansion, the second layer comprising a plurality of electrodes embedded in the second layer to facilitate electrostatically clamping a wafer to the second layer, wherein the second coefficient of thermal expansion is different than the first coefficient of thermal expansion; as well as One of the following: heating the first layer and the second layer to a temperature in a range of 300 degrees Celsius to 600 degrees Celsius; and cooling the first layer and the second layer to a temperature in the range of -100 degrees Celsius to -150 degrees Celsius, Wherein, when the first layer and the second layer are heated, the first thermal expansion coefficient is between 2.0×10 -7 / °C and 4.0 × 10 -7 / °C, and the second thermal expansion coefficient is between 6.0 × 10 -7 / °C and 8.0 × 10 -7 / °C, In the case where the first layer and the second layer are cooled, the first thermal expansion coefficient is between 6.0×10 -7 / °C and 8.0 × 10 -7 / °C, and the second thermal expansion coefficient is between 2.0 × 10 -7 / °C and 4.0 × 10 -7 / °C.
5. The method according to claim 4, further comprising: A heating trace is disposed between the first layer and the second layer.
6. The method according to claim 4, further comprising: A heating trace disposed between the first layer and the second layer is activated to heat the first layer and the second layer.
7. The method of claim 4, wherein cooling the first layer and the second layer comprises: The first layer and the second layer are at least partially immersed in liquid nitrogen.
Citation Information
Patent Citations
Electrostatic puck assembly with metal bonded backing plate for high temperature processes
CN107646136A
Pressure-welding semiconductor device
JP2007067349A
Electrostatic chuck device
JP2016171185A
Electrostatic holding apparatus and method of producing the same
US6272002B1