Phase correction circuit and electric energy meter based on analog-to-digital conversion delay

The phase correction circuit synchronizes voltage and current data using analog-to-digital conversion delay techniques, addressing phase errors in electric energy meters for precise power and energy calculations, applicable to single-phase and multi-phase meters.

CN114415099BActive Publication Date: 2024-12-31孟耕
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Patent Information

Application Number
CN202210045218.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-01-15
Publication Date
2024-12-31
Estimated Expiration
2042-01-15

AI Technical Summary

Technical Problem

Existing electric energy meters suffer from phase errors in phase voltage and current sampling circuits due to different sensor methods and materials, leading to inaccuracies in power and energy calculations, which are difficult to correct, especially in high-precision meters.

Method used

A phase correction circuit based on analog-to-digital conversion delay, utilizing a voltage and current signal sampling circuit, analog-to-digital converters, and a delay signal module with combinational logic pulse generators and presettable subtractors to synchronize voltage and current data for precise phase correction.

Benefits of technology

The solution achieves high-precision phase correction suitable for both single-phase and multi-phase electric energy meters, meeting the highest accuracy standards without additional signal interference, and is adaptable to varying market requirements.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to an electric energy meter phase correction circuit based on analog-to-digital conversion delay and an electric energy meter. The electric energy meter phase correction circuit comprises a signal sampling circuit, a power and electric energy calculation main control unit, a first and a second analog-to-digital converter, a combination logic pulse generator, a first and a second presettable subtractor, a first and a second combination pulse module and a data register; the signal sampling circuit transmits the signal to the first and the second analog-to-digital converter after receiving the signal; the power and electric energy calculation main control unit transmits the delay data to the presettable subtractor through the delay data register; the combination logic pulse generator provides the pulse signal required in the circuit; the first and the second presettable subtractor respectively control the operation of the first and the second analog-to-digital converter through the first and the second combination pulse module; the data register transmits the data received from the analog-to-digital converter to the power and electric energy calculation main control unit; the invention can effectively realize the high-precision correction of the phase of the electric energy meter, and can be used for the phase correction of single-phase or multi-phase electric energy meters.
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Description

(I) Technical field:

[0001] The invention relates to an electric energy meter phase correction circuit and an electric energy meter, and in particular to an electric energy meter phase correction circuit and an electric energy meter based on analog-to-digital conversion delay. (II) Background technology:

[0002] Under current technical conditions, digital AC energy meters have phase errors in both phase voltage and phase current sampling circuits for the following reasons: Figure 1 The block diagram of the internal voltage and current sampling circuit of a typical single-phase standard electric energy meter in the prior art is shown in FIG. The voltage sensor 308 and the voltage signal amplifier 309 constitute the voltage signal sampling circuit 01, wherein the voltage sensor 308 is composed of components such as a voltage divider resistor or a voltage transformer; the current sensor 310 and the current signal amplifier 311 constitute the current signal sampling circuit 02, wherein the current sensor 310 is composed of components such as a manganese copper sheet, a current transformer, a Rogowski coil, and a Hall effect sensor; due to the different sensor methods and materials used in the voltage sensor 308 and the current sensor 310, the nonlinear characteristics of the two sampling circuits are created. There is a difference. When the voltage signal sampling circuit 01 and the current signal sampling circuit 02 input the same phase phase voltage signal v(t) and phase current signal i(t), the sampled voltage signal and current signal may have different phase offsets, so there is a phase difference between the voltage and current. The voltage and current signals with phase difference are converted into digital signals by the amplifier and analog-to-digital converter for power and electric energy calculation. When the voltage and current amplitudes are accurate, the phase difference will cause the power and electric energy calculated by the electric energy meter to deviate from the actual power and electric energy, which requires the voltage and current phase of the electric energy meter to be corrected. In addition, since the reactive error of the electric energy meter is the same as the active error, in general, the active power error of the electric energy meter is equal to the reactive power error, which also represents the error of the electric energy meter.

[0003] For a single-phase standard energy meter, let the effective value of the stable phase voltage v(t) be V and the initial phase be The effective value of the phase current i(t) is I, and the initial phase is Take the initial phase difference Active Power Reactive power Assume that the phase difference caused by the different nonlinear characteristics of the voltage signal sampling circuit and the current signal sampling circuit is α, that is, the phase difference of the voltage and current signals sampled by the sampling circuit is Then the active power becomes Reactive power becomes Obviously, due to the phase variation α of the signal, Pa' has a certain deviation compared to Pa, and Pr' also has a certain deviation compared to Pr. Since active energy is the integral of active power over time, and reactive energy is the integral of reactive power over time, the deviation of active power and reactive power will lead to inaccurate measurement of active energy and reactive energy. In this case, a method is usually used in the standard energy meter to correct the signal phase variation α caused by the voltage sampling circuit and the current sampling circuit to eliminate its influence on energy measurement.

[0004] When manufacturing standard electric energy meters, manufacturers generally use electric energy meter measurement and calibration devices composed of high-level electric energy standards to calibrate the voltage and current amplitude, phase and electric energy of the standard electric energy meters. When Correct the V and I display amplitudes of the energy meter under test to be the same as the measurement standard. When Phase calibration is required based on the relative error measured by the calibration device. When the voltage and current signals are in steady state, the relative error of the active power is E, then

[0005] E=[(Pa'-Pa) / Pa]100%. (1)

[0006] Based on the above, When E≥0, Pa'-Pa≥0, then α≤0, that is, the current signal leads the original voltage angle α 0 ; When E≤0, Pa'-Pa≤0, then α≥0, that is, the voltage signal leads the original current by an angle α 0 .

[0007] When the voltage and current input signals are in steady state, the signal frequency is 50Hz, that is, each cycle is 0.02s, and the phase angle is 360 0 , when the phase angle needs to move back α 0 When the corresponding delay time is set to ΔT(s), then

[0008] ΔT = 0.02α / 360. (2)

[0009] or

[0010] α=360ΔT / 0.02 (3)

[0011] According to Table 19 of 6.6.1.1 of JJG 1085-2013 "Verification Procedure for Standard Electric Energy Meters", the minimum correction interval for standard electric energy meters above level 0.02 is 0.002%. The minimum correction step of the electric energy error calibration is ≤0.002% when the values ​​are 1.0 and 0.5L.

[0012] According to the above, the error E = [(Pa'-Pa) / Pa] 100%, that is It follows that:

[0013]

[0014] When If E = 0.002%, that is, E = 0.00002, then α = -0.00066 0 .

[0015] According to formula (2), ΔT = -36.7 ns. That is, in order to achieve the phase calibration resolution requirement of standard electric energy meters above level 0.02, the delay accuracy of the phase voltage or phase current cannot be greater than 36.7 ns.

[0016] The existing standard electric energy meter phase correction adopts the method of current / voltage digital signal or analog signal delay.

[0017] Current / voltage digital signal delay method Figure 2 As shown, the phase voltage signal v(t) and the phase current signal i(t) respectively pass through the voltage signal sampling circuit 101 and the current signal sampling circuit 102, and then pass through the voltage analog-to-digital converter 103 and the current analog-to-digital converter 104 to become digital signals, and then enter the phase correction module 105 for phase adjustment, that is, time delay. After the delay phase adjustment of one of the voltage or current signals, the α between the phase voltage and the phase current has been eliminated, and then enter the power and energy calculation main control unit 106 to calculate the power and energy, so that there is no error caused by the phase.

[0018] In the current / voltage digital signal delay method, according to the different principles of the phase correction module 105, it can be divided into two delay methods, namely, the data sequence delay method and the digital filter delay method:

[0019] In the data sequence delay method, the voltage digital signal or the current digital signal is delayed according to the positive or negative value of α; after the delay signal is selected, the number of analog-to-digital conversion cycles N contained in ΔT is calculated by rounding according to the ΔT value. T , the obtained cycle number N T It is the number of data points to be retrieved later. T All data need to be stored in the register, and then N TThe first number stored after the data point is sent to the power and electric energy calculation main control unit for calculation together with another non-delayed signal data, thereby achieving phase correction with a phase difference of approximately zero; this method is relatively simple, and the function of the phase correction module 105 can also be moved into the power and electric energy calculation main control unit 106 for implementation; however, if phase correction of a high-precision electric energy meter is to be achieved, the delay accuracy of the phase voltage or phase current cannot be greater than 36.7ns, and the analog-to-digital conversion frequency must be greater than 27.25MHz. Such a high frequency and huge data cache are unrealistic, so this method can only be used in low-level electric energy meters.

[0020] In the digital filter delay method, the phase correction module 105 is mainly composed of a full-pass digital filter chip and a control register. By receiving the positive and negative polarity and error data of the active energy error at the 0.5L phase point calculated by the power and energy calculation main control unit 106, it is selected to delay the voltage signal or the current signal, and the filter function constant is provided to the full-pass digital filter to achieve the delay; this method can correct the phase angle very finely under the condition of steady-state signal. The disadvantage is that the digital filter needs to perform a certain amount of calculation and smoothing on the data, and has high requirements on signal stability and good periodicity, which cannot meet the new regulations for signals. Another major flaw is that its design principle is to delay only one of the single-phase voltage signal or current signal, which is only applicable to the phase correction of single-phase electric energy meter. For three-phase electric energy meter, when the voltage sensor and the current sensor use nonlinear devices, the three-phase voltage and the three-phase current, these six signals have phase angle deviations with each other, this design scheme cannot achieve phase correction between the three phases. Therefore, this type of full-pass digital filter delay method is not suitable for phase correction of three-phase electric energy meter.

[0021] Current / voltage analog signal delay method such as Figure 3As shown, this method is widely used in the design and production of early low-precision standard electric energy meters. Its principle is: the phase voltage signal v(t) and the phase current signal i(t) are respectively passed through the voltage signal sampling circuit 201 and the current signal sampling circuit 202, and then respectively passed through the voltage phase correction 203 and the current phase correction 204 to eliminate the phase difference α between the phase voltage and the phase current, and then respectively passed through the voltage analog-to-digital converter 205 and the current analog-to-digital converter 206 to become digital signals, and finally enter the power and electric energy calculation main control unit 207 to calculate power and electric energy; the phase correction adopts analog The filter performs phase correction on the sampled AC voltage or AC current analog signal. The analog filter needs to use a variable capacitor to change the filter parameters. The advantage of this method is that the phase angle of the AC voltage and current is corrected before analog-to-digital conversion, which fundamentally eliminates the phase deviation α. ​​The phase correction has high accuracy. The disadvantage is that it has extremely high requirements on capacitor stability, that is, the capacitor used must be precisely adjustable, have a large adjustable capacity range, good temperature drift and time drift characteristics, strong electromagnetic compatibility and a small size. Due to these stringent requirements, this method is difficult to use in the phase correction of high-precision standard electricity meters. (III) Summary of the invention:

[0022] The technical problem to be solved by the present invention is to provide an electric energy meter phase correction circuit and an electric energy meter based on analog-to-digital conversion delay. The electric energy meter phase correction circuit can effectively realize high-precision correction of the electric energy meter phase, has a wide range of applications, can be used for phase correction of single-phase or multi-phase electric energy meters, and has a simple circuit structure and high reliability.

[0023] The technical solution of the present invention:

[0024] A phase correction circuit for an electric energy meter based on analog-to-digital conversion delay comprises a voltage signal sampling circuit, a current signal sampling circuit and a power and electric energy calculation main control unit, and further comprises a first analog-to-digital converter, a second analog-to-digital converter, a high-frequency crystal oscillator and a delay signal module, wherein the delay signal module comprises a combinational logic pulse generator, a first presettable subtractor, a first combination pulse module, a second presettable subtractor, a second combination pulse module, a delay data register, a voltage data register and a current data register;

[0025] The voltage signal sampling circuit receives the phase voltage signal and transmits it to the first analog-to-digital converter, and the first analog-to-digital converter converts the analog voltage signal into digital voltage data; the current signal sampling circuit receives the phase current signal and transmits it to the second analog-to-digital converter, and the second analog-to-digital converter converts the analog current signal into digital current data;

[0026] The power and electric energy calculation main control unit sends voltage conversion delay data and current conversion delay data to the delay data register, and the delay data register then transmits the received voltage conversion delay data and current conversion delay data to the first presettable subtractor and the second presettable subtractor respectively;

[0027] The signal of the high-frequency crystal oscillator is transmitted to the combinational logic pulse generator, which generates a pulse wave signal and sends the pulse wave signal to the first presettable subtractor and the second presettable subtractor at the same time. The combinational logic pulse generator also generates a first clock signal with the same frequency as the high-frequency crystal oscillator and sends the first clock signal to the first presettable subtractor and the second presettable subtractor at the same time. The combinational logic pulse generator generates a second clock signal with a frequency of 1 / N of the high-frequency crystal oscillator frequency and sends the second clock signal to the first combination pulse module and the second combination pulse module at the same time, where N is a natural number greater than or equal to 15 and less than or equal to 30;

[0028] When the first presettable subtractor receives any pulse A in the pulse wave signal, it immediately performs a subtraction operation with the voltage conversion delay data as the initial preset value and the first clock signal as the counting clock, stops the subtraction operation when it is subtracted to zero, and sends a first sampling single pulse to the first combination pulse module. After receiving the first sampling single pulse, the first combination pulse module sends the first sampling single pulse to the sampling control end of the first analog-to-digital converter. At the same time, the first combination pulse module intercepts a section of the second clock signal and sends it to the main clock input end of the first analog-to-digital converter. After receiving the first sampling single pulse sent by the first combination pulse module, the first analog-to-digital converter immediately starts analog-to-digital conversion and transmits the converted voltage data to the voltage data register.

[0029] When the second presettable subtractor receives pulse A, it immediately uses the current conversion delay data as the initial preset value and the first clock signal as the counting clock to perform a subtraction operation, stops the subtraction operation when the value is reduced to zero, and sends a second sampling single pulse to the second combination pulse module. After receiving the second sampling single pulse, the second combination pulse module sends the second sampling single pulse to the sampling control end of the second analog-to-digital converter. At the same time, the second combination pulse module intercepts a section of the second clock signal and sends it to the main clock input end of the second analog-to-digital converter. After receiving the second sampling single pulse sent by the second combination pulse module, the second analog-to-digital converter immediately starts analog-to-digital conversion and transmits the converted current data to the current data register.

[0030] After the voltage data register and the current data register both receive the analog-to-digital converted data, the combinational logic pulse generator simultaneously generates a level signal and a third clock signal, and the duration of the level signal and the third clock signal is the same. The combinational logic pulse generator simultaneously sends the level signal and the third clock signal to the voltage data register and the current data register, and the voltage data register and the current data register use the level signal and the third clock signal to respectively transmit the stored voltage data and current data to the power and electric energy calculation main control unit, so that the voltage data and the current data arrive at the power and electric energy calculation main control unit at the same time; the frequency of the third clock signal is 1 / M of the high-frequency crystal oscillator frequency, and M is a natural number greater than or equal to 3 and less than or equal to 10;

[0031] The next pulse after pulse A in the pulse wave signal is sent after both the voltage data and the current data are transmitted to the power and energy calculation main control unit.

[0032] The frequency of the high-frequency crystal oscillator is 30MHZ, the frequency of the first clock signal is 30MHZ, N is 15, M is 6, the frequency of the second clock signal is 2MHZ, and the frequency of the third clock signal is 5MHZ.

[0033] A segment of the second clock signal sent to the main clock input terminal of the first analog-to-digital converter contains 17 clocks, and a segment of the second clock signal sent to the main clock input terminal of the second analog-to-digital converter also contains 17 clocks; a segment of the third clock signal sent to the voltage data register and the current data register contains 16 clocks, and a segment of the level signal sent to the voltage data register and the current data register is a low-level signal.

[0034] The voltage signal sampling circuit contains a voltage sensor and a voltage signal amplifier, the phase voltage signal enters the signal input end of the voltage sensor, the signal output end of the voltage sensor is connected to the signal input end of the voltage signal amplifier, and the signal output end of the voltage signal amplifier is connected to the signal input end of the first analog-to-digital converter; the current signal sampling circuit contains a current sensor and a current signal amplifier, the phase current signal enters the signal input end of the current sensor, the signal output end of the current sensor is connected to the signal input end of the current signal amplifier, and the signal output end of the current signal amplifier is connected to the signal input end of the second analog-to-digital converter.

[0035] The voltage sensor uses a voltage divider resistor or a voltage transformer to pick up the external input phase voltage signal, and the voltage signal amplifier amplifies the signal picked up by the voltage sensor; the current sensor uses a manganese copper sheet, a current transformer, a Rogowski coil or a Hall effect sensor to pick up the external input phase current signal, and the current signal amplifier amplifies the signal picked up by the current sensor.

[0036] The delay signal module is implemented by a complex programmable logic device (CPLD chip) or a field programmable gate array (FPGA chip) or a discrete logic chip.

[0037] The model of the complex programmable logic device is: EMP7256, the model of the field programmable gate array is: CYCLONEII LE33216, the model of the first analog-to-digital converter and the second analog-to-digital converter is: AD677, and the model of the power and electric energy calculation main control unit is: TMS320C28341.

[0038] The voltage data register receives and stores the phase voltage digital signal output by the first analog-to-digital converter, and the current data register receives and stores the phase current digital signal output by the second analog-to-digital converter; the combination logic pulse generator provides a start pulse and a counting clock for the first presettable subtractor and the second presettable subtractor, provides a logic clock for the first combination pulse module and the second combination pulse module, and also outputs a signal to control the data of the voltage data register and the current data register to be simultaneously output to the power and electric energy calculation main control unit; the first presettable subtractor is used to store the delay amount data of the first analog-to-digital converter, and the second presettable subtractor is used to store the delay amount data of the second analog-to-digital converter; the first combination pulse module receives the first sampling single pulse sent by the first presettable subtractor The first presettable subtractor receives a second sampling single pulse, combines it with the second clock signal output by the combinational logic pulse generator, generates all pulse signals (including sampling pulses and conversion clocks) used for delay by the first analog-to-digital converter and outputs them; the second combination pulse module receives the second sampling single pulse sent by the second presettable subtractor, combines it with the second clock signal output by the combinational logic pulse generator, generates all pulse signals (including sampling pulses and conversion clocks) used for delay by the second analog-to-digital converter and outputs them; the data sent by the delay data register to the first presettable subtractor and the second presettable subtractor is 12-bit binary data; the power and electric energy calculation main control unit receives the phase-corrected digital voltage synchronization signal and the digital current synchronization signal respectively, and calculates the active electric energy and the reactive electric energy.

[0039] The electric energy meter containing the electric energy meter phase correction circuit based on analog-to-digital conversion delay can be a single-phase electric energy meter or a multi-single-phase electric energy meter.

[0040] When the phase correction circuit of the electric energy meter is used in a single-phase standard electric energy meter, if the voltage signal needs to be delayed, the current conversion delay data sent to the delay data register by the power and electric energy calculation main control unit is set to zero, and the voltage conversion delay data is calculated according to the required delay time; if the current signal needs to be delayed, the voltage conversion delay data is set to zero, and the current conversion delay data is calculated according to the required delay time; if neither the voltage nor the current signal needs to be delayed, the voltage conversion delay data and the current conversion delay data can be set to zero.

[0041] Three sets of phase correction circuits are required for three-phase standard watt-hour meters to perform phase correction. When setting the conversion delay data, the signal with the last phase is used as a reference to delay the other five signals with relatively advanced phase angles, so as to achieve simultaneous phase correction of the six signals (three-phase voltage and three-phase current).

[0042] Beneficial effects of the present invention:

[0043] 1. The phase correction circuit of the electric energy meter of the present invention aims at the defect that the existing phase correction method of the electric energy meter cannot effectively perform phase correction on the high-precision electric energy meter. The phase of the measured signal with phase advance is moved backward by delayed analog-to-digital conversion, thereby eliminating the phase difference between the phase voltage signal and the phase current signal. The data obtained after the analog-to-digital conversion is the data with corrected phase error. It is not necessary to add electronic components to the analog signal channel before the analog-to-digital conversion, nor is it necessary to perform mathematical algorithm processing on the data after the analog-to-digital conversion. No additional interference to the measured signal is introduced, ensuring real-time synchronous sampling of the measured signal. Therefore, the phase correction circuit of the electric energy meter of the present invention can effectively realize the high-precision correction of the phase of the electric energy meter, and is particularly suitable for the phase correction of the high-precision electric energy meter. The standard electric energy meter using the phase correction circuit of the electric energy meter fully meets the highest level 0.01 power factor accuracy requirement in JJG 1085-2013 "Standard Electric Energy Meter Verification Procedure".

[0044] 2. The electric energy meter phase correction circuit of the present invention can be used not only for phase correction of single-phase standard electric energy meters, but also for phase correction of multi-phase standard electric energy meters, and has a wide range of applications.

[0045] 3. The present invention can change the correction accuracy and the maximum correction range at any time according to the market requirements for the accuracy of standard electric energy meters by modifying the voltage conversion delay data and the current conversion delay data in the power and electric energy calculation main control unit, as well as the performance parameters of each device in the delay signal module. It has strong adaptability and is flexible and convenient to use.

[0046] 4. The delay signal module of the present invention is implemented by complex programmable logic devices or field programmable gate arrays, and has a simple circuit structure, high reliability and low cost. (IV) Description of the drawings:

[0047] Figure 1 This is a block diagram of the internal voltage and current sampling circuit of a single-phase standard electric energy meter in the prior art;

[0048] Figure 2 A circuit block diagram of adding delay processing to a digital signal of a single-phase electric energy meter in the prior art;

[0049] Figure 3 A circuit block diagram of adding delay processing to an analog signal of a single-phase electric energy meter in the prior art;

[0050] Figure 4 It is the principle block diagram of the phase correction circuit of the electric energy meter based on analog-to-digital conversion delay;

[0051] Figure 5 This is a timing diagram of the signals in the phase correction circuit of the electric energy meter based on analog-to-digital conversion delay. (V) Specific embodiments:

[0052] See also Figure 4 Figure 5 In the figure, the phase correction circuit of the electric energy meter based on analog-to-digital conversion delay includes a voltage signal sampling circuit 301, a current signal sampling circuit 302, a power and electric energy calculation main control unit 307, a first analog-to-digital converter 303, a second analog-to-digital converter 304, a high-frequency crystal oscillator 305 and a delay signal module 306. The delay signal module 306 includes a combinational logic pulse generator 319, a first preset subtractor 315, a first combination pulse module 317, a second preset subtractor 316, a second combination pulse module 318, a delay data register 320, a voltage data register 313 and a current data register 314;

[0053] The voltage signal sampling circuit 301 receives the phase voltage signal v(t) and transmits it to the first analog-to-digital converter 303, and the first analog-to-digital converter 303 converts the analog voltage signal into digital voltage data; the current signal sampling circuit 302 receives the phase current signal i(t) and transmits it to the second analog-to-digital converter 304, and the second analog-to-digital converter 304 converts the analog current signal into digital current data;

[0054] The power and electric energy calculation main control unit 307 sends the voltage conversion delay data and the current conversion delay data to the delay data register 320, and the delay data register 320 then transmits the received voltage conversion delay data and the current conversion delay data to the first presettable subtractor 315 and the second presettable subtractor 316 respectively;

[0055] The signal of the high-frequency crystal oscillator 305 is transmitted to the combinational logic pulse generator 319, the combinational logic pulse generator 319 generates a pulse wave signal SAM and sends the pulse wave signal SAM to the first presettable subtractor 315 and the second presettable subtractor 316 at the same time, the combinational logic pulse generator 319 also generates a first clock signal HF with the same frequency as the high-frequency crystal oscillator 305 and sends the first clock signal HF to the first presettable subtractor 315 and the second presettable subtractor 316 at the same time, the combinational logic pulse generator 319 generates a second clock signal ADCK with a frequency of 1 / 15 of the frequency of the high-frequency crystal oscillator 305 and sends the second clock signal ADCK to the first combination pulse module 317 and the second combination pulse module 318 at the same time;

[0056] When the first presettable subtractor 315 receives any pulse A in the pulse wave signal SAM, it immediately performs a subtraction operation with the voltage conversion delay data as the initial preset value and the first clock signal HF as the counting clock, stops the subtraction operation when it is reduced to zero, and sends a first sampling single pulse SAM_U to the first combination pulse module 317. After receiving the first sampling single pulse SAM_U, the first combination pulse module 317 sends the first sampling single pulse SAM_U to the sampling control end of the first analog-to-digital converter 303. At the same time, the first combination pulse module 317 intercepts a section ADCK_U in the second clock signal ADCK and sends it to the main clock input end of the first analog-to-digital converter 303. After receiving the first sampling single pulse SAM_U sent by the first combination pulse module 317, the first analog-to-digital converter 303 immediately starts analog-to-digital conversion, and transmits the converted voltage data to the voltage data register 313. The first analog-to-digital converter 303 and the voltage data register 313 use serial communication signals (AD_U, CLK_U).

[0057] When the second presettable subtractor 316 receives the pulse A, it immediately performs a subtraction operation with the current conversion delay data as the initial preset value and the first clock signal HF as the counting clock, stops the subtraction operation when the value is reduced to zero, and sends a second sampling single pulse SAM_I to the second combined pulse module 318. After receiving the second sampling single pulse SAM_I, the second combined pulse module 318 sends the second sampling single pulse SAM_I to the sampling control terminal of the second analog-to-digital converter 304. At the same time, the second combined pulse module 318 intercepts a section ADCK_I of the second clock signal ADCK and sends it to the main clock input terminal of the second analog-to-digital converter 304. After receiving the second sampling single pulse SAM_I sent by the second combined pulse module 318, the second analog-to-digital converter 304 immediately starts analog-to-digital conversion and transmits the converted current data to the current data register 314. The second analog-to-digital converter 304 and the current data register 314 use serial communication signals (AD_I, CLK_I).

[0058] After the voltage data register 313 and the current data register 314 receive the analog-to-digital converted data, the combinational logic pulse generator 319 simultaneously generates a level signal SPISTE and a third clock signal SPICLK, and the duration of the level signal SPISTE and the third clock signal SPICLK are the same. The combinational logic pulse generator 319 simultaneously sends the level signal SPISTE and the third clock signal SPICLK to the voltage data register 313 and the current data register 314. The voltage data register 313 and the current data register 314 use the level signal SPISTE and the third clock signal SPICLK to convert the analog-to-digital converted data into analog-to-digital converted data. The clock signal SPICLK transmits the stored voltage data and current data to the power and electric energy calculation main control unit 307 respectively, so that the voltage data and the current data arrive at the power and electric energy calculation main control unit 307 at the same time. The SPI communication signal (SPISIMO_U, SPISTE, SPICLK) is used between the voltage data register 313 and the power and electric energy calculation main control unit 307, and the SPI communication signal (SPISIMO_I, SPISTE, SPICLK) is also used between the current data register 314 and the power and electric energy calculation main control unit 307. The frequency of the third clock signal SPICLK is 1 / 6 of the frequency of the high-frequency crystal oscillator.

[0059] The next pulse after the pulse A in the pulse wave signal SAM is issued after the voltage data and the current data are transmitted to the power and electric energy calculation main control unit 307 .

[0060] The high frequency crystal oscillator 305 uses an active wide temperature crystal oscillator with a frequency of 30 MHZ, the frequency of the first clock signal HF is 30 MHZ, the frequency of the second clock signal ADCK is 2 MHZ, the frequency of the third clock signal SPICLK is 5 MHZ, and the period of the pulse wave signal SAM is 160 μs.

[0061] A segment ADCK_U in the second clock signal ADCK sent to the main clock input terminal of the first analog-to-digital converter 303 contains 17 clocks, and a segment ADCK_I in the second clock signal ADCK sent to the main clock input terminal of the second analog-to-digital converter 304 also contains 17 clocks; a segment of the third clock signal SPICLK sent to the voltage data register 313 and the current data register 314 contains 16 clocks, and a segment of the level signal SPISTE sent to the voltage data register 313 and the current data register 314 is a low level signal.

[0062] The voltage signal sampling circuit 301 includes a voltage sensor and a voltage signal amplifier, the phase voltage signal v(t) enters the signal input terminal of the voltage sensor, the signal output terminal of the voltage sensor is connected to the signal input terminal of the voltage signal amplifier, and the signal output terminal of the voltage signal amplifier is connected to the signal input terminal of the first analog-to-digital converter 303; the current signal sampling circuit 302 includes a current sensor and a current signal amplifier, the phase current signal i(t) enters the signal input terminal of the current sensor, the signal output terminal of the current sensor is connected to the signal input terminal of the current signal amplifier, and the signal output terminal of the current signal amplifier is connected to the signal input terminal of the second analog-to-digital converter 304.

[0063] The voltage sensor uses a voltage divider resistor to pick up the external input phase voltage signal v(t), and the voltage signal amplifier amplifies the signal picked up by the voltage sensor; the current sensor uses a microcrystalline zero-flux double-core mutual inductor to pick up the external input phase current signal i(t), and the current signal amplifier amplifies the signal picked up by the current sensor.

[0064] The delay signal module 306 adopts a complex programmable logic device (CPLD chip).

[0065] The model of the complex programmable logic device is: EMP7256, the model of the first analog-to-digital converter 303 and the second analog-to-digital converter 304 is: AD677, and the model of the power and electric energy calculation main control unit 307 is: TMS320C28341.

[0066] The voltage data register 313 receives and registers the phase voltage digital signal output by the first analog-to-digital converter 303, and the current data register 314 receives and registers the phase current digital signal output by the second analog-to-digital converter 304; the combinational logic pulse generator 319 provides a start pulse and a counting clock for the first presettable subtractor 315 and the second presettable subtractor 316, provides a logic clock for the first combination pulse module 317 and the second combination pulse module 318, and also outputs a signal to control the data of the voltage data register 313 and the current data register 314 to be simultaneously output to the power and electric energy calculation main control unit 307; the first presettable subtractor 315 is used to store the delay amount data of the first analog-to-digital converter 303, and the second presettable subtractor 316 is used to store the delay amount data of the second analog-to-digital converter 304; the first combination pulse module 317 receives the first sampling single pulse SAM_U sent by the first presettable subtractor 315, and combines it with the second clock signal SAM_U output by the combinational logic pulse generator 319. The first analog-to-digital converter 303 generates and outputs all pulse signals (including sampling pulse SAM_U and conversion clock ADCK_U) used for delay by the first analog-to-digital converter 303; the second combined pulse module 318 receives the second sampling single pulse SAM_I sent by the second presettable subtractor 316, and combines it with the second clock signal ADCK output by the combinational logic pulse generator 319 to generate and output all pulse signals (including sampling pulse SAM_I and conversion clock ADCK_I) used for delay by the second analog-to-digital converter 304; the data sent by the power and electric energy calculation main control unit 307 to the delay data register 320 is 24-bit binary data, and the data sent by the delay data register 320 to the first presettable subtractor 315 and the second presettable subtractor 316 is 12-bit binary data; the power and electric energy calculation main control unit 307 receives the phase-corrected digital voltage synchronization signal and the digital current synchronization signal respectively, and calculates the active electric energy and the reactive electric energy.

[0067] The electric energy meter containing the electric energy meter phase correction circuit based on analog-to-digital conversion delay can be a single-phase electric energy meter or a multi-single-phase electric energy meter.

[0068] When the phase correction circuit of the electric energy meter is used in a single-phase standard electric energy meter, if the voltage signal needs to be delayed, the current conversion delay data sent to the delay data register 320 by the power and electric energy calculation main control unit 307 is set to zero, and the voltage conversion delay data is calculated according to the required delay time; if the current signal needs to be delayed, the voltage conversion delay data is set to zero, and the current conversion delay data is calculated according to the required delay time; if neither the voltage nor the current signal needs to be delayed, the voltage conversion delay data and the current conversion delay data can be set to zero.

[0069] The effective value of the phase voltage v(t) is V, and the initial phase is The effective value of the phase current i(t) is I, and the initial phase is Take the initial phase difference Active Power Since the nonlinear characteristics of the voltage signal sampling circuit 301 and the current signal sampling circuit 302 are different, the phase difference generated is α. Therefore, the phase difference of the voltage and current signals sampled by the sampling circuit is The input active power of the single-phase standard electric energy meter is Pa, and the active power after passing through the voltage signal sampling circuit 301 and the current signal sampling circuit 302 is Pa'. The active power error generated is E, E = [(Pa'-Pa) / Pa] 100%. Since electric energy is the integral of power over time, the power error is also the electric energy error. E is further calculated, but

[0070] According to the above, when E≥0, then Pa'≥Pa, that is Then α≤0, that is, the current signal leads the original voltage by an angle α 0 ; When E≤0, then Pa'≤Pa, that is Then α≥0, that is, the voltage signal leads the original current angle α 0 .

[0071] Calculate the relationship between time and phase angle: When the frequency of AC phase voltage and phase current signal is 50HZ, one cycle of AC signal is 0.02s, and the angle is 360 0 In order to correct the phase, the phase angle that needs to be delayed is α, and the corresponding delay time is ΔT (s), then ΔT = 0.02α / 360.

[0072] The frequency fi of the phase voltage signal v(t) and the phase current signal i(t) is 50 Hz, the sampling frequency fs of the first analog-to-digital converter 303 and the second analog-to-digital converter 304 is 6250 Hz, and the phase difference |α| generated by the voltage signal sampling circuit 301 and the current signal sampling circuit 302 is ≤1.2 0 (After actual measurement), taking into account redundancy, the maximum phase difference of the phase voltage signal v(t) and the phase current signal i(t) is 2.4 0 is the correction limit, i.e. the maximum delay time ΔT max=133.33μs, the 30MHz first clock signal HF generated by the high-frequency crystal oscillator 305 is selected, and the clock period is 33.33ns, then the delayed data amount =133.33μs / 33.33ns, rounded to 4000 high-frequency clock periods; the data sent by the delay data register 320 to the first presettable subtractor 315 and the second presettable subtractor 316 is 12-bit binary data, and the maximum data amount is 4096, which meets the requirement of the preset number 4000.

[0073] Based on the above, the results are as follows: Minimum delay ΔT min =33.33ns, that is, the minimum correction angle α min =0.0006 0 , 0.5L minimum electric energy correction error accuracy ΔE min = ±0.0018%; Maximum delay ΔT max =133.33μs, i.e. the maximum correction angle α max =2.4 0 , 0.5L maximum electric energy correction error accuracy ΔE max =±7.34%.

[0074] Minimum correction angle α min That is the phase correction accuracy, the minimum delay ΔT min That is the delay accuracy, 0.5L minimum power correction error accuracy ΔE min That is, the correction accuracy of the angle point error is 0.5L; the standard electric energy meter using the present invention fully complies with the requirements for the highest level 0.01 standard electric energy meter in JJG 1085-2013 "Verification Procedure for Standard Electric Energy Meters".

[0075] Three sets of phase correction circuits are required for three-phase standard watt-hour meters to perform phase correction. When setting the conversion delay data, the signal with the last phase is used as a reference to delay the other five signals with relatively advanced phase angles, so as to achieve simultaneous phase correction of the six signals (three-phase voltage and three-phase current).

[0076] When calibrating the three-phase voltage and three-phase current phase of a three-phase standard energy meter, an energy meter calibration device is required. The energy meter calibration device works in P3 mode and contains two calibration modes: β ab and β cb , the corresponding phase of the internal AC power output signal of the calibration device is v a (t)∠0 0 +i b (t)∠120 0 and v c (t)∠240 0 +i b (t)∠120 0 .

[0077] The steps for phase correction of three-phase standard electric energy meter are as follows:

[0078] The first step is to use the phase correction method of the single-phase standard watt-hour meter to independently perform phase correction on the three channels A, B, and C of the three-phase standard watt-hour meter to eliminate the phase difference between the voltage and current of each phase of the three-phase standard meter.

[0079] The second step is to use the P3 cross-phase unbalance mode to verify the phase deviation between the three phases, that is, the three-phase standard energy meter works in the P3 mode, and the energy meter verification device works in the three-phase phase verification mode β ab At this time, the input signal voltage of the standard electric energy meter and the electric energy meter calibration device is: v ab (t) = v a (t); current i b (t); voltage v b (t) = 0; voltage v c (t) = 0; current i a (t) = 0; current i c (t)=0.

[0080] In Beta ab Verification method, input signal power is P3 ab , P3 ab =V a I b cosω, where V a is the input voltage signal amplitude of phase A of the standard electric energy meter, I b is the amplitude of the B-phase input current signal, ω is the angle between the two phases of the input signal AB, and the initial angle is 120 0 . Voltage signal v a (t), current signal i b (t) After passing through the sampling circuit, the power P3' ab =V a I b cos(ω+β ab ), where β ab The phase difference between phase A and phase B still exists after the three-phase standard electric energy meter has been corrected for single phase.

[0081] β ab The error measured by the calibration device is E ab ,but

[0082] E ab =[(P3' ab -P3 ab ) / P3 ab ]100% (5)

[0083] That is Eab =cos(ω+β ab ) / cosω-1, from which we can conclude:

[0084] β ab =arcos[(E ab +1)cosω]–ω (6)

[0085] The delay time of one phase is ΔT ab ,but

[0086] ΔT ab =0.02β ab / 360 (7)

[0087] Delayed data volume = (0.02β ab / 360) / ΔT min

[0088] Known ΔT min =33.33ns, then

[0089] Delayed data volume = (0.02β ab / 360) / 0.00000003333 (8)

[0090] In formula (6), ω = 120 0 , or ω = -60 0 , there are three results, as follows:

[0091] When E ab ≥0, we get β ab ≥0, then the voltage and current of phase A must be delayed together, the delay time is calculated according to formula (7), and the amount of delayed data is calculated according to formula (8);

[0092] When E ab ≤0, we get β ab ≤0, then the voltage and current of phase B must be delayed together, the delay time is calculated according to formula (7), and the amount of delayed data is calculated according to formula (8);

[0093] When E ab = 0, the voltage and current phases of phases A and B do not need to be corrected again. The above completes the second step, and the phase deviation of all voltage and current circuits of phases A and B of the standard electric energy meter has been corrected.

[0094] The third step is to operate the three-phase standard energy meter in P3 mode, and the energy meter calibration device operates in the three-phase phase calibration mode β cb At this time, the input signal voltage of the standard electric energy meter and the electric energy meter calibration device is: v cb (t) = v c (t); current i b(t); voltage v a (t) = 0; voltage v b (t) = 0; current i a (t) = 0; current i c (t)=0.

[0095] As mentioned above, in β cb Calibration method, power P3 cb =V c I b cosω, where V c is the input voltage signal amplitude of phase C of the standard electric energy meter, I b is the amplitude of the B-phase input current signal, ω is the angle between the two phases of the input signal CB, and the initial angle is -120 0 . Voltage signal v c (t), current signal i b (t) After passing through the sampling circuit, the power P3' cb =V c I b cos(ω+β cb ), where β cb It is the phase difference between phase C and phase B of the three-phase standard electric energy meter.

[0096] β cb The error measured by the calibration device is E cb ,but

[0097] E cb =[(P3' cb -P3 cb ) / P3 cb ]100% (9)

[0098] That is E cb =cos(ω+β cb ) / cosω-1, from which we can conclude:

[0099] β cb =arcos[(E cb +1)cosω]–ω (10)

[0100] The delay time of one phase is ΔT cb

[0101] ΔT cb =0.02β cb / 360 (11)

[0102] Delayed data volume = (0.02β cb / 360) / ΔT min

[0103] Known ΔT min=33.33ns, then

[0104] Delayed data volume = (0.02β cb / 360) / 0.00000003333 (12)

[0105] In formula (10), ω = -120 0 , or ω=60 0 , there are three results, as follows:

[0106] When E cb ≥0, we get β ab ≤0, then the voltage and current of phase B and the voltage and current of phase A must be delayed together, the delay time is calculated according to formula (11), and the amount of delayed data is calculated according to formula (12);

[0107] When E cb ≤0, we get β cb ≥0, then the voltage and current of phase C must be delayed together, the delay time is calculated according to formula (11), and the amount of delayed data is calculated according to formula (12);

[0108] When E cb When =0, the voltage and current phases of BC phases do not need to be delayed for correction.

Claims

1. A phase correction circuit for an electric energy meter based on analog-to-digital conversion delay, comprising a voltage signal sampling circuit, a current signal sampling circuit and a power and electric energy calculation main control unit, characterized in that: It also contains a first analog-to-digital converter, a second analog-to-digital converter, a high-frequency crystal oscillator and a delay signal module, wherein the delay signal module contains a combination logic pulse generator, a first preset subtractor, a first combination pulse module, a second preset subtractor, a second combination pulse module, a delay data register, a voltage data register and a current data register; The voltage signal sampling circuit receives the phase voltage signal and transmits it to the first analog-to-digital converter, and the first analog-to-digital converter converts the analog voltage signal into digital voltage data; the current signal sampling circuit receives the phase current signal and transmits it to the second analog-to-digital converter, and the second analog-to-digital converter converts the analog current signal into digital current data; The power and electric energy calculation main control unit sends voltage conversion delay data and current conversion delay data to the delay data register, and the delay data register then transmits the received voltage conversion delay data and current conversion delay data to the first presettable subtractor and the second presettable subtractor respectively; The signal of the high-frequency crystal oscillator is transmitted to the combinational logic pulse generator, which generates a pulse wave signal and sends the pulse wave signal to the first presettable subtractor and the second presettable subtractor at the same time. The combinational logic pulse generator also generates a first clock signal with the same frequency as the high-frequency crystal oscillator and sends the first clock signal to the first presettable subtractor and the second presettable subtractor at the same time. The combinational logic pulse generator generates a second clock signal with a frequency of 1 / N of the high-frequency crystal oscillator frequency and sends the second clock signal to the first combination pulse module and the second combination pulse module at the same time, where N is a natural number greater than or equal to 15 and less than or equal to 30; When the first presettable subtractor receives any pulse A in the pulse wave signal, it immediately performs a subtraction operation with the voltage conversion delay data as the initial preset value and the first clock signal as the counting clock, stops the subtraction operation when it is subtracted to zero, and sends a first sampling single pulse to the first combination pulse module. After receiving the first sampling single pulse, the first combination pulse module sends the first sampling single pulse to the sampling control end of the first analog-to-digital converter. At the same time, the first combination pulse module intercepts a section of the second clock signal and sends it to the main clock input end of the first analog-to-digital converter. After receiving the first sampling single pulse sent by the first combination pulse module, the first analog-to-digital converter immediately starts analog-to-digital conversion and transmits the converted voltage data to the voltage data register. When the second presettable subtractor receives pulse A, it immediately uses the current conversion delay data as the initial preset value and the first clock signal as the counting clock to perform a subtraction operation, stops the subtraction operation when the value is reduced to zero, and sends a second sampling single pulse to the second combination pulse module. After receiving the second sampling single pulse, the second combination pulse module sends the second sampling single pulse to the sampling control end of the second analog-to-digital converter. At the same time, the second combination pulse module intercepts a section of the second clock signal and sends it to the main clock input end of the second analog-to-digital converter. After receiving the second sampling single pulse sent by the second combination pulse module, the second analog-to-digital converter immediately starts analog-to-digital conversion and transmits the converted current data to the current data register. After the voltage data register and the current data register both receive the analog-to-digital converted data, the combinational logic pulse generator simultaneously generates a level signal and a third clock signal, and the duration of the level signal and the third clock signal is the same. The combinational logic pulse generator simultaneously sends the level signal and the third clock signal to the voltage data register and the current data register, and the voltage data register and the current data register use the level signal and the third clock signal to transmit the stored voltage data and current data to the power and electric energy calculation main control unit respectively; the frequency of the third clock signal is 1 / M of the high-frequency crystal oscillator frequency, and M is a natural number greater than or equal to 3 and less than or equal to 10; The next pulse after pulse A in the pulse wave signal is sent after both the voltage data and the current data are transmitted to the power and energy calculation main control unit.

2. The electric energy meter phase correction circuit based on analog-to-digital conversion delay according to claim 1 is characterized in that: The frequency of the high frequency crystal oscillator is 30 MHZ, N is 15, and M is 6.

3. The electric energy meter phase correction circuit based on analog-to-digital conversion delay according to claim 1 is characterized in that: A segment of the second clock signal sent to the main clock input terminal of the first analog-to-digital converter contains 17 clocks, and a segment of the second clock signal sent to the main clock input terminal of the second analog-to-digital converter also contains 17 clocks; a segment of the third clock signal sent to the voltage data register and the current data register contains 16 clocks, and a segment of the level signal sent to the voltage data register and the current data register is a low-level signal.

4. The electric energy meter phase correction circuit based on analog-to-digital conversion delay according to claim 1 is characterized in that: The voltage signal sampling circuit contains a voltage sensor and a voltage signal amplifier, the phase voltage signal enters the signal input end of the voltage sensor, the signal output end of the voltage sensor is connected to the signal input end of the voltage signal amplifier, and the signal output end of the voltage signal amplifier is connected to the signal input end of the first analog-to-digital converter; the current signal sampling circuit contains a current sensor and a current signal amplifier, the phase current signal enters the signal input end of the current sensor, the signal output end of the current sensor is connected to the signal input end of the current signal amplifier, and the signal output end of the current signal amplifier is connected to the signal input end of the second analog-to-digital converter.

5. The phase correction circuit of the electric energy meter based on analog-to-digital conversion delay according to claim 4 is characterized in that The characteristics are: the voltage sensor adopts a voltage dividing resistor or a voltage transformer; the current sensor adopts a manganese copper sheet, a current transformer, a Rogowski coil or a Hall effect sensor.

6. The electric energy meter phase correction circuit based on analog-to-digital conversion delay according to claim 1 is characterized in that: The delay signal module is implemented by using complex programmable logic devices or field programmable gate arrays or discrete logic chips.

7. The electric energy meter phase correction circuit based on analog-to-digital conversion delay according to claim 6 is characterized in that: The model of the complex programmable logic device is: EMP7256, the model of the field programmable gate array is: CYCLONE II LE33216, the model of the first analog-to-digital converter and the second analog-to-digital converter is: AD677, and the model of the power and electric energy calculation main control unit is: TMS320C28341.

8. An electric energy meter comprising the electric energy meter phase correction circuit based on analog-to-digital conversion delay according to any one of claims 1 to 7, wherein the electric energy meter is a single-phase electric energy meter or a multi-single-phase electric energy meter.