A detection and reinforcement circuit and method for total dose effect and an analog circuit

Abstract

The present invention discloses a detection and reinforcement circuit and method for total dose effect and an analog circuit, including a total dose effect detection circuit and a compensation current generation circuit; the total dose effect detection circuit includes a resistor R and an MOS transistor Mn, and the compensation current generation circuit includes an MOS transistor Mp. The first end of the resistor R is connected to the gate of the MOS transistor Mp, and the source of the MOS transistor Mp is the output end of the compensation current generation circuit; a current source is connected between the first end of the resistor R and the drain of the MOS transistor Mp; the second end of the resistor R is connected to the drain and gate of the MOS transistor MN, the source of the MOS transistor Mn is grounded, and the source of the MOS transistor Mn is the input end of the total dose effect detection circuit. A circuit capable of continuously detecting the total dose effect can be realized, and corresponding compensation current can be directly generated according to the change of the irradiation dose size, so as to achieve the purpose of directly carrying out reinforcement while detecting.

Description

Technical Field

[0001] The present invention belongs to the field of radiation hardening, and relates to a detection and hardening circuit and method for total dose effect and an analog circuit. Background Art

[0002] In recent years, space technologies such as aerospace have developed rapidly. In such a space radiation environment, various radiation effects will occur in electronic devices and circuit systems, which will cause device performance degradation or even complete functional failure, resulting in huge losses. Among them, the total dose effect caused by irradiation will introduce additional electron-hole pairs in the gate oxide layer and field oxide layer of MOS transistors. Since the electron mobility is much higher than that of holes, the electrons generated by radiation in the gate oxide layer are swept out, while the holes are trapped due to their low mobility and become oxide trap charges. The accumulated charges will affect the threshold voltage of the MOS transistor. At the same time, the accumulated charges in the field oxide layer will introduce a leakage path, resulting in additional leakage current in the MOS transistor.

[0003] With the development of deep sub-micron technology, the feature size of MOS devices continues to shrink, and the thickness of the gate oxide layer also continues to shrink. Therefore, the influence of the total dose effect on the threshold voltage of MOS transistors becomes smaller. At the same time, the thickness of the field oxide layer changes significantly with the reduction of the feature size, so the leakage current of the MOS transistor still exists when receiving the total dose effect. Therefore, under the deep sub-micron technology, the influence of the leakage current is mainly studied.

[0004] In the current total dose effect hardening solutions, most of them are hardened from the perspectives of the structure, process, and layout routing of MOS devices. For example, STI isolation hardening, annular gate structure hardening, etc. are complex in operation and lack flexibility. The hardening effects of traditional layout-level or process-level hardening solutions cannot provide a good reliability assessment in the initial circuit-level design. There is an urgent need to introduce a hardening solution at the circuit level to evaluate the radiation resistance of the circuit. Summary of the Invention

[0005] The purpose of the present invention is to overcome the above-mentioned disadvantages of the prior art, and provide a detection and hardening circuit and method for total dose effect and an analog circuit, which can realize a circuit for continuously detecting the total dose effect, and can directly generate a corresponding compensation current according to the change of the irradiation dose, so as to achieve the purpose of directly performing hardening while detecting.

[0006] To achieve the above purpose, the present invention adopts the following technical solutions:

[0007] A detection and hardening circuit for total dose effect includes a total dose effect detection circuit and a compensation current generation circuit;

[0008] The total dose effect detection circuit includes a resistor R and an MOS transistor Mn, and the compensation current generation circuit includes an MOS transistor Mp. The first end of the resistor R is connected to the gate of the MOS transistor Mp, and the source of the MOS transistor Mp is the output end of the compensation current generation circuit; a current source is connected to the first end of the resistor R and the drain of the MOS transistor Mp; the second end of the resistor R is connected to the drain and the gate of the MOS transistor MN, the source of the MOS transistor Mn is grounded, and the source of the MOS transistor Mn is the input end of the total dose effect detection circuit.

[0009] Preferably, the MOS transistor Mn is an NMOS transistor.

[0010] Preferably, the MOS transistor Mp is a PMOS transistor.

[0011] A working method of a detection and reinforcement circuit based on the total dose effect described in any one of the above, when there is no total dose effect, there is no leakage current in the MOS transistor Mn, and the resistor R controls the detection voltage V M to make the MOS transistor Mp in the off state; when the total dose effect occurs, a leakage current appears in the MOS transistor Mn, its gate-source voltage decreases, the detection voltage decreases, and the MOS transistor Mp turns on to output a compensation current.

[0012] Preferably, the magnitude of the detection voltage V M is:

[0013] V M = V GSn + I REF ·R;

[0014] V GSn is the gate-source voltage, I REF R is the voltage drop across the resistor R.

[0015] An analog circuit includes an analog circuit body and the detection and reinforcement circuit for the total dose effect described in any one of the above;

[0016] The source of the MOS transistor Mn in the detection and reinforcement circuit for the total dose effect is connected to the component for biasing current in the analog circuit body, and the first end of the resistor R in the detection and reinforcement circuit for the total dose effect and the analog circuit body are commonly connected to a current source.

[0017] Preferably, the component for biasing current in the analog circuit body is an MOS transistor.

[0018] Furthermore, the MOS transistor for biasing current in the analog circuit body has the same size as the MOS transistor Mn.

[0019] Compared with the prior art, the present invention has the following beneficial effects:

[0020] The total dose effect hardening circuit based on parallel detection and hardening of the present invention can perform continuous detection according to the change of irradiation dose, and at the same time compensate the circuit to be hardened to offset the influence of the total dose effect, so as to achieve the purpose of hardening the total dose effect of the circuit to be hardened; the present invention also has the characteristics of continuous detection, good accuracy, parallel detection and hardening, and wide applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of the detection and hardening circuit for the total dose effect of the present invention;

[0022] Figure 2 It is a schematic diagram of the connection of the five-transistor operational amplifier detection and hardening circuit of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments; based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0024] It should be noted that the terms "front", "rear", "left", "right", "up" and "down" used in the following description refer to the directions in the drawings, and the terms "inner" and "outer" respectively refer to the directions towards or away from the geometric center of a specific component.

[0025] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present invention belongs. The terms used in the description of the present invention herein are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0026] As Figure 1 shown, it is the detection and hardening circuit for the total dose effect of the present invention, including a total dose effect detection circuit and a compensation current generation circuit.

[0027] The total dose effect detection circuit includes a resistor R and an MOS transistor Mn, and the compensation current generation circuit includes an MOS transistor Mp. The first end of the resistor R is connected to the gate of the MOS transistor Mp, and the source of the MOS transistor Mp is the output end of the compensation current generation circuit; a current source is connected to the first end of the resistor R and the drain of the MOS transistor Mp; the second end of the resistor R is connected to the drain and gate of the MOS transistor MN, the source of the MOS transistor Mn is grounded, and the source of the MOS transistor Mn is the input end of the total dose effect detection circuit.

[0028] The MOS transistor Mn is an NMOS transistor. The MOS transistor Mp is a PMOS transistor.

[0029] When the circuit operates in an irradiated environment, the NMOS transistor Mn in the total dose effect detection circuit generates a leakage current, and as the dose value increases, its leakage current gradually increases correspondingly. At this time, by detecting the voltage magnitude of V M , subtracting the voltage drop across the resistor, and then calculating the V GS of the Mn transistor, using the saturation region current formula, calculating the conduction current passing through the Mn transistor, comparing it with I REF , subtracting the two can obtain the magnitude of the leakage current. When the size is determined, the leakage current of the Mn transistor corresponds to the irradiated dose value. By modifying the width-to-length ratio of the Mn transistor, the total dose effect detection function of transistors with different sizes can be achieved. As the leakage current increases, the conduction current of the Mn transistor gradually decreases, then its V GS decreases, and the final detection voltage V M decreases correspondingly. This method realizes a continuous detection process.

[0030] The transistor for compensating current is controlled by the output voltage V M . When the leakage current gradually increases, the detection voltage V M gradually decreases. At this time, controlling the PMOS transistor Mp for compensating current, its conduction current gradually increases, and compensates the leakage current for the module circuit that needs to be compensated. The role of the resistor R here is to control the off state of the transistor for compensating current when there is no leakage current, and the magnitude of the compensating current can be controlled by modifying the width-to-length ratio of the transistor.

[0031] The above-mentioned detection and hardening circuit for the total dose effect can be applied to the total dose hardening of analog circuits. The source of the MOS transistor Mn in the detection and hardening circuit for the total dose effect is connected to the component for biasing current in the analog circuit body. The first end of the resistor R in the detection and hardening circuit for the total dose effect and the analog circuit body are commonly connected to a current source.

[0032] The component for biasing current in the analog circuit body uses a MOS transistor. The MOS transistor for biasing current in the analog circuit body has the same size as the MOS transistor Mn.

[0033] As Figure 2 shown, in this embodiment, an operational amplifier is used as an example of the analog circuit. The input pair transistors and the MOS transistors in the bias current branch of it are all affected by the total dose effect, generating a leakage current between the source and drain, affecting their working states. At this time, the detection and hardening circuit designed by the present invention is used to perform a hardening design on the circuit. The specific process is as follows:

[0034] First, samples of the total dose effect are taken for the bias tube M1. The size of the detection tube Mn is changed to be the same as that of M1, and the detection voltage V M is the gate-source voltage V GSn of Mn plus the voltage drop across the resistor R, that is:

[0035] V M = V GSn + I REF ·R.

[0036] When the total dose effect does not occur, the magnitude of the gate-source voltage of the detection tube Mn is a fixed value. At this time, by modifying the size of the resistor R, the magnitude of the voltage V M is controlled, so that the compensation current tube Mp it controls is in the off state. When the total dose effect occurs, there is a leakage current between the source and drain of the detection tube Mn. At this time, its conduction current decreases, and the gate-source voltage V GSn correspondingly decreases. At this time, the degree of the total dose effect suffered by the circuit is obtained by detecting the change in the voltage V M , that is, the magnitude of the dose value; at the same time, the change in V M controls the compensation tube Mp, thereby compensating for the leakage current existing in the circuit; the greater the existing leakage current, the more the voltage of V M decreases, and the compensation current tube Mp provides more compensation current correspondingly.

[0037] When applying the present invention to irradiate and strengthen the circuit, corresponding adjustments can be made according to the specific requirements of the circuit: the detection tube can be modified according to the specific circuit, and the magnitude of the compensation current can also be controlled by changing the size of the tube according to the actual situation.

[0038] The present invention can compensate the current of the radiation-sensitive NMOS tube branch in the circuit at different irradiation doses to offset the leakage current generated by the total dose effect, and finally achieve the purpose of total dose effect strengthening. In addition, the present invention also has the characteristics of continuous detection, parallel detection and strengthening, and universality.

[0039] From the perspective of the circuit, the present invention outputs corresponding compensation currents for different irradiation doses to strengthen the circuit. Compared with the traditional scheme of strengthening from the perspectives of device structure, process, and layout wiring of the layout, it has higher flexibility and wider applicability.

[0040] It should be noted that, in this document, relational terms such as first and second are used solely to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or apparatus that comprises a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or apparatus.

[0041] It should be understood that the above description is for illustrative purposes and not for limitation. Many embodiments and many applications other than the examples provided will be apparent to those skilled in the art upon reading the above description. Therefore, the scope of the present teachings should not be determined with reference to the above description, but should be determined with reference to the full scope of the foregoing claims and the equivalents of those claims. For the sake of completeness, all articles and references, including patent applications and publications, are incorporated herein by reference. The omission of any aspect of the subject matter disclosed herein in the foregoing claims is not intended to waive that subject matter, nor should it be considered that the applicant has not considered that subject matter to be part of the disclosed inventive subject matter.

Claims

1. A working method of a detection and reinforcement circuit for total dose effect, characterized in that, the circuit includes a total dose effect detection circuit and a compensation current generation circuit; The total dose effect detection circuit includes a resistor R and an MOS transistor Mn, and the compensation current generation circuit includes an MOS transistor Mp. The first end of the resistor R is connected to the gate of the MOS transistor Mp, and the source of the MOS transistor Mp is the output end of the compensation current generation circuit; the first end of the resistor R is connected to the output end of the current source I REF , and the input end of the current source I REF is connected to V DD . The drain of the MOS transistor Mp is connected to V DD ; the second end of the resistor R is connected to the drain and gate of the MOS transistor Mn, and the source of the MOS transistor Mn is grounded; The working method includes: when there is no total dose effect, there is no leakage current in the MOS transistor Mn, and the gate-source voltage of the detection transistor Mn is a fixed value. At this time, by modifying the size of the resistor R, the voltage of V M is controlled to make the compensation current transistor Mp it controls in the off state; when the total dose effect occurs, a leakage current appears in the MOS transistor Mn, and its gate-source voltage decreases. At this time, by detecting the change of the voltage V M , the degree of the total dose effect suffered by the circuit currently, that is, the size of the dose value, is obtained; at the same time, the change of V M controls the compensation transistor Mp, thereby compensating for the leakage current existing in the circuit; when the detected voltage V M decreases, the MOS transistor Mp turns on and outputs a compensation current; The detected voltage V M has a magnitude of: ； V GSn is the gate-source voltage of MOS transistor Mn, and I REF ·R is the voltage drop across resistor R.

2. The working method of the detection and reinforcement circuit for total dose effect according to claim 1, characterized in that, the MOS transistor Mn is an NMOS transistor.

3. The working method of the detection and reinforcement circuit for total dose effect according to claim 1, characterized in that, the MOS transistor Mp is a PMOS transistor.

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