PWM control chip radiation hardening method and related device

Abstract

The invention provides a PWM control chip radiation hardening method and a related device, and the method comprises the steps: determining a transmission path of a reference module and an oscillator module of a PWM control chip, carrying out the transient filtering of the transmission path, and obtaining a filtered bias signal; determining a first reference voltage of a reference module of the PWM control chip and a second reference voltage of a pre-step-down module, and judging the first reference voltage and the second reference voltage based on a third reference voltage of an over-temperature protection module to obtain an enable signal after over-temperature protection; monitoring a power path of the PWM control chip to obtain an anti-latch protection signal; and reinforcing the PWM control chip based on the filtered bias signal, the enable signal after over-temperature protection and the anti-latch protection signal to obtain a reinforced PWM control chip. According to the method, the single event effect can be reinforced in multiple dimensions, and the reinforcing effect is remarkably improved, so that the use requirements of most tasks can be met.

Description

Technical Field

[0001] This disclosure relates to the field of component reliability technology, and in particular to a radiation hardening method and related apparatus for PWM control chips. Background Technology

[0002] This section is intended to provide background or context for the embodiments of this disclosure as set forth in the claims. The description herein is not intended to be a prior art simply because it is included in this section.

[0003] PWM (Pulse Width Modulation) control chips are widely used in high-power isolated power supplies in aerospace systems. However, traditional PWM control chips are susceptible to ionizing radiation, which could cause the spacecraft's power supply system to fail, leading to catastrophic consequences. Therefore, a radiation-resistant PWM controller hardening method needs to be designed to meet the requirements of spacecraft.

[0004] However, the relevant technologies suffer from problems such as limited radiation hardening techniques and insignificant hardening effects, which in turn fail to meet the requirements of most missions. Summary of the Invention

[0005] In view of this, the purpose of this disclosure is to propose a radiation hardening method and related device for PWM control chips, which at least to some extent solves one of the technical problems in the related art.

[0006] To achieve the above objectives, the first aspect of this exemplary embodiment provides a radiation hardening method for a PWM control chip, the method comprising: The transmission path between the reference module and the oscillator module of the PWM control chip is determined, and transient filtering is performed on the transmission path to obtain the filtered bias signal. The first reference voltage of the reference module and the second reference voltage of the pre-stepping module of the PWM control chip are determined. The first reference voltage and the second reference voltage are judged based on the third reference voltage of the over-temperature protection module to obtain the enable signal after over-temperature protection. The power path of the PWM control chip is monitored to obtain the latch-up protection signal; The PWM control chip is hardened based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal to obtain a hardened PWM control chip.

[0007] Based on the same inventive concept, a second aspect of the exemplary embodiments of this disclosure provides a radiation hardening device for a PWM control chip, comprising: The bias signal determination module is configured to determine the transmission path between the reference module and the oscillator module of the PWM control chip, and to perform transient filtering on the transmission path to obtain the filtered bias signal. The enable signal determination module is configured to determine the first reference voltage of the reference module and the second reference voltage of the pre-stepping module of the PWM control chip, and to judge the first reference voltage and the second reference voltage based on the third reference voltage of the over-temperature protection module to obtain the enable signal after over-temperature protection. The protection signal determination module is configured to monitor the power path of the PWM control chip to obtain an anti-latch-up protection signal; The control chip hardening module is configured to harden the PWM control chip based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal, to obtain a hardened PWM control chip.

[0008] Based on the same inventive concept, a third aspect of the exemplary embodiments of this disclosure provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method as described in the first aspect.

[0009] Based on the same inventive concept, a fourth aspect of the exemplary embodiments of this disclosure provides a non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform the method as described in the first aspect.

[0010] Based on the same inventive concept, a fifth aspect of the exemplary embodiments of this disclosure provides a computer program product including computer program instructions that, when run on a computer, cause the computer to perform the method as described in the first aspect.

[0011] As can be seen from the above description, the radiation hardening method and related apparatus for PWM control chips provided in this disclosure include: The transmission path between the reference module and the oscillator module of the PWM control chip is determined, and transient filtering is applied to the transmission path to obtain a filtered bias signal. The first reference voltage of the reference module and the second reference voltage of the pre-stepping module of the PWM control chip are determined. Based on the third reference voltage of the over-temperature protection module, the first and second reference voltages are judged to obtain an over-temperature protection enable signal. The power path of the PWM control chip is monitored to obtain an anti-latch-up protection signal. Based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal, the PWM control chip is hardened to obtain a hardened PWM control chip. This disclosure can harden single-event effects from multiple dimensions, and the hardening effect is significantly improved, thus meeting the requirements of most tasks. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in this disclosure or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 A schematic diagram of an application scenario for a radiation hardening method for a PWM control chip provided as an exemplary embodiment of this disclosure; Figure 2 A schematic flowchart of a radiation hardening method for a PWM control chip provided as an exemplary embodiment of the present disclosure; Figure 3 A schematic diagram of a transient filtering technology circuit for a radiation hardening method for a PWM control chip provided as an exemplary embodiment of this disclosure; Figure 4 A schematic diagram of an over-temperature protection module hardening method for a PWM control chip radiation hardening method provided in an exemplary embodiment of this disclosure; Figure 5 A simulation comparison diagram of a single-event functional interruption (SED) hardening method for a PWM control chip provided as an exemplary embodiment of this disclosure; Figure 6 A schematic diagram of a single-event latch-up current limiting protection circuit for a radiation hardening method for a PWM control chip provided in an exemplary embodiment of this disclosure; Figure 7 A simulation diagram of overcurrent protection for a radiation hardening method for a PWM control chip provided as an exemplary embodiment of this disclosure; Figure 8 A schematic diagram of a radiation hardening device for a PWM control chip provided as an exemplary embodiment of the present disclosure; Figure 9 A schematic diagram of the hardware structure of an electronic device provided for an exemplary embodiment of this disclosure. Detailed Implementation

[0014] It is understood that before using the technical solutions disclosed in the various embodiments of this application, users should be informed of the types, scope of use, and usage scenarios of the personal information involved in this application in an appropriate manner in accordance with relevant laws and regulations, and user authorization should be obtained.

[0015] For example, upon receiving a user's active request, a prompt message is sent to the user to explicitly inform them that the requested operation will require the acquisition and use of the user's personal information. This allows the user to independently choose whether to provide personal information to the software or hardware, such as the electronic device, application, server, or storage medium performing the operations of this application's technical solution, based on the prompt message.

[0016] As an optional but non-limiting implementation, in response to a user's active request, sending a prompt message to the user can be done via a pop-up window, where the prompt message can be presented in text format. Furthermore, the pop-up window can also include a selection control allowing the user to choose whether to "agree" or "disagree" to provide personal information to the electronic device.

[0017] It is understood that the above notification and user authorization process is merely illustrative and does not limit the implementation of this application. Other methods that comply with relevant laws and regulations may also be applied to the implementation of this application.

[0018] It is understood that the data involved in this technical solution (including but not limited to the data itself, the acquisition or use of the data) shall comply with the requirements of relevant laws, regulations and related provisions.

[0019] To make the objectives, technical solutions, and advantages of this disclosure clearer, the principles and spirit of this disclosure will be described below with reference to several exemplary embodiments. It should be understood that these embodiments are provided merely to enable those skilled in the art to better understand and implement this disclosure, and are not intended to limit the scope of this disclosure in any way. Rather, these embodiments are provided to make this disclosure more thorough and complete, and to fully convey the scope of this disclosure to those skilled in the art.

[0020] In this article, it is important to understand that any number of elements in the accompanying figures is for illustrative purposes and not for limitation, and any naming is for distinction only and has no limiting meaning.

[0021] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this disclosure should have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," and similar words used in the embodiments of this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly. The article "a" or "an" preceding an element does not exclude the existence of multiple such elements.

[0022] The principles and spirit of this disclosure will be explained in detail below with reference to several representative embodiments.

[0023] As described in the background section, existing radiation hardening technologies suffer from limitations such as reliance on single techniques and insignificant hardening effects, ultimately failing to meet the requirements of most applications. Specifically, current radiation hardening techniques are limited, primarily relying on physical isolation methods such as thickening the substrate or casing. This approach fails to effectively suppress the transmission and impact of single-event effects on critical modules within the chip (such as reference voltage modules and oscillator modules) at the circuit mechanism level. This results in insufficient targeting and depth of hardening, and an inability to fundamentally prevent failures caused by ionizing radiation, such as internal transient voltage disturbances and malfunctions.

[0024] Traditional hardening methods, while improving the radiation resistance of chips, also present challenges to the integration and lightweight design of equipment. Simple physical hardening increases the size and weight of the chip, making it difficult to meet the stringent requirements of modern aerospace systems for high power density and compact layout of power modules. Furthermore, this method cannot provide comprehensive protection against various effects such as single-event transients, single-event interruptions, and single-event gates, resulting in a still relatively high probability of chip failure in radiation environments, failing to meet the requirements of most high-reliability aerospace missions.

[0025] Specifically, in heavy ion radiation experiments, PWM control chips using traditional hardening techniques exhibit a single-event transient rate as high as 1E-2, with a 100% probability of single-event functional interruption and single-event gate lockout. This clearly demonstrates that a single physical hardening scheme cannot effectively address the complex radiation-sensitive nodes and paths within the chip, leading to a high risk of functional failure during on-orbit operation and making it difficult to ensure the long-term stable and reliable operation of the spacecraft's power supply system.

[0026] To address the aforementioned issues, this disclosure provides a radiation hardening method and related apparatus for PWM control chips. The method includes: The transmission path between the reference module and the oscillator module of the PWM control chip is determined, and transient filtering is applied to the transmission path to obtain a filtered bias signal. The first reference voltage of the reference module and the second reference voltage of the pre-stepping module of the PWM control chip are determined. Based on the third reference voltage of the over-temperature protection module, the first and second reference voltages are judged to obtain an over-temperature protection enable signal. The power path of the PWM control chip is monitored to obtain an anti-latch-up protection signal. Based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal, the PWM control chip is hardened to obtain a hardened PWM control chip. This disclosure employs a coupling of multiple radiation-resistant hardening technologies to provide comprehensive hardening from different angles against different single-event effects, avoiding reliability issues caused by system failure due to a single failure. The hardening effect is verified through experimental simulation methods to ensure the feasibility of the hardening technology.

[0027] After introducing the basic principles of this disclosure, various non-limiting embodiments of this disclosure will be described in detail below.

[0028] refer to Figure 1 This is a schematic diagram of an application scenario of the radiation hardening method for PWM control chips provided in the exemplary embodiments of this disclosure.

[0029] This application scenario includes a terminal device 101 and a server 102. The terminal device 101 and the server 102 can be connected via a wired or wireless communication network to achieve data interaction.

[0030] Terminal device 101 may be an electronic device located close to the user side, possessing data transmission and multimedia input / output functions, including but not limited to desktop computers, mobile phones, portable computers, tablet computers, media players, smart wearable devices, personal digital assistants (PDAs), or other electronic devices capable of performing the aforementioned functions. This electronic device may include a processor and a display screen with touch input functionality. The display screen is used to present a graphical user interface (GUI), which can display an application interface. The processor is used to process application data, generate the GUI, and control the display of the GUI on the screen.

[0031] Server 102 can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms.

[0032] In some exemplary embodiments, the radiation hardening method for the PWM control chip can be implemented on terminal device 101 or server 102.

[0033] When the PWM control chip radiation hardening method is running on server 102, server 102 is used to provide PWM control chip radiation hardening services to users of terminal device 101.

[0034] Server 102 determines the transmission path between the reference module and the oscillator module of the PWM control chip, and performs transient filtering on the transmission path to obtain the filtered bias signal. Server 102 determines the first reference voltage of the reference module and the second reference voltage of the pre-buck module of the PWM control chip. Server 102 judges the first reference voltage and the second reference voltage based on the third reference voltage of the over-temperature protection module to obtain the enable signal after over-temperature protection. Server 102 monitors the power path of the PWM control chip and obtains an anti-latch-up protection signal; Server 102 transmits the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal to terminal device 101; terminal device 101 strengthens the PWM control chip based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal to obtain a strengthened PWM control chip.

[0035] It should be noted that the above application scenarios are shown only to facilitate understanding of the spirit and principles of this disclosure, and the implementation of this disclosure is not limited in any way. On the contrary, the implementation of this disclosure can be applied to any applicable scenario.

[0036] refer to Figure 2 A radiation hardening method for PWM control chips, the method comprising the following steps: Step S210: Determine the transmission path between the reference module and the oscillator module of the PWM control chip, and perform transient filtering on the transmission path to obtain the filtered bias signal.

[0037] In practical implementation, the reference module refers to a key circuit unit inside the PWM control chip. Its core function is to generate a high-precision and high-stability reference voltage signal (such as VREF) to provide a stable voltage reference for multiple functional modules inside the chip, such as the oscillator, error amplifier, and protection circuit. It is the voltage reference source for the normal operation of the entire chip.

[0038] In practical implementation, the oscillator module refers to the core timing generation unit of the PWM control chip. Its function is to generate a clock signal with a fixed frequency and duty cycle to precisely control the turn-on and turn-off timing of the power switching transistors in the power supply circuit. The normal operation of this module depends on the stable bias voltage provided by the reference module. When its input bias signal is subjected to a single-event transient disturbance, it will cause abnormalities in the frequency and duty cycle of the output clock, thereby affecting the stable operation of the entire power supply system.

[0039] In practice, the filtered bias signal refers to the OSC_BIAS signal obtained after the original bias voltage generated by the reference module is processed by a capacitor multiplier filter circuit. This signal absorbs and attenuates voltage spikes and noise introduced by single-event transients, providing a highly stable and pure bias voltage for the oscillator module. This ensures that the frequency and duty cycle of the oscillator output will not become abnormal due to radiated disturbances, effectively blocking the propagation path of single-event transients from the reference module to the oscillator module.

[0040] In practical implementation, the transmission path between the reference module and the oscillator module of the PWM control chip is determined, and transient filtering is performed on the transmission path to obtain the filtered bias signal. By deeply analyzing the transmission mechanism of single-event transients within the chip, the sensitive path was identified as the bias signal link from the reference module to the oscillator module. Based on this, a transient filter structure was constructed along this critical path using capacitance multiplication technology to convert the voltage-divided signal generated by the reference module into a filtered OSC_BIAS signal. For details, refer to [reference needed]. Figure 3 This circuit is located on the bias path from the reference module to the oscillator module. It filters the reference signal through a filter network containing resistors 20R and R, generating a more stable OSC_BIAS signal that is sent to the oscillator, thereby effectively suppressing the transmission of single-event transients on this critical path.

[0041] This step focuses on the transmission mechanism of single-event transients (SETs) in key circuit modules (such as oscillators and drive modules) of power chips. These SETs are generated by high-energy particles striking sensitive areas in integrated circuits, causing transient voltage changes at circuit nodes. Taking a PWM control chip as an example, the sensitive area for SETs is concentrated in the reference module and then transmitted to the oscillator module, causing abnormalities in the oscillator output frequency and duty cycle. Based on the above exemplary embodiments, the transmission of SETs from the reference module to the oscillator module can be effectively suppressed. Simulation results show that when the REF is disturbed, the oscillator frequency remains constant at 210 kHz, while the duty cycle changes from 82.9% to 82%. Due to the self-regulation capability of the closed-loop system, small duty cycle changes do not affect the output of the closed-loop system and are therefore acceptable. After hardening, the chip's resistance to SETs is significantly improved; under heavy ion experiments, the transient occurrence rate is reduced from 1E-2 to 1E-5.

[0042] Step S220: Determine the first reference voltage of the reference module and the second reference voltage of the pre-stepping module of the PWM control chip, and judge the first reference voltage and the second reference voltage based on the third reference voltage of the over-temperature protection module to obtain the enable signal after over-temperature protection.

[0043] In practical implementation, the pre-step-down module refers to a front-end power management unit of the PWM control chip. Its function is to pre-reduce and stabilize the higher power supply voltage input from the outside of the chip, so as to provide a clean and stable low-voltage operating power supply for the core parts such as the reference module and logic circuit inside the chip.

[0044] In practice, the first reference voltage refers to a core precision reference voltage (VREF) generated by the internal reference module of the chip. It provides a unified voltage reference for multiple functional modules such as the oscillator, error amplifier, and protection circuit inside the chip, and its stability directly determines the normal operation of various functions of the chip.

[0045] In practice, the second reference voltage refers to an internal working voltage output by the pre-stepping module after preliminary voltage regulation. This voltage provides working power for core circuits such as the reference module. If it is disturbed due to the single event effect, it will directly interfere with the stability of the first reference voltage, which may lead to the failure of the chain function of subsequent circuits.

[0046] In practice, the third reference voltage refers to a set of voltage threshold references used inside the over-temperature protection module to determine whether the chip is in an abnormal working state.

[0047] In practice, the enable signal after over-temperature protection refers to the final output signal of the over-temperature protection module after being judged by the hardened logic, which is used to control whether the chip enters the soft shutdown state.

[0048] In some embodiments, the third reference voltage includes a first sub-reference voltage and a second sub-reference voltage with different voltage parameters.

[0049] In practice, the first sub-reference voltage refers to a specific voltage threshold in the third reference voltage set. It is set to a level specifically for comparison with the first reference voltage generated by the reference module to determine whether the reference voltage has experienced a positive abnormal drift due to the single-event effect.

[0050] In practice, the second sub-reference voltage is a specific voltage threshold from the third set of reference voltages, and its level value differs from that of the first sub-reference voltage. It is specifically used to compare with the second reference voltage provided by the pre-buck module to determine whether the power supply voltage has experienced a negative abnormal drop due to single-event effects, thus forming a complementary judgment with the first sub-reference voltage.

[0051] In some embodiments, the enable signal after over-temperature protection includes: a first enable signal and a second enable signal.

[0052] In practice, the first enable signal refers to the output signal of the first comparator in the over-temperature protection module, which is generated by comparing the first reference voltage generated by the reference module with the first sub-reference voltage. It is specifically used to monitor whether the core reference voltage VREF has drifted positively due to single-event effects and exceeded the first preset threshold.

[0053] In practical implementation, the second enable signal refers to the output signal of the second comparator in the over-temperature protection module, which is generated by comparing the second reference voltage provided by the pre-step-down module with the second sub-reference voltage. It is specifically used to monitor whether the power supply voltage drops negatively due to single-event effect and exceeds the second preset threshold, and together with the first enable signal, it constitutes a redundant judgment.

[0054] In some embodiments, the PWM control chip is soft-shut down in response to both the first enable signal and the second enable signal being high.

[0055] In specific implementation, the PWM control chip is soft-shutdown in response to both the first enable signal and the second enable signal being high. A logic AND gate is used to evaluate the first and second enable signals. Only when both signals are simultaneously high is the chip considered to have encountered a genuine overheating fault or extreme radiation event. In this case, the AND gate outputs a valid over-temperature protection enable signal, triggering the chip's soft-shutdown logic. This puts the power stage circuit into a safe soft-shutdown state, thus avoiding false protection caused by single-event transient disturbances to a single voltage signal. For details, refer to [reference needed]. Figure 4It includes two over-temperature protection sub-modules (OTP) that use different comparison voltages. The first reference voltage output by the reference module and the second reference voltage output by the pre-buck module are compared with their respective thresholds to generate a first enable signal and a second enable signal. The final soft shutdown action is triggered only when both signals are valid at the same time. By temporarily disabling the protection function when the reference voltage is too low, it effectively prevents the chip from being mistakenly shut down due to single-event transient voltage disturbances.

[0056] In this step, during the single-event radiation test of the power chip, it was found that the single-event function interruption was mainly caused by single-event transient voltage disturbances in the reference module and the pre-buck module. When a single-event bombardment causes the reference voltage VREF to deviate, the over-temperature protection module mistakenly triggers the global enable signal EN, forcing the chip into a soft shutdown state. To suppress this type of failure, this disclosure proposes a dual over-temperature protection hardening method with voltage judgment, referencing... Figure 4 The two OTP modules use two different comparison voltages to prevent the chip from entering an incorrect over-temperature protection state due to voltage fluctuations in one of them. In addition, the reference voltage VREF is shielded and hardened; if VREF falls below a certain value due to a single-event event, the over-temperature protection function will temporarily fail.

[0057] Reference to simulation results before and after reinforcement Figure 5 As can be seen, after hardening, the chip does not experience soft shutdown again when the reference module VREF is disturbed, confirming the effectiveness of the single-event interruption (SEE) hardening. Under heavy ion experiments, the SEE probability changed from "1" to "0", and no SEE occurred at a flux of 1E-7.

[0058] Step S230: Monitor the power path of the PWM control chip to obtain an anti-latch-up protection signal.

[0059] In practical implementation, the power path of the PWM control chip refers to the complete high-current path from the chip's power input terminal to the power output stage. This path includes the main power transistor, which is the core switching element, and its driving circuit. It is responsible for converting the control signal into a power signal that drives the external MOSFET or transformer, and is the key hardware channel for realizing power energy transmission and conversion.

[0060] In practice, the latch-up protection signal is a key control signal generated by the current limiting protection circuit integrated inside the chip. When the power supply current on the power path exceeds the preset safety threshold due to a single-event latch-up effect, the signal will immediately flip its level, thereby quickly shutting down the main power transistor, cutting off the abnormal current path, protecting the chip from burnout, and allowing the system to automatically resume normal operation after the latch-up effect is eliminated.

[0061] In some embodiments, monitoring the power path of the PWM control chip to obtain an anti-latch-up protection signal includes: The power path is monitored, and in response to the detection that the power supply current of the power path is greater than the single-event latch-up threshold, the main power transistor is turned off, and the latch-up protection signal is obtained.

[0062] In specific implementation, the power path is monitored, and in response to the detection that the supply current of the power path is greater than the single-event latch-up threshold, the main power transistor is turned off, thus obtaining the anti-latch-up protection signal. During the layout design phase of the ruggedized PWM control chip, double-layer guard rings are used for both N / PMOS (N-type metal-oxide-semiconductor (NMOS) and P-type metal-oxide-semiconductor (PMOS) transistors), and the number of contact holes is increased as much as possible. This ensures proper isolation between high- and low-voltage devices (within the specified range, the method further includes:). Furthermore, when a single-event latch-up occurs (the mechanism of single-event latch-up involves a high-energy charged particle passing through a sensitive area of ​​the device, triggering parasitic structure conduction, leading to an abnormally high current state, thus affecting device function), causing a surge in the chip's supply current, the internal current-limiting protection activates, cutting off the supply current and protecting the chip from burnout due to single-event latch-up. Once the latch-up phenomenon is eliminated, the chip automatically resumes normal operation. Reference Figure 6 When a single-event latch-up occurs, I load (That is, the total supply current of the main power transistor inside the PWM control chip) increases, and the comparison signal V CMP A flip will occur, turning off the main power transistor. For details, please refer to [link / reference]. Figure 7 I load When V increases to reach the single-event latch-up threshold, CMP When flipped, the chip enters overcurrent protection mode, generates an effective latch-up protection signal, and immediately cuts off the power supply current to prevent the chip from burning out.

[0063] In this step, heavy ion testing was performed after hardening the layout and circuitry to resist single-event latch-up. When the chip power supply reached 20V, no single-event latch-up occurred at an ion flux of 1E-7.

[0064] Step S240: Based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal, the PWM control chip is hardened to obtain a hardened PWM control chip.

[0065] In specific implementation, the PWM control chip is hardened based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal to obtain the hardened PWM control chip: By integrating the filtered bias signal, the over-temperature protection enable signal, and the latch-up protection signal into the corresponding functional modules of the PWM control chip, system-level hardening is achieved in a collaborative manner: the filtered bias signal is connected to the oscillator module to ensure that its operating frequency and duty cycle are not affected by single-event transient disturbances; the over-temperature protection enable signal is connected to the chip's global enable control terminal to prevent false shutdown caused by voltage disturbances; and the latch-up protection signal is connected to the gate control of the main power transistor in the power path to achieve rapid response and isolation against latch-up effects. Through the combined effect of these three signals, a complete protection system from the reference source and control logic to the power output is built inside the chip, thereby significantly improving its radiation resistance and ultimately resulting in a hardened PWM control chip.

[0066] Based on the above steps, the performance of the radiation-resistant PWM controller and forward converter disclosed herein under heavy ion irradiation environment was effectively verified by heavy ion radiation test, which pointed out the direction for its radiation hardening work. The test results before and after hardening are summarized in Table 1. After hardening, the single-event latch-up and single-event interrupt of the chip changed from absolute occurrence events to "1" probability events, and the single-event transient occurrence probability decreased from 1E-2 to 1E-5, which has surpassed similar international products, proving the effectiveness of the hardening scheme disclosed herein.

[0067] Table 1 Comparison of test results before and after reinforcement

[0068] (Single-event transient probability calculation method: number of transient statistics / total flux of radiated ions).

[0069] It should be noted that the method of this disclosure embodiment can be executed by a single device, such as a computer or server. The method of this embodiment can also be applied to a distributed scenario, where multiple devices cooperate to complete the task. In such a distributed scenario, one of these devices may execute only one or more steps of the method of this disclosure embodiment, and the multiple devices will interact with each other to complete the method described.

[0070] It should be noted that the above description describes some embodiments of this disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in a different order than that shown in the above embodiments and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0071] Based on the same inventive concept, corresponding to any of the above embodiments, this disclosure also provides a radiation-hardening device for PWM control chips.

[0072] refer to Figure 8 The radiation hardening device for the PWM control chip includes: The bias signal determination module 810 is configured to determine the transmission path between the reference module and the oscillator module of the PWM control chip, and to perform transient filtering on the transmission path to obtain the filtered bias signal. The enable signal determination module 820 is configured to determine the first reference voltage of the reference module and the second reference voltage of the pre-stepping module of the PWM control chip, and to judge the first reference voltage and the second reference voltage based on the third reference voltage of the over-temperature protection module to obtain the enable signal after over-temperature protection. The protection signal determination module 830 is configured to monitor the power path of the PWM control chip to obtain an anti-latch-up protection signal; The control chip hardening module 840 is configured to harden the PWM control chip based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal, to obtain a hardened PWM control chip.

[0073] In this exemplary embodiment, the bias signal determination module 810 is specifically configured as follows: The transmission path between the reference module and the oscillator module of the PWM control chip is determined, and transient filtering is performed on the transmission path to obtain the filtered bias signal.

[0074] In this exemplary embodiment, the enable signal determination module 820 is specifically configured as follows: The first reference voltage of the reference module and the second reference voltage of the pre-buck module of the PWM control chip are determined. The first reference voltage is compared with the first sub-reference voltage of the over-temperature protection module to obtain a first enable signal. The second reference voltage is compared with the second sub-reference voltage of the over-temperature protection module to obtain a second enable signal. In response to both the first enable signal and the second enable signal being high, the PWM control chip is soft-shut down.

[0075] In this exemplary embodiment, the protection signal determination module 830 is specifically configured as follows: The power path of the PWM control chip is monitored. In response to the detection that the power supply current of the power path is greater than the single-event latch-up threshold, the main power transistor is turned off to obtain an anti-latch-up protection signal.

[0076] In this exemplary embodiment, the control chip hardening module 840 is specifically configured as follows: The PWM control chip is hardened based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal to obtain a hardened PWM control chip.

[0077] For ease of description, the above apparatus is described in terms of its functions, divided into various modules. Of course, in implementing this disclosure, the functions of each module can be implemented in one or more software and / or hardware.

[0078] The apparatus described above is used to implement the radiation hardening method for the corresponding PWM control chip in any of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0079] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, this disclosure also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the radiation hardening method for the PWM control chip described in any of the above embodiments.

[0080] Figure 9 This embodiment illustrates a more specific hardware structure of an electronic device, which may include a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, memory 1020, input / output interface 1030, and communication interface 1040 are interconnected internally via the bus 1050.

[0081] The processor 1010 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this specification.

[0082] The memory 1020 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 1020 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented by software or firmware, the relevant program code is stored in the memory 1020 and is called and executed by the processor 1010.

[0083] The input / output interface 1030 is used to connect input / output modules to realize information input and output. The input / output modules can be configured as components in the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touch screens, microphones, various sensors, etc., and output devices may include displays, speakers, vibrators, indicator lights, etc.

[0084] The communication interface 1040 is used to connect a communication module (not shown in the figure) to enable communication between this device and other devices. The communication module can communicate via wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0085] Bus 1050 includes a pathway for transmitting information between various components of the device, such as processor 1010, memory 1020, input / output interface 1030, and communication interface 1040.

[0086] It should be noted that although the above-described device only shows the processor 1010, memory 1020, input / output interface 1030, communication interface 1040, and bus 1050, in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the embodiments of this specification, and not necessarily all the components shown in the figures.

[0087] The electronic devices described above are used to implement the radiation hardening method for the corresponding PWM control chip in any of the foregoing embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0088] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, this disclosure also provides a non-transitory computer-readable storage medium storing computer instructions for causing the computer to execute the radiation hardening method for the PWM control chip as described in any of the above embodiments.

[0089] The computer-readable medium of this embodiment includes permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.

[0090] The aforementioned non-transitory computer-readable storage media can be any available medium or data storage device that a computer can access, including but not limited to magnetic storage (e.g., floppy disks, hard disks, magnetic tapes, magneto-optical disks (MOs), etc.), optical storage (e.g., CDs, DVDs, BDs, HVDs, etc.), and semiconductor storage (e.g., ROMs, EPROMs, EEPROMs, non-volatile memory (NAND flash), solid-state drives (SSDs)).

[0091] The computer instructions stored in the storage medium of the above embodiments are used to cause the computer to execute the radiation hardening method for the PWM control chip as described in any of the embodiments in the exemplary method section above, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0092] Based on the same inventive concept, corresponding to the radiation hardening method for PWM control chips described in any of the above embodiments, this disclosure also provides a computer program product, which includes computer program instructions. In some embodiments, the computer program instructions can be executed by one or more processors of a computer to cause the computer and / or the processor to perform the radiation hardening method for PWM control chips. Corresponding to the execution entity for each step in each embodiment of the radiation hardening method for PWM control chips, the processor executing the corresponding step can belong to the corresponding execution entity.

[0093] The computer program product of the above embodiments is used to enable the computer and / or the processor to execute the radiation hardening method for the PWM control chip as described in any of the above embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0094] Those skilled in the art will recognize that embodiments of this disclosure can be implemented as a system, method, or computer program product. Therefore, this disclosure can be implemented as entirely hardware, entirely software (including firmware, resident software, microcode, etc.), or a combination of hardware and software, generally referred to herein as a "circuit," "module," or "system." Furthermore, in some embodiments, this disclosure can also be implemented as a computer program product contained in one or more computer-readable media, which includes computer-readable program code.

[0095] Any combination of one or more computer-readable media may be used. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example,, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples (not exhaustive) of a computer-readable storage medium may include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in connection with an instruction execution system, apparatus, or device.

[0096] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of sending, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0097] Program code contained on a computer-readable medium may be transmitted using any suitable medium, including but not limited to wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0098] Computer program code for performing the operations of this disclosure can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0099] It should be understood that each block of a flowchart and / or block diagram, as well as combinations of blocks in a flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine that, when executed by a computer or other programmable data processing device, creates means for implementing the functions / operations specified in the blocks of the flowchart and / or block diagram.

[0100] These computer program instructions may also be stored in a computer-readable medium that enables a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable medium produce a product comprising an instruction apparatus that implements the functions / operations specified in the boxes of a flowchart and / or block diagram.

[0101] Computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, such that the instructions that execute on the computer or other programmable apparatus can provide a process for implementing the functions / operations specified in the boxes of a flowchart and / or block diagram.

[0102] Furthermore, although the operations of the methods of this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all of the operations shown must be performed to achieve the desired result. Rather, the steps depicted in the flowcharts may be executed in a different order. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0103] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. Each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0104] It should be noted that although several modules or units for the device used to perform actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to the embodiments of this application, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0105] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this application (including the claims) is limited to these examples; within the framework of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the embodiments of this application as described above, which are not provided in the details for the sake of brevity.

[0106] Additionally, to simplify the description and discussion, and to avoid obscuring the embodiments of this application, the well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the provided drawings. Furthermore, the apparatus may be shown in block diagram form to avoid obscuring the embodiments of this application, and this also takes into account the fact that the details of the implementation of these block diagram apparatuses are highly dependent on the platform on which the embodiments of this application will be implemented (i.e., these details should be fully understood by those skilled in the art). While specific details (e.g., circuits) have been set forth to describe exemplary embodiments of this application, it will be apparent to those skilled in the art that the embodiments of this application can be implemented without these specific details or with variations thereof. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0107] Although this application has been described in conjunction with specific embodiments thereof, many substitutions, modifications, and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may be used with the embodiments discussed.

[0108] The embodiments of this application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the embodiments of this application should be included within the protection scope of this application.

[0109] While the spirit and principles of this disclosure have been described with reference to several specific embodiments, it should be understood that this disclosure is not limited to the disclosed specific embodiments, and the division of aspects does not imply that features in these aspects cannot be combined for benefit; such division is merely for convenience of expression. This disclosure is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. The scope of the appended claims is to be interpreted in the broadest sense, thereby encompassing all such modifications and equivalent structures and functions.

Claims

1. A method for radiation hardening of a PWM control chip, characterized in that, include: The transmission path between the reference module and the oscillator module of the PWM control chip is determined, and transient filtering is performed on the transmission path to obtain the filtered bias signal. The first reference voltage of the reference module and the second reference voltage of the pre-stepping module of the PWM control chip are determined. The first reference voltage and the second reference voltage are judged based on the third reference voltage of the over-temperature protection module to obtain the enable signal after over-temperature protection. The power path of the PWM control chip is monitored to obtain the latch-up protection signal; The PWM control chip is hardened based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal to obtain a hardened PWM control chip.

2. The method according to claim 1, characterized in that, The third reference voltage includes a first sub-reference voltage and a second sub-reference voltage with different voltage parameters.

3. The method according to claim 2, characterized in that, The enable signals after over-temperature protection include: a first enable signal and a second enable signal.

4. The method according to claim 3, characterized in that, The third reference voltage based on the over-temperature protection module is used to determine the first reference voltage and the second reference voltage to obtain the enable signal after over-temperature protection, including: The first enable signal is obtained by comparing the first reference voltage with the first sub-reference voltage; The second enable signal is obtained by comparing the second reference voltage with the second sub-reference voltage.

5. The method according to claim 3, characterized in that, After obtaining the enable signal for the over-temperature protection, the method further includes: In response to both the first enable signal and the second enable signal being at a high level, the PWM control chip is soft-shut down.

6. The method according to claim 1, characterized in that, The monitoring of the power path of the PWM control chip to obtain the latch-up protection signal includes: The power path is monitored, and in response to the detection that the power supply current of the power path is greater than the single-event latch-up threshold, the main power transistor is turned off, and the latch-up protection signal is obtained.

7. A radiation hardening device for a PWM control chip, characterized in that, include: The bias signal determination module is configured to determine the transmission path between the reference module and the oscillator module of the PWM control chip, and to perform transient filtering on the transmission path to obtain the filtered bias signal. The enable signal determination module is configured to determine the first reference voltage of the reference module and the second reference voltage of the pre-stepping module of the PWM control chip, and to judge the first reference voltage and the second reference voltage based on the third reference voltage of the over-temperature protection module to obtain the enable signal after over-temperature protection. The protection signal determination module is configured to monitor the power path of the PWM control chip to obtain an anti-latch-up protection signal; The control chip hardening module is configured to harden the PWM control chip based on the filtered bias signal, the over-temperature protection enable signal, and the anti-latch-up protection signal, to obtain a hardened PWM control chip.

8. An electronic device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the method as described in any one of claims 1 to 6.

9. A non-transitory computer-readable storage medium, characterized in that, The non-transitory computer-readable storage medium stores computer instructions for causing the computer to perform the method of any one of claims 1 to 6.

10. A computer program product, characterized in that, It includes computer program instructions that, when run on a computer, cause the computer to perform the method as described in any one of claims 1 to 6.

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