Intelligent power module and household appliance

Abstract

The application discloses an intelligent power module and household electrical equipment. The intelligent power module comprises a substrate, a power switch tube arranged on one surface of the substrate and comprising an emitting electrode on a side of the power switch tube away from the substrate, and a driving chip which is laminated on the emitting electrode. In this way, the influence of a parasitic parameter on the performance of the intelligent power module can be reduced, and the volume of the intelligent power module can be reduced.

Description

Technical Field

[0001] This application relates to the field of electronic technology, and in particular to an intelligent power module and a home appliance. Background Technology

[0002] Intelligent Power Modules (IPMs) are advanced power switching devices, integrating power devices and their drive circuit chips into a power drive product. IPMs have a broad market in AC motor frequency conversion speed regulation, DC motor chopper speed regulation, various high-performance power supplies (such as UPS, induction heating, welding machines, active compensation, DC-DC, etc.), industrial electrical automation, and new energy fields.

[0003] The inventors of this application discovered during their long-term research and development that IPMs are typically packaged from a driver IC, power transistors, diodes, and some capacitive and resistive devices. These components are distributed in a "planar" manner on the substrate, resulting in a relatively large IPM size. Furthermore, the components are connected by leads, which are quite long and introduce parasitic parameters that affect the IPM's performance. Summary of the Invention

[0004] The main technical problem addressed in this application is how to reduce the impact of parasitic parameters on IPM performance and reduce the size of the smart power module.

[0005] To address the aforementioned technical problems, this application provides a smart power module. The smart power module includes: a substrate; a power switch transistor disposed on one surface of the substrate, and including an emitter electrode located on the side of the power switch transistor facing away from the substrate; and a driver chip stacked on the emitter electrode.

[0006] To solve the above-mentioned technical problems, another technical solution adopted in this application is to provide a home appliance. This home appliance includes the aforementioned intelligent power module.

[0007] The beneficial effects of this application's embodiments are as follows: The intelligent power module of this application includes: a substrate; a power switch transistor disposed on one surface of the substrate, and including an emitter electrode located on the side of the power switch transistor facing away from the substrate; and a driver chip stacked on the emitter electrode. This application's embodiment stacks the driver chip on the power switch transistor, which not only allows the power switch transistor and the driver chip to form a stacked structure and be integrally disposed, but also reduces the number of mounting positions for the driver chip on the substrate, thereby reducing the substrate area and shortening the spatial distance between the power switch transistor and the driver chip. This reduces the physical connection distance of the leads between the power switch transistor and the driver chip, thus reducing the impact of parasitic parameters introduced by the leads on the performance of the intelligent power module. Simultaneously, because the emitter electrode of the power switch transistor covers most of the power switch transistor's area, and the emitter electrode of the power switch transistor is at the same potential as the low potential port of the high-voltage side of the driver chip, stacking the driver chip on the emitter electrode of the power switch transistor not only allows for flexible adjustment of the relative position of the driver chip and the power switch transistor, but also shortens the length of the lead between the emitter electrode of the power switch transistor and the low potential port of the high-voltage side of the driver chip, minimizing the physical connection distance of the leads between the power switch transistor and the driver chip. Therefore, through the above methods, the embodiments of this application can reduce the physical connection distance of the leads between the power switch and the driver chip, thereby shortening the drive circuit and reducing the impact of parasitic parameters introduced by the leads on the performance of the smart power module. Furthermore, the stacked arrangement of the driver chip and the power switch can realize the 3D packaging of the smart power module, thus reducing the size of the smart power module and improving its integration. Attached Figure Description

[0008] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 This is a schematic diagram of the structure of an embodiment of the intelligent power module of this application;

[0010] Figure 2 This is a schematic diagram of the structure of an embodiment of the intelligent power module of this application;

[0011] Figure 3 This is a schematic diagram of the structure of an embodiment of the intelligent power module of this application;

[0012] Figure 4 yes Figure 3 A schematic diagram of the topology of the intelligent power module in the embodiment;

[0013] Figure 5This is a schematic diagram of the structure of an embodiment of the upper bridge driver chip in the intelligent power module of this application;

[0014] Figure 6 This is a schematic diagram of the structure of an embodiment of the lower bridge driver chip in the intelligent power module of this application;

[0015] Figure 7 This is a schematic diagram of the structure of an embodiment of the household appliance of this application. Detailed Implementation

[0016] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be particularly noted that the following embodiments are for illustrative purposes only and do not limit the scope of the application. Similarly, the following embodiments are only some, not all, embodiments of the present application, and all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of the present application.

[0017] Intelligent power modules integrate power devices and their driving circuit chips. However, most existing intelligent power modules use separate packages for their driving chips and power switching transistors. Furthermore, the driving chips and power switching transistors are designed in a planar manner, i.e., a flat layout. This results in a large minimum safe line spacing and a large total substrate area occupied by each chip and power switching transistor. Consequently, the leads used for electrical connections between the driving chips and power switching transistors are long, which introduces parasitic parameters (such as parasitic inductance). These parasitic parameters can lead to problems such as switching losses, ringing, and reliability issues in intelligent power modules.

[0018] To address the aforementioned technical problems, this application first proposes an intelligent power module, such as... Figure 1 As shown, Figure 1 This is a schematic diagram of the structure of an embodiment of the intelligent power module of this application. The intelligent power module 10 of this embodiment includes: a substrate 20, a power switch 30, and a driver chip 40; wherein, the substrate 20 is used to position and support the power switch 30 and the driver chip 40; the power switch 30 is disposed on one surface of the substrate 20, and the power switch 30 includes an emitting electrode 310 located on the side of the power switch 30 away from the substrate 20; the driver chip 40 is stacked on the emitting electrode 310.

[0019] To improve the injection efficiency and on-state voltage drop of the power switch 30, the emitter electrode 310 of the power switch 30 covers most of the area of ​​the power switch 30. Therefore, in this embodiment, the driver chip 40 is placed on the emitter electrode 310 of the power switch 30, which not only makes the power switch 30 suitable for driver chips 40 of various sizes, but also allows for flexible adjustment of the position of the driver chip 40 on the emitter electrode 310.

[0020] Unlike existing technologies, this embodiment stacks the driver chip 40 on the emitter electrode 310 of the power switch 30. This not only allows the power switch 30 and the driver chip 40 to form a stacked structure and be integrally disposed, but also reduces the number of mounting positions of the driver chip 40 on the substrate 20, thereby reducing the area of ​​the substrate 20. This shortens the spatial distance between the power switch 30 and the driver chip 40, reducing the physical connection distance of the leads between the power switch 30 and the driver chip 40. Therefore, it can reduce the impact of parasitic parameters introduced by the leads on the smart power module 10. At the same time, because the power switch... The emitter electrode 310 of the power switch 30 covers most of the area of ​​the power switch 30, and the emitter electrode 310 of the power switch 30 is at the same potential as the low potential of the high-voltage side of the driver chip 40. Therefore, by stacking the driver chip 40 on the emitter electrode 310 of the power switch 30, the relative position of the driver chip 40 and the power switch 30 can be flexibly adjusted, and the length of the lead between the emitter electrode 310 of the power switch 30 and the low potential port of the high-voltage side of the driver chip 40 can be shortened, so as to minimize the physical connection distance of the lead between the power switch 30 and the driver chip 40. Therefore, this embodiment can reduce the physical connection distance of the lead between the power switch 30 and the driver chip 40, thereby reducing the impact of parasitic parameters introduced by the lead on the performance of the smart power module 10. Furthermore, the stacked arrangement of the driver chip 40 and the power switch 30 can realize 3D packaging of the smart power module 10, thus reducing the size of the smart power module 10 and improving its integration.

[0021] Furthermore, a mounting position can be provided on one surface of the substrate 20 in this embodiment. The power switch 30 is first placed on the mounting position, and then the driver chip 40 is stacked on the emitter electrode 310 of the power switch 30.

[0022] In this embodiment, the substrate 20 serves as a carrier for the power switch transistor 30 and the driver chip 40. The substrate 20 can be made of metal materials such as aluminum or aluminum alloy, copper or copper alloy. The substrate 20 in this embodiment can be a circuit board, and the circuit board integrates a wiring layer that provides power supply circuits, protection circuits, and control circuits for the power switch transistor 30 and the driver chip 40. The shape of the substrate 20 in this embodiment can be determined according to the specific location, number, and size of the power switch transistor 30, and is not limited to a square shape.

[0023] In other embodiments, the substrate can also be implemented using a lead frame or an aluminum nitride ceramic substrate. The aluminum nitride ceramic substrate includes an insulating layer, a heat dissipation layer, and a circuit layer. The insulating layer is located on the side of the circuit layer away from the power switch, and the heat dissipation layer is located on the side of the insulating layer away from the circuit layer. The circuit layer can be a flexible copper-clad layer, on which mounting positions for electronic components of the smart power module are formed, depending on the circuit design of the smart power module. The insulating layer can be made of insulating materials such as PI film.

[0024] In this embodiment, the power switch 30 can be a gallium nitride (GaN) power switch, a Si-based power switch, or a SiC-based power switch.

[0025] Optionally, such as Figure 1 As shown, the power switch 30 in this embodiment further includes a gate electrode 320 located on the side of the power switch 30 away from the substrate 20, and the driver chip 40 is electrically connected to the emitter electrode 310 and the gate electrode 320 through leads 50 respectively.

[0026] The driver chip 40 is used to output a corresponding drive signal when the intelligent power module 10 is working, so as to control the corresponding power switch 30 to turn on, thereby outputting drive power to drive loads such as motors. When the power switch 30 is turned on, the driver chip 40 provides a charging current to the power switch 30 so that the voltage between the gate electrode 320 and the emitter electrode 310 of the power switch 30 rises rapidly to the required value, ensuring that the power switch 30 can be turned on quickly; and during the turn-on period of the power switch 30, it ensures that the voltage between the gate electrode 320 and the emitter electrode 310 of the power switch 30 remains stable, so that the power switch 30 can be turned on reliably.

[0027] In this embodiment, the lead 50 is a metal bonding wire to facilitate the transmission of electrical signals between the driver chip 40 and the power switch 30. The lead 50 in this embodiment can be made of aluminum, gold, or copper, etc.

[0028] Furthermore, in this embodiment, an insulating adhesive layer is provided between the driver chip 40 and the power switch 30 to achieve a fixed connection and insulation between the driver chip 40 and the power switch 30, thereby fixing the driver chip 40 and the power switch 30. The insulating adhesive layer can be made of materials such as thermoplastic or thermosetting adhesive, or it can be made of non-conductive silver paste.

[0029] Furthermore, the power switch 30 in this embodiment further includes a collector (not shown). The collector can be connected to the power supply circuit integrated in the substrate 20 or directly connected to the external power supply circuit of the smart power module 10 to provide a power supply voltage for the power switch 30.

[0030] Optionally, such as Figure 1 As shown, in this embodiment, the orthographic projection of the driver chip 40 on the substrate 20 is located inside the orthographic projection of the emitter electrode 310 on the substrate 20. This stacked structure minimizes the physical connection distance of the leads between the driver chip 40 and the emitter electrode 310, thereby maximizing the reduction of the impact of parasitic parameters generated by the leads between the driver chip 40 and the emitter electrode 310 on the performance of the smart power module 10.

[0031] This application further proposes another embodiment of the intelligent power module, such as Figure 2 As shown, Figure 2 This is a structural schematic diagram of an embodiment of the intelligent power module of this application. The intelligent power module 10 of this embodiment and... Figure 1 The difference in the intelligent power module 10 of this embodiment is that: the intelligent power module 10 of this embodiment further includes: a fast recovery diode 201, which is correspondingly arranged with the power switch 30, and the fast recovery diode 201 and the power switch 30 are connected in anti-parallel; the anode 211 of the fast recovery diode 201 covers the fast recovery diode 201.

[0032] Specifically, a fast recovery diode 201 is disposed on a surface of the substrate 20 on which the power switch 30 is disposed, and the substrate 20 supports the fast recovery diode 201; and the fast recovery diode 201 is located on the side of the power switch 30 on which the emitter electrode 310 is disposed. Since the anode 211 of the fast recovery diode 201 is at the same potential as the emitter electrode 310 of the power switch 30, the distance between the lead between the anode 211 and the emitter electrode 310 of the fast recovery diode 201 can be shortened. Therefore, the impact of parasitic parameters generated by the lead between the anode 211 and the emitter electrode 310 of the fast recovery diode 201 on the performance of the smart power module 10 can be reduced.

[0033] In this embodiment, the fast recovery diode 201 is a high-power anti-parallel diode used to achieve freewheeling during the three-phase inverter process of the power switch. The fast recovery diode 201 in this embodiment can be made of Si material, or it can be implemented using a Schottky diode, which ensures low power consumption of the intelligent power module 10 and reduces its production cost.

[0034] This application further proposes another embodiment of the intelligent power module, such as Figure 3 and Figure 4 As shown, Figure 3 This is a schematic diagram of the structure of an embodiment of the intelligent power module of this application; Figure 4 yes Figure 3A schematic diagram of the topology of an embodiment of the intelligent power module. The difference between the intelligent power module 10 in this embodiment and the intelligent power module 10 in the above embodiment is that: the power switching transistors (not shown) in this embodiment include: an upper bridge power switching transistor 301 and a lower bridge power switching transistor 302, and the driving chip (not shown) in this embodiment includes: an upper bridge driving chip 401 and a lower bridge driving chip 402; wherein, the upper bridge driving chip 401 is stacked on the emitter electrode (not shown) of the upper bridge power switching transistor 301, and the upper bridge driving chip 401 is used to drive the upper bridge power switching transistor 301 to work; the lower bridge driving chip 402 is stacked on the emitter electrode (not shown) of the lower bridge power switching transistor 302, and the lower bridge driving chip 402 is used to drive the lower bridge power switching transistor 302.

[0035] In this embodiment, the upper bridge driver chip 401 of the intelligent power module 10 is stacked on the emitter electrode of the upper bridge power switch 301, forming a stacked structure and being integrally disposed. This reduces the number of mounting positions of the upper bridge driver chip 401 on the substrate 20, thereby reducing the area of ​​the substrate 20 and shortening the spatial distance between them. This reduces the physical connection distance of the leads between them, thus reducing the impact of parasitic parameters introduced by the leads between them on the performance of the intelligent power module 10. At the same time, stacking the upper bridge driver chip 401 on the emitter electrode of the upper bridge power switch 301 not only allows the upper bridge power switch 301 to be adapted to various sizes of upper bridge driver chips 401, but also allows for flexible adjustment of their relative positions to minimize the physical distance of the leads between them. The lower bridge driver chip 402 is stacked on the emitter electrode of the lower bridge power switch 302, forming a stacked structure that is integrally disposed. This reduces the number of mounting positions of the lower bridge driver chip 402 on the substrate 20, thereby reducing the area of ​​the substrate 20 and shortening the spatial distance between them. This reduces the physical connection distance of the leads between them, thus reducing the impact of parasitic parameters introduced by the leads between them on the performance of the smart power module 10. At the same time, stacking the lower bridge driver chip 402 on the emitter electrode of the upper bridge power switch 301 not only allows the lower bridge power switch 302 to be adapted to various sizes of lower bridge driver chips 402, but also allows for flexible adjustment of their relative positions to minimize the physical connection distance of the leads between them. Therefore, this embodiment can reduce the impact of parasitic parameters on the performance of the smart power module 10, and the stacked arrangement can realize 3D packaging of the smart power module, thus reducing the size of the smart power module 10 and improving its integration.

[0036] In this embodiment, the intelligent power module 10 includes three upper-bridge power switching transistors 301, three lower-bridge power switching transistors 302, three upper-bridge driver chips 401, and three lower-bridge driver chips 402.

[0037] The substrate 20 of this embodiment has 12 mounting positions, on which three upper-bridge power switches 301, three lower-bridge power switches 302, and six fast recovery diodes 201 are mounted respectively. The number and position of the fast recovery diodes 201 correspond one-to-one with the power switches.

[0038] When the intelligent power module 10 is working, the driver chip outputs a corresponding PWM control signal to drive and control the corresponding power switch to turn on / off, thereby outputting driving power to drive loads such as motors.

[0039] like Figure 4 As shown, in this embodiment, the three upper-bridge power switches 301 and the lower-bridge power switches 302 form a three-phase inverter bridge circuit. Each upper-bridge power switch 301 is connected in series with the corresponding lower-bridge power switch 302, that is, the emitter electrode of the upper-bridge power switch 301 is connected to the collector electrode of the lower-bridge power switch 302. The three upper-bridge power switches 301 and the lower-bridge power switches 302 form three series circuits, which drive the three-phase windings of the motor respectively.

[0040] The inverter circuit composed of the above-mentioned 6 power switching transistors in this embodiment can be applied to electrical equipment such as inverter power supplies, frequency converters, refrigeration equipment, metallurgical machinery equipment, and electric traction equipment, especially frequency conversion household appliances, such as washing machines.

[0041] Each driver chip in this application embodiment independently drives a power switch transistor, which can better monitor the operating status of the power switch transistor, thereby improving the reliability of the intelligent power module.

[0042] Of course, in other embodiments, the smart power module may also include four power switching transistors or eight power switching transistors, etc.

[0043] In this embodiment, the power switch can be an Insulated Gate Bipolar Transistor (IGBT). An IGBT is a composite, fully controllable, voltage-driven power semiconductor device composed of a bipolar junction transistor (BJT) and an insulated gate field-effect transistor (MOSFET). It combines the advantages of high input impedance of MOSFETs and low on-state voltage drop of power transistors. IGBTs also offer the advantages of low drive power and low saturation voltage. In other embodiments, the power switch can also be a MOSFET, etc.

[0044] Optionally, such as Figure 4As shown, the upper bridge driver chip 401 in this embodiment includes: a first potential port VS, a second potential port VSS1, and a first signal output port HO; wherein, the first potential port VS is connected to the emitter electrode of the upper bridge power switch 301; the second potential port VSS1 is connected to logic ground; the first signal output port HO is connected to the gate electrode of the upper bridge power switch 301, and the first signal output port HO provides a drive signal to the upper bridge power switch 301; wherein, the first signal output port HO and the first potential port VS are positioned closer to the gate electrode of the upper bridge power switch 301 than the second potential port VSS1.

[0045] In this embodiment, the first signal output port HO of the upper bridge driver chip 401, which provides the drive signal to the upper bridge power switch 301, is positioned close to the gate electrode of the upper bridge power switch 301. This can shorten the physical distance between the lead wires of the first signal output port HO and the gate electrode, and reduce the parasitic parameters introduced by the lead wires between the first signal output port HO and the gate electrode, thereby reducing the impact of parasitic parameters on the smart power module 10.

[0046] Furthermore, the upper bridge driver chip 401 in this embodiment further includes: a first signal input port HIN, a first power supply port VB, and a second power supply port VCC1; wherein, the first signal input port HIN receives a first external drive signal; the first power supply port VB provides a first power supply voltage to the upper bridge driver chip 401; the second power supply port VCC1 provides a second power supply voltage to the upper bridge driver chip 401; wherein, the first power supply port VB, the first potential port VS, and the first signal output port HO are positioned closer to the gate electrode of the upper bridge power switch 301 than the second power supply port VCC1, the first signal input port HIN, and the second potential port VSS1.

[0047] In this embodiment, the high-voltage region formed by the first power supply port VB, the first potential port VS, and the first signal output port HO of the upper bridge driver chip 401 is positioned close to the gate electrode of the upper bridge power switch 301. This can shorten the physical distance between the lead wires of the first signal output port HO and the gate electrode, and the physical distance between the lead wires of the first potential port VS and the emitter electrode of the upper bridge power switch 301, thereby reducing the impact of parasitic parameters introduced by the lead wires on the smart power module 10.

[0048] In this embodiment, three upper-bridge driver chips 401 are provided with a first external drive signal HIN1, a first external drive signal HIN2, and a first external drive signal HIN3, respectively. This embodiment does not limit these three first external drive signals to be the same or different.

[0049] In another embodiment, such as Figure 5 As shown, Figure 5This is a schematic diagram of an embodiment of the upper bridge driver chip in the intelligent power module of this application. The upper bridge driver chip 401 of this embodiment has a first edge (not shown) and a second edge (not shown). The first edge is located near the gate electrode (not shown) of the upper bridge power switch (not shown), and the second edge is located away from the gate electrode of the upper bridge power switch. The first power supply port VB, the first potential port VS, and the first signal output port HO are located near the first edge and spaced apart from each other along the extension direction of the first edge. The second power supply port VCC1, the first signal input port HIN, and the second potential port VSS1 are located near the second edge and spaced apart from each other along the extension direction of the second edge. The first potential port VS is located further away from the first edge than the first power supply port VB and the first signal output port HO.

[0050] As can be seen from the above analysis, the upper bridge power switching transistor (refer to...) Figure 4 The gate electrode and emitter electrode of the upper bridge power switch are staggered along the first edge. Therefore, the port arrangement structure of the upper bridge driver chip 401 in this embodiment can not only reduce the spatial distance between the first potential port VS and the emitter electrode of the upper bridge power switch (the minimum lead distance between the two can be the distance between the upper bridge power switch and the upper bridge driver chip along the stacking direction), but also reduce the spatial distance between the first signal output port HO and the gate electrode of the upper bridge power switch (the minimum lead distance between the two can be the distance between the upper bridge power switch and the upper bridge driver chip along the stacking direction).

[0051] Continue reading Figure 4 In this embodiment, the first potential port VS of the upper bridge driver chip 401 is at the same potential as the emitter electrode of the upper bridge power switch 301, and the two can be connected by leads.

[0052] Depend on Figure 4 It is known that the emitter electrode of the upper bridge power switch 301 is connected to the collector electrode of the lower bridge power switch 302. The lower bridge power switch 302 pulls up the potential of the emitter electrode and the gate electrode of the upper bridge power switch 301. When the upper bridge power switch 301 is turned on, the potential of the first power supply port VB and the first signal output port HO of the upper bridge power switch 301 are both higher than the potential of the first potential port VS (which is at the same potential as the emitter electrode of the upper bridge power switch 301). Therefore, the first power supply port VB, the first potential port VS and the first signal output port HO of the upper bridge driver chip 401 form a high-voltage region. The potentials of the second power supply port VCC1, the first signal input port HIN and the second potential port VSS1 of the upper bridge driver chip 401 are lower, forming a low-voltage region of the upper bridge driver chip 401.

[0053] Furthermore, in this embodiment, an insulating structure, such as a high-voltage ring, is required in the upper bridge driver chip 401 to isolate its low-voltage region from the high-voltage region.

[0054] The upper bridge driver chip 401 in this embodiment can be fabricated using silicon-on-insulator (SOI) technology, which achieves an insulating structure by trenching and filling with an oxide layer. The area occupied by the high voltage isolation region in SOI technology is much smaller than that in traditional BCD bulk silicon technology, saving the area of ​​the upper bridge driver chip 401.

[0055] In other embodiments, a PN junction can be formed on the upper bridge driver chip 401 as an insulating structure using a BCD bulk silicon process, and so on.

[0056] Furthermore, such as Figure 4 As shown, the intelligent power module 10 of this embodiment further includes: a bootstrap diode D, the anode of the bootstrap diode D is connected to the second power supply port VCC1 of the upper bridge driver chip 401, and the cathode of the bootstrap diode D is connected to the first power supply port VB of the upper bridge driver chip 401.

[0057] The second power supply port VCC1 is connected to a low-voltage fixed power supply voltage, which is converted into a high-voltage floating power supply voltage by the bootstrap diode D and supplied to the first power supply port VB.

[0058] The number of bootstrap diodes D is the same as the number of upper bridge driver chips 401, and they are set to correspond one-to-one with the upper bridge driver chips 401.

[0059] In other embodiments, the bootstrap diode can be integrated into the upper bridge driver chip.

[0060] Of course, in other embodiments, a bootstrap capacitor or similar device can be provided for each bridge driver chip.

[0061] Optionally, such as Figure 4 As shown, the lower bridge driver chip 402 in this embodiment includes: a second signal input port LIN, a second signal output port LO, a third potential port VSS2, and a third power supply port VCC2; wherein, the second signal input port LIN receives a second external drive signal; the second signal output port LO is connected to the gate electrode of the lower bridge power switch 302 to provide a drive signal for the lower bridge power switch 302; the third potential port VSS2 is connected to logic ground; and the third power supply port VCC2 provides a third power supply voltage for the lower bridge driver chip 402; wherein, the second signal output port LO is positioned closer to the gate electrode of the lower bridge power switch 302 than the second signal input port LIN, the third potential port VSS2, and the third power supply port VCC2.

[0062] Furthermore, the lower bridge driver chip 402 in this embodiment has a third edge (not shown) and a fourth edge (not shown). The third edge is located near the gate electrode of the lower bridge power switch 302, and the fourth edge is located away from the gate electrode of the lower bridge power switch 302. The second signal output port LO is located near the third edge, and the second signal input port LIN, the third potential port VSS2, and the third power supply port VCC2 are located near the fourth edge and are spaced apart from each other along the extension direction of the fourth edge.

[0063] In this embodiment, the second signal output port LO of the lower bridge driver chip 402 is connected to the gate electrode of the lower bridge power switch 302. Therefore, this embodiment sets the second signal output port LO of the lower bridge driver chip 402 close to the gate electrode of the lower bridge power switch 302, which can shorten the distance between the lead between the second signal output port LO and the gate electrode. Thus, it can reduce the impact of parasitic parameters generated by the lead between the second signal output port LO and the gate electrode on the performance of the smart power module 10.

[0064] In this embodiment, three lower-bridge driver chips 402 are provided with a second external drive signal LIN1, a second external drive signal LIN2, and a second external drive signal LIN3, respectively. This embodiment does not limit these three second external drive signals to be the same or different.

[0065] Optionally, the lower bridge driver chip 402 in this embodiment further includes: a fault output port FEN and an overcurrent detection port ITRIP, wherein the fault output port FEN outputs a fault signal; the overcurrent detection port ITRIP detects the current sampling signal of the lower bridge power switch 302; wherein the fault output port FEN and the overcurrent detection port ITRIP are disposed on the same side as the second signal input port LIN, that is, the fault output port FEN and the overcurrent detection port ITRIP are disposed on the fourth edge of the lower bridge driver chip 402.

[0066] In this embodiment, the second signal input port LIN, the third potential port VSS2, the third power supply port VCC2, the fault output port FEN, and the overcurrent detection port ITRIP are all located near the fourth edge, which facilitates signal access from the fourth edge (the third edge is close to the lower bridge power switch 302), and simplifies the circuit structure of the intelligent power module 10.

[0067] In this embodiment, the lower bridge driver chip 402 is equipped with fault detection circuits for under / overvoltage, overcurrent, and overtemperature; the fault output port FEN can also be used to input an enable signal.

[0068] To further simplify the circuit of the intelligent power module 10, in this embodiment, the second potential port VSS1 of the upper bridge driver chip 401 and the third potential port VSS2 of the lower bridge driver chip 402 are connected to logic ground through the same lead; the second power supply port of the upper bridge driver chip 401 and the third power supply port VCC2 of the lower bridge driver chip 402 are connected to the low-voltage power supply through the same lead.

[0069] In another embodiment, such as Figure 6 As shown, Figure 6 This is a schematic diagram of the structure of a lower bridge driver chip in an embodiment of the intelligent power module of this application. The lower bridge driver chip 402 in this embodiment further includes a fourth potential port COM, which is used to connect to the power ground, and the fourth potential port COM is located close to the fourth edge for easy signal access.

[0070] In this embodiment, the fourth potential port COM of the lower bridge driver chip 402 is grounded; the third power supply port VCC2 is the power supply port of the lower bridge driver chip 402, and the fourth potential port COM is grounded and is the discharge port of the lower bridge driver chip 402, and is at the same potential as the third potential port VSS2.

[0071] The intelligent power module of this application is a semiconductor device composed of a high-speed, low-power power switch, a gate electrode driver, and corresponding protection circuits. It possesses the advantages of high-power transistors (high current density, low saturation voltage, and high voltage resistance) and field-effect transistors (FETs) (high input impedance, high switching frequency, and low drive power). Furthermore, the intelligent power module integrates logic, control, detection, and protection circuits, making it convenient to use. This not only reduces system size and development time but also significantly enhances system reliability. The intelligent power module of this application can be used in home appliances, rail transportation, power systems, and other fields, and is particularly suitable for driving motors in compressors and fans of air conditioners, refrigerators, etc.

[0072] This application further proposes a household appliance, such as Figure 7 As shown, Figure 7 This is a schematic diagram of the structure of a home appliance device according to an embodiment of this application. The home appliance device 70 in this embodiment includes a smart power module 10, wherein the smart power module 10 is the same as the smart power module 10 in the above embodiment, which will not be described again here.

[0073] The household appliances in this application embodiment can be washing machines or refrigerators.

[0074] Unlike existing technologies, the intelligent power module of this application includes: a substrate; a power switch transistor disposed on one surface of the substrate, and including an emitter electrode located on the side of the power switch transistor facing away from the substrate; and a driver chip stacked on the emitter electrode. In this embodiment, the driver chip is stacked on the power switch transistor, which not only allows the power switch transistor and the driver chip to form a stacked structure and be integrally disposed, but also reduces the number of mounting positions for the driver chip on the substrate, thereby reducing the substrate area and shortening the spatial distance between the power switch transistor and the driver chip. This reduces the physical connection distance of the leads between the power switch transistor and the driver chip, thus reducing the impact of parasitic parameters introduced by the leads on the performance of the intelligent power module. Simultaneously, because the emitter electrode of the power switch transistor covers most of its area, and the emitter electrode of the power switch transistor is at the same potential as the low potential port of the high-voltage side of the driver chip, stacking the driver chip on the emitter electrode of the power switch transistor not only allows for flexible adjustment of the relative position of the driver chip and the power switch transistor, but also shortens the length of the lead between the emitter electrode of the power switch transistor and the low potential port of the high-voltage side of the driver chip, minimizing the physical connection distance of the leads between the power switch transistor and the driver chip. Therefore, through the above methods, the embodiments of this application can reduce the physical connection distance of the leads between the power switch and the driver chip, thereby shortening the drive circuit and reducing the impact of parasitic parameters introduced by the leads on the performance of the smart power module. Furthermore, the stacked arrangement of the driver chip and the power switch can realize the 3D packaging of the smart power module, thus reducing the size of the smart power module and improving its integration.

[0075] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural changes made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. An intelligent power module, characterized by The intelligent power module comprises: a substrate; a power switch tube arranged on a surface of the substrate and comprising an emitting electrode on a side of the power switch tube facing away from the substrate; a driving chip stacked on the emitting electrode; wherein the power switch tube comprises an upper bridge power switch tube and a lower bridge power switch tube, and the driving chip comprises: an upper bridge driving chip stacked on the emitting electrode of the upper bridge power switch tube and used for driving the upper bridge power switch tube; a lower bridge driving chip stacked on the emitting electrode of the lower bridge power switch tube and used for driving the lower bridge power switch tube; wherein the lower bridge driving chip comprises: a second signal input port receiving a second external driving signal; a second signal output port connected with a gate electrode of the lower bridge power switch tube and providing a driving signal for the lower bridge power switch tube; a third potential port connected logically; a third power supply port providing a third power supply voltage for the lower bridge driving chip; wherein the second signal output port is arranged closer to the gate electrode of the lower bridge power switch tube than the second signal input port, the third potential port and the third power supply port.

2. The intelligent power module according to claim 1, characterized in that A normal projection of the driving chip on the substrate is located inside a normal projection of the emitting electrode on the substrate.

3. The intelligent power module according to claim 1, characterized in that The power switch tube further comprises a gate electrode on a side of the power switch tube facing away from the substrate, and the driving chip is electrically connected with the emitting electrode and the gate electrode through lead wires respectively.

4. The intelligent power module according to claim 3, characterized in that The upper bridge driving chip comprises: a first potential port connected with the emitting electrode of the upper bridge power switch tube; a second potential port connected logically; a first signal output port connected with a gate electrode of the upper bridge power switch tube and providing a driving signal for the upper bridge power switch tube; wherein the first signal output port and the first potential port are arranged closer to the gate electrode of the upper bridge power switch tube than the second potential port.

5. The intelligent power module according to claim 4, characterized in that The upper bridge driving chip further comprises: a first signal input port receiving a first external driving signal; a first power supply port providing a first power supply voltage for the upper bridge driving chip; a second power supply port providing a second power supply voltage for the upper bridge driving chip; wherein the first power supply port, the first potential port and the first signal output port are arranged closer to the gate electrode of the upper bridge power switch tube than the second power supply port, the first signal input port and the second potential port.

6. The intelligent power module according to claim 5, characterized in that The upper bridge driving chip has a first edge and a second edge, the first edge is arranged close to the gate electrode of the upper bridge power switch tube, the second edge is arranged away from the gate electrode of the upper bridge power switch tube, the first power supply port, the first potential port and the first signal output port are arranged close to the first edge and are spaced from each other along the extension direction of the first edge, the second power supply port, the first signal input port and the second potential port are arranged close to the second edge and are spaced from each other along the extension direction of the second edge, and the first potential port is arranged away from the first edge compared with the first power supply port and the first signal output port.

7. The intelligent power module according to claim 1, characterized by The lower bridge driving chip further comprises: a fault output port outputting a fault signal; an overcurrent detection port detecting a current sampling signal of the lower bridge power switch tube; wherein the fault output port and the overcurrent detection port are arranged on the same side of the second signal input port.

8. An electric home appliance characterized by comprising: The household appliance comprises the intelligent power module according to any one of claims 1 to 7.

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