Short-circuit detection device and control method for a switched-capacitor converter
Through multiple voltage comparisons of the switching capacitor converter and current mirror technology, comprehensively detecting whether the load switch and flyover capacitor are short-circuited, solving the problem of incomplete detection in the existing technology and improving the safety and reliability of the fast charging system.
Patent Information
- Application Number
- CN202111249195.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-09-24
- Filing Date
- 2021-10-26
- Publication Date
- 2025-08-05
- Estimated Expiration
- 2041-10-26
AI Technical Summary
The existing short-circuit detection test only covers the short-circuit of the switch capacitor converter flying over the capacitor, and cannot fully cover the short-circuit detection of all switching components, resulting in insufficient safety and reliability of the battery charging system.
By comparing the input voltage bus, switch node voltage and preset reference voltage of the switching capacitor converter, we gradually determine whether the load switch, fly capacitance, etc. are short-circuited, and a special circuit and current mirror technology are used for accurate detection.
Improves the reliability and accuracy of short circuit detection, ensures the safety and reliability of switching capacitor converters, and is suitable for safe and fast charging of batteries in fast charging systems.
Smart Images

Figure CN114487900B_ABST
Abstract
Description
[0001] Priority claims and cross-references
[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 106,669, filed on October 28, 2020, entitled “Short-Circuit Detection Device and Control Method for Switched Capacitor Converter,” and U.S. Application No. 17 / 484,269, filed on September 24, 2021, entitled “Short-Circuit Detection Device and Control Method for Switched Capacitor Converter,” which are hereby incorporated by reference into this document. Technical Field
[0003] The present invention relates to the technical field of short-circuit detection devices, and in particular to a short-circuit detection device and a control method for a switched capacitor converter. Background Art
[0004] With further development of technology, various portable devices have become popular, such as mobile phones, tablet computers, digital cameras, MP3 players, etc. Each portable device may use one or more rechargeable battery cells to form a rechargeable battery pack for storing electrical energy.
[0005] As power consumption becomes increasingly important, the need to shorten battery charging times is becoming increasingly apparent. Fast charging has become a viable solution to meet consumers' evolving needs. In fast-charging systems, switched-capacitor converters can be used to deliver high current to the battery while maintaining low input current (e.g., USB cable current). Switched-capacitor converters offer several advantages, including monolithic converter integration, eliminating the need for an external inductor, and high power conversion efficiency. They enable safe and fast charging of large-capacity batteries.
[0006] In fast-charging systems, short-circuit detection testing is crucial to ensuring the safety and long-term reliability of batteries and battery charging systems. Short-circuit detection testing is particularly important for switched-capacitor converters, whose power switches typically have ultra-low resistance. Existing short-circuit detection tests only cover short circuits in the flying capacitors of switched-capacitor converters. A simple and reliable short-circuit detection device and method are desired that can cover short circuit testing of all switching elements in a switched-capacitor converter. Summary of the Invention
[0007] The embodiments of the present invention aim to provide a short-circuit detection device and a control method for a switched capacitor converter, which can improve the reliability of short-circuit detection.
[0008] To achieve the above objectives, in a first aspect, the present invention provides a control method for a switched capacitor converter, comprising: connecting an input voltage bus of the switched capacitor converter to a power supply via a load switch, the switched capacitor converter comprising a first switch, a second switch, a third switch, and a fourth switch connected in series between the input voltage bus and ground, and a flying capacitor connected between a common node of the first and second switches and a common node of the third and fourth switches. In a first short-circuit test step, a voltage on the input voltage bus is compared with a first preset reference voltage to determine whether the load switch or the second switch is short-circuited. After passing the first short-circuit test step, in a second short-circuit test step, a voltage at the common node of the third and fourth switches is compared with a second preset reference voltage to determine whether the first or fourth switch is short-circuited. Then, after passing the second short-circuit test step, in a third short-circuit test step, a voltage at the common node of the third and fourth switches is compared with a third preset reference voltage to determine whether the third switch is short-circuited.
[0009] In a second aspect, the present invention provides a method for detecting a faulty component in a switched capacitor converter, the switched capacitor converter comprising four switches and a flying capacitor. The method comprises: in a first step, comparing a voltage on an input voltage bus of the switched capacitor converter with a first preset reference voltage value to determine whether a load switch or a second switch of the switched capacitor converter is short-circuited, wherein the load switch is coupled between a power supply and the input voltage bus. After the first step, in a second step, comparing a voltage at a common node between a third switch and a fourth switch with a second preset reference voltage to determine whether the first switch or the fourth switch is short-circuited. After the second step, in a third step, comparing a voltage at a common node between the third switch and the fourth switch with a third preset reference voltage to determine whether the third switch is short-circuited. After the third step, turning on the load switch to generate a voltage on the input voltage bus, and turning on the second switch. In a fourth step, comparing a voltage at a common node between the third switch and the fourth switch with a fourth preset reference voltage to determine whether the flying capacitor is short-circuited.
[0010] In a third aspect, the present invention provides a system comprising a switched capacitor converter and a short-circuit detection device, wherein the switched capacitor converter comprises a first switch, a second switch, a third switch, and a fourth switch connected in series between an input voltage bus and ground, and a flying capacitor connected between a common node of the first and second switches and a common node of the third and fourth switches. The input voltage bus is configured to be coupled to a power supply via a load switch. The short-circuit detection device comprises a first dedicated circuit and a second dedicated circuit, wherein the first dedicated circuit comprises a reference current source and a first control switch connected in series between a common node of the second and third switches and ground, wherein the first control switch forms a current mirror with the fourth switch, and the second dedicated circuit is connected between a common node of the second and third switches and a common node of the third and fourth switches, wherein the second dedicated circuit is configured to charge the common node of the third and fourth switches for short-circuit testing.
[0011] The beneficial effects of an embodiment of the present invention are as follows: The control method of a switched capacitor converter provided by the present invention includes: an input voltage bus of the switched capacitor converter is connected to a power supply via a load switch, the switched capacitor converter including a first switch, a second switch, a third switch, and a fourth switch connected in series between the input voltage bus and ground, and a flying capacitor connected between a common node of the first switch and the second switch and a common node of the third switch and the fourth switch. In a first short-circuit test step, the voltage on the input voltage bus is compared with a first preset reference voltage to determine whether the load switch or the second switch is short-circuited. After passing the first short-circuit test step, in a second short-circuit test step, the voltage at the common node of the third and fourth switches is compared with a second preset reference voltage to determine whether the first or fourth switch is short-circuited. Then, after passing the second short-circuit test step, in a third short-circuit test step, the voltage at the common node of the third and fourth switches is compared with a third preset reference voltage to determine whether the third switch is short-circuited. In this way, the reliability of the short-circuit test can be improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] For a more complete understanding of the present disclosure and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which:
[0013] Figure 1 A schematic diagram illustrating a switched capacitor converter according to various embodiments of the present disclosure;
[0014] Figure 2 A schematic diagram illustrating a short circuit detection device according to various embodiments of the present disclosure;
[0015] Figure 3 A schematic diagram illustrating a short circuit processing device according to various embodiments of the present disclosure;
[0016] Figure 4 A schematic diagram illustrating three back-to-back connected transistors according to various embodiments of the present disclosure;
[0017] Figure 5 The various embodiments of the present disclosure are shown Figure 1 Flowchart of a short-circuit detection method for a switched capacitor converter is shown.
[0018] Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated.The figures are drawn to clearly illustrate the relevant aspects of the various embodiments and are not necessarily drawn to scale. DETAILED DESCRIPTION
[0019] The following describes in detail how to make and use the presently preferred embodiments. However, it should be understood that the present disclosure provides many applicable inventive concepts that can be implemented in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the present disclosure and are not intended to limit the scope of the present disclosure.
[0020] The present invention will be described in conjunction with a specific preferred embodiment, namely a short-circuit detection device for a switched capacitor converter. However, the present invention can also be applied to various power converters. Hereinafter, various embodiments will be explained in detail with reference to the accompanying drawings.
[0021] Figure 1 The diagram illustrates a schematic diagram of a switched capacitor converter according to various embodiments of the present invention. The input voltage bus PMID of the switched capacitor converter is coupled to a power supply VIN via a switch QFB. The output terminal Vo of the switched capacitor converter is connected to a battery Battary. Switch QFB can function as a load switch.
[0022] like Figure 1 As shown, the input capacitor Cin is connected between the power supply VIN and ground. An input voltage bus discharge circuit is connected in parallel with the input capacitor Cin. The input voltage bus discharge circuit includes a series-connected resistor Rpd_vin and a switch S1. The PMID discharge circuit is connected between the input voltage bus PMID and ground. The PMID discharge circuit includes a series-connected resistor Rpd_pmid and a switch S2. The PMID discharge circuit provides a discharge path for the input voltage bus PMID, ensuring that the voltage on the input voltage bus PMID is close to zero after the switched capacitor converter is shut down. This ensures that the voltage on the input voltage bus PMID is approximately zero at the start of the next power-up.
[0023] like Figure 1 As shown, the switched capacitor converter includes a first switch QCH, a second switch QDH, a third switch QCL, and a fourth switch QDL connected in series between an input voltage bus PMID and ground. Figure 1 As shown, each switch has a dedicated driver circuit. The first driver circuit D1 is configured to drive the first switch QCH. The second driver circuit D2 is configured to drive the second switch QDH. The third driver circuit D3 is configured to drive the third switch QCL. The fourth driver circuit D4 is configured to drive the fourth switch QDL.
[0024] The switched-capacitor converter also includes a first capacitor Cfly, a second capacitor Cbst, and a third capacitor Co. The first capacitor Cfly is connected between a common node CFH between the first and second switches QCH and QDH and a common node CFL between the third and fourth switches QCL and QDL. The first capacitor Cfly is also referred to as a flying capacitor. An active discharge circuit 120 is connected in parallel with the flying capacitor Cfly. The active discharge circuit 120 is configured to discharge the voltage on the flying capacitor Cfly after the switched-capacitor converter is turned off.
[0025] A second capacitor Cbst is connected between the voltage bus BST and the node CFH. The second capacitor Cbst serves as a bootstrap capacitor. The bootstrap switch / bootstrap diode 110 is used to charge the second capacitor Cbst. In the embodiments of the present application, the second capacitor Cbst may also be referred to as a bootstrap capacitor.
[0026] The bootstrap capacitor Cbst is configured to provide bias power to the high-side drive circuit (e.g., the drive circuit D1 for driving the first switch QCH). The third capacitor Co is connected between the output terminal Vo and the ground. The third capacitor Co is connected to the load (e.g., Figure 1 The batteries shown in the figure are connected in parallel.
[0027] In some embodiments, the second switch QDH is implemented as an isolation switch. In particular, the second switch QDH provides isolation between the battery Battary and the power source VIN. Figure 1 As shown, the body terminal of the second switch QDH is not connected to the source of the second switch QDH. The second switch QDH includes two body diodes. The first body diode is located between the body terminal of the second switch QDH and the source of the second switch QDH. The second body diode is located between the body terminal of the second switch QDH and the drain of the second switch QDH. The two body diodes are connected back to back. Due to the back-to-back connected body diodes, the second switch QDH can be used as an isolation switch. After a shutdown signal is applied to the gate of the second switch QDH, the second switch QDH can provide isolation between the battery Battary and the node CFH. More specifically, when the node CFH is short-circuited to ground, the second switch QDH can prevent excessive current from being drawn from the battery Battary.
[0028] like Figure 1As shown, the body terminal control circuit 130 is connected to the common node of the two back-to-back connected body diodes. The body terminal control circuit 130 is used to control the channel characteristics of the second switch QDH by adjusting the voltage potential of the body terminal of the second switch QDH.
[0029] In one embodiment, Figure 1 The switching element may be a metal oxide semiconductor field effect transistor (MOSFET) device. Alternatively, the switching element may be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon controlled thyristor (SCR) device, a junction gate field effect transistor (JFET) device, a MOS controlled thyristor (MCT) device, a gallium nitride (GaN)-based power device, a silicon carbide (SiC)-based power device, etc.
[0030] It is understandable that although Figure 1 The first switch QCH, the second switch QDH, the third switch QCL, and the fourth switch QDL are shown as being implemented as a single n-type transistor, but those skilled in the art will recognize that there may be many variations, modifications, and alternatives. For example, depending on different applications and design requirements, all or at least some of the first switch QCH, the second switch QDH, the third switch QCL, and the fourth switch QDL may be implemented as p-type transistors. In addition, Figure 1 Each switch shown in FIG can be implemented as multiple switches connected in parallel. In addition, a capacitor can be connected in parallel with a switch to implement zero voltage switching (ZVS) / zero current switching (ZCS).
[0031] In one embodiment, the switched capacitor converter can operate in two different phases. In the first phase, the first switch QCH and the third switch QCL are turned on, and the second switch QDH and the fourth switch QDL are turned off. Since the first switch QCH and the third switch QCL are turned on, the charging power supply VIN charges the flying capacitor Cfly and the output capacitor Co. In the first phase, the flying capacitor Cfly and the output capacitor Co are connected in series. In the second phase, the second switch QDH and the fourth switch QDL are turned on, and the first switch QCH and the third switch QCL are turned off. Since the second switch QDH and the fourth switch QDL are turned on, the flying capacitor Cfly is connected in parallel with the output capacitor Co, and the energy stored in the flying capacitor Cfly and the output capacitor Co is discharged to the load (for example Figure 1 The battery shown in Figure 1 is discharged.
[0032] Figure 2 The diagram shows a short circuit detection device according to various embodiments of the present invention. The short circuit detection device is used to determine whether a switch of a switched capacitor converter and a flying capacitor are short-circuited. In some embodiments, the short circuit of the switch refers to a short circuit between its source and drain. Figure 2 As shown, the short circuit detection device includes a first dedicated circuit 201 and a second dedicated circuit 202 .
[0033] The first dedicated circuit 201 includes a reference current source Iref and a first control switch Q1. The first control switch Q1 and the fourth switch QDL form a current mirror. Figure 2 As shown, the reference current source Iref is connected between the output terminal Vo and the drain of the first control switch Q1. The ratio of the current flowing through the first control switch Q1 to the current flowing through the fourth switch QDL is equal to 1:M, where M is a preset value.
[0034] The second dedicated circuit 202 includes a second control switch Q2 and a resistor R1. Figure 2 As shown, the second control switch Q2 and the resistor R1 are connected in series between the output terminal Vo and the node CFL.
[0035] In one embodiment, before powering up the switched capacitor converter, the four steps of the short circuit detection method are applied to the switched capacitor converter. In the first step, the control circuit 301 (e.g. Figure 3 (as shown) determines whether the load switch QFB or the second switch QDH is short-circuited. Before turning on any power switch, the control circuit 301 is used to check whether the voltage on the input voltage bus PMID meets the expected low level. The voltage on the input voltage bus PMID is used to indicate whether the load switch QFB or the second switch QDH is short-circuited. In normal operation, before turning on any power switch of the switched capacitor converter, since the load switch QFB is turned off, the power supply VIN is not applied to the input voltage bus PMID. In addition, since the second switch QDH is an isolation switch and the second switch QDH is turned off, the voltage of the battery Battary is not applied to the input voltage bus PMID. At the same time, before powering on the switched capacitor converter, the resistor Ppd_pmid pulls the input voltage bus PMID down to a level approximately equal to zero after the switch S2 is turned on, and the voltage on the input voltage bus PMID remains low.
[0036] In the first step, if the control circuit 301 detects that the voltage on the input voltage bus PMID is higher than a preset voltage, Figure 3 If the first preset reference voltage Vref1 (e.g., first preset reference voltage Vref1 = 0.5V) is exceeded, then either load switch QFB or second switch QDH is short-circuited. The switched capacitor converter stops powering on. Otherwise, the test result indicates that neither load switch QFB nor second switch QDH is short-circuited. Control circuit 301 performs the second step of the short-circuit test method.
[0037] In the second step, the control circuit 301 determines whether the fourth switch QDL or the first switch QCH is short-circuited. First, the first dedicated circuit 201 activates, driving the voltage across the fourth switch QDL (the voltage at node CFL) to 0V. Specifically, the first control switch Q1 and the fourth switch QDL form a current mirror. After the first dedicated circuit 201 activates, the current from the reference current source Iref flows through the first control switch Q1. The ratio of the current flowing through the first control switch Q1 to the current flowing through the fourth switch QDL is 1:M. Therefore, the current flowing through the fourth switch QDL is equal to M × the current of the reference current source Iref. This current drives the voltage at node CFL to 0V.
[0038] It should be noted that if the third switch QCL or the second switch QDH is short-circuited, the first dedicated circuit 201 may not be able to drive the voltage on the node CFL to 0 V. However, this will not affect this circuit short-circuit test.
[0039] Next, the second dedicated circuit 202 is turned on and draws power from the battery within the calculated time t1, driving the voltage on the node CFL to the designed voltage level V1 with a limited current. After time t1, the control circuit 301 checks whether the voltage on the node CFL is higher than the second preset reference voltage Vref2 (e.g., Figure 3 If the voltage on the node CFL is higher than the second preset reference voltage Vref2, it means that neither the fourth switch QDL nor the first switch QCH is short-circuited. The control circuit 301 performs the third step of the short-circuit test method.
[0040] In the second step, the first dedicated circuit 201 is used to drive the voltage on the node CFL to 0V within a limited time t0. This limited time period t0 can be expressed as:
[0041] t0=(Cpar1+Cpar2)×Vo1 / Ilim (1)
[0042] In equation (1), Cpar1 is the total parasitic capacitance from node CFL to AC ground. When calculating Cpar1, all DC power sources are considered to be AC grounded. (For example, the GND node and the output terminal Vo are both considered to be AC grounded). Cpar2 is the total parasitic capacitance from node CFH to AC ground. It should be noted that although node CFH is not directly connected to node CFL, since the capacitance of the flying capacitor Cfly is often relatively large (tens of uF to tens of uF), it is equivalent to a low-impedance path between the CFL and CFH nodes in AC analysis. Therefore, the parasitic capacitance Cpar2 on the CFH node to the AC ground also needs to be included in the calculation of the total parasitic capacitance of the CFL node to the AC ground. Vo1 is the maximum battery voltage allowed in the system. Ilim is the current limit value of the fourth switch QDL. For example, in some embodiments, Cpar1 is equal to 500pF. Cpar2 is equal to 500pF. Vo1 is equal to 4.6V. Ilim is equal to 1mA. According to equation (1), t0 is approximately 5us. In practical applications, considering the build-up time of the gate voltage of the fourth switch QDL, t0 may be set to be greater than the calculated value.
[0043] It should be noted that the second dedicated circuit 202 can be implemented in a variety of ways. These can be broadly divided into two categories: In the first category, the circuit charges the node CFL to a preset voltage V1 via a resistor R1 . In the second category, the circuit charges the node CFL to a preset voltage V1 using a fixed current.
[0044] For the first type of various implementations of the second dedicated circuit 202 (eg Figure 2 As shown in FIG1 , the minimum period during which the second dedicated circuit 202 is turned on is t1min1. In some embodiments, t1min1 can be expressed by the following equation:
[0045] t1min1=τ×ln[V1 / (V1-Vref2)] (2)
[0046] In equation (2), τ is the time constant determined by R1 x (Cpar1 + Cpar2). For example, R1 is 100 kΩ. Cpar1 is 500 pF, and Cpar2 is 500 pF. Therefore, τ is 100 μs. In some embodiments, V1 is 0.5 V, and Vref2 is 0.2 V. Based on equation (2), t1min1 is approximately 51 μs. In practical applications, a margin may be added to t1min1 to obtain t1. For example, t1 can be 100 μs.
[0047] For the second type of various implementations of the second dedicated circuit 202, the minimum period during which the second dedicated circuit 202 is on is equal to t1min 2. In some embodiments, t1min 2 can be represented by the following equation:
[0048] t1min 2=(Cpar1+Cpar2)×Vref2 / I_fix (3)
[0049] In equation (3), I_fix is a fixed current used to charge the node CFL to the preset voltage V1. It should be noted that in practical applications, a margin can be added to t1min 2 in equation (3).
[0050] The upper limit of time t1 is determined so that the second dedicated circuit 202 cannot charge the flying capacitor Cfly to the second preset reference voltage Vref2. This principle provides a maximum allowable value for time t1. For the first type of various implementations of the second dedicated circuit 202, the maximum allowable value of t1 can be expressed by the following equation:
[0051] t1max1=R1×Cfly×ln[V1 / (V1-Verf2)] (4)
[0052] For the second type of various implementations of the second type of dedicated circuit, the maximum allowable value of t1 can be expressed as follows:
[0053] t1max2=Cfly×Vref2 / I_fix (5)
[0054] In operation, the second dedicated circuit 202 drives the voltage at node CFL to the designed voltage level V1 with a limited current within a calculated time t1. After time t1, the control circuit 301 checks whether the voltage at node CFL is higher than a second preset reference voltage Vref2. If the voltage at node CFL is higher than the second preset reference voltage Vref2, it indicates that neither the fourth switch QDL nor the first switch QCH is short-circuited. Otherwise, at least one of the fourth switch QDL or the first switch QCH is short-circuited. After completing the second step, the control circuit 301 proceeds to the third step of the short-circuit test method.
[0055] In the third step, the control circuit 301 determines whether the third switch QCL is short-circuited. The first dedicated circuit 201 is turned on to drive the voltage across the fourth switch QDL (the voltage at the node CFL) to drop with a limited current Ilim within the calculated time t2. When the time t2 expires, the control circuit checks whether the voltage at the node CFL is lower than the calculated third preset reference voltage Vref3 (e.g., Figure 3 If the voltage on the node CFL is lower than the third preset reference voltage Vref3, it means that the third switch QCL is not short-circuited. The control circuit 301 proceeds to the fourth step.
[0056] The minimum value of time t2 is given by the following equation:
[0057] t2=(Cpar1+Cpar2)×(V1-Vref3) / Ilim (6)
[0058] In some embodiments, Cpar1 is equal to 500 pF, and Cpar2 is equal to 500 pF. V1 is equal to 0.5 V, and Vref3 is equal to 0.1 V. According to equation (6), the minimum value of t2 is equal to 0.4 μs. In practical applications, a margin can be added to time t2 to consider the settling time of the gate voltage of the fourth switch QDL.
[0059] In some embodiments, the maximum allowed value of t2 is given by the following equation:
[0060] t2=Cfly×(V1-Vref3) / Ilim (7)
[0061] In the fourth step, the control circuit 301 determines whether the flying capacitor Cfly is short-circuited. After the load switch QFB is turned on, the voltage on the input voltage bus PMID rises to the voltage of the AC power supply VIN, and the second switch QDH is turned on. The turned-on second switch QDH connects the node CFH to the output terminal Vo. By limiting the current, the fourth switch QDL drives the node CFL to pre-charge the flying capacitor Cfly to a voltage level equal to the output terminal Vo. If the flying capacitor Cfly is short-circuited, the fourth switch QDL cannot drive the node CFL to 0V. After the calculated time t3, the control circuit checks whether the voltage on the node CFL is less than the third preset reference voltage Vref3. In some embodiments, the third preset reference voltage Vref3 is close to 0V. If the voltage on the node CFL is less than the third preset reference voltage Vref3, it indicates that there is no short circuit on the flying capacitor Cfly. The control circuit 301 can continue to power the switched capacitor converter.
[0062] It should be noted that Figure 2 The active discharge circuit 120 shown in FIG2 remains closed during the short circuit detection process. Specifically, the active discharge circuit 120 can be equivalent to an open circuit during the short circuit detection process.
[0063] Figure 3 1 shows a short circuit processing device according to various embodiments of the present invention. The control circuit 301 is composed of a comparator 302, a buffer circuit 304 and an inverter 306. Figure 2 In the discussion of , the first preset reference voltage Vref1, the second preset reference voltage Vref2 and the third preset reference voltage Vref3 are used as references for determining whether the switch or the flying capacitor Cfly is short-circuited. Figure 3 As shown, the positive and negative inputs of a single comparator 302 are multiplexed as described above with respect to Figure 2 The corresponding signals required in different detection steps. Figure 3As shown, the positive input of comparator 302 is connected to the input voltage bus PMID and node CFL via switches S31 and S32, respectively. The negative input of comparator 302 is connected to a first preset reference voltage Vref1, a second preset reference voltage Vref2, and a third preset reference voltage Vref3 via switches S33, S34, and S35, respectively. The output of comparator 302 is fed into the input of buffer 304 and the input of inverter 306. The outputs of buffer 304 and inverter 306 are used to determine whether the switch of the switched-capacitor converter and the flying capacitor Cfly are short-circuited.
[0064] Figure 4 Three back-to-back connected transistors according to various embodiments of the present invention are shown. The first dotted box 402 includes back-to-back connected n-type transistors. The drains of the two n-type transistors are directly connected to each other. The back-to-back connected n-type transistors in the first dotted box 402 can be used to replace the above Figure 1-3 The second switch QDH shown in . This replacement is applicable to any embodiment provided in this application.
[0065] The second dotted line box 404 includes back-to-back connected n-type transistors. The sources of these two n-type transistors are directly connected to each other. The back-to-back connected n-type transistors in the second dotted line box 404 can be used to replace the above Figure 1-3 The second switch QDH shown in . This replacement is applicable to any embodiment provided in this application.
[0066] The third dotted line box 406 includes back-to-back connected p-type transistors. The back-to-back connected p-type transistors in the third dotted line box 406 can be used to replace the above Figure 1-3 The second switch QDH shown in . This replacement is applicable to any embodiment provided in this application.
[0067] It should be noted that the above Figure 1-4 The discussed embodiments are based on a single-phase switched capacitor converter.The embodiments discussed above (short circuit detection method) can be extended to a multi-phase switched capacitor converter, since each phase can be checked independently according to the method described above.
[0068] Figure 5 Various embodiments of the present invention are shown. Figure 1 Flowchart of a short-circuit detection method for a switched capacitor converter is shown. Figure 5 The flowcharts shown are examples only and should not unduly limit the scope of the claims. Those skilled in the art will recognize many variations, substitutions, and modifications. For example, the following may be added, removed, replaced, rearranged, and repeated: Figure 5 The steps shown in .
[0069] In step 502, an input voltage bus of a switched capacitor converter is connected to a power supply via a load switch. The output of the switched capacitor converter is connected to a load, such as a battery. The switched capacitor converter includes a first switch, a second switch, a third switch, and a fourth switch connected in series between the input voltage bus and ground, and a flying capacitor connected between a common node between the first and second switches and a common node between the third and fourth switches.
[0070] In step 504 , in a first short-circuit test step, the control circuit 301 determines whether the load switch or the second switch is short-circuited by comparing the voltage on the input voltage bus with a first preset reference voltage.
[0071] In step 506, after passing the first short circuit test step, in the second short circuit test step, the control circuit 301 compares the voltage at the common node of the third switch and the fourth switch with a second preset reference voltage to determine whether the first switch or the fourth switch is short circuited.
[0072] In step 508 , after the second short circuit test step passes, in a third short circuit test step, the control circuit 301 compares the voltage at the common node of the third switch and the fourth switch with a third preset reference voltage to determine whether the third switch is short-circuited.
[0073] The method further includes, after passing the third short-circuit test step, turning on the load switch to generate a voltage on the input voltage bus, and turning on the second switch. In a fourth short-circuit test step, comparing a voltage at a common node between the third switch and the fourth switch with a fourth preset reference voltage to determine whether the flying capacitor is shorted.
[0074] The method also includes discharging the voltage on the common node of the third switch and the fourth switch with a first preset current, and after the first preset time, comparing the voltage on the common node of the third switch and the fourth switch with a fourth preset reference voltage to determine whether the flying capacitor is short-circuited.
[0075] The method also includes, after the switched capacitor converter has been turned off and during a first short circuit test step, after turning off the load switch, discharging the input voltage bus using a resistor and a switch coupled between the input voltage bus and ground, and comparing the voltage on the input voltage bus with a first preset reference voltage to determine whether the load switch or the second switch is short circuited.
[0076] The method also includes, in a second short-circuit test step, using a current mirror to discharge the voltage across the fourth switch for a second preset time, charging the voltage at the common node of the third switch and the fourth switch with a second preset current, and after the second preset time, comparing the voltage at the common node of the third switch and the fourth switch with a second preset reference voltage to determine whether the first switch or the fourth switch is short-circuited.
[0077] The method also includes, in a third short-circuit test step, discharging the voltage across the fourth switch with a third preset current for a third preset time, and comparing the voltage at the common node of the third switch and the fourth switch with a third preset reference voltage to determine whether the third switch is short-circuited.
[0078] Regarding the first step of the short circuit detection method, the method further includes discharging the input voltage bus using a resistor and a switch coupled between the input voltage bus and ground after the switched capacitor converter has been turned off. In the first step, the load switch is kept in a non-conductive state, and when the voltage on the input voltage bus is higher than a first preset reference voltage, it is determined that at least one of the load switch and the second switch is short-circuited.
[0079] Regarding the second step of the short-circuit detection method, the method also includes, in the second step, using a current mirror to discharge the voltage across the fourth switch for a second preset time, charging the voltage of the common node of the third switch and the fourth switch with a second preset current, and after the second preset time, when the voltage at the common node of the third switch and the fourth switch is less than a second preset reference voltage, determining that at least one of the first switch and the fourth switch is short-circuited.
[0080] Regarding the third step of the short-circuit detection method, the method also includes, in the third step, discharging the voltage across the fourth switch with a third preset current and continuing for a third preset time, and determining that the third switch is short-circuited when the voltage at the common node of the third switch and the fourth switch is higher than a third preset reference voltage.
[0081] Although the embodiments of the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
[0082] Furthermore, the scope of this application is not intended to be limited to the particular embodiments of the processes, machines, manufactures, compositions of matter, means, methods, and steps described in the specification. A person of ordinary skill in the art will readily appreciate from the disclosure herein that there are currently existing or later developed processes, machines, manufactures, compositions of matter, means, methods, or steps that perform substantially the same functions or achieve substantially the same results as the corresponding embodiments described herein that may be utilized in accordance with the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufactures, compositions of matter, means, methods, or steps.
Claims
1. A control method for a switched capacitor converter, characterized in that: An input voltage bus of the switched capacitor converter is connected to a power supply via a load switch. The switched capacitor converter includes a first switch, a second switch, a third switch, and a fourth switch connected in series between the input voltage bus and ground, and a flying capacitor connected between a common node of the first switch and the second switch and a common node of the third switch and the fourth switch. The method comprises: In a first short-circuit test step, determining whether the load switch or the second switch is short-circuited by comparing the voltage on the input voltage bus with a first preset reference voltage; After passing the first short-circuit test step, in a second short-circuit test step, determining whether the first switch or the fourth switch is short-circuited by comparing a voltage at a common node between the third switch and the fourth switch with a second preset reference voltage; After passing the second short circuit test step, in a third short circuit test step, a voltage at a common node between the third switch and the fourth switch is compared with a third preset reference voltage to determine whether the third switch is short-circuited.
2. The method according to claim 1, characterized in that Also includes: After passing the third short-circuit test step, turning on the load switch to generate a voltage on the input voltage bus; Turn on the second switch; In a fourth short-circuit test step, a voltage at a common node between the third switch and the fourth switch is compared with a fourth preset reference voltage to determine whether the flying capacitor is short-circuited.
3. The method according to claim 2, characterized in that Also includes: discharging the voltage at the common node between the third switch and the fourth switch with a first preset current; After a first preset time, the voltage at the common node of the third switch and the fourth switch is compared with the fourth preset reference voltage to determine whether the flying capacitor is short-circuited.
4. The method according to claim 1, wherein Also includes: discharging the input voltage bus using a resistor and a switch coupled between the input voltage bus and ground after the switched capacitor converter is turned off; In the first short-circuit test step, after the load switch is turned off, the voltage on the input voltage bus is compared with the first preset reference voltage to determine whether the load switch or the second switch is short-circuited.
5. The method according to claim 1, characterized in that Also includes: In a second short-circuit test step, a current mirror is used to discharge the voltage across the fourth switch for a second preset time; charging a common node between the third switch and the fourth switch with a second preset current; After a third preset time, the voltage at the common node of the third switch and the fourth switch is compared with the second preset reference voltage to determine whether the first switch or the fourth switch is short-circuited.
6. The method according to claim 1, characterized in that Also includes: In a third short-circuit test step, the voltage across the fourth switch is discharged with a third preset current for a fourth preset time; The voltage at the common node of the third switch and the fourth switch is compared with the third preset reference voltage to determine whether the third switch is short-circuited.
7. The method according to claim 1, characterized in that The second switch includes a first body diode connected between a drain and a body terminal of the second switch, and a second body diode connected between a source and a body terminal of the second switch, wherein the first body diode and the second body diode are connected back-to-back.
8. The method according to claim 7, characterized in that Also includes: The channel characteristics of the second switch are controlled by adjusting the voltage potential of the second switch body terminal, wherein the body terminal is grounded during the short circuit test to maintain bidirectional isolation of the second switch.
9. A method for detecting a faulty component in a switched capacitor converter, wherein: The switched capacitor converter has an input voltage bus connected to a power supply via a load switch. The switched capacitor converter includes a first switch, a second switch, a third switch, and a fourth switch connected in series between the input voltage bus and ground, and a flying capacitor connected between a common node between the first switch and the second switch and a common node between the third switch and the fourth switch. The method includes: In a first step, a voltage on an input voltage bus of the switched capacitor converter is compared with a first preset reference voltage to determine whether a load switch or a second switch of the switched capacitor converter is short-circuited, wherein the load switch is coupled between a power supply and the input voltage bus; After the first step, in the second step, a voltage at a common node of the third switch and the fourth switch of the switched capacitor converter is compared with a second preset reference voltage to determine whether the first switch or the fourth switch is short-circuited; After the second step, in the third step, the voltage at the common node of the third switch and the fourth switch is compared with a third preset reference voltage to determine whether the third switch is short-circuited; After the third step, the load switch is turned on to generate a voltage on the input voltage bus, and the second switch is turned on; In the fourth step, the voltage at the common node of the third switch and the fourth switch is compared with a fourth preset reference voltage to determine whether the flying capacitor is short-circuited.
10. The method according to claim 9, characterized in that Before comparing the voltage at the common node of the third switch and the fourth switch with a fourth preset reference voltage, the voltage at the common node of the third switch and the fourth switch is discharged at a first preset current for a first preset time.
11. The method according to claim 9, characterized in that The switched capacitor converter comprises: the first switch, the second switch, the third switch, and the fourth switch connected in series between the input voltage bus and ground; The flying capacitor is connected between a common node between the first switch and the second switch and a common node between the third switch and the fourth switch.
12. The method according to claim 9, characterized in that Also includes: discharging the input voltage bus using a resistor and a switch coupled between the input voltage bus and ground after the switched capacitor converter is turned off; In a first step, the load switch is kept in a non-conducting state, and when the voltage on the input voltage bus is higher than the first preset reference voltage, it is determined that at least one of the load switch and the second switch is short-circuited.
13. The method according to claim 9, characterized in that Also includes: In the second step, a current mirror is used to discharge the voltage across the fourth switch with a limited current for a second preset time; charging a common node between the third switch and the fourth switch with a second preset current; After a second preset time, when the voltage at the common node of the third switch and the fourth switch is less than the second preset reference voltage, it is determined that at least one of the first switch and the fourth switch is short-circuited.
14. The method according to claim 9, characterized in that Also includes: In a third step, the voltage across the fourth switch is discharged with a third preset current for a third preset time; When the voltage at the common node of the third switch and the fourth switch is higher than the third preset reference voltage, it is determined that the third switch is short-circuited.
15. A voltage conversion system, characterized in that: include: A switched capacitor converter comprising a first switch, a second switch, a third switch, and a fourth switch connected in series between an input voltage bus and ground, and a flying capacitor connected between a common node between the first switch and the second switch and a common node between the third switch and the fourth switch, wherein the input voltage bus is configured to be coupled to a power supply via a load switch; A short circuit detection device includes a first dedicated circuit and a second dedicated circuit, wherein: The first dedicated circuit includes a reference current source and a first control switch connected in series between a common node of the second switch and the third switch and ground, wherein the first control switch and the fourth switch form a current mirror; The second dedicated circuit is connected between a common node of the second switch and the third switch and a common node of the third switch and the fourth switch, wherein the second dedicated circuit is configured to charge the common node of the third switch and the fourth switch for a short circuit test.
16. The system according to claim 15, characterized in that The second dedicated circuit includes a second control switch and a resistor connected in series.
17. The system according to claim 15, wherein: the second switch including a first body diode connected between a drain and a body terminal of the second switch, and a second body diode connected between a source and a body terminal of the second switch; The first body diode and the second body diode are connected back-to-back in reverse, wherein the channel characteristics of the second switch are controlled by adjusting the voltage potential at the body terminal of the second switch, and the body terminal is grounded during a short-circuit test to maintain bidirectional isolation of the second switch.
18. The system according to claim 15, wherein: The second switch includes two transistors connected back to back; Wherein, if the two transistors are n-type transistors, the sources of the two transistors are connected, or the drains of the two transistors are connected; If the two transistors are p-type transistors, the sources of the two transistors are connected.
19. The system according to claim 15, wherein: After the switched capacitor converter is turned off, the input voltage bus is discharged using a resistor and a switch coupled between the input voltage bus and ground; In a first step of the short-circuit test, the load switch is in a non-conducting state, and when the voltage on the input voltage bus is higher than a first preset reference voltage, it is determined that at least one of the load switch and the second switch is short-circuited.
20. The system according to claim 15, wherein: In a second step of the short circuit test, a current mirror formed by the first dedicated circuit and the fourth switch is used to discharge the voltage across the fourth switch to zero volts; The second dedicated circuit is used to charge the common node of the third switch and the fourth switch; When a voltage at a common node between the third switch and the fourth switch is less than a second preset reference voltage, it is determined that at least one of the first switch and the fourth switch is short-circuited.
21. The system according to claim 15, wherein: In a third step of the short-circuit test, a current mirror formed by the first dedicated circuit and the fourth switch is used to discharge the voltage across the fourth switch to zero volts; When the voltage at the common node of the third switch and the fourth switch is higher than a third preset reference voltage, it is determined that the third switch is short-circuited.
Citation Information
Patent Citations
Flying capacitor NPC three-level topology
CN110474550A
Ring bus system with a central unit and a number or control modules, in particular for motor vehicle passenger protection systems
DE19813964A1