Detection circuit and illegal removal detection method thereof

Abstract

A detection circuit and an illegal removal detection method thereof are proposed. The detection circuit includes a first connection terminal, an SPI bus, and a security element. The first connection terminal is used to be detachably connected to a mainboard. The security element couples the first connection terminal and the SPI bus. The security element and the mainboard form a first loop for detecting the loop state of the first loop. When the security element detects that the first loop is disconnected, the SPI bus is locked.

Description

Technical Field

[0001] The present invention relates to a device safety removal technology, and in particular to a detection circuit and an illegal removal detection method thereof. Background Art

[0002] With the development of technological trends, today's servers are moving towards modular design in order to cope with changing workload requirements. In the modular design of the device, each device has the advantage of being pluggable, and can provide users with the flexibility to configure the required devices. In the existing technical field, the device of the server may include a management device, and the management device may be detachably connected to the motherboard (host end). However, the disadvantage of this architecture is that when the management device is improperly plugged in and out, there may be concerns about endangering system security. Therefore, how to avoid system security problems caused by the management device being pulled out in an unexpected state is a problem that technicians in this field want to solve. Summary of the invention

[0003] In view of this, the present invention provides a detection circuit and an illegal removal detection method thereof, which can effectively maintain and protect system security.

[0004] The detection circuit of the embodiment of the present invention includes a first connection terminal, an SPI bus and a security element. The first connection terminal is used to be detachably connected to the mainboard. The security element is coupled to the first connection terminal and the SPI bus. The security element and the mainboard form a first loop for detecting the loop state of the first loop. When the security element detects that the first loop is disconnected, the SPI bus is locked.

[0005] The illegal removal detection method of the embodiment of the present invention is applicable to a detection circuit having a first connection terminal, an SPI bus and a security element. The first connection terminal is used to be detachably connected to a mainboard. The security element couples the first connection terminal and the SPI bus. The method comprises the following steps: detecting the loop state of the first connection terminal and the first loop of the mainboard, wherein when it is detected that the first loop is disconnected, the SPI bus is locked.

[0006] Based on the above, the embodiment of the present invention can provide a detection circuit in the management device and can provide an unlocking element. In this way, even if the management device is illegally removed, the system security can still be protected.

[0007] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 A schematic diagram of an electronic system according to an embodiment of the present invention is shown.

[0009] Figure 2A schematic diagram showing a detection operation of a loop status between a detection circuit and a mainboard according to an embodiment of the present invention.

[0010] Figure 3 A schematic diagram showing a detection operation of a circuit state between a detection circuit, an unlocking element, and a mainboard according to an embodiment of the present invention.

[0011] Figure 4 A flow chart showing an illegal removal detection method according to an embodiment of the present invention.

[0012] Description of reference numerals:

[0013] 100: Electronic Systems

[0014] 110: Motherboard

[0015] 120: Management Device

[0016] 121: Baseboard Management Controller

[0017] 122: Security Element

[0018] 1221: Latch unit

[0019] 123: BIOS memory

[0020] 130: Unlock component

[0021] 201: Detection element

[0022] 211,221,331,341: Connection end

[0023] 311,321: Unlocking end

[0024] GND: reference voltage

[0025] LP1, LP2, LP3: loop

[0026] R21, R22, R23: resistors

[0027] V1, V2: voltage

[0028] VCC: power supply voltage

[0029] S402~S410: Steps DETAILED DESCRIPTION

[0030] Some embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The referenced element symbols in the following description will be regarded as the same or similar elements when the same element symbols appear in different drawings. These embodiments are only part of the present invention and do not disclose all possible implementation methods of the present invention. More specifically, these embodiments are only examples of methods and detection circuits within the scope of the present invention.

[0031] Please refer to Figure 1 , Figure 1 A schematic diagram of an electronic system according to an embodiment of the present invention is shown. The electronic system 100 includes a mainboard 110 and a management device 120, wherein the management device 120 is detachably coupled to the mainboard 110. The mainboard 110, for example, includes a connection terminal 211. The management device 120, for example, includes a baseboard management controller (Baseboard Management Controller, BMC) 121, a security element 122, a Basic Input / Output System (Basic Input / Output System, BIOS) memory 123 and a connection terminal 221, wherein the security element 122 can be connected to the BMC 121, the BIOS memory 123 and the connection terminal 221, for example, via a Serial Peripheral Interface (Serial Peripheral Interface, SPI) bus. For example, the electronic system 100 can be a server in a data center, etc., but the present invention is not limited thereto.

[0032] In the present embodiment, the electronic system 100 may include a processor (not shown), which is responsible for the overall operation of the electronic system 100, including system startup and power-on operations. The processor may be connected to the security element 122, and perform data transmission and exchange with one or more peripheral hardware devices connected to the security element 122 via the SPI bus. The processor may include, for example, a central processing unit (CPU), or other programmable general-purpose or special-purpose microprocessors (Microprocessors), digital signal processors (Digital Signal Processors, DSPs), programmable controllers, application-specific integrated circuits (Application Specific Integrated Circuits, ASICs), programmable logic devices (Programmable Logic Devices, PLDs) or other similar devices or combinations of these devices, and the present invention is not limited thereto.

[0033] In the present embodiment, the BMC 121 is a small dedicated processor for collecting the operation and system status of the electronic system 100, such as system voltage and temperature, and managing and monitoring the operation and physical health status of the electronic system 100. In some embodiments, the BMC 121 may also integrate internal monitoring devices, input and output interfaces and buses for communicating with external sensors and expansion components. In addition, the BMC 121 may also be coupled to the BIOS memory 123 for BIOS maintenance. The BIOS memory 123 is, for example, a random access memory (RAM), a read-only memory (ROM), a flash memory, a hard disk or other similar devices or a combination of these devices, and is used to store BIOS program code. The BMC 121 can update the system BIOS and restart the host system. Those with ordinary knowledge in the relevant technical field should have a full understanding of the BMC 121 and can implement the BMC 121 according to actual needs. More details about the BMC 121 will not be further described here.

[0034] It is worth mentioning that the security element 122 can also be connected to the Figure 1 One or more peripheral hardware devices not shown in the figure are used to perform data transmission and exchange. Those with ordinary knowledge in the relevant field can implement them according to needs, so this article will not go into details here.

[0035] Since the management device 120 is detachably connected to the motherboard 110, when the electronic system 100 is transported or stored or when the management device 120 is illegally removed unexpectedly, there is a concern that the system security may be compromised. Therefore, the present invention provides the following detection circuit and its illegal removal detection method to protect the system security. It should be noted that the following embodiments are described by taking the BMC 121 connected to the security element 122 via the SPI bus as an example. However, the security element 122 can also be connected via the SPI bus. Figure 1 One or more devices such as the BIOS memory 123, but the present invention is not limited thereto.

[0036] Figure 2 A schematic diagram showing the detection operation of the loop status between the detection circuit and the mainboard according to an embodiment of the present invention. Figure 2In the electronic system 100, the electronic system 100 includes a mainboard 110 and a management device 120. The mainboard 110 includes a connection terminal 211. The management device 120 includes a detection circuit 201, wherein the detection circuit 201 includes a connection terminal 221, and the connection terminal 221 is detachably coupled to the connection terminal 211. The security element 122 is used to detect the loop state between the connection terminal 221 and the mainboard 110, and decide whether to lock the SPI bus of the security element 122 according to the loop state. Specifically, the security element 122 can form a loop with the mainboard 110, and the security element 122 can detect the loop state of the loop. When the security element 122 detects that the loop is disconnected, the SPI bus with the mainboard 110 is locked.

[0037] In this embodiment, the detection circuit 201 includes a BMC 121, a security element 122, resistors R21, R22 and R23, wherein the security element 122 includes a latch unit 1221. The latch unit 1221 is coupled to the SPI bus coupled to the connection terminal 221. The resistor R21 is coupled to the power supply voltage VCC. The resistor R22 is coupled between the reference voltage GND and the BMC 121 and the security element 122. The resistor R23 is coupled between the reference voltage GND and the BMC 121 and the security element 122.

[0038] Please refer to Figure 2 When the connection terminal 211 is electrically connected to the connection terminal 221 of the mainboard 110, a voltage V1 can be generated on the connection terminals 211 and 221 and a loop LP1 can be formed. The connection terminals 211 and 221 are electrically connected to each other, and the resistors R21 and R22 can form a resistor string, and are used to divide the power supply voltage VCC to generate the voltage V1. At this time, the BMC 121 and the security element 122 can detect that the first voltage is the voltage V1, and make the BMC 121 and the security element 122 determine whether the loop LP1 is turned on or off according to the voltage V1 to determine whether the management device 120 is safely inserted into the mainboard 110. In this embodiment, the security element 122 detects that the first voltage is the voltage V1, and can determine that the loop LP1 is turned on. At the same time, the first voltage detected by the latch unit 1221 included in the security element 122 is the voltage V1, so the latch unit 1221 is maintained at a non-triggered high level. The processor included in the electronic system 100 can be connected to other devices such as the BMC 121 and the BIOS memory 123 through the SPI bus of the secure element 122 , and load firmware to enable the electronic system 100 to start normally.

[0039] On the other hand, when the connection terminal 211 and the connection terminal 221 are unexpectedly disconnected, the resistor R22 is a pull-down resistor, and the voltage detected by the BMC 121 and the security element 122 can be equal to the reference voltage GND. At this time, the BMC 121 and the security element 122 can detect that the first voltage is the reference voltage GND, and it can be determined that the loop LP1 is disconnected. In this way, the security element 122 will lock the SPI bus of the security element 122, so that the electronic system 100 enters the protection mode. At the same time, the security element 122 triggers the latch unit 1221 included therein to switch from a high level to a low level to lock the SPI bus. In detail, the first voltage received by the latch unit 1221 included in the security element 122 is the reference voltage GND, and the latch unit 1221 will be triggered by the reference voltage GND to remain at a low level. Even if the connection terminal 211 and the connection terminal 221 are connected again, the security element 122 will still lock the SPI bus of the security element 122, so that the electronic system 100 remains in the protection mode. In the protection mode, the processor included in the electronic system 100 cannot connect to other devices such as the BMC 121 and the BIOS memory 123 through the SPI bus of the secure element 122 to load firmware, so that the electronic system 100 cannot start normally.

[0040] In another embodiment, if the power supply voltage VCC is not powered when the connection terminal 211 and the connection terminal 221 are electrically connected, the resistor R22 will also be a pull-down resistor, and the voltage detected by the BMC 121 and the security element 122 can be equal to the reference voltage GND. As in the detection mechanism of the security element 122 when the connection terminal 211 and the connection terminal 221 are disconnected, the security element 122 will lock the SPI bus of the security element 122, so that the electronic system 100 enters the protection mode.

[0041] Figure 3 A schematic diagram showing the detection action of the circuit state between the detection circuit, the unlocking element, and the mainboard according to an embodiment of the present invention. Figure 3 In the electronic system 100, the electronic system 100 includes a mainboard 110, a management device 120, and an unlocking element 130. The mainboard 110 includes a connection terminal 211. The management device 120 includes a detection circuit 201, wherein the detection circuit 201 includes a connection terminal 221 and an unlocking terminal 311, and the connection terminal 221 is detachably connected to the connection terminal 211. The unlocking element 130 includes an unlocking terminal 321, and the unlocking terminal 321 is detachably connected to the unlocking terminal 311. The security element 122 is used to detect the loop state of the unlocking terminal 311 and the unlocking element 130, and determine whether to lock the SPI bus of the security element 122 according to the loop state.

[0042] The unlocking element 130 provided by the present invention can be used to prevent the electronic system 100 from entering the protection mode, and the unlocking element 130 can also be used to unlock the protection mode.

[0043] In this embodiment, the devices and components included in the detection circuit 201 have been described in detail in the above-mentioned embodiments and implementations, and will not be repeated here. Figure 3 , when the unlocking terminal 311 and the unlocking terminal 321 are electrically connected, the unlocking terminals of the unlocking terminal 311 and the unlocking terminal 321 are at voltage V2 and form loop LP2. The unlocking terminal 311 and the unlocking terminal 321 are electrically connected to each other, and the resistors R21 and R23 can form a resistor string, and are used to divide the power supply voltage VCC to generate voltage V2. At this time, the BMC 121 and the security element 122 can detect that the second voltage is voltage V2, and the BMC 121 and the security element 122 can determine whether the loop LP2 is turned on or off according to the voltage V2 to determine whether the unlocking element 130 is inserted into the management device 120. When the security element 122 detects the voltage V2, it can determine that the loop LP2 is turned on, indicating that the unlocking element 130 is inserted into the management device 120. At the same time, when the security element 122 detects that the loop LP2 is turned on, the latch unit 1221 is triggered to turn on the SPI bus of the security element 122. Specifically, the security element 122 detects the voltage V2 at the unlocking terminal to trigger the latch unit 1221 to switch from a low level to a high level to unlock the SPI bus of the security element 122. In this embodiment, after the protection mode is released by the unlocking element 130, the management device 120 can be electrically connected to the mainboard 110, and the electronic system 100 can load firmware through the SPI bus of the security element 122 to enable the electronic system 100 to start normally.

[0044] On the other hand, when the unlocking terminal 311 and the unlocking terminal 321 are electrically connected and the connecting terminal 211 and the connecting terminal 221 are disconnected, the voltage V2 is maintained on the connecting terminal of the unlocking terminal 311 and the unlocking terminal 321. At this time, the BMC 121 and the security element 122 can detect that the second voltage is the voltage V2. The second voltage detected by the latch unit 1221 included in the security element 122 is the voltage V2, so the latch unit 1221 is still maintained at a non-triggered high level to prevent the electronic system 100 from entering the protection mode. In this way, the electronic system 100 can load firmware through the SPI bus of the security element 122 to enable the electronic system 100 to start normally.

[0045] In another embodiment, the security element 122 can be used to prevent the electronic system 100 from entering the protection mode. Figure 2 and Figure 3, the detection circuit 201 includes a connection terminal 221 and a connection terminal 331, and the connection terminal 221 is detachably connected to the connection terminal 211. The unlocking element 130 includes a connection terminal 341, and the connection terminal 341 is detachably connected to the connection terminal 331 to form a loop. The security element 122 is used to detect the loop state between the unlocking terminal 331 and the unlocking element 130, and decide whether to lock the SPI bus of the security element 122 according to the loop state. Figure 2 In the embodiment, when the connection terminal 331 and the connection terminal 341 are not electrically connected and the connection terminal 211 and the connection terminal 221 are disconnected, or the power supply voltage VCC is out of power, the resistor R22 is a pull-down resistor, and the voltage detected by the BMC 121 and the security element 122 is equal to the reference voltage GND. At this time, the BMC 121 and the security element 122 can detect that the first voltage is the reference voltage GND. In this way, the security element 122 will lock the SPI bus of the security element 122, so that the electronic system 100 enters the protection mode. At the same time, the first voltage received by the latch unit 1221 included in the security element 122 is the reference voltage GND, and the latch unit 1221 will be triggered at a low level by the reference voltage GND.

[0046] Please refer to Figure 3 , when the connection terminal 331 and the connection terminal 341 are electrically connected, a loop is formed, and the security element 122 determines whether the loop state is on or off according to the second voltage. When the connection terminal 331 and the connection terminal 341 are electrically connected and the connection terminal 211 and the connection terminal 221 are disconnected, the resistors R21 and R23 can form a resistor string, and are used to divide the power supply voltage VCC to generate the voltage V2, and make the BMC 121 and the security element 122 determine whether the loop LP3 is on or off according to the voltage V2 to determine whether the unlocking element 130 is inserted into the management device 120. In this embodiment, the security element 122 detects that the second voltage is the voltage V2, and can determine that the loop state of the loop LP3 is on. At this time, the second voltage detected by the latch unit 1221 included in the security element 122 is the voltage V2, so the latch unit 1221 is triggered at a high level. At the same time, the security element 122 keeps the security element 122 unlocked from the SPI bus to keep from entering the protection mode.

[0047] In this embodiment, when the connection terminal 331 and the connection terminal 341 are electrically connected and the connection terminal 211 and the connection terminal 221 are not electrically connected, if the connection terminal 331 and the connection terminal 341 are disconnected, the resistor R22 will also be a pull-down resistor, and the voltage detected by the BMC 121 and the security element 122 can be equal to the reference voltage GND. As the detection mechanism of the security element 122 when the connection terminal 211 and the connection terminal 221 are disconnected, the security element 122 will lock the SPI bus of the security element 122, so that the electronic system 100 enters the protection mode.

[0048] The security element 122 , the latch unit 1221 , the unlocking element 130 and other devices and components mentioned above can all be implemented using hardware circuits well known in the art.

[0049] Figure 4 A flowchart showing an illegal removal detection method according to an embodiment of the present invention is shown. Figure 4 In step S402, the power of the electronic system is turned on and the management device can be activated. In step S404, the detection circuit can determine whether the management device is removed according to the first voltage. If the detection circuit determines that the management device is not removed (step S404 is determined to be no), step S406 is executed.

[0050] In step S406, the electronic system may load firmware via the SPI bus to enable the electronic system to boot normally. Specifically, the electronic system may connect to other devices such as the BMC and BIOS memory via the SPI bus of the secure element, and load firmware to enable the electronic system to boot normally.

[0051] If the detection circuit determines that the management device is illegally removed (step S404 is determined as yes), step S408 is executed. In step S408, the detection circuit can determine whether the unlocking unit is connected according to the second voltage. If the detection circuit determines that the unlocking unit is connected (step S408 is determined as yes), step S406 is executed. If the detection circuit determines that the unlocking unit is not connected (step S408 is determined as no), step S410 is executed.

[0052] In step S410, it is determined that the device is illegally removed, and the detection circuit locks the SPI bus to put the electronic system into protection mode. Specifically, in protection mode, the SPI bus of the security element will be locked by the security element, so the electronic system cannot connect to other devices such as BMC and BIOS memory through the SPI bus of the security element to load firmware, so that the electronic system cannot start normally.

[0053] In summary, the detection circuit and illegal removal detection method provided by the embodiment of the present invention can determine whether the management device has been illegally removed through the detection circuit, and when the management device has been illegally removed, the system enters the protection mode and cannot be normally started. In addition, the present invention also provides a mechanism to prevent the system from entering the protection mode through the unlocking element, and the unlocking element further provides a mechanism to unlock the protection mode. Based on this, the doubts about the system security caused by the illegal extraction of the detachable management device can be avoided, and the system security can be effectively maintained and protected.

Claims

1. A detection circuit, comprising: A first connection end detachably coupled to a mainboard; A serial peripheral interface bus coupled to the first connection end; a security element coupled to the SPI bus and forming a first loop with the mainboard for detecting a loop state of the first loop, wherein when the security element detects that the first loop is disconnected, the SPI bus is locked; as well as An unlocking end is used to be detachably connected with an unlocking element to form a second circuit, wherein when the security element detects that the second circuit is turned on, the serial peripheral interface bus is turned on.

2. The detection circuit as claimed in claim 1, wherein when the first connection end is electrically connected to the mainboard to form the first loop, the safety element determines whether the first loop is turned on or off according to a first voltage.

3. The detection circuit as claimed in claim 2, wherein the safety element further comprises: A latch unit coupled to the SPI bus; When the safety element detects that the first voltage is a reference voltage, the first loop is disconnected and triggers the latch unit to switch from a high level to a low level to lock the serial peripheral interface bus.

4. The detection circuit as claimed in claim 3, When the safety element detects that the second loop is turned on, the latch unit is triggered to turn on the serial peripheral interface bus. 5 . The detection circuit as claimed in claim 4 , wherein when the unlocking end is electrically connected to the unlocking element, the security element detects a second voltage of the unlocking end to trigger the latch unit to switch from a low level to a high level to unlock the SPI bus.

6. The detection circuit according to claim 4, further comprising: A second connection end, detachably coupled to the unlocking element to form a third loop; When the second connection end is electrically connected to the unlocking element, the safety element determines whether the circuit state of the third circuit is on or off according to a second voltage.

7. The detection circuit as claimed in claim 6, wherein when the first connection end is disconnected from the mainboard and the loop state of the third loop is on, the SPI bus remains unlocked. 8 . The detection circuit as claimed in claim 6 , wherein when the second connection end is disconnected from the unlocking element, the security element locks the SPI bus.

9. An electronic system comprising: A motherboard; as well as A detection circuit, the detection circuit also includes: A first connection end detachably coupled to the mainboard; A serial peripheral interface bus coupled to the first connection end; a security element coupled to the SPI bus and forming a first loop with the mainboard for detecting a loop state of the first loop, wherein when the security element detects that the first loop is disconnected, the SPI bus is locked; and An unlocking end is used to be detachably connected with an unlocking element to form a second circuit, wherein when the security element detects that the second circuit is turned on, the serial peripheral interface bus is turned on.

10. An illegal removal detection method, applicable to a detection circuit having a first connection terminal, a serial peripheral interface bus and a security element, wherein the first connection terminal is used to be detachably connected to a mainboard, wherein the serial peripheral interface bus is coupled to the first connection terminal and the security element, wherein the detection circuit further includes an unlocking terminal, which is used to be detachably connected to an unlocking element to form a second loop, the method comprising: Detecting a loop state between the first connection end and a first loop of the mainboard, wherein when it is detected that the first loop is disconnected, locking the serial peripheral interface bus; as well as When the security element detects that a second loop is turned on, the serial peripheral interface bus is turned on.

11. The illegal removal detection method according to claim 10, further comprising: When the first connection end is electrically connected to the mainboard to form the first loop, the first loop is judged to be turned on or off according to a first voltage.

12. The illegal removal detection method as claimed in claim 11, wherein the security element further comprises a latch unit coupled to the SPI bus, the method further comprising: When it is detected that the first voltage is a reference voltage, the first loop is disconnected and triggers the latch unit to switch from a high level to a low level to lock the serial peripheral interface bus.

13. The illegal removal detection method according to claim 12, comprising: When it is detected that the second loop is turned on, the latch unit is triggered to turn on the serial peripheral interface bus.

14. The illegal removal detection method according to claim 13, further comprising: When the unlocking end is electrically connected to the unlocking element, a second voltage of the unlocking end is detected to trigger the latch unit to switch from a low level to a high level to unlock the SPI bus.

15. The illegal removal detection method as claimed in claim 13, wherein the detection circuit further comprises a second connection terminal detachably coupled to the unlocking element to form a third loop, the method further comprising: When the second connection end is electrically connected to the unlocking element, the circuit state of the third circuit is determined to be on or off according to a second voltage.

16. The illegal removal detection method according to claim 15, further comprising: When the first connection end is disconnected from the mainboard and the loop state of the third loop is on, the serial peripheral interface bus is kept unlocked.

17. The illegal removal detection method according to claim 15, further comprising: When the second connection end is disconnected from the unlocking element, the security element locks the SPI bus.

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