Common-Mode Noise Suppression Filter Based on 3D Integration Technology

Abstract

The present invention discloses a common-mode noise suppression filter based on three-dimensional integration technology, which includes seven top RDL spiral inductors, and four TSV capacitors are connected below the seven top RDL spiral inductors. The present invention can achieve the basic performance of common-mode noise while having a compact overall structure and high integration.

Description

Technical Field

[0001] The present invention belongs to the technical field of three-dimensional integrated circuits, and relates to a common-mode noise suppression filter based on three-dimensional integration technology. Background Art

[0002] Differential or balanced signals have become a popular technology in high-speed systems due to the good immunity of the ground to external noise, small crosstalk between adjacent pairs, and signal integrity. However, in a real differential signal structure, there is inevitable common-mode (CM) noise, which can have a great impact on the transmitted signal. This noise is caused by the unbalanced output of the signal transmitting device, the asymmetry of the two signal paths, or crosstalk from adjacent signal pairs.

[0003] In the past few years, techniques for suppressing CM noise have been widely discussed, including using ferrite materials, ground defect structures, and differential lines such as mushroom-shaped structures. These methods are developed based on printed circuit boards (PCBs), low-temperature co-fired ceramics (LTCCs), or ferrite substrates, but due to the need for a large horizontal chip area, they are not easily implemented on a chip-level or three-dimensional chip structure.

[0004] Based on a reflectionless symmetric circuit network, realized through through-silicon via (TSV) three-dimensional integration technology, and integrating passive devices through three-dimensional integration technology for complex circuit topologies, a compact structure and higher integration can be achieved. While achieving the basic performance, the horizontal area of the occupied chip is reduced. Summary of the Invention

[0005] The purpose of the present invention is to provide a common-mode noise suppression filter based on three-dimensional integration technology, which can achieve the basic performance of common-mode noise while having a compact overall structure and high integration.

[0006] The technical solution adopted by the present invention is that a common-mode noise suppression filter based on three-dimensional integration technology includes seven top RDL spiral inductors, and four TSV capacitors are connected below the seven top RDL spiral inductors.

[0007] The characteristics of the present invention also lie in:

[0008] The seven top RDL spiral inductors include RDL spiral inductor L1, RDL spiral inductor L2, RDL spiral inductor L3, RDL spiral inductor L4, RDL spiral inductor L5, RDL spiral inductor L6, and RDL spiral inductor L7;

[0009] The RDL spiral inductors L1, L2, L3, L4, L5, L6, and L7 have the same structure, and are all formed by rotating RDL with equal thickness and width.

[0010] The spiral inductor includes a rotating starting end port1 and a rotating ending end port2.

[0011] The four TSV capacitors include TSV capacitor C1, TSV capacitor C2, TSV capacitor C3, and TSV capacitor C4;

[0012] TSV capacitor C1, TSV capacitor C2, TSV capacitor C3, and TSV capacitor C4 have the same structure. The TSV capacitor includes capacitor plates plate1, plate2, plate3, and plate4; A MIM capacitor is formed between capacitor plate plate1 and capacitor plate plate2; A MIM capacitor is formed between capacitor plate plate3 and capacitor plate plate4;

[0013] Capacitor plate plate1 is connected to capacitor plate plate3 through a TSV; Capacitor plate plate2 is connected to capacitor plate plate4 through a TSV.

[0014] Plate1 of TSV capacitor C1 is respectively connected to the starting end port1 of RDL spiral inductor L1 and the starting end port1 of RDL spiral inductor L2;

[0015] Plate1 of TSV capacitor C2 is respectively connected to the ending end port2 of RDL spiral inductor L2 and the starting end port1 of RDL spiral inductor L3;

[0016] Plate2 of TSV capacitor C3 is respectively connected to the starting end port1 of RDL spiral inductor L4 and the starting end port1 of RDL spiral inductor L5;

[0017] Plate2 of TSV capacitor C4 is respectively connected to the ending end port2 of RDL spiral inductor L5 and the starting end port1 of RDL spiral inductor L6;

[0018] Plate2 of TSV capacitor C1, plate2 of TSV capacitor C2, plate1 of TSV capacitor C3, and plate1 of TSV capacitor C4 are all connected to the starting end port1 of spiral inductor L7; The ending end port2 of spiral inductor L7 is grounded.

[0019] The beneficial effects of the present invention are as follows:

[0020] 1. Adopting a silicon-based substrate is compatible with existing common silicon process products;

[0021] 2. Adopting RDL spiral inductors can achieve inductance during interconnection without increasing the area;

[0022] 3. Implement the inductor device using TSV technology, with high integration density, reducing the chip's horizontal area. Description of the Drawings

[0023] Figure 1 is a three-dimensional structural schematic diagram of the common-mode noise suppression filter based on three-dimensional integration technology of the present invention;

[0024] Figure 2 is a schematic diagram of the spiral inductor in the common-mode noise suppression filter based on three-dimensional integration technology of the present invention;

[0025] Figure 3 is a schematic diagram of the TSV capacitor in the common-mode noise suppression filter based on three-dimensional integration technology of the present invention;

[0026] Figure 4 is a circuit schematic diagram of the common-mode noise suppression filter based on three-dimensional integration technology of the present invention;

[0027] Figure 5 is a structural schematic diagram of a single TSV in the common-mode noise suppression filter based on three-dimensional integration technology of the present invention.

[0028] In the figure, 1. copper pillar, 2. silicon dioxide layer, 3. silicon-based substrate layer, 4. upper RDL, 5. lower RDL, 6. interconnecting bond, 7. interconnecting layer. Detailed Embodiment

[0029] The present invention will be described in detail below in conjunction with the drawings and specific embodiments.

[0030] The common-mode noise suppression filter based on three-dimensional integration technology of the present invention has a circuit diagram as Figure 4 shown, and a three-dimensional structure diagram as Figure 1 shown, including seven top RDL spiral inductors, and the seven top RDL spiral inductors are connected to four TSV capacitors below.

[0031] The seven top RDL inductors include spiral inductor L1, spiral inductor L2, spiral inductor L3, spiral inductor L4, spiral inductor L5, spiral inductor L6, and spiral inductor L7;

[0032] The spiral inductors L1, L2, L3, L4, L5, L6, and L7 have the same structure, and are all formed by rotating RDL with equal thickness and width.

[0033] Figure 2 is a structural schematic diagram of the spiral inductor. The spiral inductor includes a starting end port1 and an ending end port2.

[0034] The four TSV capacitors include TSV capacitor C1, TSV capacitor C2, TSV capacitor C3, and TSV capacitor C4;

[0035] TSV capacitor C1, TSV capacitor C2, TSV capacitor C3, and TSV capacitor C4 have the same structure and are all formed by connecting a number of TSVs to the capacitor plate plate.

[0036] As Figure 3 shown, the TSV capacitor includes capacitor plates plate1, plate2, plate3, and plate4; a MIM (metal-oxide-metal) capacitor is formed between capacitor plates plate1 and plate2; a MIM (metal-oxide-metal) capacitor is formed between capacitor plates plate3 and plate4.

[0037] Both capacitor plates plate1 and plate2 are the upper RDL4; both capacitor plates plate3 and plate4 are the lower RDL5.

[0038] The upper RDL4 is connected to the interconnect layer 7 through the interconnect key 6. The interconnect layer 7 is connected to the interconnect key 6 below, and the upper part of the interconnect layer 7 is connected to each spiral inductor.

[0039] Capacitor plate plate1 is connected to capacitor plate plate3 through 3 TSVs; capacitor plate plate2 is connected to capacitor plate plate4 through 3 TSVs. Coupling capacitors are formed between the individual TSVs.

[0040] Plate1 of TSV capacitor C1 is respectively connected to the starting end port1 of spiral inductor L1 and the starting end port1 of spiral inductor L2;

[0041] Plate1 of TSV capacitor C2 is respectively connected to the ending end port2 of spiral inductor L2 and the starting end port1 of spiral inductor L3;

[0042] Plate2 of TSV capacitor C3 is respectively connected to the starting end port1 of spiral inductor L4 and the starting end port1 of spiral inductor L5;

[0043] Plate2 of TSV capacitor C4 is respectively connected to the ending end port2 of spiral inductor L5 and the starting end port1 of spiral inductor L6;

[0044] Plate2 of TSV capacitor C1, plate2 of TSV capacitor C2, plate1 of TSV capacitor C3, and plate1 of TSV capacitor C4 are all connected to the starting end port1 of spiral inductor L7. The ending end port2 of spiral inductor L7 is grounded.

[0045] As shown Figure 5 in the figure, each TSV (Through-Silicon Via) includes a copper pillar 1, and the copper pillar 1 is coaxially wrapped with a silicon dioxide layer 2 and a silicon-based substrate layer 3 in sequence.

[0046] Table 1 below shows the numerical values of the components of the common-mode noise suppression filter based on three-dimensional integration technology of the present invention:

[0047] Table 1

[0048] Inductance value (nH) Capacitance value (pF) L1, L3, L4, L6 0.25 C1 0.1 L2, L5 0.325

Claims

1. A common-mode noise suppression filter based on three-dimensional integration technology, characterized in that: it includes seven top RDL spiral inductors, and four TSV capacitors are connected below the seven top RDL spiral inductors; The seven top RDL spiral inductors include RDL spiral inductor L1, RDL spiral inductor L2, RDL spiral inductor L3, RDL spiral inductor L4, RDL spiral inductor L5, RDL spiral inductor L6, and RDL spiral inductor L7; The RDL spiral inductors L1, L2, L3, L4, L5, L6, and L7 have the same structure and are all formed by rotating RDL with equal thickness and width; The spiral inductor includes a rotation start end port1 and a rotation end port2; The four TSV capacitors include TSV capacitor C1, TSV capacitor C2, TSV capacitor C3, and TSV capacitor C4; The TSV capacitors C1, C2, C3, and C4 have the same structure. The TSV capacitor includes capacitor plates plate1, plate2, plate3, and plate4; A MIM capacitor is formed between capacitor plate plate1 and capacitor plate plate2; A MIM capacitor is formed between capacitor plate plate3 and capacitor plate plate4; Capacitor plate plate1 is connected to capacitor plate plate3 through a TSV; Capacitor plate plate2 is connected to capacitor plate plate4 through a TSV; The plate1 of the TSV capacitor C1 is respectively connected to the start end port1 of the RDL spiral inductor L1 and the start end port1 of the RDL spiral inductor L2; The plate1 of the TSV capacitor C2 is respectively connected to the end port2 of the RDL spiral inductor L2 and the start end port1 of the RDL spiral inductor L3; The plate2 of the TSV capacitor C3 is respectively connected to the start end port1 of the RDL spiral inductor L4 and the start end port1 of the RDL spiral inductor L5; The plate2 of the TSV capacitor C4 is respectively connected to the end port2 of the RDL spiral inductor L5 and the start end port1 of the RDL spiral inductor L6; The plate2 of the TSV capacitor C1, the plate2 of the TSV capacitor C2, the plate1 of the TSV capacitor C3, and the plate1 of the TSV capacitor C4 are all connected to the start end port1 of the spiral inductor L7; The end port2 of the spiral inductor L7 is grounded.

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