Automatic Chip Corner Missing Detection Method and Automatic Chip Corner Missing Detection System

Abstract

The present invention discloses a method for automatically detecting wafer chamfers and a system for automatically detecting wafer chamfers. The method for automatically detecting wafer chamfers includes the following steps. Obtain a plurality of wafer images of a plurality of wafers. Integrate these wafer images to establish a template image. Compare each wafer image with the template image to obtain a difference image. Perform binarization processing on each difference image. Remove noise from each binarized difference image. Detect whether there is a chamfer in each difference image based on the texture of each difference image after noise removal.

Description

Technical Field

[0001] The present invention relates to an automatic detection method and an automatic detection system, and particularly to a method and a system for automatically detecting chip corner defects. Background Art

[0002] With the development of electronic technology, the demand for chips is increasing day by day. In semiconductor manufacturing plants, wafers are processed through tens of thousands of manufacturing processes to form various microelectronic components. During the manufacturing process, wafers need to be continuously transported between machines by robotic arms.

[0003] Researchers have found that chip corner defects may occur at the edges of wafers. Once a corner defect occurs, fragmentation may occur in subsequent manufacturing processes, wasting a considerable amount of production resources in vain.

[0004] Therefore, researchers are working on developing a method for detecting chip corner defects in order to quickly detect corner defects and avoid wasting production resources. Summary of the Invention

[0005] The present invention relates to a method and a system for automatically detecting chip corner defects. After establishing a template image using image processing technology, the corner defects are quickly detected to avoid wasting production resources.

[0006] According to a first aspect of the present invention, a method for automatically detecting chip corner defects is provided. The method for automatically detecting chip corner defects includes the following steps. Obtain a plurality of wafer images of a plurality of wafers. Integrate these wafer images to establish a template image. Compare each wafer image with the template image to obtain a difference image. Perform binarization processing on each difference image. Remove noise from each binarized difference image. Detect whether each difference image has a corner defect based on the texture of each difference image after noise removal.

[0007] According to a second aspect of the present invention, an apparatus for automatically detecting chip corner defects is provided. The apparatus for automatically detecting chip corner defects includes an input unit, an integration unit, a comparison unit, a binarization unit, a noise removal unit, and a detection unit. The input unit is used to obtain a plurality of wafer images of a plurality of wafers. The integration unit is used to integrate these wafer images to establish a template image. The comparison unit is used to compare each wafer image with the template image to obtain a difference image. The binarization unit is used to perform binarization processing on each difference image. The noise removal unit is used to remove noise from each binarized difference image. The detection unit is used to detect whether each difference image has a corner defect based on the texture of each difference image after noise removal.

[0008] For a better understanding of the above and other aspects of the present invention, the following specific embodiments are given and described in detail in conjunction with the accompanying drawings: Description of the Drawings

[0009] Figure 1 A schematic diagram for illustrating a case where a notch is generated on a wafer;

[0010] Figure 2 A schematic diagram for illustrating another case where a notch is generated on a wafer;

[0011] Figures 3 to 5 An example diagram of the notch marked on the wafer image by the wafer notch automatic detection method of this embodiment;

[0012] Figure 6 A block diagram of a wafer notch automatic detection system according to an embodiment;

[0013] Figure 7 A flowchart of a wafer notch automatic detection method according to an embodiment;

[0014] Figure 8 A schematic diagram of step S130 according to an embodiment;

[0015] Figure 9 A schematic diagram for illustrating steps S150 - S160;

[0016] Figure 10 A schematic diagram for illustrating steps S160 - S190;

[0017] Figure 11 A wafer notch automatic detection system diagram according to another embodiment;

[0018] Figure 12 A flowchart of a wafer notch automatic detection method according to another embodiment;

[0019] Figure 13 A schematic diagram for illustrating step S210. Detailed Description of the Invention

[0020] Please refer to Figure 1 , which illustrates a case where a notch is generated on a wafer. It can be found from the wafer image WF11 of the wafer that the positioning notch N11 has not generated a notch yet. After some manufacturing processes, it can be found from the wafer image WF11' that a notch has been generated on the positioning notch N11. Please refer to Figure 2 , which illustrates another case where a notch is generated on a wafer. It can be found from the wafer image WF12 of the wafer that no notch has been generated on the edge EG12 yet. After some manufacturing processes, it can be found from the wafer image WF12' that a notch has been generated on the edge EG12.

[0021] During the manufacturing process, the wafer is analyzed by imaging to determine whether it meets the standards and whether there are any defects. In this embodiment, the R & D personnel further propose an automatic wafer corner defect detection method that enables the system to automatically analyze whether there is a corner defect, as well as the position and pattern of the corner defect from these images. Please refer to Figures 3 to 5 , which shows an example diagram of the corner defect marked in the wafer image by the automatic wafer corner defect detection method of this embodiment. As Figure 3 shown, through the automatic wafer corner defect detection method of this embodiment, the corner defect C11 can be marked in the wafer image WF11’. As Figure 4 shown, through the automatic wafer corner defect detection method of this embodiment, the corner defect C12 can be marked in the wafer image WF12’. As Figure 5 shown, there is no corner defect in the wafer image WF13. After some manufacturing processes, there is also no corner defect in the wafer image WF13’. Through the automatic wafer corner defect detection method of this embodiment, the wafer image WF13’ without a corner defect will not be mislabeled with a corner defect.

[0022] Please refer to Figure 6 , which shows a block diagram of an automatic wafer corner defect detection system 100 according to an embodiment. The automatic wafer corner defect detection system 100 includes an input unit 110, a grayscale unit 120, an integration unit 130, a comparison unit 140, a cutting unit 150, a conversion unit 160, a binarization unit 170, a noise removal unit 180, and a detection unit 190. The general functions of each component are as follows. The input unit 110 is used for data input. The input unit 110 is, for example, a network transmission module, a hard disk, or a transmission line. The grayscale unit 120 is used to convert the color content into monochromatic grayscale content. The integration unit 130 is used for image integration. The comparison unit 140 is used for image comparison. The cutting unit 150 is used for image cutting. The conversion unit 160 is used for coordinate conversion. The binarization unit 170 is used for the binarization process. The noise removal unit 180 is used to remove noise. The detection unit 190 is used for the detection process. The grayscale unit 120, the integration unit 130, the comparison unit 140, the cutting unit 150, the conversion unit 160, the binarization unit 170, the noise removal unit 180, and the detection unit 190 are, for example, a circuit, a chip, a circuit board, or a storage device storing program codes. The operations of each component are further described in detail below through a flowchart.

[0023] Please refer to Figure 7, which shows a flowchart of a method for automatically detecting wafer chamfers according to an embodiment. The method for detecting wafer chamfers in this embodiment is executed before the completion of the wafer manufacturing process, so that wafer chamfers during the manufacturing process can be immediately detected to avoid waste of production resources. In step S110, the input unit 110 obtains several wafer images WF11’, WF12’, …, WF1n’ of several wafers. In an embodiment, these wafer images WF11’, WF12’, …, WF1n’ belong to the same lot. These wafers have gone through the same manufacturing process, so these wafer images WF11’, WF12’, …, WF1n’ should theoretically be quite close. Only in the case of chamfers, there may be obvious differences.

[0024] Next, in step S120, the grayscale unit 120 converts these wafer images WF11’, WF12’, …, WF1n’ into monochromatic grayscale content. This step only needs to be executed when the wafer images WF11’, WF12’, …, WF1n’ are in color. That is to say, if the wafer images WF11’, WF12’, …, WF1n’ are originally monochromatic, this step can be omitted.

[0025] Then, in step S130, the integration unit 130 integrates these wafer images WF11’, WF12’, …, WF1n’ to establish a template image TP1. Please refer to Figure 8 , which shows a schematic diagram of step S130 according to an embodiment. Each of the above wafer images WF11’, WF12’, …, WF1n’ has several pixel points. Pixel points where the wafer is captured have larger pixel values, and pixel points where the wafer is not captured have lower pixel values. In this step, the integration unit 130 extracts the maximum pixel value from the wafer images WF11’, WF12’, …, WF1n’ for each pixel point to form the template image TP1. For a certain pixel point, as long as any one of the wafer images WF11’, WF12’, …, WF1n’ captures the wafer, it will appear in the template image TP1. Therefore, regardless of whether the wafer images WF11’, WF12’, …, WF1n’ have chamfers, the template image TP1 can present the complete contour of the wafers corresponding to this lot.

[0026] Next, in step S140, the comparison unit 140 compares each wafer image WF11’, WF12’, …, WF1n’ with the template image TP1 to obtain a difference image. For example, the comparison unit 140 subtracts the pixel value of the template image TP1 from the pixel value of the wafer image WF11’ at each pixel point to obtain a difference image DF11. The brighter parts in the difference image DF11 are the parts where the wafer image WF11’ and the template image TP1 have larger differences. The difference between the wafer image WF11’ and the template image TP1 is very likely caused by a chip corner missing. Therefore, it can be further analyzed whether there is a chip corner missing through the difference image DF11.

[0027] Then, in step S150, the cutting unit 150 cuts each difference image (such as the difference image DF11) along the wafer edge so that each difference image (such as the difference image DF11) presents a ring shape. Please refer to Figure 9 , which exemplarily illustrates steps S150 to S160. The wafer has a center point CP and a radius R1. The cutting width W1 cut by the cutting unit 150 is substantially 0.5%, 1%, 1.5% or 2% of the radius R1 of the wafer. Taking the difference image DF11 as an example, after cutting into a ring shape, only the data at the edge is left, which can reduce the processing burden and speed up the processing speed in subsequent procedures.

[0028] Next, in step S160, the conversion unit 160 performs coordinate conversion on each ring-shaped difference image (such as the difference image DF11) so that each difference image (such as the difference image DF11) presents a rectangle. As Figure 9 shown, the ring-shaped image B1 can be converted from a polar coordinate system to a rectangular coordinate system to present a rectangular image B2.

[0029] Please refer to Figure 10 , which exemplarily illustrates steps S160 to S190. After the ring-shaped difference image DF11_1 undergoes the conversion in step S160, it is converted into a rectangular difference image DF11_2. When the ring-shaped difference image DF11_1 is analyzed and processed, the scanning range is relatively large; when the rectangular difference image DF11_2 is analyzed and processed, the scanning range is relatively small. Therefore, the conversion performed in step S160 can further reduce the processing burden and speed up the processing speed.

[0030] Then, in step S170, the binarization unit 170 performs binarization processing on each difference image (such as the difference image DF11_2). For example, the binarization unit 170 can adjust those with pixel values higher than a critical value to the highest value (such as 255), and adjust those with pixel values lower than or equal to the critical value to the lowest value (such as 0). As Figure 10As shown, in the binarized difference image DF11_3, pixels with a value of 255 appear pure white, and pixels with a value of 0 appear pure black. The binarized difference image DF11_3 can more clearly define the possible positions of the missing corners.

[0031] Next, in step S180, the noise removal unit 180 removes noise from each binarized difference image (such as the difference image DF11_3). As Figure 10 shown, there may still be a lot of noise in the binarized difference image DF11_3, and some image processing means must be used to remove it. Step S180 includes step S181 and step S182. In step S181, the dilator 181 of the noise removal unit 180 performs texture dilation on each binarized difference image (such as the difference image DF11_3). The process of texture dilation is to change the neighboring pixels of the white pixels to white. For example, pixels within 7 pixels of the white pixels are all considered neighboring pixels. In this way, as Figure 10 shown, in the difference image DF11_4 after texture dilation, the original fragmented white blocks can be merged into more complete white blocks through this step.

[0032] Then, in step S182, the eroder 182 of the noise removal unit 180 performs texture erosion on each difference image after texture dilation (such as the difference image DF11_4). The process of texture erosion is to change the neighboring pixels of the black pixels to black. For example, pixels within 7 pixels of the black pixels are all considered neighboring pixels. In this way, as Figure 10 shown, in the difference image DF11_5 after texture erosion, the original slightly mixed white texture can be removed through this step, leaving more complete white blocks.

[0033] In the above steps S181 and S182, texture dilation and texture erosion are performed respectively, and the dilation degree and erosion degree are the same. Therefore, the outline of the missing corner can still be maintained in its original position, but the fine noise can be successfully removed.

[0034] Then, in step S190, the detection unit 190 detects whether there are missing corners in each difference image (such as the difference image DF11_5) based on the texture of each difference image after noise removal (such as the difference image DF11_5). For example, the white block detected by the detection unit 190 in the difference image DF11_5 is the missing corner C11. The detection unit 190 can give an obvious mark on the difference image DF11_1, such as marking a red block. In this way, when the semiconductor manufacturing process is not yet completed, the missing corners can be quickly detected to avoid waste of production resources.

[0035] In addition, the researchers further found that when taking multiple wafer images WF11’, WF12’, …, WF1n’, some of the wafer images may be eccentric, which will affect the accuracy of the template image. Please refer to Figure 11 and Figure 12 , Figure 11 which illustrate a wafer corner missing automatic detection system 200 according to another embodiment, Figure 12 and a flowchart of a wafer corner missing automatic detection method according to another embodiment. The wafer corner missing automatic detection system 200 further includes an eccentricity determination unit 210. After obtaining the template image TP2 in step S130, step S210 is entered. In step S210, the eccentricity determination unit 210 determines whether these wafer images WF11’, WF12’, …, WF1n’ are all non-eccentric. If these wafer images WF11’, WF12’, …, WF1n’ are all non-eccentric, step S140 is entered; if these wafer images WF11’, WF12’, …, WF1n’ are not all non-eccentric, step S220 is entered.

[0036] Please refer to Figure 13 , which exemplifies step S210. The eccentricity determination unit 210 compares the template image TP2 with a perfect circle PC. If a residual image RM is left after the difference between the two, it means that these wafer images WF11’, WF12’, …, WF1n’ are not all non-eccentric; if no residual image RM is left after the difference between the two, it means that these wafer images WF11’, WF12’, …, WF1n’ are all non-eccentric.

[0037] In step S220, after the integration unit 130 removes the eccentric wafer images, a new template image TP3 is integrated again. In the above manner, the accuracy of the template image TP3 can be further improved, which is more conducive to the implementation of wafer corner missing automatic detection.

[0038] Although the present invention is disclosed in combination with the above embodiments, it is not intended to limit the present invention. Those skilled in the art in the technical field to which the present invention pertains can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims

1. An automatic detection method for wafer chamfer, characterized in that The automatic wafer corner defect detection method includes: Obtaining multiple wafer images of multiple wafers; At each pixel point of these wafer images, taking the maximum pixel value of these wafer images to combine into a template image; Comparing each of these wafer images with the template image to obtain a difference image; Performing binarization processing on the part of each of these difference images along the wafer edge; Removing noise from the part of each of the binarized difference images along the wafer edge; and Detecting whether there is a corner defect in the part of each of these difference images along the wafer edge according to the texture of the part of each of the difference images along the wafer edge after removing noise.

2. The automatic wafer corner defect detection method according to claim 1, further including: Converting these wafer images into grayscale content.

3. The automatic wafer corner defect detection method according to claim 1, further including: Cropping each of these difference images along the wafer edge so that each of these difference images presents a circular cropped difference image; And Performing coordinate transformation on each of the circular cropped difference images so that each of the cropped difference images presents a rectangle, where each of the cropped difference images corresponds to the part of each of these difference images along the wafer edge.

4. The automatic wafer corner defect detection method according to claim 3, wherein the width of each of the circular cropped difference images is substantially 1.5% of the radius of each of these wafers.

5. The automatic wafer corner defect detection method according to claim 3, wherein each of the circular cropped difference images is converted from a polar coordinate system to a rectangular coordinate system.

6. The automatic wafer corner defect detection method according to claim 1, wherein the step of removing noise from the part of each of the binarized difference images along the wafer edge includes: Performing texture dilation on the part of each of the binarized difference images along the wafer edge; And Performing texture erosion on the part of each of the difference images after texture dilation along the wafer edge.

7. The automatic wafer corner defect detection method according to claim 1, wherein in the step of comparing each of these wafer images with the template image to obtain each of these difference images, the template image is subtracted from each of these wafer images to obtain each of these difference images.

8. The automatic wafer corner defect detection method according to claim 1, further including: Comparing the template image and a perfect circle to determine whether these wafer images are all non-eccentric.

9. The automatic wafer corner defect detection method according to claim 1, wherein the automatic wafer corner defect detection method is executed before the manufacturing process of these wafers is completed.

10. An automatic wafer chamfer detection device, characterized in that, The automatic wafer corner defect detection device includes: An input unit for obtaining multiple wafer images of multiple wafers; An integration unit for taking the maximum pixel value of these wafer images at each pixel point of these wafer images to combine into a template image; A comparison unit for comparing each of these wafer images with the template image to obtain a difference image; A binarization unit for performing binarization processing on the part of each of these difference images along the wafer edge; A noise removal unit for removing noise from the part of each of the binarized difference images along the wafer edge; and A detection unit for detecting whether there is a chip corner defect in the part of each difference image along the wafer edge according to the texture of the part of each difference image along the wafer edge after noise removal.

11. The automatic chip corner defect detection device according to claim 10, further comprising: A grayscale unit for converting the wafer images into grayscale content.

12. The automatic chip corner defect detection device according to claim 10, further comprising: A cutting unit for cutting each difference image along the wafer edge to make each difference image present a circular cut difference image; And A conversion unit for performing coordinate conversion on each circular cut difference image to make each cut difference image present a rectangle, wherein each cut difference image corresponds to the part of each difference image along the wafer edge.

13. The automatic chip corner defect detection device according to claim 12, wherein the width of each circular cut difference image is substantially 1.5% of the radius of each wafer.

14. The automatic chip corner defect detection device according to claim 12, wherein each circular cut difference image is converted from a polar coordinate system to a rectangular coordinate system.

15. The automatic chip corner defect detection device according to claim 10, wherein the noise removal unit comprises: An expander for expanding the texture of the part of each binarized difference image along the wafer edge; And An eroder for eroding the texture of the part of each difference image with expanded texture along the wafer edge.

16. The automatic chip corner defect detection device according to claim 10, wherein the comparison unit subtracts each wafer image from the template image to obtain each difference image.

17. The automatic chip corner defect detection device according to claim 10, further comprising: An eccentricity judgment unit for comparing the template image and a perfect circle to judge whether the wafer images are all non-eccentric.

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