Silicon Carbide Junction Field Effect Transistor

Abstract

The present invention relates to a silicon carbide junction field effect transistor. The silicon carbide junction field effect transistor includes a silicon carbide substrate (101), a silicon carbide epitaxial layer (102) disposed on the silicon carbide substrate, a blocking injection region (103), two gate injection regions (104) and two source injection regions (105) disposed on the left and right sides of the silicon carbide epitaxial layer (102), and a gate metal electrode (107) and a source metal electrode (106). The forward cross-section of the gate injection region (104) is L-shaped, including a vertical side and a perpendicular side, and extends laterally along the entire silicon carbide epitaxial layer (102). The vertical sides of the L-shaped cross-sections of the two gate injection regions (104) face away from each other; the source injection region (105) is disposed on the horizontal side of the corresponding L-shaped cross-section and extends laterally along the entire silicon carbide epitaxial layer (102). The blocking injection region (103) is connected to the vertical sides of the L-shaped cross-sections of the two gate injection regions (104) respectively through first connection columns (110).

Description

Technical Field

[0001] The present invention relates to semiconductor technology, and particularly to a silicon carbide junction field effect transistor. Background Art

[0002] The excellent performance of silicon carbide semiconductors enables silicon carbide-based power electronic devices to have outstanding advantages compared with silicon-based devices. Silicon carbide devices have lower on-resistance, higher breakdown voltage, better thermal conductivity, and high temperature resistance. At the same time, the forward and reverse characteristics of power electronic devices made of silicon carbide change little with temperature, having higher stability. Due to low switching losses and high switching frequencies, silicon carbide is expected to replace silicon as the mainstream material for power devices. Among them, silicon carbide (SiC) JFET is a silicon carbide junction field effect transistor, which has the advantages of low on-resistance, fast switching speed, high temperature resistance, and high thermal stability.

[0003] Currently, most silicon carbide JFETs are normally-on devices. A normally-on silicon carbide JFET is in a conducting state without a driving signal, which is likely to cause the danger of shoot-through of the bridge arm and reduce the safety and reliability of the power circuit. Summary of the Invention

[0004] The present invention is made in view of the above situation of the prior art to overcome or alleviate one or more problems existing in the prior art, and at least provides a beneficial option.

[0005] To achieve the above object, a silicon carbide junction field effect transistor is provided. The silicon carbide junction field effect transistor includes a silicon carbide substrate, a silicon carbide epitaxial layer disposed on the silicon carbide substrate, a blocking injection region, two gate injection regions and two source injection regions disposed on the left and right sides of the silicon carbide epitaxial layer, and a gate metal electrode and a source metal electrode. The gate injection region is L-shaped in a front cross-section, including a vertical side and a perpendicular side, and extends along the entire silicon carbide epitaxial layer in a lateral direction. The vertical sides of the L-shaped cross-sections of the two gate injection regions face away from each other; the source injection region is disposed on the horizontal side of the L-shaped cross-section of the corresponding gate injection region, and the source injection region extends along the lateral direction of the entire silicon carbide epitaxial layer. The blocking injection region is connected to the vertical sides of the L-shaped cross-sections of the two gate injection regions respectively through a first connecting column.

[0006] According to one embodiment, the first connecting column is a square column, the width of which in the transverse direction is the same as the width of the vertical side of the gate injection region, and the width of which in the lateral direction is narrower than the width of the vertical side.

[0007] According to one embodiment, the silicon carbide junction field effect transistor further includes an insulating layer, and the insulating layer electrically isolates the source metal electrode and the gate metal electrode.

[0008] According to one embodiment, the silicon carbide junction field effect transistor further includes a second connecting column for connecting the source metal electrode and the source implantation region. The lateral width of the second connecting column is narrower than that of the source implantation region, and the lateral width of the second connecting column is also narrower than the lateral width of the source implantation region. The second connecting column is disposed at a position on the vertical side of the source implantation region away from the gate implantation region.

[0009] According to one embodiment, the lateral width of the first connecting column is greater than that of the second connecting column, and the thickness of the gate implantation region is greater than that of the source implantation region.

[0010] According to one embodiment, the height of the vertical side is set such that a channel can be formed between the depletion region of the gate implantation region and the depletion region of the blocking implantation region without power being applied by changing the doping concentration of the gate implantation region.

[0011] According to one embodiment, the height of the vertical side is set such that a channel is not formed between the depletion region of the gate implantation region and the depletion region of the blocking implantation region without power being applied by changing the doping concentration of the gate implantation region.

[0012] According to some embodiments of the present invention, a vertical silicon carbide JFET structure is provided, which has excellent breakdown voltage capabilities and is suitable for high-power applications.

[0013] According to some embodiments of the present invention, a vertical silicon carbide JFET structure is provided, which has a low forward conduction resistance, and the normally open and normally closed states of the device can be controlled by adjusting the positions and doping concentrations of the implantation regions. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Embodiments of the present invention can be better understood in conjunction with the accompanying drawings. It should be noted that these drawings are schematic and not drawn to scale. In the drawings:

[0015] Figure 1 A three-dimensional structural schematic diagram of a silicon carbide JFET according to one embodiment of the present invention is shown;

[0016] Figure 2 is Figure 1 a perspective view of the three-dimensional structure of;

[0017] Figure 3 is Figure 1 、 Figure 2 a schematic diagram of the structure of the cross-section A-A' in;

[0018] Figure 4 is Figure 1 、 Figure 2Structural schematic diagram of cross-section B-B'

[0019] Figure 5 Fig. shows a structural schematic diagram of a silicon carbide JFET structure in cross-section B-B' according to another embodiment of the present invention. Detailed implementation manners

[0020] Now, the embodiments of the silicon carbide junction field effect transistor of the present invention will be described with reference to the accompanying drawings. These embodiments are merely illustrative and do not limit the protection scope of the present invention.

[0021] Figure 1 Fig. shows a three-dimensional structural schematic diagram of a silicon carbide junction field effect transistor (JFET) according to an embodiment of the present invention; Figure 2 is Figure 1 a perspective view of the three-dimensional structure; Figure 3 is Figure 1 、 Figure 2 a structural schematic diagram of cross-section A-A' in Figure 4 is Figure 1 、 Figure 2 a structural schematic diagram of cross-section B-B' in. According to an embodiment, the silicon carbide junction field effect transistor can be a silicon carbide junction field effect transistor with carrier reverse flow.

[0022] As Figures 1 to 4 shown, a silicon carbide junction field effect transistor according to an embodiment of the present invention includes a silicon carbide substrate 101, and the doping type of the silicon carbide substrate 101 is the first conduction type. A drain metal electrode 108 is covered on the back of the silicon carbide substrate 101. A silicon carbide epitaxial layer 102 is grown on the silicon carbide substrate 101, and the epitaxial doping type of the silicon carbide epitaxial layer 102 is the first conduction type. A blocking injection region 103 is provided on the silicon carbide epitaxial layer 102, and a gate injection region 104 and a source injection region 105 are provided on both sides thereof.

[0023] Among them, the doping types of the blocking injection region 103 and the gate injection region 104 are the second conduction type, and the doping type of the source injection region 105 is the first conduction type. A source metal electrode 106, a gate metal electrode 107 and an insulating layer 111 are also covered on the silicon carbide epitaxial layer 102. The presence of the insulating layer 111 enables electrical isolation between the metal electrodes.

[0024] According to an embodiment, from Figure 1 and Figure 2When viewed from the front (frontward) of the perspective view, the cross-section of the gate injection region 104 is L-shaped. On the side (lateral side) of the perspective view, the gate injection region 104 extends laterally along the entire lateral side of the silicon carbide substrate 101. The cross-section of the source injection region 105 is rectangular. When viewed from the front, the source injection region 105 is disposed on the lateral side of the L-shaped cross-section of the gate injection region 104. The lateral direction is the direction from left to right or from right to left on the front of the perspective view. The vertical direction and the thickness direction are the directions from top to bottom or from bottom to top of the perspective view.

[0025] The source injection region 105 extends laterally along the entire lateral side of the silicon carbide epitaxial layer 102. The vertical sides of the L-shaped cross-sections of the gate injection regions 104 on the left and right sides face each other, forming a channel region above and in the middle. The lower side of the blocking injection region 103 is respectively connected to the vertical sides of the L-shaped cross-sections of the gate injection regions 104 on the left and right sides through the first connection columns 110, so that the blocking injection region 103, the two first connection columns 110, and the gate injection regions 104 on the left and right sides form a structure similar to a π shape. The first connection column 110 is columnar, and its lateral width is the same as the width of the vertical side of the L-shaped cross-section of the gate injection region 104, and its lateral width is narrower than the width of the vertical side of the L-shaped cross-section of the gate injection region 104. Although the column body of the first connection column 110 is shown as a rectangular column in the figure, it can also be a column body of other shapes.

[0026] The outer sides on the left and right of the blocking injection region 103 are connected to the second connection column 109, for example, by forming notches. The doping type of the second connection column 109 is the first conductive type and is used to connect the source metal electrode 106 and the source injection region 105. The second connection column 109 is only connected to a part of the source injection region 105. According to an embodiment, both the lateral and the lateral width of the second connection column 109 are narrower than the lateral and lateral width of the source injection region 105, and the second connection column 109 corresponds to the position of the source injection region 105 far from the vertical side of the L-shaped cross-section of the gate injection region 104.

[0027] According to an embodiment of the present invention, the doping type of the second connection column 109 is the first conductive type, which connects the source metal electrode 106 and the source injection region 105, introduces a source current to form a source region. The doping type of the first connection column 110 is the second conductive type, which connects the blocking injection region 103 and the gate injection region 104. Since the blocking injection region 103 is connected to the gate metal electrode 107, the gate injection region 104 is electrically connected to the gate metal in terms of electrical properties and can be controlled by the gate voltage together with the blocking injection region 103. That is, through the connection function of the second connection column 109 and the first connection column 110, the blocking injection region 103 and the gate injection region 104 can be controlled by the gate metal electrode 107, and the source injection region 105 can be controlled by the source metal electrode 106.

[0028] The first conductivity type can be N-type or P-type. The second conductivity type is P-type or N-type. According to one embodiment, the first conductivity type is N-type and the second conductivity type is P-type. According to another embodiment, the first conductivity type is P-type and the second conductivity type is N-type.

[0029] During fabrication, first, a silicon carbide epitaxial layer 102 can be epitaxially grown on a silicon carbide substrate 101, and a gate injection region 104 of the second conductivity type, a source injection region 105 of the first conductivity type, a blocking injection region 103 of the second conductivity type, a first connection column 110 of the second conductivity type, and a second connection column 109 of the first conductivity type are sequentially implanted through a photolithography window. Finally, the front gate and source metals are deposited and grown, and the back drain metal is deposited and grown, and annealing is performed to complete the corresponding ohmic contacts.

[0030] According to one embodiment, as Figure 4 shown, the height of the vertical side of the gate injection region 104 is set such that a channel can be formed between the depletion region of the gate injection region 104 and the depletion region of the blocking injection region 103 without power-on by changing the doping concentration of the gate injection region. In Figure 4 it, the dashed line represents the depletion regions of the blocking injection region 103 and the gate injection region 104 when the device is turned on, and the arrow represents the movement direction of the carriers when the device is turned on. It can be observed that the carriers first flow backward upward from the source injection region 105, then move downward in the silicon carbide epitaxial layer 102, and finally reach the drain metal electrode 108 to achieve conduction. This embodiment is a normally-on JFET. When a certain reverse voltage is applied to the gate, the area of the depletion regions of the blocking injection region 103 and the gate injection region 104 will increase correspondingly until the channel is pinched off and the device is turned off.

[0031] Figure 5 FIG. is a schematic cross-sectional structure of a silicon carbide JFET structure according to another embodiment of the present invention at the B-B' cross-section. As Figure 5 shown, the height of the vertical side of the gate injection region 104 is set such that a channel is not formed between the depletion region of the gate injection region 104 and the depletion region of the blocking injection region 103 without power-on by changing the doping concentration of the gate injection region 104. Figure 5 The embodiment shown in Figures 1 to 4 is compared with the embodiment shown in Figure 5As shown, this embodiment only changes the implantation morphology (doping position and doping concentration) of the source implantation region 104, so that the depletion regions formed by the blocking implantation region 103 and the gate implantation region 104 are close enough to pinch off the channel, thereby keeping the device as a normally-closed device. When a certain positive voltage is applied to the gate, the areas of the depletion regions of the blocking implantation region 103 and the gate implantation region 104 will become smaller, enabling the channel to be turned on and the device to be turned on. By setting the height of the vertical side of the gate implantation region 104 in this way, the product qualification rate can be improved.

[0032] According to an embodiment, the height of the vertical side of the gate implantation region 104 is set such that by changing the doping concentration of the gate implantation region 104, neither a channel is formed between the depletion region of the gate implantation region 104 and the depletion region of the blocking implantation region 103 when not powered on, nor a channel is formed between the depletion region of the gate implantation region 104 and the depletion region of the blocking implantation region 103 when not powered on. With such an embodiment, the production of both normally-open and normally-closed devices can be achieved using the same process tools, greatly saving costs.

[0033] According to an embodiment, the width of the first connection column 110 is greater than the width of the second connection column 109. According to an embodiment, the thickness of the gate implantation region 104 is greater than the thickness of the source implantation region 105.

[0034] The present invention can make the device a normally-open device and a normally-closed device by adjusting the doping concentration and position of the implantation region.

[0035] It should be noted that the terms of direction such as front-back, up-down, horizontal, and vertical of the present invention are set in combination with the drawings and the context to make it easier for those skilled in the art to understand the present invention, and are not necessarily the actual positions and orientations of the device.

[0036] It should be understood that the above specific embodiments of the present invention are only used for exemplary illustration or explanation of the principle of the present invention, and do not constitute a limitation to the present invention. Therefore, any modifications, equivalent replacements, improvements, etc. made without departing from the spirit and scope of the present invention should be included within the protection scope of the present invention. In addition, the claims of the present invention are intended to cover all variations and improvements that fall within the scope and boundaries of the claims or the equivalent forms of such scope and boundaries.

Claims

1. A silicon carbide junction field effect transistor, characterized in that the silicon carbide junction field effect transistor includes a silicon carbide substrate (101), a silicon carbide epitaxial layer (102) provided on the silicon carbide substrate (101), a blocking injection region (103), two gate injection regions (104) and two source injection regions (105) provided on the left and right sides of the silicon carbide epitaxial layer (102), a gate metal electrode (107) and a source metal electrode (106), and a second connection column (109) connecting the source metal electrode (106) and the source injection region (105); the gate injection region (104) is L-shaped in a forward cross-section, including a vertical side and a horizontal side, and extends along the entire silicon carbide epitaxial layer (102) laterally, and the vertical sides of the L-shaped cross-sections of the two gate injection regions (104) face away from each other; the source injection region (105) is provided on the horizontal side of the L-shaped cross-section of the corresponding gate injection region (104), and the source injection region (105) extends along the entire lateral direction of the silicon carbide epitaxial layer (102); the blocking injection region (103) is respectively connected to the vertical sides of the L-shaped cross-sections of the two gate injection regions (104) through a first connection column (110); the doping type of the second connection column (109) and the source injection region (105) is the first conduction type, the doping type of the first connection column (110), the blocking injection region (103) and the gate injection region (104) is the second conduction type, and the doping type of the silicon carbide substrate (101) and the silicon carbide epitaxial layer (102) is the first conduction type.

2. The silicon carbide junction field effect transistor according to claim 1, wherein The first connection column (110) is a rectangular column, the width in the horizontal direction thereof is the same as the width of the vertical side of the gate injection region, and the width in the lateral direction thereof is narrower than the width of the vertical side.

3. The silicon carbide junction field effect transistor according to claim 1, wherein The silicon carbide junction field effect transistor further includes an insulating layer (111), and the insulating layer (111) enables electrical isolation between the source metal electrode (106) and the gate metal electrode (107).

4. The silicon carbide junction field effect transistor according to claim 3, characterized in that, The width in the horizontal direction of the second connection column (109) is narrower than the width in the horizontal direction of the source injection region (105), the width in the lateral direction of the second connection column (109) is narrower than the width in the lateral direction of the source injection region (105), and the second connection column (109) is provided at a position of the source injection region (105) far from the vertical side of the gate injection region (104).

5. The silicon carbide junction field effect transistor according to claim 4, wherein The width in the horizontal direction of the first connection column (110) is greater than the width in the horizontal direction of the second connection column (109).

6. The silicon carbide junction field effect transistor according to claim 5, wherein, The thickness of the gate injection region (104) is greater than the thickness of the source injection region (105).

7. The silicon carbide junction field effect transistor according to claim 1, characterized in that, The height of the vertical side is set such that a channel can be formed between the depletion region of the gate injection region (104) and the depletion region of the blocking injection region (103) without power-on by changing the doping concentration of the gate injection region (104).

8. The silicon carbide junction field effect transistor according to claim 1 or 7, characterized in that, The height of the vertical side is set such that a channel is not formed between the depletion region of the gate injection region (104) and the depletion region of the blocking injection region (103) without power-on by changing the doping concentration of the gate injection region (104).

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