Camera

Abstract

An imaging device according to one embodiment of the present disclosure includes a pixel unit and a peripheral circuit unit disposed around the pixel unit. The pixel unit includes a photoelectric conversion film, an upper electrode located above the photoelectric conversion film, a lower electrode opposing the upper electrode and having the photoelectric conversion film interposed therebetween, and a first conductive light-shielding film that overlaps a portion of the upper surface of the photoelectric conversion film in a plan view and is electrically connected to the upper electrode. The peripheral circuit unit includes a peripheral circuit and a second light-shielding film that overlaps at least a portion of the peripheral circuit in a plan view. The first light-shielding film and the second light-shielding film are separated.

Description

Technical Field

[0001] The present disclosure relates to an imaging device. Background Art

[0002] An image sensor comprises multiple pixels, each of which includes a light-detecting element that generates an electrical signal corresponding to the amount of incident light, and is arranged in a one- or two-dimensional manner. A stacked image sensor is an image sensor that uses light-detecting elements as pixels, with a structure in which a photoelectric conversion film is stacked on a substrate. Examples of such sensors are disclosed in Patent Documents 1 to 4.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent No. 4729275

[0006] Patent Document 2: Japanese Patent Application Publication No. 2019-016667

[0007] Patent Document 3: Japanese Patent Application Laid-Open No. 2005-328068

[0008] Patent Document 4: Japanese Patent No. 5735318 Summary of the Invention

[0009] Problems to be solved by the present invention

[0010] Patent Document 3 discloses a photodetector array having a structure in which a voltage is applied to transparent electrodes via a metal film formed to cover the sides of the layer forming the photodetectors. However, in the structure disclosed in Patent Document 3, if a control circuit is disposed on the periphery, the voltage applied to the transparent electrodes may adversely affect the control circuit. In other words, this prior art suffers from unstable operation of the control circuit.

[0011] Therefore, the present disclosure provides an imaging device capable of stabilizing circuit operation.

[0012] Means for solving problems

[0013] An imaging device according to one embodiment of the present disclosure includes a pixel unit and a peripheral circuit unit disposed around the pixel unit. The pixel unit includes a photoelectric conversion film, an upper electrode located above the photoelectric conversion film, a lower electrode opposing the upper electrode and having the photoelectric conversion film interposed therebetween, and a first conductive light-shielding film that overlaps a portion of the upper surface of the photoelectric conversion film in a plan view and is electrically connected to the upper electrode. The peripheral circuit unit includes a peripheral circuit and a second light-shielding film that overlaps at least a portion of the peripheral circuit in a plan view. The first light-shielding film and the second light-shielding film are separated.

[0014] Effects of the Invention

[0015] According to the present disclosure, the circuit operation of the imaging device can be stabilized. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a diagram showing the circuit configuration of the imaging device according to the first embodiment.

[0017] Figure 2 This is a cross-sectional view of the device structure of a pixel of the imaging device according to Embodiment 1.

[0018] Figure 3 This is a plan view of the imaging device according to Embodiment 1.

[0019] Figure 4 yes Figure 3 A cross-sectional view of the imaging device according to the first embodiment taken along line IV-IV of FIG.

[0020] Figure 5 This is a cross-sectional view of the imaging device according to the second embodiment.

[0021] Figure 6 This is a cross-sectional view of an imaging device according to Embodiment 3.

[0022] Figure 7 This is a cross-sectional view of an imaging device according to a fourth embodiment.

[0023] Figure 8 This is a cross-sectional view of an imaging device according to a fifth embodiment.

[0024] Figure 9 This is a cross-sectional view of an imaging device according to a sixth embodiment. DETAILED DESCRIPTION

[0025] (Summary of the present disclosure)

[0026] An imaging device according to one embodiment of the present disclosure includes a pixel unit and a peripheral circuit unit disposed around the pixel unit. The pixel unit includes a photoelectric conversion film, an upper electrode located above the photoelectric conversion film, a lower electrode opposing the upper electrode and having the photoelectric conversion film interposed therebetween, and a first conductive light-shielding film that overlaps a portion of the upper surface of the photoelectric conversion film in a plan view and is electrically connected to the upper electrode. The peripheral circuit unit includes a peripheral circuit and a second light-shielding film that overlaps at least a portion of the peripheral circuit in a plan view. The first light-shielding film and the second light-shielding film are separated.

[0027] As a result, the first light-shielding film, which supplies power to the upper electrode, is separated from the second light-shielding film included in the peripheral circuit portion. Therefore, even if the potential of the first light-shielding film fluctuates, the effect on the second light-shielding film is significantly reduced. Consequently, the peripheral circuitry covered by the second light-shielding film can operate stably regardless of the potential of the first light-shielding film. Thus, the imaging device according to this embodiment can achieve stable circuit operation.

[0028] Furthermore, for example, the peripheral circuit portion may include a spacer layer made of the same material as the photoelectric conversion film and overlapping at least a portion of the peripheral circuit in a plan view, and the second light-shielding film may be located above the spacer layer.

[0029] This increases the distance between the second light-shielding film and the peripheral circuitry. Therefore, even if the second light-shielding film is conductive and its potential fluctuates due to some influence, the effect on the peripheral circuitry can be suppressed. Consequently, the circuit operation of the imaging device can be stabilized.

[0030] In addition, for example, the thickness of the photoelectric conversion film may be the same as the thickness of the spacer layer.

[0031] This allows the photoelectric conversion film and the spacer layer to be formed in the same process, thereby reducing the number of steps required to manufacture the imaging device and simplifying the manufacturing process. By simplifying the manufacturing process, an imaging device with less manufacturing variation and high reliability can be realized.

[0032] In addition, for example, the peripheral circuit portion may further include an insulating layer located between the second light-shielding film and the spacer layer.

[0033] This ensures electrical insulation between the second light-shielding film and the spacer layer. Even if the potential of the second light-shielding film fluctuates, the effect on the peripheral circuits can be suppressed, thereby stabilizing the circuit operation of the imaging device.

[0034] Furthermore, for example, the peripheral circuit may include a sample-hold circuit, and the second light-shielding film may overlap with the sample-hold circuit in a plan view.

[0035] Thus, the second light shielding film can suppress light from entering the sample holding circuit, thereby suppressing fluctuations in the amount of charge held by the sample holding circuit. Consequently, degradation in the quality of images generated by the imaging device can be suppressed.

[0036] Furthermore, for example, the peripheral circuit may include a sample-hold circuit, and the sample-hold circuit may not be arranged between the first light-shielding film and the second light-shielding film in a plan view.

[0037] Thus, the first light shielding film or the second light shielding film can suppress light from entering the sample hold circuit, thereby suppressing fluctuations in the amount of charge held by the sample hold circuit. This can prevent degradation in the quality of images generated by the imaging device.

[0038] Furthermore, for example, the material of the first light-shielding film and the material of the second light-shielding film may be the same. The first light-shielding film and the second light-shielding film may also be formed using the same material.

[0039] Thus, the first and second light-shielding films can be formed in the same process, thereby reducing the number of steps required to manufacture the imaging device and simplifying the manufacturing process. By simplifying the manufacturing process, an imaging device with less manufacturing variation and high reliability can be realized.

[0040] Furthermore, for example, the second light-shielding film may have conductivity, and a constant voltage or a ground voltage may be applied to the second light-shielding film.

[0041] Thus, the potential of the second light-shielding film can be fixed to a predetermined value, and thus the peripheral circuit covered by the second light-shielding film can be operated stably.

[0042] Furthermore, for example, a varying voltage may be applied to the first light-shielding film.

[0043] Thus, for example, the value to which the potential of the second light-shielding film is fixed can be changed according to the situation, and thus the peripheral circuit covered by the second light-shielding film can be operated stably.

[0044] Furthermore, for example, the thickness of the first light-shielding film may be the same as the thickness of the second light-shielding film.

[0045] Thus, the first and second light-shielding films can be formed in the same process, thereby reducing the number of steps required to manufacture the imaging device and simplifying the manufacturing process. By simplifying the manufacturing process, an imaging device with less manufacturing variation and high reliability can be realized.

[0046] Furthermore, for example, no transistor may be disposed between the first light-shielding film and the second light-shielding film in plan view. The transistor may overlap with at least one of the first light-shielding film and the second light-shielding film in plan view.

[0047] Thus, the first light-shielding film or the second light-shielding film can suppress light from entering the transistor, thereby suppressing charge generation in the transistor. Therefore, unstable operation of the transistor can be suppressed, thereby stabilizing the operation of the imaging device.

[0048] Furthermore, for example, the pixel portion may further include an insulating layer located between the first light-shielding film and the upper electrode.

[0049] This allows the insulating layer to be used as a protective layer for the upper electrode.

[0050] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings.

[0051] In addition, the embodiments described below are all general or specific examples. The numerical values, shapes, materials, components, configuration positions and connection methods of components, steps, and the order of steps shown in the following embodiments are examples and are not intended to limit the present disclosure. In addition, among the components in the following embodiments, components not listed in the independent claims are described as arbitrary components.

[0052] In addition, each figure is a schematic diagram and does not necessarily illustrate the figure strictly. Therefore, for example, the scales in each figure are not necessarily the same. In addition, in each figure, the same reference numerals are given to substantially the same components, and repeated descriptions are omitted or simplified.

[0053] In addition, in this specification, terms such as "same" that indicate the relationship between elements, terms such as "rectangle" that indicate the shape of an element, and numerical ranges do not express only strict meanings, but also mean that they also include substantially equivalent ranges, such as expressions of differences of several percent.

[0054] In this specification, the terms "above" and "below" do not refer to the upper direction (vertically above) and the lower direction (vertically below) in absolute spatial recognition, but are used as terms that are defined by relative positional relationships based on the stacking order in a stacked structure. Furthermore, the terms "above" and "below" apply not only to situations where two components are spaced apart and another component exists between them, but also to situations where two components are closely adjacent to each other and in contact with each other.

[0055] (Implementation 1)

[0056] [Circuit Configuration of Imaging Device]

[0057] First, use Figure 1 The circuit configuration of the imaging device according to this embodiment will be briefly described.

[0058] Figure 1 Schematic diagram showing the circuit configuration of the imaging device 100 according to this embodiment. Figure 1 As shown, the imaging device 100 includes a plurality of pixels 110 and a peripheral circuit 120 .

[0059] Multiple pixels 110 are arranged two-dimensionally, i.e., in rows and columns, on a semiconductor substrate to form a pixel region. Alternatively, multiple pixels 110 can be arranged in a column. In other words, the imaging device 100 can also be a line image sensor. In this specification, the row and column directions refer to the directions in which rows and columns extend, respectively. Specifically, the vertical direction is the column direction, and the horizontal direction is the row direction.

[0060] Each pixel 110 includes a light detection unit 10 and a charge detection circuit 25. The light detection unit 10 includes a pixel electrode 50, a photoelectric conversion film 51, and a transparent electrode 52. The specific structure of the light detection unit 10 will be described later. The charge detection circuit 25 includes an amplifier transistor 11, a reset transistor 12, and an address transistor 13.

[0061] The imaging device 100 includes a voltage control element for applying a predetermined voltage to the transparent electrode 52. The voltage control element includes, for example, a voltage control circuit, a voltage generating circuit such as a constant voltage source, and a voltage reference line such as a ground line. The voltage applied by the voltage control element is referred to as a control voltage. In this embodiment, the imaging device 100 includes a voltage control circuit 30 as the voltage control element.

[0062] The voltage control circuit 30 can generate either a fixed control voltage or multiple control voltages of varying values. For example, the voltage control circuit 30 can generate two or more control voltages of varying values, or it can generate a control voltage that varies continuously within a specified range. The voltage control circuit 30 determines the value of the control voltage to be generated based on instructions from an operator operating the imaging device 100 or instructions from other control units within the imaging device 100, and generates the control voltage of the determined value. The voltage control circuit 30, as part of the peripheral circuit 120, is located outside the photosensitive area. Furthermore, the photosensitive area is essentially the same as the pixel area.

[0063] In this embodiment, if Figure 1As shown, the voltage control circuit 30 applies a control voltage to the transparent electrodes 52 of the pixels 110 arranged in the row direction via the counter electrode signal line 16. Thus, the voltage control circuit 30 changes the voltage between the pixel electrodes 50 and the transparent electrodes 52, switching the spectral sensitivity characteristics of the light detection unit 10.

[0064] When light is irradiated onto the light detection unit 10, the pixel electrode 50 is set to a higher potential than the transparent electrode 52 in order to accumulate electrons as signal charge in the pixel electrode 50. At this time, the movement direction of electrons is opposite to the movement direction of holes, so current flows from the pixel electrode 50 to the transparent electrode 52. Furthermore, when light is irradiated onto the light detection unit 10, the pixel electrode 50 is set to a lower potential than the transparent electrode 52 in order to accumulate holes as signal charge in the pixel electrode 50. At this time, current flows from the transparent electrode 52 to the pixel electrode 50.

[0065] The pixel electrode 50 is connected to the gate electrode of the amplifier transistor 11, and the signal charge collected by the pixel electrode 50 is accumulated in the charge accumulation node 24 located between the pixel electrode 50 and the gate electrode of the amplifier transistor 11. In this embodiment, the signal charge is holes. Alternatively, the signal charge may be electrons.

[0066] The signal charge accumulated in the charge storage node 24 is applied to the gate electrode of the amplifier transistor 11 as a voltage corresponding to the amount of signal charge. The amplifier transistor 11 is included in the charge detection circuit 25 and amplifies the voltage applied to the gate electrode. The address transistor 13 selectively reads the amplified voltage as a signal voltage. The address transistor 13 is also called a row select transistor. One of the source and drain electrodes of the reset transistor 12 is connected to the pixel electrode 50. The reset transistor 12 resets the signal charge accumulated in the charge storage node 24. In other words, the reset transistor 12 resets the potential of the gate electrode of the amplifier transistor 11 and the pixel electrode 50.

[0067] To selectively perform the above-described operations in the plurality of pixels 110, the imaging device 100 includes a power supply wiring 21, a vertical signal line 17, an address signal line 26, and a reset signal line 27. These wirings and signal lines are connected to each of the pixels 110. Specifically, the power supply wiring 21 is connected to one of the source electrode and the drain electrode of the amplifier transistor 11. The vertical signal line 17 is connected to the other of the source electrode and the drain electrode of the address transistor 13, i.e., the side not connected to the amplifier transistor 11. The address signal line 26 is connected to the gate electrode of the address transistor 13. Furthermore, the reset signal line 27 is connected to the gate electrode of the reset transistor 12.

[0068] Peripheral circuit 120 includes a vertical scanning circuit 15, a horizontal signal readout circuit 20, multiple column signal processing circuits 19, multiple load circuits 18, multiple differential amplifiers 22, and a voltage control circuit 30. The vertical scanning circuit 15 is also called a row scanning circuit. The horizontal signal readout circuit 20 is also called a column scanning circuit. The column signal processing circuit 19 is also called a row signal accumulation circuit. The differential amplifier 22 is also called a feedback amplifier.

[0069] The vertical scanning circuit 15 is connected to the address signal line 26 and the reset signal line 27, and selects the multiple pixels 110 arranged in each row on a row-by-row basis, reading the signal voltage and resetting the potential of the pixel electrode 50. The power supply wiring 21 supplies a predetermined power supply voltage to each pixel 110. The horizontal signal readout circuit 20 is electrically connected to the multiple column signal processing circuits 19. The column signal processing circuit 19 is electrically connected to the pixels 110 arranged in each column via the vertical signal line 17 corresponding to each column. The load circuit 18 is electrically connected to each vertical signal line 17. The load circuit 18 and the amplifier transistor 11 form a source follower circuit.

[0070] A plurality of differential amplifiers 22 are provided corresponding to each column. The negative input terminal of each differential amplifier 22 is connected to the corresponding vertical signal line 17. The output terminal of each differential amplifier 22 is connected to the pixel 110 via a feedback line 23 corresponding to each column.

[0071] The vertical scanning circuit 15 applies a row selection signal, which controls the on / off state of the address transistor 13, to the gate electrode of the address transistor 13 via the address signal line 26. This scans and selects a row to be read. The signal voltage is read from the pixels 110 in the selected row to the vertical signal line 17. Furthermore, the vertical scanning circuit 15 applies a reset signal, which controls the on / off state of the reset transistor 12, to the gate electrode of the reset transistor 12 via the reset signal line 27. This selects a row of pixels 110 to be reset. The vertical signal line 17 transmits the signal voltage read from the pixels 110 selected by the vertical scanning circuit 15 to the column signal processing circuit 19.

[0072] The column signal processing circuit 19 performs noise suppression signal processing, typified by correlated double sampling, and analog-to-digital conversion (AD conversion). Specifically, the column signal processing circuit 19 includes a sample-hold circuit. The sample-hold circuit includes capacitors, transistors, and other components. The sample-hold circuit samples the signal voltage read via the vertical signal line 17 and temporarily holds it. A digital value corresponding to the held voltage is read to the horizontal signal readout circuit 20.

[0073] The horizontal signal readout circuit 20 sequentially reads out signals from the plurality of column signal processing circuits 19 to the horizontal common signal line 28 .

[0074] The differential amplifier 22 is connected to the other of the drain and source electrodes of the reset transistor 12, i.e., the electrode not connected to the pixel electrode 50, via a feedback line 23. Therefore, when the address transistor 13 and the reset transistor 12 are in the on state, the differential amplifier 22 receives the output value of the address transistor 13 at its negative input terminal. The differential amplifier 22 performs feedback operation so that the gate potential of the amplifier transistor 11 reaches a predetermined feedback voltage. At this time, the output voltage value of the differential amplifier 22 is a positive voltage of 0V or approximately 0V. The feedback voltage refers to the output voltage of the differential amplifier 22.

[0075] [Pixel composition]

[0076] The following uses Figure 2 The detailed device structure of the pixel 110 of the imaging device 100 will be described. Figure 2 1 is a cross-sectional view schematically showing a cross section of the device structure of the pixel 110 of the imaging device 100 according to the present embodiment.

[0077] like Figure 2 As shown, pixel 110 includes a semiconductor substrate 31, a charge detection circuit 25 (not shown), and a light detection unit 10. Semiconductor substrate 31 is, for example, a p-type silicon substrate. Charge detection circuit 25 detects signal charge captured by pixel electrode 50 and outputs a signal voltage. Charge detection circuit 25 includes an amplifier transistor 11, a reset transistor 12, and an address transistor 13, and is formed on semiconductor substrate 31.

[0078] The amplifier transistor 11, the reset transistor 12, and the address transistor 13 are each an example of an electrical element formed on the semiconductor substrate 31. Each of the amplifier transistor 11, the reset transistor 12, and the address transistor 13 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Specifically, the amplifier transistor 11, the reset transistor 12, and the address transistor 13 are each n-channel MOSFETs, but may alternatively be p-channel MOSFETs.

[0079] The amplifier transistor 11 includes n-type impurity regions 41C and 41D, a gate insulating layer 38B, and a gate electrode 39B. The n-type impurity regions 41C and 41D are formed within the semiconductor substrate 31 and function as a drain or source, respectively. The gate insulating layer 38B is located on the semiconductor substrate 31. The gate electrode 39B is located on the gate insulating layer 38B.

[0080] Reset transistor 12 includes n-type impurity regions 41A and 41B, a gate insulating layer 38A, and a gate electrode 39A. N-type impurity regions 41A and 41B are formed within semiconductor substrate 31 and each functions as a drain or source. Gate insulating layer 38A is located on semiconductor substrate 31. Gate electrode 39A is located on gate insulating layer 38A.

[0081] Address transistor 13 includes n-type impurity regions 41D and 41E, a gate insulating layer 38C, and a gate electrode 39C. N-type impurity regions 41D and 41E are formed within semiconductor substrate 31 and function as a drain or source, respectively. Gate insulating layer 38C is located on semiconductor substrate 31. Gate electrode 39C is located on gate insulating layer 38C.

[0082] The gate insulating layers 38A, 38B, and 38C are formed using an insulating material and have, for example, a single-layer structure of a silicon oxide film or a silicon nitride film, or a stacked structure thereof.

[0083] Gate electrodes 39A, 39B, and 39C are each formed using a conductive material. For example, gate electrodes 39A, 39B, and 39C are formed using polysilicon that has been made conductive by adding impurities. Alternatively, gate electrodes 39A, 39B, and 39C can be formed using a metal material such as copper.

[0084] The n-type impurity regions 41A, 41B, 41C, 41D, and 41E are formed by doping n-type impurities such as phosphorus (P) into the semiconductor substrate 31 by ion implantation or the like. Figure 2 In the example shown, n-type impurity region 41D is shared by amplifier transistor 11 and address transistor 13. Thus, amplifier transistor 11 and address transistor 13 are connected in series. Alternatively, n-type impurity region 41D may be separated into two n-type impurity regions. These two n-type impurity regions may also be electrically connected via a wiring layer.

[0085] In the semiconductor substrate 31, an element isolation region 42 is provided between adjacent pixels 110 and between the amplifier transistor 11 and the reset transistor 12. The element isolation region 42 electrically isolates the adjacent pixels 110. Furthermore, the provision of the element isolation region 42 suppresses leakage of signal charge accumulated in the charge accumulation node 24. The element isolation region 42 is formed, for example, by doping the semiconductor substrate 31 with a high concentration of p-type impurities.

[0086] A multilayer wiring structure is provided on the upper surface of semiconductor substrate 31. The multilayer wiring structure includes multiple interlayer insulating layers, one or more wiring layers, one or more plugs, and one or more contact plugs. Specifically, an interlayer insulating layer 43 is stacked on the upper surface of semiconductor substrate 31. Contact plugs 45A and 45B, wiring 46A and 46B, and conductive plugs 47A and 47B are embedded in interlayer insulating layer 43. Interlayer insulating layer 43 is formed by sequentially stacking multiple insulating layers. The upper surface of interlayer insulating layer 43 is, for example, flat and parallel to the upper surface of semiconductor substrate 31.

[0087] Contact plug 45A is connected to n-type impurity region 41B of reset transistor 12. Contact plug 45B is connected to gate electrode 39B of amplifier transistor 11. Wiring 46A connects contact plug 45A and contact plug 45B. Thus, n-type impurity region 41B of reset transistor 12 and gate electrode 39B of amplifier transistor 11 are electrically connected.

[0088] Furthermore, wiring 46A is connected to pixel electrode 50 via conductive plugs 47A and 47B and wiring 46B. Thus, n-type impurity region 41B, gate electrode 39B, contact plugs 45A and 45B, wirings 46A and 46B, conductive plugs 47A and 47B, and pixel electrode 50 constitute charge storage node 24.

[0089] The light detection section 10 is provided on the interlayer insulating layer 43. The light detection section 10 includes a transparent electrode 52, a photoelectric conversion film 51, and a pixel electrode 50 located on the semiconductor substrate 31 side of the transparent electrode 52.

[0090] The photoelectric conversion film 51 performs photoelectric conversion on the light incident from the transparent electrode 52 side, thereby generating a signal charge corresponding to the intensity of the incident light. The photoelectric conversion film 51 is composed of, for example, an organic semiconductor. The photoelectric conversion film 51 may also include one or more organic semiconductor layers. For example, in addition to the photoelectric conversion layer for generating hole-electron pairs, the photoelectric conversion film 51 may also include a carrier transport layer for transporting electrons or holes, and a blocking layer for blocking carriers. These organic semiconductor layers can use organic p-type semiconductors and organic n-type semiconductors of known materials. In addition, the photoelectric conversion film 51 may also be, for example, a mixed film of organic donor molecules and acceptor molecules, a mixed film of semiconductor-type carbon nanotubes and acceptor molecules, or a film containing quantum dots. The photoelectric conversion film 51 may also be formed using inorganic materials such as amorphous silicon.

[0091] The photoelectric conversion film 51 is sandwiched between the transparent electrode 52 and the pixel electrode 50. In this embodiment, the photoelectric conversion film 51 is formed continuously across multiple pixels 110. Specifically, the photoelectric conversion film 51 is formed as a single flat plate so as to cover most of the imaging area in a plan view. Alternatively, the photoelectric conversion film 51 may be provided separately for each pixel 110.

[0092] The transparent electrode 52 is an example of an upper electrode located above the photoelectric conversion film 51. The transparent electrode 52 is transparent to the light to be detected and is formed using a conductive material. For example, the transparent electrode 52 is formed using a transparent conductive semiconductor oxide film such as indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), or gallium-doped zinc oxide (GZO). Alternatively, the transparent electrode 52 can be formed using other transparent conductive semiconductors or a thin metal film thin enough to transmit light.

[0093] The transparent electrode 52 is formed continuously across the plurality of pixels 110 , similarly to the photoelectric conversion film 51 . Specifically, the transparent electrode 52 is formed in a flat plate shape so as to cover most of the imaging area in a plan view. The transparent electrode 52 continuously covers the entire upper surface of the photoelectric conversion film 51 .

[0094] The pixel electrode 50 is an example of a lower electrode that faces the upper electrode with the photoelectric conversion film 51 interposed therebetween. The pixel electrode 50 is provided for each pixel 110. The pixel electrode 50 is formed using, for example, a metal such as aluminum or copper, or a conductive material such as polysilicon that has been made conductive by doping with impurities.

[0095] The light detection unit 10 also includes an insulating layer 53 formed on at least a portion of the upper surface of the transparent electrode 52. The light detection unit 10 also includes a protective film 54. The insulating layer 53 is formed so as to cover at least a portion of the upper surface of the transparent electrode 52. The protective film 54 is provided above the insulating layer 53.

[0096] The insulating layer 53 and the protective film 54 are formed using insulating materials. For example, the insulating layer 53 is formed from silicon oxide, silicon nitride, silicon oxynitride, or an organic or inorganic polymer material. The insulating layer 53 and the protective film 54 are transparent to light of the wavelength to be detected by the imaging device 100.

[0097] like Figure 2 As shown, the pixel 110 includes a color filter 55 above the transparent electrode 52 of the light detection unit 10. Furthermore, the pixel 110 includes a microlens 56 on the color filter 55. The pixel 110 may not include the insulating layer 53, the protective film 54, the color filter 55, and the microlens 56.

[0098] [Structure of the End of the Imaging Device]

[0099] Next, use Figure 3 and Figure 4 The structure of the end portion of the imaging device 100 according to this embodiment will be described.

[0100] Figure 3 It is a plan view of the imaging device 100 according to this embodiment. Figure 4 yes Figure 3 1 is a cross-sectional view of the imaging device 100 according to the present embodiment taken along line IV-IV.

[0101] like Figure 3 and Figure 4 As shown in FIG. 1 , the imaging device 100 includes a pixel portion 101 and a peripheral circuit portion 102 provided around the pixel portion 101 . The imaging device 100 also includes a separation portion 103 that separates the pixel portion 101 from the peripheral circuit portion 102 .

[0102] In addition, Figure 3 and Figure 4 In, omitted Figure 2 1 shows a diagram of the protective film 54, color filter 55, and microlens 56. The protective film 54 is provided to cover, for example, the insulating layer 53, the first light-shielding film 81, the second light-shielding film 82, and the insulating layer 70. The color filter 55 and the microlens 56 are each provided directly above the pixel 110. The color filter 55 and the microlens 56 are not provided directly above the first light-shielding film 81, the separator 103, or the peripheral circuit portion 102.

[0103] The pixel unit 101 is located in the center of the imaging device 100 in a plan view and corresponds to a pixel region where a plurality of pixels 110 are arranged. The peripheral circuit unit 102 is provided in an annular shape so as to surround the pixel unit 101. Accordingly, the separator 103 is also provided in an annular shape so as to surround the pixel unit 101. The separator 103 is an annular region located between the pixel unit 101 and the peripheral circuit unit 102.

[0104] Alternatively, the peripheral circuit portion 102 may be provided only in a portion surrounding the pixel portion 101. Figure 3 In the case of the pixel portion 101 having a rectangular planar shape, the peripheral circuit portion 102 may not be provided in a portion along at least one side of the outline of the pixel portion 101. For example, the peripheral circuit portion 102 may be provided along only one side of the outline of the pixel portion 101. Alternatively, the peripheral circuit portion 102 may be provided along two opposing sides or two adjacent sides of the outline of the pixel portion 101. The same applies to the separator 103.

[0105] like Figure 3 and Figure 4As shown, the pixel portion 101 includes a first light shielding film 81. The first light shielding film 81 performs two functions: supplying power to the transparent electrode 52 and shielding the pixel 110BM from light.

[0106] Specifically, the first light shielding film 81 has conductivity and is electrically connected to the transparent electrode 52. Figure 4 As shown, the first light shielding film 81 is in contact with the end surface 52A of the transparent electrode 52 .

[0107] The first light shielding film 81 is electrically connected to the electrode terminal 60 provided to be exposed on the upper surface of the interlayer insulating layer 43. The electrode terminal 60 is connected to the counter electrode signal line 16 (see FIG. 1 ) in the interlayer insulating layer 43. Figure 1 ) is electrically connected. Thus, the transparent electrode 52 is connected to the voltage control circuit 30 (see Figure 1 ) is electrically connected. In other words, the first light-shielding film 81 constitutes a portion of the electrical wiring for applying a predetermined voltage to the transparent electrode 52. A predetermined voltage is applied to the first light-shielding film 81, and the value of this voltage can vary depending on the operating state of the imaging device 100. In other words, a variable voltage is applied to the first light-shielding film 81. The variable voltage includes, for example, a first voltage applied during exposure and a second voltage applied during pixel readout. Depending on the operating state of the imaging device 100, the first voltage and the second voltage are selectively applied to the transparent electrode 52 via the first light-shielding film 81.

[0108] Furthermore, the first light-shielding film 81 covers a pixel 110BM that is a portion of the plurality of pixels 110 included in the pixel portion 101. Pixel 110BM is a pixel 110 that is closest to the end of the pixel portion 101, specifically, closest to the peripheral circuit portion 102 or the separator 103, among the plurality of pixels 110 included in the pixel portion 101. Pixel 110BM is arranged in a ring shape along the outline of the pixel portion 101 in a plan view. Alternatively, pixel 110BM may be arranged only at a portion of the end of the pixel portion 101. For example, pixel 110BM may not be arranged along at least one side of the outline of the pixel portion 101. For example, pixel 110BM may be arranged along only one side of the outline of the pixel portion 101. Alternatively, pixel 110BM may be arranged along two opposing sides or two adjacent sides of the outline of the pixel portion 101.

[0109] Pixel 110BM is a pixel used for black correction processing in the imaging device 100 and is covered by the first light-shielding film 81 to prevent light from entering. That is, in a plan view, the entire pixel 110BM is located inside the first light-shielding film 81. Specifically, the first light-shielding film 81 overlaps with a portion of the upper surface of the photoelectric conversion film 51 in a plan view. More specifically, the first light-shielding film 81 covers the end face 51A and the upper surface end 51B of the photoelectric conversion film 51. The upper surface end 51B is a portion of the upper surface of the photoelectric conversion film 51 and is a portion that includes the pixel 110BM in a plan view. The upper surface end 51B does not include the pixel 110 in a plan view. The plan view shape of the pixel 110BM is consistent with the plan view shape of the pixel electrode 50, for example.

[0110] In this embodiment, if Figure 4 As shown, the first light-shielding film 81 contacts and covers the upper surface end 53B of the insulating layer 53, the end surface 53A of the insulating layer 53, the end surface 52A of the transparent electrode 52, the end surface 51A of the photoelectric conversion film 51, the electrode terminal 60, and the portion of the upper surface of the interlayer insulating layer 43 located near the electrode terminal 60. Furthermore, the upper surface end 53B of the insulating layer 53 and the upper surface end 51B of the photoelectric conversion film 51 are also portions that include the pixel 110BM but not the pixel 110 in a plan view.

[0111] like Figure 3 As shown, the first light-shielding film 81 is provided in a ring shape along the outer periphery of the pixel portion 101 in a plan view. The area inside the inner periphery of the first light-shielding film 81 is a photosensitive area. That is, the plurality of pixels 110 arranged inside the inner periphery of the first light-shielding film 81 in a plan view perform photoelectric conversion, and imaging is performed based on the generated signal charge.

[0112] Furthermore, the first light-shielding film 81 need not be provided in areas where the pixels 110BM are not provided. For example, if the pixels 110BM are provided only along one side of the pixel portion 101, the first light-shielding film 81 may be provided along that side. In other words, the plan view shape of the first light-shielding film 81 need not be a ring, but may be a long rectangle along one side of the outline of the pixel portion 101, or an L-shape along both sides of the outline of the pixel portion 101.

[0113] like Figure 3 and Figure 4 As shown, the peripheral circuit section 102 includes a second light shielding film 82. The second light shielding film 82 overlaps at least a portion of the peripheral circuit 120 in a plan view. Specifically, the second light shielding film 82 overlaps at least a portion of the sample holding circuit (in the peripheral circuit 120) in a plan view. Figure 4(not shown). Furthermore, the second light-shielding film 82 may overlap with transistors or diodes included in circuits other than the sample hold circuit included in the peripheral circuit 120 in a plan view. For example, the second light-shielding film 82 may overlap with the entire peripheral circuit 120 in a plan view.

[0114] The transistors included in the sample-and-hold circuit and the like have impurity regions formed in the semiconductor substrate 31 as their source or drain. These impurity regions are n-type impurity regions formed in the p-type semiconductor substrate 31, so a pn junction is formed at the boundary between the impurity regions. The diodes included in the sample-and-hold circuit also have pn junctions.

[0115] When light strikes these pn junctions, charge is generated by the incident light, which can cause leakage current or potential fluctuations. In particular, since the sample-and-hold circuit temporarily holds the signal charge generated by the pixel 110, the generation of charge other than the signal charge within the sample-and-hold circuit can degrade the image quality of the image captured by the imaging device 100.

[0116] According to this embodiment, the second light-shielding film 82 covering the transistor and diode can suppress light from entering the pn junction. This allows for stable operation of the peripheral circuit 120. Furthermore, the generation of charges other than signal charges within the sample-hold circuit due to light can be suppressed, thereby minimizing image quality degradation.

[0117] like Figure 3 As shown, the second light shielding film 82 is provided in a ring shape along the inner periphery of the peripheral circuit portion 102 in a plan view. In addition, the plan view shape of the second light shielding film 82 may not be a ring shape, but may be a long rectangle along one side of the inner periphery of the peripheral circuit portion 102, or an L shape along both sides of the inner periphery of the peripheral circuit portion 102.

[0118] The first light-shielding film 81 and the second light-shielding film 82 are formed of, for example, the same material. Therefore, the second light-shielding film 82 has the same conductivity as the first light-shielding film 81. The first light-shielding film 81 and the second light-shielding film 82 are, for example, metal films such as titanium (Ti) or molybdenum (Mo), or metal nitride films such as titanium nitride (TiN) or tantalum nitride (TaN).

[0119] In this embodiment, if Figure 4 As shown, the peripheral circuit portion 102 further includes an insulating layer 70. A second light-shielding film 82 is provided above the insulating layer 70. Specifically, the second light-shielding film 82 is located above the upper surface of the interlayer insulating layer 43 and at least higher than the lower surface of the photoelectric conversion film 51. In this embodiment, the second light-shielding film 82 is provided in contact with the upper surface of the insulating layer 70.

[0120] Insulating layer 70 is an insulating layer located between second light-shielding film 82 and interlayer insulating layer 43. In a plan view, insulating layer 70 overlaps the upper surface of interlayer insulating layer 43. Thus, even if a portion of the wiring structure is exposed on the upper surface of interlayer insulating layer 43, the exposed portion of the wiring structure is prevented from contacting second light-shielding film 82 and thereby forming an electrical connection.

[0121] The insulating layer 70 is formed using, for example, the same material as the insulating layer 53. Therefore, the insulating layer 70 has the same light-transmitting properties as the insulating layer 53. Specifically, the insulating layer 70 is a silicon oxide film or a silicon nitride film. The insulating layer 70 can be formed using the same process as the insulating layer 53. For example, after the photoelectric conversion film 51 and the transparent electrode 52 are patterned into a predetermined shape, an insulating film is formed on the entire surface including the upper surface of the transparent electrode 52, and patterned using photolithography and etching, thereby forming the insulating layer 53 and the insulating layer 70 at the same time. As a result, the thickness of the insulating layer 70 is the same as that of the insulating layer 53. Of course, the insulating layer 70 can also be formed using a material that is not light-transmitting.

[0122] Furthermore, in this embodiment, the first light-shielding film 81 and the second light-shielding film 82 can be formed using the same process. For example, after forming the insulating layer 53 and the insulating layer 70, a conductive light-shielding film is formed to cover the upper surfaces of the insulating layer 53 and the insulating layer 70, and patterned using photolithography and etching. This allows the first light-shielding film 81 and the second light-shielding film 82 to be formed simultaneously. This allows the first light-shielding film 81 and the second light-shielding film 82 to have the same thickness.

[0123] like Figure 3 and Figure 4 As shown in FIG. 1 , the first light shielding film 81 and the second light shielding film 82 are separated. In other words, the first light shielding film 81 and the second light shielding film 82 are not physically connected. In the plan view, a separation portion 103 is included between the first light shielding film 81 and the second light shielding film 82. The separation portion 103 is, for example, a region between the end portion on the outer peripheral side of the first light shielding film 81 and the insulating layer 70. In addition, Figure 3 For the convenience of illustration, an example is shown in which the inner peripheral end of the insulating layer 70 is consistent with the inner peripheral end of the second light shielding film 82. Figure 4 As shown, the second light shielding film 82 is provided outside the inner peripheral end portion of the insulating layer 70 .

[0124] Or, as Figure 3As shown, the inner circumferential end of the second light-shielding film 82 may coincide with the inner circumferential end of the insulating layer 70. In other words, the separation portion 103 may be the region between the outer circumferential end of the first light-shielding film 81 and the inner circumferential end of the second light-shielding film 82. For example, when the insulating layer 70 is not provided, the separation portion 103 corresponds to the region between the outer circumferential end of the first light-shielding film 81 and the inner circumferential end of the second light-shielding film 82.

[0125] Because the first light-shielding film 81 and the second light-shielding film 82 are separated, fluctuations in the potential of the first light-shielding film 81 have little effect on the second light-shielding film 82. In other words, even if the potential of the first light-shielding film 81 fluctuates, the potential of the second light-shielding film 82 remains constant, thereby significantly minimizing any effects on the peripheral circuit 120 covered by the second light-shielding film 82. Therefore, according to this embodiment, the peripheral circuit 120 can operate stably regardless of fluctuations in the potential of the first light-shielding film 81.

[0126] In this embodiment, no sample-hold circuit is provided in the separator 103. That is, in a plan view, no sample-hold circuit is disposed between the first light-shielding film 81 and the second light-shielding film 82. In other words, all sample-hold circuits included in the imaging device 100 are disposed in the peripheral circuit section 102. For example, all sample-hold circuits are disposed directly below the second light-shielding film 82. Alternatively, at least one of the sample-hold circuits may be included in the pixel section 101, for example, disposed directly below the first light-shielding film 81.

[0127] In the plan view, no transistors are disposed between the first light-shielding film 81 and the second light-shielding film 82. In other words, all transistors included in the imaging device 100 are provided in either the pixel portion 101 or the peripheral circuit portion 102.

[0128] In a plan view, no diodes may be disposed between the first light-shielding film 81 and the second light-shielding film 82. In other words, all diodes included in the imaging device 100 may be provided in either the pixel portion 101 or the peripheral circuit portion 102.

[0129] like Figure 4 As shown, the separation portion 103 is provided only with the wiring 48 contained within the interlayer insulating layer 43. Alternatively, the separation portion 103 may also include a conductive plug that connects multiple wirings 48 arranged in different layers. For example, no circuit elements other than electrical wiring are arranged in the separation portion 103. In other words, the separation portion 103 can be defined as a region in which no circuit elements other than electrical wiring are arranged in a plan view. Furthermore, the separation portion 103 does not include an impurity region formed in the semiconductor substrate 31.

[0130] This can suppress the generation of charge due to light in the separation portion 103 where light may reach the semiconductor substrate 31, thereby suppressing any adverse effects on the operation of the peripheral circuit 120. Furthermore, the separation portion 103 can be used to define the respective regions of the pixel portion 101 and the peripheral circuit portion 102, thereby clarifying the placement region of each circuit element and simplifying the circuit design.

[0131] (Implementation Method 2)

[0132] Next, use Figure 5 Implementation method 2 will be described.

[0133] Figure 5 It is a cross-sectional view of the imaging device 100A according to this embodiment. Figure 5 and Figure 4 The same performance is equivalent to Figure 3 The following description will focus on the differences from the first embodiment, and the description of the common points will be omitted or simplified.

[0134] like Figure 5 As shown, in the imaging device 100A, a contact hole 53H is formed in the insulating layer 53. The contact hole 53H is a through hole that penetrates the insulating layer 53 to expose the upper surface of the transparent electrode 52. The contact hole 53H is provided in a ring shape along the outline of the pixel portion 101 in a plan view, for example.

[0135] In this embodiment, the first light-shielding film 81 is provided to fill the contact hole 53H. Specifically, the first light-shielding film 81 contacts the end surface 52A of the transparent electrode 52 and the portion of the transparent electrode 52 exposed in the contact hole 53H. This increases the contact area between the first light-shielding film 81 and the transparent electrode 52, thereby reducing the contact resistance between the first light-shielding film 81 and the transparent electrode 52.

[0136] (Implementation 3)

[0137] Next, use Figure 6 Implementation method 3 will be described.

[0138] Figure 6 It is a cross-sectional view of the imaging device 100B according to this embodiment. Figure 6 and Figure 4 The same performance is equivalent to Figure 3 The following description will focus on the differences from the first embodiment, and the description of the common points will be omitted or simplified.

[0139] like Figure 6As shown, in the imaging device 100B, the peripheral circuit unit 102 does not include the insulating layer 70. Specifically, the second light-shielding film 82 is provided directly on the upper surface of the interlayer insulating layer 43. In this case, the lower surface of the second light-shielding film 82 is located at the same height as the lower surface of the first light-shielding film 81, for example, with reference to the upper surface of the semiconductor substrate 31. The outer peripheral ends of the second light-shielding film 82 and the first light-shielding film 81, i.e., the portions covering the electrode terminals 60, are at the same height and have the same thickness.

[0140] In this embodiment, in the peripheral circuit portion 102, the wiring structure is not exposed in at least the region of the upper surface of the interlayer insulating layer 43 that contacts the second light-shielding film 82. In other words, insulation between the upper surface of the interlayer insulating layer 43 and the second light-shielding film 82 is ensured. Therefore, even if a potential is applied to the second light-shielding film 82, its effect on the operation of the peripheral circuit 120 can be minimized.

[0141] (Implementation 4)

[0142] Next, use Figure 7 Describe implementation method 4.

[0143] Figure 7 It is a cross-sectional view of an imaging device 100C according to this embodiment. Figure 7 and Figure 4 The same performance is equivalent to Figure 3 The following description will focus on the differences from the first embodiment, and the description of the common points will be omitted or simplified.

[0144] like Figure 7 As shown, in the imaging device 100C, the film structure on the interlayer insulating layer 43 is the same in the pixel portion 101 and the peripheral circuit portion 102. Specifically, the peripheral circuit portion 102 further includes a spacer layer 91 and a transparent conductive film 92.

[0145] The spacer layer 91 includes the same material as the photoelectric conversion film 51 and overlaps with at least a portion of the peripheral circuit 120 in a plan view. In the present embodiment, the spacer layer 91 is arranged to be in contact with the upper surface of the interlayer insulating layer 43. The spacer layer 91 has the same structure as the photoelectric conversion film 51. Specifically, the spacer layer 91 has the same material and thickness as the photoelectric conversion film 51 and is formed by the same process. The photoelectric conversion film 51 is formed, for example, by coating a photoelectric conversion material on the entire upper surface of the interlayer insulating layer 43 and patterning it. In contrast to the photoelectric conversion material arranged in the peripheral circuit portion 102 being removed in Embodiment 1, in the present embodiment, the photoelectric conversion material arranged in the peripheral circuit portion 102 is not removed but is retained as it is to form the spacer layer 91.

[0146] The transparent conductive film 92 is made of the same material as the transparent electrode 52 and overlaps at least a portion of the peripheral circuit 120 in a plan view. In this embodiment, the transparent conductive film 92 is provided in contact with the upper surface of the spacer layer 91. The transparent conductive film 92 has the same structure as the transparent electrode 52. Specifically, the transparent conductive film 92 is made of the same material and has the same thickness as the transparent electrode 52 and is formed using the same process.

[0147] In this embodiment, the second light shielding film 82 is provided above the spacer layer 91. Specifically, the insulating layer 70 is provided between the second light shielding film 82 and the spacer layer 91. The insulating layer 70 is provided in contact with the upper surface of the transparent conductive film 92.

[0148] like Figure 7 As shown by the length h, the height of the upper surface of the insulating layer 70 is equal to the height of the upper surface of the insulating layer 53. Note that the height here is based on the upper surface of the interlayer insulating layer 43. In other words, the total thickness of the photoelectric conversion film 51, the transparent electrode 52, and the insulating layer 53 is equal to the total thickness of the spacer layer 91, the transparent conductive film 92, and the insulating layer 70.

[0149] Therefore, the height of the lower surface of the inner peripheral end portion of the first light shielding film 81 is also equal to the height of the lower surface of the second light shielding film 82. Figure 7 As shown, the inner peripheral end portion of the first light-shielding film 81 and the second light-shielding film 82 are formed at the same height and the same thickness t.

[0150] In this way, the structure of the film formed on the upper surface of the interlayer insulating layer 43 is the same at the end of the pixel portion 101 and the peripheral circuit portion 102. This has an advantage in the manufacturing method. Specifically, after the photoelectric conversion film 51 and the spacer layer 91, the transparent electrode 52 and the transparent conductive film 92, and the insulating layer 53 and the insulating layer 70 are formed together, photolithography and etching are performed, thereby making it possible to separate the pixel portion 101 and the peripheral circuit portion 102. As a result, the plan view shapes of the photoelectric conversion film 51, the transparent electrode 52, and the insulating layer 53 can be made the same. In addition, the plan view shapes of the spacer layer 91, the transparent conductive film 92, and the insulating layer 70 can be made the same.

[0151] After the films are separated, a conductive light-shielding film is formed on the first light-shielding film 81 and the second light-shielding film 82 and then patterned, thereby separating the pixel portion 101 and the peripheral circuit portion 102 .

[0152] (Implementation 5)

[0153] Next, use Figure 8 Describe implementation method 5.

[0154] Figure 8 It is a cross-sectional view of an imaging device 100D according to this embodiment. Figure 8 and Figure 4 The same performance is equivalent to Figure 3 The following description will focus on the differences from the first embodiment, and the description of the common points will be omitted or simplified.

[0155] like Figure 8 As shown, the structure of the imaging device 100D is similar to Figure 4 The structure of the imaging device 100 shown is the same. In this embodiment, a constant voltage is applied to the second light shielding film 82. The constant voltage is, for example, a negative voltage, but may also be a ground voltage (ie, 0V).

[0156] This maintains the potential of the second light-shielding film 82 constant, allowing the second light-shielding film 82 to function as a shielding electrode. Specifically, the second light-shielding film 82 can shield the peripheral circuit 120 from external electric or magnetic fields, thereby stabilizing the operation of the peripheral circuit 120. This allows for a more reliable imaging device 100D.

[0157] (Implementation 6)

[0158] Next, use Figure 9 Describe implementation method 6.

[0159] Figure 9 It is a cross-sectional view of an imaging device 100E according to this embodiment. Figure 9 and Figure 4 The same performance is equivalent to Figure 3 The following description will focus on the differences from the first embodiment, and the description of the common points will be omitted or simplified.

[0160] like Figure 9 As shown, the structure of the camera 100E is similar to Figure 4 The structure of the imaging device 100 shown is the same. In this embodiment, a variable voltage is applied to the second light shielding film 82. The variable voltage is, for example, Figure 9 As shown, two voltages V1 and V2 are included. The two voltages V1 and V2 are switched by the switch SW, and two voltages of different magnitudes are selectively applied to the second light shielding film 82 .

[0161] Furthermore, the variable voltage may include three or more voltages with different values. For example, an operational amplifier may be used to apply a voltage to the second light shielding film 82 that is always consistent with the potential of the vertical signal line 17. This allows the second light shielding film 82 to function as a protective electrode that suppresses potential fluctuations in the vertical signal line 17. This makes it possible to achieve a more reliable imaging device 100E.

[0162] (Other embodiments)

[0163] The above description of the imaging device according to one or more embodiments is based on the embodiments, but the present disclosure is not limited to these embodiments. As long as it does not depart from the main purpose of the present disclosure, various modifications of the embodiments conceived by those skilled in the art, as well as combinations of components in different embodiments, are all included in the scope of the present disclosure.

[0164] For example, in Embodiments 3 to 6, contact holes 53H may be provided similarly to Embodiment 2. Also, in Embodiments 5 and 6, for example, similarly to Embodiment 4, the peripheral circuit portion 102 may include a spacer layer 91 and a transparent conductive film 92 .

[0165] Furthermore, for example, the second light-shielding film 82 may not be conductive. In other words, the second light-shielding film 82 may be formed using a different material from the first light-shielding film 81. For example, the second light-shielding film 82 may be formed using an insulating resin material. The second light-shielding film 82 may also contain carbon black. The thickness of the second light-shielding film 82 may also differ from the thickness of the first light-shielding film 81.

[0166] Alternatively, for example, the first light-shielding film 81 may not be in contact with the end surface 51A of the photoelectric conversion film 51, the end surface 52A of the transparent electrode 52, or the end surface 53A of the insulating layer 53. For example, an insulating member may be provided between the end surface 51A, the end surface 52A, and the end surface 53A, and the first light-shielding film 81. Furthermore, when the first light-shielding film 81 is not in contact with the end surface 52A, as described in Embodiment 2, the first light-shielding film 81 is in contact with the upper surface of the transparent electrode 52 via the contact hole 53H.

[0167] In addition, the insulating layer 53 may be slightly smaller than the transparent electrode 52 in a plan view. This exposes the end of the upper surface of the transparent electrode 52, increases the contact area with the first light shielding film 81, and reduces the contact resistance.

[0168] Furthermore, for example, the insulating layer 70 and the insulating layer 53 may be formed using different materials. Furthermore, for example, the insulating layer 70 and the insulating layer 53 may have different thicknesses.

[0169] Furthermore, for example, the spacer layer 91 may be formed using a material different from that of the photoelectric conversion film 51. In this case, the thickness of the spacer layer 91 may be the same as or different from that of the photoelectric conversion film 51.

[0170] Furthermore, various changes, substitutions, additions, omissions, etc. can be made to the above-described embodiments within the scope of the claims or their equivalents.

[0171] Industrial Applicability

[0172] The present disclosure can be used as an imaging device capable of stabilizing circuit operation, and can be utilized in, for example, a camera or a distance measuring device.

[0173] Description of reference numerals:

[0174] 10 Light detection unit

[0175] 11 Amplifier transistor

[0176] 12 Reset transistor

[0177] 13 Address transistors

[0178] 15 Vertical scanning circuit

[0179] 16 Counter electrode signal line

[0180] 17 vertical signal lines

[0181] 18 Load circuit

[0182] 19 columns of signal processing circuits

[0183] 20 Horizontal signal readout circuit

[0184] 21 Power Wiring

[0185] 22 Differential Amplifier

[0186] 23 Feedback line

[0187] 24 charge storage nodes

[0188] 25 Charge detection circuit

[0189] 26 address signal lines

[0190] 27 Reset signal line

[0191] 28 horizontal common signal lines

[0192] 30 Voltage Control Circuit

[0193] 31 semiconductor substrate

[0194] 38A, 38B, 38C gate insulation layer

[0195] 39A, 39B, 39C gate electrodes

[0196] 41A, 41B, 41C, 41D, 41E n-type impurity regions

[0197] 42 Component separation area

[0198] 43 interlayer insulation layer

[0199] 45A, 45B contact plugs

[0200] 46A, 46B, 48 wiring

[0201] 47A, 47B conductive plugs

[0202] 50 pixel electrode

[0203] 51 Photoelectric conversion film

[0204] 51A, 52A, 53A end faces

[0205] 51B, 53B upper surface end

[0206] 52 transparent electrode

[0207] 53 insulation layer

[0208] 53H contact hole

[0209] 54 protective film

[0210] 55 Color Filters

[0211] 56 microlenses

[0212] 60 electrode terminals

[0213] 70 Insulation layer

[0214] 81 1st light-shielding film

[0215] 82 Second light-shielding film

[0216] 91 spacer layer

[0217] 92 transparent conductive film

[0218] 100, 100A, 100B, 100C, 100D, 100E Camera

[0219] 101 Pixel Department

[0220] 102 Peripheral Circuit Department

[0221] 103 Separation Department

[0222] 110, 110BM pixels

[0223] 120 Peripheral Circuits

Claims

1. An imaging device comprising a pixel unit and a peripheral circuit unit provided around the pixel unit, The pixel portion includes: Photoelectric conversion film; an upper electrode located above the photoelectric conversion film; a plurality of lower electrodes facing the upper electrode and having the photoelectric conversion film interposed therebetween; as well as a conductive first light-shielding film that overlaps a portion of the photoelectric conversion film in a plan view and is electrically connected to the upper electrode; The peripheral circuit unit includes: Peripheral circuits; as well as The second light shielding film overlaps at least a portion of the peripheral circuit in a plan view. In a plan view, the first light-shielding film and the second light-shielding film are separated. The upper electrode has an upper surface, a lower surface, and an end surface located between the upper surface and the lower surface. The first light shielding film is in contact with an end surface of the upper electrode.

2. The imaging device according to claim 1, The peripheral circuit unit includes: a spacer layer comprising the same material as the photoelectric conversion film and overlapping at least a portion of the peripheral circuit in a plan view, The second light shielding film is located above the spacer layer.

3. The imaging device according to claim 2, The thickness of the photoelectric conversion film is the same as the thickness of the spacer layer.

4. The imaging device according to claim 2 or 3, The peripheral circuit portion further includes an insulating layer located between the second light shielding film and the spacer layer.

5. The imaging device according to any one of claims 1 to 3, The peripheral circuit includes a sample hold circuit, The second light shielding film overlaps with the sample holding circuit in a plan view.

6. The imaging device according to any one of claims 1 to 3, The peripheral circuit includes a sample hold circuit, In a plan view, the sample holding circuit is not arranged between the first light-shielding film and the second light-shielding film.

7. The imaging device according to any one of claims 1 to 3, The material of the first light-shielding film is the same as that of the second light-shielding film.

8. The imaging device according to any one of claims 1 to 3, The second light-shielding film has electrical conductivity. A constant voltage or a ground voltage is applied to the second light shielding film.

9. The imaging device according to any one of claims 1 to 3, A varying voltage is applied to the first light shielding film.

10. The imaging device according to any one of claims 1 to 3, The thickness of the first light-shielding film is the same as the thickness of the second light-shielding film.

11. The imaging device according to any one of claims 1 to 3, In a plan view, no transistor is arranged between the first light-shielding film and the second light-shielding film.

12. The imaging device according to any one of claims 1 to 3, The pixel portion further includes an insulating layer located between the first light-shielding film and the upper electrode.

13. The imaging device according to any one of claims 1 to 3, The first light-shielding film does not overlap with the peripheral circuit in a plan view.

14. The imaging device according to any one of claims 1 to 3, The first light-shielding film does not overlap with the second light-shielding film in a plan view.

15. The imaging device according to any one of claims 1 to 3, The first light shielding film overlaps with a portion of the plurality of lower electrodes in a plan view.

16. The imaging device according to any one of claims 1 to 3, The peripheral circuit does not overlap with the upper electrode in a plan view.

17. The imaging device according to any one of claims 1 to 3, The upper electrode is a transparent electrode.

Images