Magnetic field sensor with flux guide reset

Abstract

Magnetic field sensor structures and methods of manufacturing the same are disclosed. The magnetic field sensor structures include at least a magnetoresistive sensor assembly and a transistor assembly integrated on a single chip. The transistor assembly includes at least a semiconductor device and a first interconnect. The method includes depositing a dielectric layer on the transistor assembly. The method includes removing portions of the dielectric layer to form a first trench. The method includes performing a damascene process to form a super-thick metal layer within the first trench, thereby creating a first metal coil. The first metal coil is configured as a first reset component. The method includes depositing another dielectric layer on the first metal coil. The method includes forming a flux guide within the other dielectric layer. The method includes forming a second metal coil on the other dielectric layer. The second metal coil is configured as a second reset component. The first reset component and the second reset component are configured as a reset mechanism configured to be responsive to the transistor assembly and operable to magnetize the flux guide to a predetermined direction.

Description

Technical Field

[0001] This disclosure relates generally to sensors, and more specifically to magnetic field sensors. Background Technology

[0002] The sensor device may include a magnetoresistive sensor configured to detect an in-plane magnetic field. Additionally, the sensor device includes a flux guide for directing an external field (such as a z-axis field) into the xy plane for sensing by the in-plane magnetoresistive sensor. The flux guide has a preferred magnetization direction for optimal z-axis response. This preferred magnetization direction can be disturbed, for example, by exposure to a very large external magnetic field, which may introduce domain walls in the flux guide. This can result in a lower signal-to-noise ratio (SNR) and drift in the magnetoresistive sensor's offset readings. Uniform magnetization of the flux guide can be reset via a reset operation. However, such a reset operation typically relies on a large operating current, thus relying on relatively large voltage overhead and / or significant power consumption. These relatively large operational requirements often make sensor devices with flux guide reset mechanisms unsuitable for mobile and smartphone applications. Summary of the Invention

[0003] The following is an overview of certain embodiments described in detail below. The aspects described are merely intended to provide the reader with a brief overview of these particular embodiments, and the description of these aspects is not intended to limit the scope of this disclosure. In fact, this disclosure may cover various aspects that may not be explicitly set forth below.

[0004] According to at least one aspect, a method relates to manufacturing a sensor device capable of magnetizing or demagnetizing a flux conductor to a predetermined magnetic orientation. The method includes depositing a dielectric layer on a transistor assembly. The method includes forming a first trench in the dielectric layer. The first trench at least partially exposes a first interconnect connected to the transistor assembly. The method includes depositing a diffusion barrier layer on at least the sidewalls of the dielectric layer defining the first trench. The method includes forming an ultra-thick metal (UTM) layer on the diffusion barrier layer to fabricate a first metal coil within the first trench. The method includes depositing another dielectric layer on the first metal coil. The method includes forming a flux conductor in the other dielectric layer. The method includes forming a metal wire in the other dielectric layer after forming the flux conductor. The method includes forming a second metal coil on the other dielectric layer. The second metal coil may be connected to the metal wire. The first and second metal coils are configured as a reset mechanism, the reset mechanism being configured to magnetize or demagnetize the flux conductor to a predetermined magnetic orientation in response to the transistor assembly.

[0005] According to at least one aspect, a method relates to integrating a magnetoresistive sensor assembly with a transistor assembly on a chip. The method includes forming the transistor assembly on a substrate. The transistor assembly includes at least a semiconductor device and a first interconnect. The first interconnect is operatively connected to the semiconductor device. The method includes depositing a dielectric layer on the transistor assembly. The method includes removing portions of the dielectric layer to form a first trench that at least partially exposes the first interconnect. The method includes performing a damascene process to form a UTM layer within the first trench, thereby creating a first metal coil. The first metal coil is configured as a first reset component. The method includes depositing another dielectric layer on the first metal coil. The method includes forming a flux guide within the other dielectric layer. The method includes forming a second metal coil on the other dielectric layer. The second metal coil is configured as a second reset component. The first and second reset components are configured as a reset mechanism. The reset mechanism is configured to respond to the transistor assembly. The reset mechanism is configured to be operable to magnetize or demagnetize the flux guide to a predetermined magnetic orientation.

[0006] According to at least one aspect, a method relates to fabricating a sensor structure including a CMOS device and a magnetoresistive sensor device having a reset operation for a flux guide. The method includes depositing a dielectric layer on the CMOS device. The method includes forming a first trench in the dielectric layer. The first trench, in a plan view, includes a coil shape in the dielectric layer. The method includes forming a UTM layer within the first trench of the dielectric layer to fabricate a first metal coil. The UTM layer may be formed via barrier seed deposition followed by electroplating, deposition, or any other suitable method. The first metal coil is configured as a first reset component. The method includes depositing another dielectric layer on the first metal coil. The method includes forming a flux guide along at least a sidewall portion of the other dielectric layer. The method includes forming a second metal coil on the other dielectric layer such that the flux guide is located between the first and second metal coils. The second metal coil may be operatively connected to the first metal coil. The second metal coil is configured as a second reset component. The first and second reset components are configured as a reset mechanism. The reset mechanism is configured to perform a reset operation to orient the flux guide to a predetermined magnetic orientation using a voltage less than 5 volts.

[0007] These and other features, aspects and advantages of the invention will be discussed in the following detailed description with reference to the accompanying drawings, in which the same characters denote similar or identical parts. Attached Figure Description

[0008] Figure 1 This is a diagram of an example magnetic field sensor including three differential sensors according to an exemplary embodiment of the present disclosure, wherein each differential sensor is formed by sensing elements connected in a Wheatstone bridge configuration.

[0009] Figure 2 This is a top view of a magnetic field sensor according to an exemplary embodiment of the present disclosure, the magnetic field sensor having an arrangement of sub-blocks forming a Z sensor, wherein each sub-block includes a reset mechanism.

[0010] Figure 3 This is a cross-sectional view of an example of a stacked structure that is part of a sensor structure according to an exemplary embodiment of the present disclosure.

[0011] Figure 4 This is an example embodiment based on the present disclosure. Figure 3 A diagram showing another cross-sectional view of a part of a stacked structure.

[0012] Figure 5 This is a flowchart illustrating an example of a method for manufacturing a sensor structure according to an exemplary embodiment of the present disclosure, the method including forming Figure 4 The integration process of this part of the stacked structure shown.

[0013] Figure 6A , Figure 6B , Figure 6C and Figure 6D This is a cross-sectional view showing portions of the stacked structure of the sensor structure during different stages of the manufacturing process of the UTM module according to an exemplary embodiment of the present disclosure.

[0014] Figure 7A , 7B Figures 7 and 7C are cross-sectional views showing portions of the stacked structure of the sensor structure during different stages of the process of manufacturing the flux guide module according to an exemplary embodiment of the present disclosure.

[0015] Figure 8A , 8B Figures 8C and 8D are cross-sectional views illustrating portions of the stacked structure of the sensor structure during different stages of the process of manufacturing the connection between the UTM module and the metal wire, according to an exemplary embodiment of the present disclosure. Detailed Implementation

[0016] The embodiments described herein, as well as their many advantages, have been illustrated and described by way of example. It will be apparent from the foregoing description that various changes in the form, construction, and arrangement of components can be made without departing from the disclosed subject matter or sacrificing one or more of its advantages. In fact, the descriptive form of these embodiments is merely illustrative. The illustrations provide conceptual visualizations and may be drawn to scale or not. These embodiments are readily adaptable to various modifications and alternatives, and the following claims are intended to cover and include such variations, and are not limited to the specific forms disclosed, but rather cover all modifications, equivalents, and alternatives falling within the spirit and scope of this disclosure.

[0017] Generally, magnetoresistive sensors are used in a full Wheatstone bridge configuration where all four branches 178, 180, 182, and 184 of the bridge have the same resistance and respond to an external field. For example, the magnetoresistive sensor can include anisotropic magnetoresistive (AMR), giant magnetoresistive (GMR), tunneling magnetoresistive (TMR), or any suitable magnetoresistive technique. In the presence of an external field along the sensing direction, the resistance of two bridge branches increases while the resistance of the other two decreases to produce a differential output voltage proportional to the applied field. In alternative embodiments, one or two bridge branches can change relative to the applied magnetic field, while the other two bridge branches remain fixed or increase at a lower rate. This is achieved, for example, in a Z-axis sensor by asymmetrically positioning flux guides around a tunneling magnetoresistive (TMR) sensing element to produce a net differential output voltage in the presence of an ambient Z-axis field.

[0018] Figure 1 A diagram illustrating an example of a magnetoresistive (MR) sensor 100 is shown. This MR sensor includes a first differential sensor 102, a second differential sensor 122, and a third differential sensor 142 for detecting the component directions of a field applied along a first axis 120 (e.g., the y-axis direction), a second axis 140 (e.g., the x-axis direction), and a third axis 160 (e.g., the z-axis direction), respectively. Each of the first differential sensor 102, the second differential sensor 122, and the third differential sensor 142 is formed by unshielded sensing elements connected in a Wheatstone bridge configuration. Thus, the first differential sensor 102 is formed by the connection of multiple sensing elements 104, 106, 108, 110 in a bridge configuration on corresponding pinned layers 112, 114, 116, 118, wherein each pinned layer 112-118 is magnetized in the x-axis direction. In a similar manner, the second differential sensor 122 is formed by the connection of a plurality of sensing elements 124, 126, 128, 130 in a bridge configuration on corresponding plurality of pinned layers 132, 134, 136, 138, each pinned layer 132, 134, 136, 138 being magnetized in the y-axis direction perpendicular to the magnetization direction of pinned layers 112, 114, 116, 118.

[0019] Furthermore, the third differential sensor 142 is in the same plane as the first sensor 102 and the second sensor 122. The third differential sensor 142 is formed by connecting multiple sensing elements 144, 146, 148, and 150 in a bridge configuration on corresponding pinned layers 152, 154, 156, and 158, each pinned layer 152, 154, 156, and 158 being magnetized along an in-plane direction. In this third bridge configuration, all sensing elements 144, 146, 148, and 150 have an easy magnetization axis direction orthogonal to the pinning magnetization direction of the pinned layers 152, 154, 156, and 158. The third bridge configuration also includes flux guides 162 and 164 located adjacent to the right edges of sensing elements 146 and 150, respectively, and flux guides 166 and 168 located adjacent to the left edges of sensing elements 144 and 148, respectively. Flux guides 166, 162, 168 and 164 are positioned below sensing elements 144, 146, 148 and 150.

[0020] By positioning the first differential sensor 102 and the second differential sensor 122 in an orthogonal alignment, with the sensing element orientation of each sensor equally deflected from the pinning direction of the sensor and orthogonal to each other in each sensor, the sensors can detect the component directions of the field applied along the first axis (y-axis) and the second axis (x-axis). Flux guides 162 and 166 are positioned asymmetrically between branches 172 and 170 in the differential sensor 142 below the opposite edges of elements 146 and 144. Flux guide 162 of sensing element 146 guides the magnetic flux from the Z-field into the plane along the right side and rotates the magnetization of sensing element 146 toward higher resistance in a first direction. Similarly, the magnetic flux from the Z-field can be guided into the plane by flux guide 166 along the left side of sensing element 144 and causes the magnetization of sensing element 144 to rotate toward lower resistance in a second direction, opposite to the first direction, because the guide is anti-symmetrical with guide 162. Furthermore, flux guides 164 and 168 are positioned asymmetrically between branches 176 and 174 in the differential sensor 142, below the opposing edges of elements 150 and 148. Flux guide 164 of sensing element 150 guides the magnetic flux from the Z-field into the plane along the right side, causing the magnetization of sensing element 150 to rotate towards higher resistance in a first direction. Similarly, the magnetic flux from the Z-field can be guided into the plane along the left side of sensing element 148 by flux guide 168, causing the magnetization of sensing element 148 to rotate towards lower resistance in a second direction, opposite to the first direction, because the guide is anti-symmetrical with guide 164. Thus, differential sensor 142 can detect the component direction of the field applied along the third axis or vertical axis (z-axis).

[0021] Figure 2 A conceptual diagram depicting a portion of a TMR sensor device 200. Similar to... Figure 1 How do the differential sensors 102, 122, and 142 detect the component directions of the applied field? The TMR sensor device 200 includes first, second, and third differential sensors configured to detect the component directions of the applied field along a first axis (y-axis), a second axis (x-axis), and a third axis (z-axis), respectively. More specifically, Figure 2 The figure shows a plan view of a portion of the third differential sensor 202 (Z sensor 202) of the TMR device 200. The Z sensor 202 is configured to detect the component direction of a magnetic field applied along the third axis or the Z-axis.

[0022] exist Figure 2 In the example shown, the Z sensor 202 includes eight sub-blocks 204A-204H, each of which includes a sensor array 206 with sensing elements and flux guides, an independent flux guide reset coil 208, and an independent sensing element reset coil 210. The independent flux guide reset coil 208 and independent sensing element reset coil 210 of each sub-block 204A-204H enable the sub-blocks 204A-204H to be reset independently of each other between read cycles of the Z sensor 202. As an illustrative example, the flux guide reset coil 208 and sensing element reset coil 210 of sub-block 204C enable the corresponding sensing element and flux guide of sub-block 204C to be reset independently of the corresponding sensing elements and flux guides of the other sub-blocks 204A-204B and 204D-204H. In this respect, when the sensing element and flux guide of sub-block 204C are reset, the sensing elements and flux guides of sub-blocks 204A-204B and 204D-204H are not reset. As another illustrative example, the flux guide reset coil 208 and the sensing element reset coil 210 enable the corresponding sensing elements and flux guides of sub-blocks 204A, 204C, 204E, and 204H to be reset independently, while the corresponding sensing elements and flux guides of sub-blocks 204B, 204D, 204F, and 204G are not reset.

[0023] The positional relationships between the sensor array 206, flux guide reset coil 208, and sensing element reset coil 210 in each of sub-blocks 204A~204H are generally similar from sub-block to sub-block and define the orientation of the sub-blocks. For example... Figure 2 As shown, the eight sub-blocks 204A-204H are arranged horizontally and vertically relative to each other. For example, sub-blocks 204A-204B and 204E-204F are arranged relative to each other. Figure 2 The observation direction is vertical, while sub-blocks 204C-204D and 204G-204H are relative to... Figure 2 The observation direction is horizontally oriented. Different sub-block orientations mitigate the effects of stress and temperature on the performance of the Z sensor 202 because these effects in the anisotropic direction are averaged together.

[0024] Figure 2 The flux guide reset coil 208 in the depicted embodiment is a planar coil having an outermost coil portion, an innermost coil portion, and a plurality of inner turns disposed between the outermost and innermost coil portions. The planar coil has an initial segment extending linearly along its long side length, followed by a first coil segment oriented at a predetermined angle (e.g., 45 degrees, 90 degrees, etc.) or a suitable shape (e.g., arcuate) and extending linearly along its short side length, and then a second coil segment oriented at a predetermined angle (e.g., 45 degrees, 90 degrees, etc.) or a suitable shape (e.g., arcuate) and extending linearly along another long side length. This pattern continues, with the long and short side lengths becoming shorter after each successive turn of the coil around the winding axis to define the coil. The long side length is configured to overlap with the tunnel junction (TJ) and the flux guide 312.

[0025] The sensing element reset coil 210 is provided as a separate metal layer covering the flux guide reset coil 208 and the sensor array 206. The sensing element reset coil 210 is substantially arranged in a plane spaced apart from the plane in which the flux guide reset coil 208 is arranged, and the sensing element reset coil 210 is electrically insulated from the flux guide reset coil 208. The sensing element reset coil 210 is positioned relative to the sensor array 206 in such a way that it can perform a sensing element reset operation and increase to the overall reset field during a flux guide reset operation with the flux guide reset coil 208. The sensor array 206 is disposed between the sensing element reset coil 210 and the flux guide reset coil 208, such that one of the two coils is positioned above the sensor array 206, and the other of the two coils is positioned below the sensor array 206.

[0026] Z-sensor 202 also includes circuitry operatively connected to each of flux guide reset coil 208 and sensing element reset coil 210. This circuitry includes structures, means, or techniques configured to establish and / or disconnect electrical connections and / or transfer voltage and / or current to / from / or between one or more conductive elements, operatively associated with or connected thereto. The circuitry of Z-sensor 202 is specifically configured to perform flux guide reset operations and sensing element reset operations independently of each other within each sub-block 204A-204H and independently between different sub-blocks 204A-204H.

[0027] To perform a flux guide reset operation, the circuit is configured to energize both the flux guide reset coil 208 and the sensing element reset coil 210 to generate a first reset field around the flux guide reset coil 208 and a second reset field around the sensing element reset coil 210, respectively. The first and second reset fields combine to establish a total reset field sufficient to orient the magnetization of a set of flux guides to a known, previously calibrated state, which may be interchangeably referred to as the predetermined magnetization direction / orientation of the set of flux guides or the predetermined flux guide magnetization direction / orientation. In another embodiment for performing a flux guide reset operation, the circuit is also configured to energize a flux guide auxiliary coil to generate a third reset field around the flux guide auxiliary coil. The third reset field is configured to smooth the first reset field near the flux guides, which facilitates orienting or reorienting the magnetization of the flux guides during the flux guide reset operation.

[0028] Figure 3 This is a cross-sectional view showing a portion of a sensor structure 300 according to an example embodiment. The sensor structure 300 integrates transistor technology with magnetoresistive technologies, such as tunnel magnetoresistive (TMR) technology, on a single chip. For example, in Figure 3 In the sensor structure 300, a transistor assembly 302 and a magnetoresistive sensor assembly 304 are stacked relative to a substrate 306. The transistor assembly 302 and the magnetoresistive sensor assembly 304 are operatively connected to each other.

[0029] Transistor assembly 302 includes at least a complementary metal-oxide-semiconductor (CMOS) device 308. Transistor assembly 302 may include at least one metal-insulator-metal (MIM) device 310 or a magnetoresistive device. For example, in Figure 3 In the transistor assembly 302, at least one circuit is included, which is configured to activate the flux guide reset mechanism of the magnetoresistive sensor assembly 304 to establish a total reset field sufficient to orient the magnetization of at least one flux guide 312 to a known, previously calibrated state. Although in Figure 3 The cross-sectional view is not shown, but the CMOS device 308 includes at least standard CMOS components. (See also: Regarding...) Figure 2 Regarding the Z sensor 202 discussed, the CMOS device 308 is configured as a circuit. In this respect, the CMOS device is operable to control at least one reset operation to activate a flux guide reset mechanism, thereby setting the flux guide 312 to a predetermined state. Additionally, the CMOS device 308 is operable to control at least a reset operation on the sensing element 314 (such as a TMR device). Furthermore, the transistor assembly 302 and / or the CMOS device 308 include one or more metal layers 316. As a non-limiting example, in Figure 3In the transistor assembly 302, at least a first metal layer M1, a second metal layer M2, a third metal layer M3, and a fourth metal layer M4 are included. The plurality of metal layers 316 and the plurality of insulating layers 318 are alternately disposed, at least as shown in the example below. Figure 3 As shown. The plurality of insulating layers 318 are provided with a plurality of vertical interconnects 320, which operatively connect the plurality of metal layers 316 and the CMOS device 308 to each other. The plurality of vertical interconnects 320 includes any suitable number of vertical interconnects 320. For example, in Figure 3 In this configuration, the plurality of vertical interconnect portions 320 include at least a first vertical interconnect portion VIA1, a second vertical interconnect portion VIA2, a third vertical interconnect portion VIA3, a fourth vertical interconnect portion VIA4, and a fifth vertical interconnect portion VIA5. (See reference...) Figure 3 As an example, the upper metal layer (e.g., the fourth metal layer M4) is configured to be connected to the magnetoresistive sensor assembly 304 via an upper vertical interconnect 320 (e.g., VIA5). Additionally, within the insulating portion of the metal layer 316, the MIM device 310 is disposed near at least one metal layer 316. For example, in Figure 3 In this context, the MIM device 310 is a capacitor top metal (CTM) device disposed in an insulating portion between the third metal layer M3 and the fourth metal layer M4. At this point, the MIM device 310 is operatively connected to the CMOS device 308 via metal layer 316 and vertical interconnect 320.

[0030] The magnetoresistive sensor assembly 304 includes at least a TMR device configured as a Z sensor 202. For example, Figure 3 The illustration shows a conceptual cross-sectional view of a portion of a TMR device, which includes at least one sensing element 314 corresponding to Figure 2 At least one of the sensing elements in the sensor array 206. The TMR device is configured to detect the component direction of a magnetic field applied along the third axis or z-axis. Furthermore, the TMR device includes a flux guide 312 and a flux guide reset mechanism. In this example, the flux guide reset mechanism includes at least a first reset component and a second reset component. The first reset component includes at least a segment of an ultra-thick metal (UTM) coil 322, which is configured to reset the flux guide coil 208 ( Figure 2 The second reset component includes at least one segment of the upper metal interconnect element 324, which is configured as the sensing element reset coil 210. Figure 2( ), and it is configured as at least one coil relative to the top plan view. In this example, the upper metal interconnect element 324 includes at least one coil or any suitable number of coils. Additionally, the flux guide reset mechanism may include at least one other reset component (not shown), such as the flux guide auxiliary coil discussed earlier. At least as Figure 3 As shown, the flux guide 312 is disposed between the first reset mechanism (e.g., UTM coil 322) and the second reset mechanism (e.g., upper metal interconnect element 324).

[0031] In response to communication with transistor assembly 302, a flux conductor reset mechanism is configured to perform a reset operation, wherein both a first reset component and a second reset component are activated to reset flux conductor 312 to a predetermined magnetic orientation or default setting. More specifically, the reset mechanism is advantageously configured to perform the reset operation using a voltage of less than 5 volts, thus making it suitable for a variety of applications, including, for example, mobile and smartphone applications. For example, in the illustrated embodiment, the flux conductor reset mechanism is configured to perform the reset operation using a voltage of approximately 3 volts but less than 3.5 volts.

[0032] The magnetoresistive sensor assembly 304 includes a vertical interconnect 326 disposed within a dielectric layer 328, which is disposed on a UTM coil 322. The vertical interconnect 326 operably connects the UTM coil 322 to a metal wire 332. Figure 3 In this structure, metal line 332 comprises copper. Metal line 332 is connected to a magnetic tunnel junction (MTJ) element via vertical interconnect 334. The MTJ element includes a magnetic reference element 336 (or pinning element 336) and a sensing element 314. The sensing element 314 provides a resistance change in response to a field. The MTJ element is connected to a magnetic local interconnect (MLI) 340 via vertical interconnect 338. Additionally, an upper metal interconnect element 324 is connected to metal line 332 via vertical interconnect 342. Metal pad 344 comprises aluminum, tantalum, copper, any suitable metal, or any suitable combination thereof. Furthermore, the sensor structure 300 includes several dielectric layers 328 of suitable thickness and an etch stop layer 330 between these various components, such as... Figure 3 As shown.

[0033] Figure 4 Provided Figure 3 Another view of a selected portion of the sensor structure 300. A cross-section showing a portion of the sensor structure 300 taken relative to the longitudinal dimension of the UTM coil 322. Figure 3 compared to, Figure 4 This diagram shows a cross-section of a selected portion of the stacked structure of the sensor structure 300, taken relative to the lateral dimension of the UTM coil 322. More specifically, Figure 4A portion of the stacked structure associated with the integration of transistor assembly 302 and magnetoresistive assembly 304 is shown. This portion provides improved reset operation for flux guide 312 and greater design options (e.g., wiring options) for the remainder of sensor structure 300 by being compact along the vertical axis (e.g., the thickness direction) and including damascene technology for finer in-plane wiring capabilities.

[0034] Figure 5 , 6A -6D, 7A-7C, and 8A-8D illustrate a method 500 for manufacturing a sensor structure 300 according to an example embodiment, the method 500 producing Figure 4 At least a portion of the stacked structure shown. More specifically, Figure 5 A flowchart of method 500 is shown, which includes a process for manufacturing a magnetoresistive sensor assembly 304 having an improved reset mechanism in a stacked configuration having transistor assemblies 302. Meanwhile, Figures 6A-6D 7A-7C and 8A-8D show the results according to Figure 5 Method 500 describes the cross-section of the sensor structure 300 at various stages of the process. Method 500 is advantageous in monolithically integrating the magnetoresistive sensor assembly 304 with the flux guide reset operation, which features an improved configuration and reduced power supply, and is stacked on a single chip with the transistor assembly 302.

[0035] In step 502, method 500 includes transistor manufacturing techniques. For example, in Figure 6A In method 500, the process includes fabricating a transistor assembly 302 relative to a substrate 306. Figure 6A In this embodiment, transistor assembly 302 includes at least one CMOS device 308 and at least one MIM device 310. For example, method 500 includes fabricating a CMOS device 308 comprising a plurality of metal layers 316. Alternatively, method 500 may include fabricating at least one MIM device 310 within an insulating portion, wherein the plurality of metal layers 316 are disposed. For example, see reference... Figure 6A The MIM device 310 is fabricated in an insulating portion between a pair of adjacent metal layers 316 located on the upper portion of the CMOS assembly. In this case, the MIM device 310 is located between the third metal layer M3 and the fourth metal layer M4. The MIM device 310 is advantageously positioned to avoid interference with at least one other component that could interrupt the operation of at least the MIM device 310.

[0036] At step 504, method 500 includes fabricating a UTM module on transistor assembly 302. Figures 6A-6DThe illustration shows a cross-section of the sensor structure 300 during the manufacturing process of the UTM module. After the transistor assembly 302 is manufactured and / or obtained at a stage following the formation of the upper metal layer (M4) and the upper vertical interconnect (e.g., VIA5), method 500 includes depositing a first etch stop layer 330 (E1) and a first dielectric layer 328 (D1) on the transistor assembly 302.

[0037] Method 500 includes using a UTM mask as a pattern to create a UTM coil 322 within an insulating layer. As the dielectric layer is patterned by the UTM mask, the UTM coil 322 is formed from the dielectric layer to have a coil shape in a planar view, for example... Figure 2 As shown. At this point, the UTM mask exposes a portion of the first dielectric layer 328 (D1), which will undergo etching to create trenches for the UTM coil 322. At least a portion of these trenches is aligned to connect with the vertical interconnect 320 (VIA5), while protecting the remaining areas of the first dielectric layer 328 (D1). More specifically, as Figure 6B As shown in the cross-sectional view, method 500 includes creating a trench 346 in a first dielectric layer 328 (D1) using a UTM mask, while masking non-trench regions of the first dielectric layer 328 (D1) during the formation of the trench 346. After providing the UTM mask (D1) on the first dielectric layer 328, method 500 includes forming the trench 346 by removing a corresponding portion (D1) of the first dielectric layer 328 and a corresponding portion (E1) of the first etch stop layer 330, while using the first etch stop layer 330 (E1) as a reference for when to stop etching. For example, as Figure 6B As shown, the trench 346 is formed to expose the vertical interconnect 320 (VIA5) so that a portion of the UTM coil 322 can be connected to the CMOS device 308 during formation via the vertical interconnect 320 (VIA5). Once formed, as... Figure 6B As shown, the trench 346 is defined by the sidewall 346A of the first dielectric layer 328 (D1), the sidewall 346B of the first etch stop layer 330 (E1), the upper surface portion 346C of the insulating layer 318, and the upper surface portion of the vertical interconnect portion 320 (VIA5).

[0038] Method 500 includes forming a UTM layer 322A on the resulting structure. Figure 6B This ensures that the UTM layer 322A at least fills the trench 346. Additionally, as... Figure 6C As shown, the UTM layer 322A can be formed to cover the upper surface of the first dielectric layer 328 (D1). For example, in Figure 6CIn this method 500, a damascene process is performed to form a UTM layer 322A. The damascene process includes forming a copper layer by forming at least a barrier layer, a seed layer, a copper plate, and / or a copper alloy. The UTM layer 322A comprises copper, a copper alloy, or any suitable conductive material that provides the functions described herein. After forming the UTM layer 322A, the method 500 includes forming a UTM coil 322 by removing excess portions of the upper surface of the UTM layer 322A coated with a first dielectric layer 328 (D1). For example, the UTM layer 322A can be refined by a chemical mechanical polishing (CMP) process to form the UTM coil 322 and the first dielectric layer 328 (D1) of a predetermined thickness. In this regard, for example, the CMP process can include copper CMP polished with tantalum (Ta) as the endpoint (EP). More specifically, at least as... Figure 6D As shown, the CMP process may include removing a portion of the dielectric layer 328 (D1), such that the remaining portion of the UTM layer 322A forms the UTM coil 322. In the example embodiment, the UTM coil 322 has a thickness T1 equal to or substantially equal to 1 micrometer, depending on manufacturing tolerances. The thickness T1 may be adapted to be greater than or less than 1 μm, depending on the requirements of the sensor design objectives. As described above, in Figure 6D In this configuration, the UTM coil 322 comprises copper. Furthermore, the UTM coil 322 comprises a planar coil defined by a trench 346 in a planar view. In this case, the thickness of the UTM coil 322 is equal to or substantially equal to the thickness of the first etch stop layer 330 (E1) and the thickness of the first dielectric layer 328 (D1). Additionally, since the vertical interconnect portion (VIA5) is exposed at the bottom of the trench 346, the UTM coil 322 is configured to connect to the underlying metal and via layers, and thus to the CMOS device 308. This feature enables the UTM coil 322, configured as a flux guide reset coil 208, to respond to the CMOS device 308.

[0039] At step 506, method 500 includes forming a dielectric portion on the UTM module and forming a transistor assembly 302 on the substrate 306. Meanwhile, Figure 7A The diagram illustrates a cross-section of the sensor structure 300 after the dielectric portion has been formed. At this point, for example, method 500 includes the resulting structure ( Figure 6DA second etch stop layer 330 (E2) is deposited on the first etch stop layer 330 (E1). This structure includes at least the upper surface of the UTM coil 322 and the upper surface of the dielectric layer 328 (D1). The second etch stop layer 330 (E2) may have the same or substantially the same thickness as the first etch stop layer 330 (E1). In contrast, the thickness of the second dielectric layer 328 (D2) is less than the thickness of the first dielectric layer 328 (D1). Furthermore, method 500 includes depositing a third etch stop layer 330 (E3) on the second dielectric layer 328 (D2). Then, a third dielectric layer 328 (D3') is deposited on the third etch stop layer 330 (E3). The third etch stop layer 330 (E3) may have the same or substantially the same thickness as the first etch stop layer 330 (E1) and / or the second etch stop layer 330 (E2). In this example, the third dielectric layer 328 (D3') is thicker than the second dielectric layer 328 (D2). The third dielectric layer 328 (D3') is configured to insulate the flux conductor 312, the metal line 332, and the metal filler 332A. The metal filler 332A is a metal portion. In this example, each etch stop layer 330 (E1, E2, and E3) comprises silicon nitride or any suitable material. Furthermore, each dielectric layer 328 (D1, D2, D3', and D3) comprises tetraethoxysilane (TEOS) or any suitable material.

[0040] At step 508, method 500 includes fabricating a flux guide 312 on substrate 306 relative to the UTM module and transistor assembly 302. At this point, Figures 7B-7C It is the cross-section of the sensor structure 300 during the manufacturing process of the flux guide 312.

[0041] More specifically, after forming the second etch stop layer 330 (E2), the second dielectric layer 328 (D2), the third etch stop layer 330 (E3), and the third dielectric layer (D3') on the UTM coil 322 and the first dielectric layer 328 (D1) at step 506, method 500 includes depositing a flux guide mask on the third dielectric layer 328 (D3). The flux guide mask is generated and applied such that the trench 348 can be formed to an appropriate size and location relative to other components, while protecting these other components during the formation of the trench 348. The flux guide mask exposes the trench region of the third dielectric layer 328A (D3') at the appropriate location, while protecting the non-trench regions of the third dielectric layer 328A (D3'). After placing a flux guide mask on the third dielectric layer 328A (D3'), method 500 includes forming a trench 348 by removing a corresponding portion of the third dielectric layer 328A (D3'), a corresponding portion (E3) of the third etch stop layer 330, and an upper portion of the second dielectric layer 328 (D2). Figure 7BAs shown, trench 348 is formed from the upper surface of the third dielectric layer 328A (D3') to the middle portion (D2) of the second dielectric layer 328, while extending completely through the third dielectric layer 328A (D3') and the third etch stop layer 330 (E3). In this case, at least as Figure 7B As shown, trench 348 can gradually taper to be wider at the third dielectric layer 330 (D3') than at the second dielectric layer 330 (D2). In other words, trench 348 is narrower at the second dielectric layer 330 (D2) than at the third dielectric layer 330 (D3').

[0042] Once the trench 348 is formed, method 500 includes forming a flux guide 312. For example, the flux guide 312 can be formed by depositing an alloy layer 312A on the resulting structure, such that the trench 348 has its bottom surface 348A, the sidewalls 348A of the second dielectric layer 328 (D2), the sidewalls 348C of the third etch stop layer 330 (E3), and the sidewalls 348D of the third dielectric layer 328 (D3') lined with the alloy layer 312A. In this respect, the flux guide 312 is formed by sputter deposition, electroplating, electroless plating, any suitable method, or any suitable combination thereof. The flux guide 312 is shaped into a strip or other guide geometry placed on or within the surface of the sensor structure.

[0043] refer to Figure 7B As an example, alloy layer 312A includes a nickel-iron (NiFe) alloy liner or any suitable ferromagnetic liner on the sidewalls 348B, 348C, and 348D of trench 348. Figure 7B As shown, the flux guide 312 is oriented vertically primarily along the sidewalls 348B, 348C, and 348D of the groove 348. For example, depending on manufacturing tolerances, the alloy liner is typically formed to be approximately 1 micrometer, but can be less than or greater than 1 micrometer. Furthermore, in this example, as... Figure 7C As shown, method 500 includes performing a sputtering process to etch away the nickel-iron alloy layer 312A on the upper surface of the third dielectric layer 328A (D3') and the bottom surface 348A of the trench 348. The sputtering process includes argon or any suitable one or more elements to perform the etching. Next, method 500 includes providing an additional dielectric deposit on the third dielectric layer 328A (D3') to form a dielectric layer 328 (D3) of a predetermined thickness.

[0044] Additionally, method 500 includes creating at least one electrical connection between the UTM module and the metal wire 332. Figures 8A-8DThe illustration shows a cross-section of the sensor structure 300 during various stages of the process of establishing at least one connection between the UTM coil 322 and the metal line 332. In this respect, method 500 includes forming a via 352 extending from the upper surface of the third dielectric layer 328 (D3) to the upper surface of the second etch stop layer 330 (E2). In this case, the via 352 is formed using a mask that exposes the desired area aligned with the UTM coil 322 while protecting other adjacent areas. Method 500 includes removing corresponding portions of the stack from the upper surface of the third dielectric layer 328 (D3) to the upper surface of the second etch stop layer 330 (E2) using a mask. In this case, etching is performed on the corresponding portions of the third dielectric layer 328 (D3), the third etch stop layer 330 (E3), and the second dielectric layer 328 (D2). In the example, etching is performed such that the via 352 comprises a uniform width for each of these layers. Figure 8A and 8B As shown, the via 352 has a width W2 obtained at the second dielectric layer 328 (D2) (or a width W2 obtained at the second etch stop layer 330 (E2)). This width W2 is smaller than the width W1 of the UTM coil 322 because the via 352 is configured to form and define a vertical interconnect 326, which serves as an electrical connection between the UTM coil 322 and the metal wire 332.

[0045] Method 500 includes fabricating a trench 354 for a metal line 332 connected to a via 352. The trench 354 is formed using a mask. The mask allows the formation of the trench 354 to be aligned with the via 352 and the UTM coil 322. Method 500 includes etching corresponding portions of a third dielectric layer 328 (D3) and a third etch stop layer 330 (E3) to form the trench 354 in these layers. Etching is performed using the third etch stop layer 330 (E3) as a reference. The trench 354 is defined by an upper surface portion 354A of the second dielectric layer 328 (D2), a sidewall 354B of the third etch stop layer 330 (E3), and a sidewall 354C of the third dielectric layer 328 (D3).

[0046] Method 500 includes forming a via 356 by removing a corresponding portion of a second etch stop layer 330 (E2) having a width W2. The via 356 is formed to expose the upper surface 354A of the UTM coil 322, thereby combining the via 356 with the via 352 to define a space for fabricating the vertical interconnect 326. In this example, the width W3 of the trench 354 for the metal line 332 is greater than the width W2 of the via 352 / 356 for the vertical interconnect 326, such that the width of the metal line 332 is greater than the width of the vertical interconnect 326. Additionally, the width W3 of the trench for the metal line 332 may be less than or equal to the width W1 of the trench 346 (or the width W1 of the UTM coil 322) within manufacturing tolerances.

[0047] Method 500 further includes forming vertical interconnects 326, metal lines 332, and metal filler 332A for flux guide 312. In this example, method 500 includes performing a damascene or dual damascene process to form a metal formation 358 that provides the vertical interconnects 326, metal lines 332, and metal filler 332A for flux guide 312. The damascene or dual damascene process includes forming a barrier layer, a seed layer, a copper plate, a copper alloy, any other damascene step, or any combination thereof. For example, as Figure 8C and 8D As shown, method 500 includes forming vertical interconnects 326, metal wires 332, and metal fillers 332A for flux guide 312 through the same damascene or double damascene process. More specifically, at least as shown Figure 8B and 8D As shown, the vertical interconnect portion 326 is formed in the region defined or defined by the upper surface of the UTM coil 322, the sidewall 356A of the second etch stop layer 330 (E2), and the sidewall 352B of the second dielectric layer 32 (D2) 8. Furthermore, the metal line 332 (D3) is formed in the region defined or defined by the sidewall 354C of the third dielectric layer 330, the sidewall 354B of the third etch stop layer 330 (E3), the upper surface portion 354A (D2) of the second dielectric layer 330, and the upper surface of the vertical interconnect portion 326. Additionally, the metal filler 332A for the flux guide 312 is formed in the region corresponding to the trench 350 and is defined or defined by the wall portion (D3) of the third dielectric layer 328, the wall portion of the flux guide 312, and the wall portion (D2) of the second dielectric layer 328. In this respect, method 500 includes providing the metal formation 358 such that at least each of these regions is filled to form the vertical interconnect 326, metal line 332, and metal filler 332A of the flux guide 311. In addition to filling the corresponding trenches for these components, the metal formation 358 also covers the stack such that the metal formation 358 provides a cover layer on at least the third dielectric layer 328 in a predetermined amount.

[0048] In addition, such as Figure 8D As shown, method 500 includes performing a CMP process to remove excess metal formation 358 from the stack, such that metal lines 332 and metal filler 332A are each manufactured to a predetermined thickness. As shown, the thickness of metal filler 332A is greater than that of metal lines 332 because the depth of trench 350 is greater than the depth of trench 354. After performing the CMP process, the stack is provided with vertical interconnects 326, metal lines 332, and metal filler 332A. In this example, metal formation 358 comprises copper, such that each of the vertical interconnects 326, metal lines 332, and metal filler 332A comprises copper or any comparable metal or material.

[0049] In step 510, method 500 includes continuing to manufacture the remaining second portion 304B of the magnetoresistive sensor assembly 304, such as... Figure 4 As shown, to generate at least the said portion of sensor structure 300, as Figure 3 As shown. At this point, after step 508, method 500 is then configured to perform standard procedures associated with forming the second portion 304B of the magnetoresistive sensor assembly 304 to create the sensor structure 300. For example, method 500 further includes forming an upper metal interconnect element 324, and after forming various features (e.g., a magnetoresistive sensing layer, a dielectric layer, interconnects, etc.) on the flux guide 312 and sensing element 314, configuring the upper metal interconnect element 324 as the sensing element reset coil 210 (…). Figure 2 ).

[0050] As discussed herein, the embodiments include numerous advantageous features and benefits. For example, the embodiments provide an improved configuration and manufacturing process for forming a magnetic field sensor that responds to an applied magnetic field in three dimensions and is capable of performing a reset operation with relatively low voltage requirements to ensure its proper functioning. These embodiments are also advantageous in providing magnetic field sensors that are efficiently and inexpensively constructed together with integrated circuit structures (e.g., transistor assembly 302) while providing a stable output resistant to external field shocks and being compatible for use in mobile applications, electronic compass applications, other suitable applications, or any combination thereof. In this respect, the embodiments are configured to consume less battery power and maintain longer battery life, for example, in mobile applications.

[0051] Furthermore, in this embodiment, after forming the CMOS device 308 and before forming the magnetic flux guide 312, a low-resistance UTM coil 322 comprising copper is integrated into the transistor assembly 302 to provide a monolithic three-dimensional sensing unit as a stack on a single chip. Utilizing these integration processes, the embodiment allows components to be placed closer together and enables reset operations to occur with lower current when needed, such as in cases of excessive magnetic field exposure. Additionally, these lower currents enable reduced charge dissipation, resulting in lower reset power, smaller reset capacitors, smaller chip size, and lower interconnect resistance.

[0052] Advantageously, the embodiments have a reset mechanism that is advantageously configured with a UTM coil 322 comprising copper as one of its reset components. By using the copper UTM coil 322 as the first reset component, the embodiments are able to position these first reset components closer in distance to the flux guide 312 (e.g., 40% closer compared to other configurations involving reset components comprising aluminum). Additionally, these embodiments provide a reset mechanism for the flux guide 312, wherein the thickness of the selected copper UTM coil 322 can be approximately 1 micrometer, depending on manufacturing tolerances. By manufacturing the UTM coil 322 to include copper, the overall height of the UTM coil 322 stacked in the vertical direction is reduced. These embodiments provide a finer UTM coil 322 with a minimum design rule (MDR) that provides a configuration with efficient wiring and spacing options, thereby achieving a compact and dense density configuration.

[0053] In other words, the above description is intended to be illustrative rather than restrictive, and is provided in the context of a particular application and its requirements. Those skilled in the art will understand from the foregoing description that the invention can be implemented in various forms, and various embodiments can be practiced individually or in combination. Therefore, although embodiments of the invention have been described in conjunction with specific examples, the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of the described embodiments, and the true scope of the embodiments and / or methods of the invention is not limited to the shown and described embodiments, as various modifications will become apparent to those skilled in the art upon study of the drawings, specification, and appended claims. For example, components and functions may be separated or combined in ways different from the various described embodiments, and may be described using different terms. These and other variations, modifications, additions, and improvements may fall within the scope of this disclosure as defined in the appended claims.

Claims

1. A method for manufacturing a magnetic sensor device, wherein the magnetic sensor device is capable of magnetizing a flux guide to a predetermined magnetic orientation, the method comprising: Deposit a dielectric layer on a transistor assembly; A first trench is formed in the dielectric layer, the first trench at least partially exposing a first interconnect portion connected to the transistor assembly; A diffusion barrier layer is deposited on at least the sidewalls of the dielectric layer defining the first trench; An ultra-thick metal layer is formed on the diffusion barrier layer to manufacture a first metal coil within the first trench; Deposit another dielectric layer on the first metal coil; A flux guide is formed in the other dielectric layer; After forming the flux guide, a metal line is formed in the other dielectric layer; and A second metal coil is formed on the other dielectric layer. The first metal coil and the second metal coil are configured as a reset mechanism, which is configured to magnetize or demagnetize the flux conductor to the predetermined magnetic orientation in response to the transistor assembly. The method further includes: An intermediate dielectric layer is deposited, the intermediate dielectric layer being formed before the other dielectric layer, such that the intermediate dielectric layer is located between the dielectric layer and the other dielectric layer; A portion of the intermediate dielectric layer is removed to form a second trench for a second interconnect, the second trench at least partially exposing the first metal coil; and A copper tack-dotting process is used to form the second interconnect, the metal wire, and the metal portion that contacts the flux guide. The second interconnection portion operably connects the first metal coil to the metal wire.

2. The method according to claim 1, further comprising: The ultra-thick metal layer is formed by using copper as an inlay process. The first metal coil is manufactured such that the reset mechanism is configured to perform a reset operation using a voltage of less than 5 volts.

3. The method according to claim 1, wherein: The first metal coil comprises copper; and The first metal coil has a thickness of less than two micrometers.

4. The method according to claim 1, further comprising: A magnetoresistive sensor is formed on the transistor assembly, wherein the first metal coil is located between the magnetoresistive sensor and the transistor assembly in a stack on a substrate.

5. The method according to claim 1, wherein, The flux guide is formed in the other dielectric layer before the second trench is formed in the intermediate dielectric layer.

6. The method of claim 1, further comprising: A third trench is formed in the other dielectric layer and a portion of the intermediate dielectric layer; The flux guide is manufactured by depositing a ferromagnetic layer on a first sidewall portion of the other dielectric layer defining the third trench and a second sidewall portion of the intermediate dielectric layer; as well as A fourth trench is formed in the other dielectric layer, the fourth trench at least partially exposing the second trench. The metal wire is formed in the fourth trench.

7. A method for integrating a magnetoresistive sensor assembly with a transistor assembly on a chip, the method comprising: A transistor assembly is formed on a substrate, the transistor assembly including at least a semiconductor device and a first interconnect portion operatively connected to the semiconductor device; Deposit a dielectric layer on the transistor assembly; Remove portions of the dielectric layer to form a first trench that at least partially exposes the first interconnect portion; An inlay process is performed to form an ultra-thick metal layer within the first trench, thereby creating a first metal coil, which is configured as a first reset component; Deposit another dielectric layer on the first metal coil; A flux guide is formed within the other dielectric layer; as well as A second metal coil is formed on the other dielectric layer, and the second metal coil is configured as a second reset component. The first reset component and the second reset component are configured as a reset mechanism, which is responsive to the transistor assembly and operable to magnetize or demagnetize the flux conductor to a predetermined magnetic orientation. The method further includes: An intermediate dielectric layer is deposited, the intermediate dielectric layer being formed before the other dielectric layer, such that the intermediate dielectric layer is located between the dielectric layer and the other dielectric layer; A portion of the intermediate dielectric layer is removed to form a second trench for the second interconnect portion, the second trench at least partially exposing the first metal coil; A portion of the other dielectric layer is removed to form a third trench for a metal wire, the third trench at least partially exposing the second interconnect; and A second damascene process is performed using copper to form a second interconnect, metal wires, and a metal portion that contacts the flux guide. The second interconnection portion operably connects the first metal coil to the metal wire.

8. The method according to claim 7, wherein, The ultra-thick metal layer includes copper.

9. The method of claim 7, further comprising: The ultra-thick metal layer is polished to form a first metal coil with a thickness of no more than two micrometers.

10. The method according to claim 7, wherein, The reset mechanism is configured to perform a reset operation to reset the flux guide to a predetermined magnetic orientation using a voltage of less than 5 volts.

11. The method according to claim 7, wherein, The flux guide is also formed along a portion of the sidewall of the intermediate dielectric layer, such that the thickness of the intermediate dielectric layer between the flux guide and the first metal coil is less than 0.5 micrometers.

12. The method according to claim 7, wherein, The transistor assembly includes a magnetoresistive device within an insulating portion.

13. A method for manufacturing a sensor structure, the sensor structure including a CMOS device and a magnetoresistive sensor device, the magnetoresistive sensor device having a reset operation for a flux guide, the method comprising: Deposit a dielectric layer on the CMOS device; A first trench is formed in the dielectric layer, and the first trench forms a coil shape in the dielectric layer in a plan view; An ultra-thick metal layer is formed within the first trench of the dielectric layer to manufacture a first metal coil, which is configured as a first reset component. Deposit another dielectric layer on the first metal coil; The flux guide is formed along at least a sidewall portion of the other dielectric layer; as well as A second metal coil is formed on the other dielectric layer, such that the flux guide is located between the first metal coil and the second metal coil, and the second metal coil is configured as a second reset component. The first reset component and the second reset component are configured as a reset mechanism, which is configured to perform the reset operation to orient the flux guide to a predetermined orientation using a voltage of less than 5 volts. The method further includes: An intermediate dielectric layer is deposited, the intermediate dielectric layer being formed before the other dielectric layer, such that the intermediate dielectric layer is located between the dielectric layer and the other dielectric layer; A portion of the intermediate dielectric layer is removed to form a second trench for the second interconnect portion, the second trench at least partially exposing the first metal coil; Remove another portion of the other dielectric layer to form another trench for the metal wire; and A copper tack-dotting process is used to form the second interconnect, the metal wire, and the metal portion that contacts the flux guide. The second interconnection portion operably connects the first metal coil to the metal wire.

14. The method of claim 13, further comprising: Copper is used to perform the inlay process to form an ultra-thick metal layer; as well as The ultra-thick metal layer is polished to form a first metal coil with a thickness of no more than two micrometers.

15. The method of claim 13, further comprising: The intermediate dielectric layer is deposited on the first metal coil. The thickness of the intermediate dielectric layer between the flux guide and the first metal coil is less than 0.5 micrometers.

16. The method of claim 13, further comprising: A magnetoresistive device is formed within an insulating portion associated with the CMOS device. The insulating portion includes a metal layer and interconnects operatively connected to the first metal coil. The dielectric layer is deposited on the magnetoresistive device.

17. The method according to claim 13, wherein, The flux guide is formed in the other dielectric layer before the second trench is formed in the intermediate dielectric layer.

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