Method for forming semiconductor structure

Abstract

A method for forming a semiconductor structure includes: providing a substrate; forming an initial first conductive structure on the substrate; flattening the initial first conductive structure to form a first conductive structure on the substrate; performing a surface treatment on the surface of the first conductive structure using a first cleaning process; and forming a second conductive structure on the first conductive structure after performing the surface treatment on the surface of the first conductive structure. The performance of the semiconductor structure formed by the method is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and particularly to a method for forming a semiconductor structure. Background Art

[0002] Metal interconnect structures are indispensable structures in semiconductor devices, which are used to achieve interconnections between active regions, between transistors, or between metal wires of different layers, and complete signal transmission and control. Therefore, in the process of semiconductor manufacturing, the formation of metal interconnect structures has a great impact on the performance of semiconductor devices and the cost of semiconductor manufacturing. In order to increase the device density, the sizes of semiconductor devices in integrated circuits have been continuously reduced. In order to achieve electrical connections of each semiconductor device, multiple-layer interconnect structures are usually required.

[0003] Generally, in the back-end interconnect process of semiconductor device manufacturing, an electrical connection needs to be formed between the first metal layer (M1) and the underlying active device structure (including source / drain regions and gate structure regions). Therefore, before forming the first metal layer, it is usually necessary to pre-form a local interconnect structure of the semiconductor device. The local interconnect structure includes: a zero-th metal layer (M0) electrically connected to the underlying source / drain regions, and a zero-th gate metal layer (M0G) electrically connected to the gate structure.

[0004] However, in the prior art, the manufacturing process of semiconductor structures with local interconnect structures is complex, and the performance of the formed semiconductor structures needs to be further improved. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure to improve the performance of the semiconductor structure.

[0006] To solve the above technical problem, the technical solution of the present invention provides a method for forming a semiconductor structure, including: providing a substrate; forming an initial first conductive structure on the substrate; planarizing the initial first conductive structure to form a first conductive structure on the substrate; performing a surface treatment on the surface of the first conductive structure using a first cleaning process; and forming a second conductive structure on the first conductive structure after the surface treatment of the first conductive structure.

[0007] Optionally, after forming the second conductive structure, it further includes: performing a surface treatment on the surface of the second conductive structure using a second cleaning process; and forming a third conductive structure on the surface of the second conductive structure after the surface treatment of the second conductive structure.

[0008] Optionally, the first cleaning process includes a dry cleaning process, a wet cleaning process, or a thermal annealing process; the second cleaning process includes a dry cleaning process, a wet cleaning process, or a thermal annealing process.

[0009] Optionally, the gas for the dry cleaning process includes nitrogen or argon.

[0010] Optionally, the cleaning solution for the wet cleaning process includes an acidic solution, and the parameters of the acidic solution are as follows: the solution includes a nitric acid solution, a sulfuric acid solution, or a hydrofluoric acid solution; the pH range of the solution is 4 to 6.8; the concentration range of the solution is 5% to 30%.

[0011] Optionally, the parameters of the thermal annealing process are as follows: the temperature range is 350 degrees Celsius to 550 degrees Celsius; the time is 60 seconds to 120 seconds.

[0012] Optionally, before forming the initial first conductive structure on the substrate, it further includes: forming a first dielectric layer on the substrate; the initial first conductive structure is located within the first dielectric layer.

[0013] Optionally, the first conductive structure includes a first adhesion layer and a first metal layer located on the first adhesion layer; the method for forming the first conductive structure includes: forming a first groove within the first dielectric layer, the first groove exposing the substrate surface; forming a first adhesion material layer on the first dielectric layer, on the sidewall surface and the bottom surface of the first groove; forming a first metal material layer on the first adhesion material layer, the first adhesion material layer and the first metal material layer constituting the initial first conductive structure; planarizing the initial first conductive structure until the surface of the first dielectric layer is exposed, forming the first conductive structure.

[0014] Optionally, the material of the first adhesion layer includes titanium nitride; the material of the first metal layer includes tungsten.

[0015] Optionally, the process for forming the first metal material layer includes a physical vapor deposition process, an electroplating process, or an electroless plating process.

[0016] Optionally, the process for planarizing the first metal material layer and the first adhesion material layer includes a chemical mechanical polishing process; the polishing solution for the chemical mechanical polishing process is an acidic solution, and the acidic solution includes a hydrogen peroxide solution or a citric acid solution.

[0017] Optionally, before forming the second conductive structure on the first conductive structure, it further includes: forming a second dielectric layer on the first conductive structure and on the first dielectric layer; the second conductive structure is located within the second dielectric layer.

[0018] Optionally, the method for forming the second conductive structure includes: forming a second groove in the second dielectric layer, the second groove exposing the surface of the first conductive structure; forming a second conductive structure material layer in the second groove; forming a planarization structure on the second conductive structure material layer and on the second dielectric layer, the planarization structure including a second adhesion layer and a second metal layer located on the second adhesion layer; planarizing the planarization structure and the second conductive structure material layer until the surface of the second dielectric layer is exposed, thereby forming the second conductive structure.

[0019] Optionally, the material of the second conductive structure includes tungsten; the material of the second adhesion layer includes titanium nitride; the material of the second metal layer includes tungsten.

[0020] Optionally, the process for forming the second conductive structure material layer includes a selective deposition process.

[0021] Optionally, the process parameters of the selective deposition process include: the reaction gas is a mixed gas of tungsten hexafluoride and hydrogen; the chamber pressure is 5 Torr to 15 Torr.

[0022] Optionally, the process for planarizing the planarization structure and the second conductive structure material layer includes a chemical mechanical polishing process; the polishing liquid for the chemical mechanical polishing process is an acidic solution, and the acidic solution includes a hydrogen peroxide solution or a citric acid solution.

[0023] Optionally, the third conductive structure includes a third adhesion layer and a third metal layer located on the third adhesion layer.

[0024] Optionally, the material of the third adhesion layer includes tantalum nitride; the material of the third metal layer includes copper.

[0025] Optionally, the substrate includes a substrate and a device layer located on the substrate, the device layer includes an isolation structure (not shown) and a device structure (not shown) located within the isolation structure, the device structure includes a transistor, a diode, a triode, a capacitor, an inductor, or a conductive structure; the first conductive structure is electrically connected to the device structure.

[0026] Optionally, the substrate further includes: a fin structure located on the substrate.

[0027] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0028] In the method for forming a semiconductor structure according to the technical solution of the present invention, the surface of the first conductive structure is surface-treated by using a first cleaning process, so that reaction by-products present on the surface of the first conductive structure during the formation of the first conductive structure can be completely removed, thereby reducing the damage caused by the reaction by-products to the second conductive structure and preventing the resistance of the second conductive structure from increasing, thus improving the performance of the semiconductor structure.

[0029] Furthermore, the surface of the second conductive structure is surface-treated by using a second cleaning process, so that reaction by-products present on the surface of the second conductive structure during the formation of the second conductive structure can be completely removed, thereby reducing the damage caused by the reaction by-products to the third conductive structure and preventing the resistance of the third conductive structure from increasing or even preventing poor contact between the third conductive structure and the second conductive structure, thus improving the performance of the semiconductor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figures 1 to 4 is a schematic structural diagram of the process of forming a semiconductor structure in an embodiment;

[0031] Figures 5 to 10 is a schematic structural diagram of the process of forming a semiconductor structure in an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0032] As described in the background art, the manufacturing process of a semiconductor structure with a local interconnection structure in the prior art is complex, and the performance of the formed semiconductor structure needs to be further improved. The following is an analysis and description in combination with specific embodiments.

[0033] Figures 1 to 4 is a schematic structural diagram of the process of forming a semiconductor structure in an embodiment.

[0034] Please refer to Figure 1 , a substrate 100 is provided; a first conductive structure is formed on the substrate 100, and the first conductive structure includes a first adhesion layer 102 and a first metal layer 103 located on the first adhesion layer 102. The material of the first adhesion layer 102 includes titanium nitride, and the material of the first metal layer 103 includes tungsten.

[0035] The method for forming the first conductive structure includes: forming a first dielectric layer (not shown) on the substrate 100; forming a first groove (not shown) in the first dielectric layer, and the first groove exposes the surface of the substrate 100; forming a first adhesion material layer (not shown) on the first dielectric layer, on the sidewall surface and the bottom surface of the first groove; forming a first metal material layer (not shown) on the first adhesion material layer; planarizing the first metal material layer and the first adhesion material layer until the surface of the first dielectric layer is exposed to form the first conductive structure.

[0036] The planarization process usually adopts a chemical mechanical polishing process. The polishing liquid of the chemical mechanical polishing process is usually an acidic solution, and the polishing liquid is likely to form a reaction by-product A with the first metal material layer and remain on the first metal layer 103.

[0037] Please refer to Figure 2 , form a second dielectric layer 104 on the first conductive structure; form a second conductive material layer 105 in the second dielectric layer 104; form a second adhesion layer 106 on the second dielectric layer 104 and the second conductive material layer 105; form a second metal layer 107 on the second adhesion layer 106.

[0038] In this embodiment, the material of the second adhesion layer 106 includes titanium nitride, and the material of the second metal layer 107 includes tungsten.

[0039] In this embodiment, the material of the second conductive material layer 105 includes tungsten, and the process of forming the second conductive material layer 105 includes a selective deposition process.

[0040] Please refer to Figure 3 , planarize the second metal layer 107, the second adhesion layer 106 and the second conductive material layer 105 until the surface of the second dielectric layer 104 is exposed, and form a second conductive structure 108 in the second dielectric layer 104.

[0041] The planarization process includes a chemical mechanical polishing process, and the polishing liquid of the chemical mechanical polishing process is likely to form a reaction by-product B with the second conductive material layer 105 and remain on the second conductive structure 108.

[0042] Please refer to Figure 4 , form a third dielectric layer 109 on the second conductive structure 108; form a third conductive structure in the third dielectric layer 109, the third conductive structure includes a third adhesion layer 110 and a third metal layer 111 located on the third adhesion layer 110, and the third conductive structure is located on the second conductive structure 108.

[0043] In this embodiment, the material of the third adhesion layer 110 includes tantalum nitride, and the material of the third metal layer 111 includes copper.

[0044] During the formation of the semiconductor structure, the materials of reaction by-product A and reaction by-product B are both organic substances. These organic substances are volatile. At the same time, since the polishing liquid is an acidic solution, these organic substances have certain oxidizing properties. On the one hand, the formation process of the second conductive material layer 105 is a selective deposition process. The selective deposition process has a directionality when forming the second conductive material layer 105. Therefore, there is a gap between the second conductive material layer 105 and the second dielectric layer 104. The reaction by-product A is easily volatilized into the gap to oxidize the sidewall surface of the second conductive structure 108, causing the resistance of the second conductive structure 108 to increase. On the other hand, the material of the third adhesion layer 110 includes tantalum nitride. The tantalum nitride material is extremely easy to be oxidized. Therefore, the reaction by-product B easily oxidizes the third adhesion layer 110, causing the resistance of the third adhesion layer 110 to increase. Even after the third adhesion layer 110 is completely oxidized and loses conductivity, the electrical contact effect between the third conductive structure and the second conductive structure 108 becomes poor. In summary, the performance of the semiconductor structure is affected.

[0045] To solve the above problems, the technical solution of the present invention provides a method for forming a semiconductor structure. By using a first cleaning process to perform surface treatment on the surface of the first conductive structure, the reaction by-products present on the surface of the first conductive structure during the formation of the first conductive structure can be removed completely, thereby reducing the damage caused by the reaction by-products to the second conductive structure and the situation where the resistance of the second conductive structure increases, thereby improving the performance of the semiconductor structure.

[0046] To make the above objects, features, and beneficial effects of the present invention more obvious and understandable, the following detailed description of the specific embodiments of the present invention will be given with reference to the accompanying drawings.

[0047] Figures 5 to 10 It is a schematic structural diagram of the semiconductor structure formation process in the embodiment of the present invention.

[0048] Please refer to Figure 5 , and a substrate is provided.

[0049] The substrate includes a substrate 200 and a device layer 201 located on the substrate. The device layer 201 includes an isolation structure (not shown) and a device structure (not shown) located within the isolation structure. The device structure includes a transistor, a diode, a triode, a capacitor, an inductor, or a conductive structure; the first conductive structure is electrically connected to the device structure.

[0050] In this embodiment, the substrate is a planar substrate.

[0051] In other embodiments, the substrate further includes: a fin structure located on the substrate.

[0052] In this embodiment, the material of the substrate 200 is silicon.

[0053] In other embodiments, the material of the substrate includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon on insulator (SOI), or germanium on insulator (GOI). Among them, the multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP.

[0054] Please refer to Figure 6 , and form a first dielectric layer 202 on the substrate.

[0055] The material of the first dielectric layer 202 includes a dielectric material, and the dielectric material includes one or a combination of silicon oxide, silicon nitride, silicon carbide, silicon carbon oxide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbonitride, and silicon carbon oxynitride. In this embodiment, the material of the first dielectric layer 202 includes silicon oxide.

[0056] Please continue to refer to Figure 6 , and form an initial first conductive structure on the substrate, and the initial first conductive structure is located within the first dielectric layer 202.

[0057] The initial first conductive structure includes a first adhesion material layer 203 and a first metal material layer 204 located on the first adhesion material layer.

[0058] The method for forming the initial first conductive structure includes: forming a first groove (not shown) within the first dielectric layer 202, where the first groove exposes the substrate surface; forming the first adhesion material layer 203 on the first dielectric layer 202, on the sidewall surface and the bottom surface of the first groove; forming the first metal material layer 204 on the first adhesion material layer 203 to form the initial first conductive structure.

[0059] The first adhesion material layer 203 provides a material layer for the subsequently formed first adhesion layer; the first metal material layer 204 provides a material layer for the subsequently formed first metal layer.

[0060] The material of the first adhesion material layer 203 includes a metal nitride, and the material of the metal nitride includes titanium nitride; the material of the first metal material layer 204 includes tungsten.

[0061] The process for forming the first metal material layer 204 includes a physical vapor deposition process, an electroplating process, or a chemical plating process; the process for forming the first adhesion material layer 203 includes a chemical vapor deposition process.

[0062] Please refer to Figure 7 , planarize the initial first conductive structure, and form a first conductive structure on the substrate.

[0063] The first conductive structure includes a first adhesion layer 205 and a first metal layer 206 located on the first adhesion layer 205.

[0064] The method for forming the first conductive structure includes: planarizing the initial first conductive structure until the surface of the first dielectric layer 202 is exposed to form the first conductive structure.

[0065] The process of planarizing the first metal material layer 204 and the first adhesion material layer 203 includes a chemical mechanical polishing process; the polishing liquid for the chemical mechanical polishing process is an acidic solution, and the acidic solution includes a hydrogen peroxide solution or a citric acid solution.

[0066] The polishing liquid of the chemical mechanical polishing process easily forms reaction by-products with the first metal material layer 204 and remains on the surface of the first metal layer 206.

[0067] Please continue to refer to Figure 7 , and perform surface treatment on the surface of the first conductive structure using a first cleaning process.

[0068] The first cleaning process is used to remove the reaction by-products on the surface of the first metal layer 206.

[0069] The first cleaning process includes a dry cleaning process, a wet cleaning process, or a thermal annealing process.

[0070] The gas for the dry cleaning process includes nitrogen or argon.

[0071] The cleaning liquid for the wet cleaning process includes an acidic solution, and the parameters of the acidic solution are: the solution includes a nitric acid solution, a sulfuric acid solution, or a hydrofluoric acid solution; the pH range of the solution is 4 to 6.8; the concentration range of the solution is 5% to 30%.

[0072] The parameters of the thermal annealing process are: the temperature range is 350 degrees Celsius to 550 degrees Celsius; the time is 60 seconds to 120 seconds.

[0073] By performing surface treatment on the surface of the first conductive structure using the first cleaning process, the reaction by-products present on the surface of the first conductive structure during the formation of the first conductive structure can be removed completely, thereby reducing the damage caused by the reaction by-products to the subsequently formed second conductive structure and the situation where the resistance of the second conductive structure increases, thereby improving the performance of the semiconductor structure.

[0074] Next, a second conductive structure 211 is formed on the first conductive structure. For the formation process of the second conductive structure 211, please refer to Figure 8 and Figure 9 .

[0075] Please refer to Figure 8 , a second dielectric layer 207 is formed on the first conductive structure and on the first dielectric layer 202.

[0076] The material of the second dielectric layer 207 includes a dielectric material, and the dielectric material includes one or a combination of more of silicon oxide, silicon nitride, silicon carbide, silicon carbon oxide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbonitride, and silicon carbon oxynitride. In this embodiment, the material of the second dielectric layer 207 includes silicon oxide.

[0077] Please continue to refer to Figure 8 , a second groove (not shown) is formed in the second dielectric layer 207, and the second groove exposes the surface of the first conductive structure; a second conductive structure material layer 208 is formed in the second groove; a planarization structure is formed on the second conductive structure material layer 208 and on the second dielectric layer 207, and the planarization structure includes a second adhesion layer 209 and a second metal layer 210 located on the second adhesion layer 209.

[0078] The material of the second conductive structure material layer 208 includes a metal. In this embodiment, the metal includes tungsten.

[0079] Forming the second conductive structure material layer 208 includes a selective deposition process. The selective substrate process can form the second conductive structure material layer 208 on the first metal layer 206 in a certain direction, eliminating the step of forming a seed layer, so that the formed second conductive structure material layer 208 has a smaller resistance, which is beneficial to improving the performance of the semiconductor structure.

[0080] The process parameters of the selective deposition process include: the reaction gas is a mixed gas of tungsten hexafluoride and hydrogen; the chamber pressure is 5 Torr to 15 Torr.

[0081] Since the second conductive structure material layer 208 formed by the selective deposition process has a certain directionality, there is no seed layer between the second conductive structure material layer 208 and the second dielectric layer 207 to increase the adhesion between the second conductive structure material layer 208 and the second dielectric layer 207. Therefore, there is a certain gap between the second conductive structure material layer 208 and the second dielectric layer 207. The surface of the first conductive structure is surface-treated by a first cleaning process, so that the reaction by-products existing on the surface of the first conductive structure during the formation of the first conductive structure can be removed completely, thereby reducing the damage to the second conductive structure material layer 208 caused by the reaction by-products along the gap between the second conductive structure material layer 208 and the second dielectric layer 207, and preventing the resistance of the subsequently formed second conductive structure from increasing, thereby improving the performance of the semiconductor structure.

[0082] The planarization structure is used as a liner when planarizing the second conductive structure material layer 208, so that the flatness of the starting surface of the planarization process is better, and the stopping position of the planarization process can be more accurately controlled.

[0083] The material of the second metal layer 210 is the same as that of the second conductive structure material layer 208; the second adhesion layer 209 serves as a seed layer for forming the second metal layer 210.

[0084] In this embodiment, the material of the second adhesion layer 209 includes titanium nitride; the material of the second metal layer 210 includes tungsten.

[0085] Please refer to Figure 9 , planarize the planarization structure and the second conductive structure material layer 208 until the surface of the second dielectric layer 207 is exposed, and form the second conductive structure 211.

[0086] The process of planarizing the planarization structure and the second conductive structure material layer 208 includes a chemical mechanical polishing process; the polishing liquid of the chemical mechanical polishing process is an acidic solution, and the acidic solution includes a hydrogen peroxide solution or a citric acid solution.

[0087] The polishing liquid of the chemical mechanical polishing process is likely to form reaction by-products with the second conductive structure material layer 208 and remain on the surface of the second conductive structure 211.

[0088] Please continue to refer to Figure 9 , and perform surface treatment on the surface of the second conductive structure 211 by using a second cleaning process.

[0089] The second cleaning process includes a dry cleaning process, a wet cleaning process or a thermal annealing process.

[0090] The gas of the dry cleaning process includes nitrogen or argon.

[0091] The cleaning liquid of the wet cleaning process includes an acidic solution, and the parameters of the acidic solution are: the solution includes a nitric acid solution, a sulfuric acid solution or a hydrofluoric acid solution; the pH range of the solution is 4 to 6.8; the concentration range of the solution is 5% to 30%.

[0092] The parameters of the thermal annealing process are: the temperature range is 350 degrees Celsius to 550 degrees Celsius; the time is 60 seconds to 120 seconds.

[0093] The surface of the second conductive structure 211 is surface-treated by a second cleaning process, so that reaction by-products present on the surface of the second conductive structure 211 during the formation of the second conductive structure 211 can be removed completely, thereby reducing the damage caused by the reaction by-products to the subsequently formed third conductive structure, increasing the resistance of the third conductive structure, and even causing poor contact between the third conductive structure and the second conductive structure 211, thus improving the performance of the semiconductor structure.

[0094] In other embodiments, the surface of the second conductive structure may not be surface-treated by the second cleaning process.

[0095] Please refer to Figure 10 , after the surface of the second conductive structure 211 is surface-treated, a third conductive structure is formed on the surface of the second conductive structure 211.

[0096] The third conductive structure includes a third adhesion layer 213 and a third metal layer 214 located on the third adhesion layer 213.

[0097] The method for forming the third conductive structure includes: forming a third dielectric layer 212 on the second dielectric layer 207 and the second conductive structure 211; forming a third groove (not shown) in the third dielectric layer 212, the third groove exposing the surface of the second conductive structure 211; forming a third adhesion material layer (not shown) and a third metal material layer (not shown) located on the third adhesion material layer in the third groove; planarizing the third metal material layer and the third adhesion material layer until the surface of the third dielectric layer 212 is exposed, thereby forming the third conductive structure.

[0098] The material of the third adhesion layer 213 includes metal nitride, and the material of the third metal layer includes metal.

[0099] In this embodiment, the material of the third adhesion layer 213 includes tantalum nitride; the material of the third metal layer 214 includes copper.

[0100] The tantalum nitride, which is the material of the third adhesion layer 213, is easily oxidized. The surface of the second conductive structure 211 is surface-treated by the second cleaning process, so that reaction by-products present on the surface of the second conductive structure 211 during the formation of the second conductive structure 211 can be removed completely, thereby reducing the damage caused by the reaction by-products to the third adhesion layer 213, increasing the resistance of the third conductive structure, and even causing poor contact between the third conductive structure and the second conductive structure 211, thus improving the performance of the semiconductor structure.

[0101] In other embodiments, the material of the third adhesion layer includes titanium nitride; the material of the third metal layer includes tungsten. The titanium nitride material has relatively stable chemical properties and is not easily oxidized, so that the surface of the second conductive structure can be surface-treated by the second cleaning process.

[0102] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; forming a first dielectric layer on the substrate; forming a first groove in the first dielectric layer, wherein the first groove exposes the substrate surface; forming an initial first conductive structure in the first groove; Planarizing the initial first conductive structure to form a first conductive structure on the substrate, wherein the first conductive structure comprises: a first adhesion layer located on the sidewall surface and the bottom surface of the first groove; and a first metal layer located on the first adhesion layer; Performing surface treatment on the surface of the first conductive structure by using a first cleaning process; After surface treatment is performed on the surface of the first conductive structure, a second conductive structure is formed on the first conductive structure.

2. The method for forming a semiconductor structure according to claim 1, wherein: After forming the second conductive structure, the method further includes: performing surface treatment on the surface of the second conductive structure by using a second cleaning process; and forming a third conductive structure on the surface of the second conductive structure after performing surface treatment on the surface of the second conductive structure.

3. The method for forming a semiconductor structure according to claim 2, wherein: The first cleaning process includes a dry cleaning process, a wet cleaning process or a thermal annealing process; and the second cleaning process includes a dry cleaning process, a wet cleaning process or a thermal annealing process.

4. The method for forming a semiconductor structure according to claim 3, wherein: The gas of the dry cleaning process includes nitrogen or argon.

5. The method for forming a semiconductor structure according to claim 3, wherein: The cleaning solution of the wet cleaning process includes an acidic solution, and the parameters of the acidic solution are: the solution includes a nitric acid solution, a sulfuric acid solution or a hydrofluoric acid solution; the solution pH range is 4 to 6.8; and the solution concentration range is 5% to 30%.

6. The method for forming a semiconductor structure according to claim 3, wherein: The parameters of the thermal annealing process are: temperature range is 350 degrees Celsius to 550 degrees Celsius; time is 60 seconds to 120 seconds.

7. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming the first conductive structure includes: forming a first adhesion material layer on the first dielectric layer, the side wall surface and the bottom surface of the first groove; forming a first metal material layer on the first adhesion material layer, the first adhesion material layer and the first metal material layer constitute the initial first conductive structure; flattening the initial first conductive structure until the surface of the first dielectric layer is exposed to form the first conductive structure.

8. The method for forming a semiconductor structure according to claim 7, wherein: The material of the first adhesion layer includes titanium nitride; and the material of the first metal layer includes tungsten.

9. The method for forming a semiconductor structure according to claim 7, wherein: The process of forming the first metal material layer includes a physical vapor deposition process, an electroplating process or a chemical plating process.

10. The method for forming a semiconductor structure according to claim 7, wherein: The process of planarizing the first metal material layer and the first adhesion material layer includes a chemical mechanical polishing process; the polishing liquid of the chemical mechanical polishing process is an acidic solution, and the acidic solution includes a hydrogen peroxide solution or a citric acid solution.

11. The method for forming a semiconductor structure according to claim 1, wherein: Before forming the second conductive structure on the first conductive structure, the method further includes: forming a second dielectric layer on the first conductive structure and the first dielectric layer; and the second conductive structure is located in the second dielectric layer.

12. The method for forming a semiconductor structure according to claim 11, wherein: The method for forming the second conductive structure includes: forming a second groove in the second dielectric layer, the second groove exposing the surface of the first conductive structure; forming a second conductive structure material layer in the second groove; forming a planarization structure on the second conductive structure material layer and the second dielectric layer, the planarization structure including a second adhesion layer and a second metal layer located on the second adhesion layer; planarizing the planarization structure and the second conductive structure material layer until the surface of the second dielectric layer is exposed to form the second conductive structure.

13. The method for forming a semiconductor structure according to claim 12, wherein: The material of the second conductive structure includes tungsten; the material of the second adhesion layer includes titanium nitride; and the material of the second metal layer includes tungsten.

14. The method for forming a semiconductor structure according to claim 12, wherein: The process of forming the second conductive structure material layer includes a selective deposition process.

15. The method for forming a semiconductor structure according to claim 14, wherein: The process parameters of the selective deposition process include: the reaction gas is a mixed gas of tungsten hexafluoride and hydrogen; the chamber pressure is 5 torr to 15 torr.

16. The method for forming a semiconductor structure according to claim 12, wherein: The process of planarizing the planarization structure and the second conductive structure material layer includes a chemical mechanical polishing process; the polishing liquid of the chemical mechanical polishing process is an acidic solution, and the acidic solution includes a hydrogen peroxide solution or a citric acid solution.

17. The method for forming a semiconductor structure according to claim 2, wherein: The third conductive structure includes a third adhesion layer and a third metal layer located on the third adhesion layer.

18. The method for forming a semiconductor structure according to claim 17, wherein: The material of the third adhesion layer includes tantalum nitride; the material of the third metal layer includes copper.

19. The method for forming a semiconductor structure according to claim 1, wherein: The substrate includes a base and a device layer located on the base, the device layer includes an isolation structure (not shown) and a device structure (not shown) located in the isolation structure, and the device structure includes a transistor, a diode, a triode, a capacitor, an inductor or a conductive structure; The first conductive structure is electrically connected to the device structure.

20. The method for forming a semiconductor structure according to claim 19, wherein: The substrate further includes a fin structure located on the base.

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