Integrated capacitive grid sensor

Abstract

The application provides an integrated capacitive gate sensor, comprising a capacitive gate structure and a measurement circuit; the measurement circuit is formed on a first surface of a chip; the capacitive gate structure is formed on a second surface of the chip, and the capacitive gate structure is electrically connected with the measurement circuit. In the integrated capacitive gate sensor provided by the application, the minimum gate width of the emitter plate is determined by the integrated circuit technology, and high precision can be achieved.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and more particularly to an integrated capacitive gate sensor. Background Technology

[0002] A capacitive displacement sensor is a large-displacement capacitive sensor based on the variable-area working principle. Its electrodes are arranged like a grid, equivalent to multiple variable-area capacitive sensors connected in parallel. The principle of a variable-area capacitive sensor is: using a capacitor as the sensing element, mechanical displacement is converted into capacitance change, allowing for displacement measurement. The capacitance of a parallel-plate capacitor is directly proportional to the area of ​​its plates and inversely proportional to the distance between the plates. A variable-area capacitive sensor can be composed of a fixed plate and a movable plate. Changing the corresponding areas of the two plates changes the capacitance of the sensor.

[0003] like Figure 1 As shown, the capacitive displacement sensor includes a fixed electrode plate 20 and a moving electrode plate 10. The fixed electrode plate 20 consists of two sets of equally spaced, intersecting electrode grids, while the moving electrode plate 10 has the same electrode pitch and grid width. When the moving electrode plate 10 moves relative to the fixed electrode plate 20, the mechanical displacement is converted into a change in capacitance, which is then converted by a circuit to obtain a corresponding change in electrical signal.

[0004] Due to their low manufacturing cost, low energy consumption, and small size, capacitive grating displacement sensors are widely used in applications requiring large-range linear and angular displacement measurement, such as CNC machine tools, robots, length gauges, and angle gauges. Capacitive grating displacement sensors are divided into two categories: long capacitive grating displacement sensors and circular capacitive grating angular displacement sensors. Long capacitive grating displacement sensors can measure linear displacement and are widely used in measuring instruments such as digital calipers and height gauges. Circular capacitive grating displacement sensors can measure both angular and linear displacement. They have wide applications in angular displacement, angular displacement control, and digital micrometers.

[0005] However, in existing capacitive displacement sensors, the measurement circuit and the capacitive grating structure that measure capacitance changes are separate components, resulting in complex wiring between them and making the signal susceptible to interference. Furthermore, the separate structure of the measurement circuit and the capacitive grating structure in existing capacitive displacement sensors makes assembly difficult and prone to large assembly errors.

[0006] In addition, due to process limitations and the need for signal line interconnection, the minimum gate width of traditional capacitive gate structures is limited to about 600μm, which also limits the measurement resolution to about 10μm, making it difficult to improve further. Summary of the Invention

[0007] The purpose of this invention is to provide an integrated capacitive grating sensor, which solves the technical problem that existing capacitive grating sensors are not suitable for application scenarios with short measurement ranges and high accuracy requirements.

[0008] To address the aforementioned technical problems, this invention provides an integrated capacitive grating sensor, comprising:

[0009] Capacitive gate structure and measurement circuit;

[0010] The measurement circuit is formed on the first side of the chip;

[0011] The capacitive gate structure is formed on the second side of the chip and is electrically connected to the measurement circuit.

[0012] Preferably, the capacitive grating structure includes an emitting electrode and a reflecting electrode; the integrated capacitive grating sensor also includes a receiving electrode.

[0013] Preferably, the integrated capacitive grating sensor is implemented using integrated circuit technology.

[0014] Preferably, the gate structure and the measurement circuit are interconnected using through-silicon vias in integrated circuit manufacturing processes or T-type contacts in chip-scale packaging.

[0015] Preferably, the capacitive gate structure is formed on the second side of the chip using redistribution layer technology.

[0016] Preferably, the transmitting electrode and the receiving electrode are located in the same plane and are parallel to each other.

[0017] Preferably, the emitting electrode plate includes a plurality of thin strip-shaped emitting sub-electrodes, which are arranged parallel and equidistantly along their width direction.

[0018] Preferably, the reflective electrode plate includes a plurality of reflective sub-electrodes, which are arranged at equal intervals along their width direction, and the width of each reflective sub-electrode plate is equal to the width between the outermost two sides of k adjacent reflective sub-electrodes, where k is generally 2n and n is a natural number.

[0019] Preferably, the receiving electrode plate is coupled with the reflecting electrode plate to generate charge, and outputs the signal of the capacitive grating sensor.

[0020] Preferably, the reflective electrode and the emitting electrode are parallel to each other and are filled with an insulating medium, which is air, silicon dioxide or silicon nitride.

[0021] Preferably, the measurement circuit includes:

[0022] An input signal generation unit is adapted to provide N input signals with fixed phase differences to the capacitive gate structure;

[0023] A reference signal generation unit is adapted to provide a reference signal to the phase detector counter;

[0024] A phase detector counter is adapted to compare the reference signal and the amplified and shaped output signal of the grating structure, and output the quantized phase difference signal.

[0025] The digital logic operation and signal output unit is adapted to receive the phase difference signal after quantization by the phase detector counter, and output the measured value of the capacitive grating sensor by digital calculation and corresponding it one-to-one with the displacement value.

[0026] Compared with the prior art, the integrated capacitive grating sensor of the present invention has the following advantages:

[0027] 1. The minimum grid width of the emitter plate in the integrated capacitive grating sensor provided by the present invention is determined by the integrated circuit process, which can achieve high precision.

[0028] 2. In the integrated capacitive grating sensor provided by this invention, the capacitive grating structure and the measurement circuit are integrated on both sides of the same chip, and all circuits are integrated into a single integrated circuit chip. This increases the flexibility of circuit implementation and reduces circuit design costs.

[0029] 3. In the integrated capacitive gate sensor provided by this invention, the emitter and receiver plates are fabricated on the B-side of the chip using photolithography. The width of the capacitive gate structure is determined by the precision of the integrated circuit process, and it is easy to achieve a width of less than 1 μm. Therefore, the integrated capacitive gate sensor can achieve relatively high precision. Furthermore, the minimum width of the capacitive gate structure in the capacitive gate sensor is determined according to the resolution required for measurement. Taking a measurement resolution of 1 μm as an example, the width of the capacitive gate structure should theoretically be less than 100 μm.

[0030] 4. In the integrated capacitive gate sensor provided by this invention, the capacitive gate structure and the measurement circuit are integrated on a single chip. The interconnection between the capacitive gate structure and the measurement circuit is achieved using through-silicon via (TSV) and t-contact technologies in semiconductor processing. Compared with the circuit interconnection technologies used in existing capacitive gate sensors, the through-silicon via technology used in this patent can reduce interconnection leads, facilitate interconnection, increase interconnection reliability, and reduce noise caused by leads.

[0031] 5. The measurement circuit, emitter, and receiver in the integrated capacitive grating sensor provided by this invention can be integrated on a single chip. In application, only the reflective electrode plate needs to be installed according to the application requirements to complete the sensor assembly. Compared with the existing design, the single-chip integrated capacitive grating sensor implemented in this patent is simple to implement, has a wide range of applications, and saves costs. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of a capacitive grating sensor provided in the prior art;

[0033] Figures 2 to 7 This is a schematic diagram of an embodiment of the integrated high-precision capacitive grating sensor provided by the present invention. Detailed Implementation

[0034] Numerous specific details are set forth in the following description to provide a full understanding of the invention. However, the invention can be practiced in many other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0035] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, the schematic diagrams are merely examples for ease of explanation and should not limit the scope of protection of the present invention.

[0036] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the integrated capacitive grating sensor of the present invention will be described in detail below with reference to the accompanying drawings.

[0037] refer to Figure 2 As shown, this embodiment provides an integrated capacitive grating sensor, including: a capacitive grating structure and a measurement circuit; the measurement circuit is formed on a first surface A of the chip; the capacitive grating structure is formed on a second surface B of the chip, and the capacitive grating structure is electrically connected to the measurement circuit. In this embodiment, the integrated capacitive grating sensor also includes a signal generator integrated on the first surface A of the chip. The capacitive grating structure includes a receiving electrode and a transmitting electrode, integrated on the second surface B of the chip, while other circuits or electronic components are integrated on the other side of the chip. This arrangement makes the overall structure of the capacitive grating sensor compact, small in size, and the components are rationally positioned and do not interfere with each other, ensuring the stability of the capacitive grating structure during measurement.

[0038] refer to Figure 3 and Figure 4 The diagram shown is a schematic diagram of the capacitive grating structure in the integrated capacitive grating sensor provided in this embodiment.

[0039] In this embodiment, the capacitive grating structure includes an emitting electrode (E) and a reflecting electrode (R). The integrated capacitive grating sensor also includes a receiving electrode (C), wherein the emitting electrode (E) and the receiving electrode (C) are located in the same plane and are parallel to each other.

[0040] This installation is to ensure that the emitting plate, receiving plate, and reflecting plate form a parallel plate capacitor. The working principle of the capacitive grating sensor is to utilize the capacitive coupling effect between the emitting plate and the reflecting plate, and between the reflecting plate and the receiving plate.

[0041] As shown in the figure, the emitter plate (E) of the capacitive grid structure includes several thin strip-shaped emitter plates, which are arranged parallel and equidistantly along their width direction (which is also the direction of movement).

[0042] The reflector plate (R) also includes several reflector sub-plates, which are arranged parallel and equidistantly along their width direction (which is also the direction of movement). The width of each reflector sub-plate is equal to the width between the outermost two sides of k adjacent emitter sub-plates, where k is generally 2n and n is a natural number.

[0043] The reflector plate (R) and the emitter plate (E) are parallel to each other and are separated by an insulating medium, which can be air, silicon dioxide, or silicon nitride. In practical application and installation, preferably, the distance d between the emitter plate (E) and the reflector plate (R) should be as small as possible to obtain a larger capacitance value, thereby achieving better circuit noise immunity.

[0044] An alternating voltage is applied to the emitter plate (E), generating a charge Q in the corresponding reflector plate. r The reflective electrode (R) and the receiving electrode (C) are coupled to generate a charge Q. c The output signal V of the capacitive grating sensor is output. S .

[0045] In this embodiment, the reflective electrode (R) of the integrated capacitive grating sensor can be directly coupled to the carrier sensing stage according to the needs of the measured environment. In this embodiment, the reflective electrode (R) of the integrated capacitive grating sensor is installed parallel to and opposite to the emitting electrode according to the needs of the measured object.

[0046] refer to Figure 5 The diagram shown is a circuit block diagram of the integrated capacitive grating sensor provided in this embodiment, including:

[0047] An input signal generation unit is adapted to provide N input signals with fixed phase differences to the capacitive gate structure;

[0048] Reference signal generation unit, suitable for providing reference signal V R Give the phase detector counter;

[0049] A phase detector counter is adapted to compare the reference signal with the amplified and shaped output signal V of the capacitive gate structure. S Output the quantized phase difference signal;

[0050] The digital logic operation and signal output unit is adapted to receive the phase difference signal after quantization by the phase detector counter, and output the measured value of the capacitive grating sensor by digital calculation and corresponding it one-to-one with the displacement value.

[0051] The input signal generation unit and the reference signal generation unit are provided with pulse signals by the same pulse generation unit. The output signal of the capacitive gate structure is amplified and shaped by the signal amplification and shaping unit and then output to the phase detector counter. In this embodiment, the... Figure 5 The input signal generation unit and the reference signal generation unit are as follows: Figure 2 The signal generator in the system provides this.

[0052] In this embodiment, the Figure 5 The phase detector counter, digital logic operation and signal output unit are as follows: Figure 2 The measurement circuit contains sub-functional modules.

[0053] In the integrated capacitive grating sensor provided in this embodiment, the capacitive grating structure and the measurement circuit are integrated on the same integrated circuit chip and distributed on the front and back sides respectively. The structure is simple, which increases the flexibility of circuit implementation and reduces the circuit design cost.

[0054] For details, please refer to Figure 6 The diagram shows a schematic of the integrated capacitive gate sensor provided in this embodiment. The integrated capacitive gate sensor includes a capacitive gate structure and a measurement circuit. The measurement circuit is formed on a first surface A of the chip IC90. The capacitive gate structure is formed on a second surface B of the chip IC90, and includes an emitter plate 21 and a receiver plate 31. The emitter plate 21 and the receiver plate 31 are located on the same plane and are parallel to each other. The emitter plate 21 includes a plurality of thin strip-shaped emitter sub-plates, which are arranged parallel and equidistantly along their width direction (also the direction of movement). The capacitive gate structure and the measurement circuit are connected through a through-silicon via 110 formed in the chip IC90. In other embodiments, the capacitive gate structure and the measurement circuit can also be connected through a contact hole 110 formed in the chip IC90.

[0055] For further information, please refer to... Figure 7 As shown, Figure 7This is a cross-sectional schematic diagram of the semiconductor device structure of chip IC90 formed on silicon substrate 100. The structure of chip IC90 included in the integrated high-precision capacitive gate sensor provided in this embodiment includes: a silicon substrate 100, a first metal layer 45 formed on one side of the first surface A of the silicon substrate 100, and a second metal layer 21 formed on the surface of the second surface B of the silicon substrate 100. The first metal layer 45 is a metal interconnect layer for auxiliary circuits, including measurement circuits, control circuits, and / or other basic circuits, formed using metal interconnect layer formation technology in integrated circuits. The second metal layer 21 is a metal layer for the emitter and receiver plates, implemented using redistribution layer (RDL) technology.

[0056] In traditional technology, redistribution (RDL) involves altering the contact positions (I / O pads) of an IC through wafer-level metal routing and bumping processes, enabling the IC to be adapted to different package types. Wafer-level metal routing involves coating an insulating protective layer onto the IC, defining a new conductor pattern using exposure and development, and then using electroplating to create new metal traces to connect the original aluminum pads to new bumps or gold pads, achieving the redistribution of the circuitry. The metal traces in rerouting are primarily plated with copper, but nickel-gold or nickel-palladium-gold plating can also be applied as needed. Thick copper structures, due to their advantages of low resistance, high heat dissipation, and low cost, are the best choice for high-current and high-power devices.

[0057] Advantages of rewiring: It can change the original design of the line I / O, increasing the added value of the original design; it can increase the spacing of I / O, provide a larger bump area, reduce the stress between the substrate and the component, and increase the reliability of the component; it can replace part of the IC circuit design and accelerate IC development time.

[0058] In this case, a redistribution layer (RDL) process is employed. Specifically, this involves depositing a metal layer and a dielectric layer on the wafer surface to form the corresponding metal wiring pattern. The RDL can be implemented using photolithography or packaging processes during integrated circuit fabrication. This case primarily utilizes the RDL to manufacture the emitter and receiver plates of the capacitive gate structure. This allows for the creation of small-sized capacitive gate structures, such as those below 100μm, and also enables higher manufacturing precision, such as below 1μm.

[0059] In this embodiment, the metal layer 451 closest to the emitter plate in the first metal layer 45 is interconnected with the second metal layer 21 using a through-silicon via (TSV) 110. Specifically, TSV (Through Silicon Via) or T-contact technology is used to interconnect the capacitive gate structure with the measurement circuit. Compared with the circuit interconnection technology used in existing capacitive gate sensors, the through-silicon via technology used in this embodiment can reduce interconnection leads, facilitate interconnection, increase interconnection reliability, and reduce noise caused by leads.

[0060] Due to the high precision of integrated circuit manufacturing processes, the minimum width of the second metal layer 21, i.e., the emitter plate, can easily be made below 1 μm. That is, in this embodiment, the measurement resolution of the integrated capacitive grating sensor can easily be less than 1 μm. The overall width of the capacitive grating structure can also easily be made less than 100 μm. Therefore, the integrated capacitive grating sensor provided in this embodiment is suitable for applications requiring short measurement distances and high precision.

[0061] Since the measurement range of the capacitive grating sensor is limited by the reflective electrode (which is the same length as the reflective electrode), reflective electrodes of different lengths can be manufactured according to the measurement range requirements of the actual measured object to meet different measurement range needs. The integrated sensor provided in this embodiment can achieve a measurement range of 2 micrometers or more.

[0062] The measurement circuit, emitter, and receiver in the integrated capacitive grating sensor provided by this invention can be integrated on a single chip. In application, only the reflective electrode plate needs to be installed according to the application requirements to complete the sensor assembly. Compared with the existing design, the single-chip integrated capacitive grating sensor implemented in this patent is simple to implement, has a wide range of applications, and saves costs.

[0063] Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention by utilizing the methods and techniques disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the protection scope of the technical solutions of the present invention.

Claims

1. An integrated capacitive sensor, comprising: a capacitive structure and a measurement circuit; the measurement circuit is formed on a first side of a chip; the capacitive structure is formed on a second side of the chip, and the capacitive structure is electrically connected to the measurement circuit; the integrated capacitive sensor is implemented by using integrated circuit technology; the measurement circuit comprises: an input signal generating unit adapted to provide N input signals with fixed phase difference to the capacitive structure; a reference signal generating unit adapted to provide a reference signal to the phase discriminator; a phase discriminator adapted to compare the reference signal and an amplified and shaped output signal of the capacitive structure, and output a quantized phase difference signal; a digital logic operation and signal output unit adapted to accept the quantized phase difference signal from the phase discriminator, and output a measurement value of the capacitive sensor by digital calculation and displacement value one-to-one correspondence.

2. The integrated capacitive sensor according to claim 1, wherein: the capacitive structure comprises an emitter plate and a reflector plate; and the integrated capacitive sensor further comprises a receiver plate.

3. The integrated capacitive sensor according to claim 1 or 2, wherein: the capacitive structure and the measurement circuit are interconnected by using through silicon via or T-shaped contact in chip scale package in integrated circuit manufacturing process.

4. The integrated capacitive sensor according to claim 3, wherein: the capacitive structure is formed on the second side of the chip by using a rewiring layer technology.

5. The integrated capacitive sensor according to claim 2, wherein: the emitter plate and the receiver plate are located in the same plane and parallel to each other.

6. The integrated capacitive sensor according to claim 2, wherein: the emitter plate comprises a plurality of strip-shaped emitter sub-plates, and the emitter sub-plates are arranged in parallel and equidistant along the width direction of the emitter plate.

7. The integrated capacitive sensor according to claim 3, wherein: the reflector plate comprises a plurality of reflector sub-plates, and the reflector sub-plates are arranged in equidistant along the width direction of the reflector plate, and the width of each reflector sub-plate is equal to the width between the outermost two sides of k adjacent emitter sub-plates, wherein generally, k is equal to 2n, and n is a natural number.

8. The integrated capacitive sensor according to claim 2, wherein: the receiver plate and the reflector plate are coupled to generate electric charge, and output a signal of the capacitive sensor.

9. The integrated capacitive sensor according to claim 2, wherein: the reflector plate and the emitter plate are parallel to each other, and an insulating medium is filled between the reflector plate and the emitter plate, and the insulating medium is air, silicon dioxide or silicon nitride. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​

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