Gallium nitride light emitting diode epitaxial wafer and method of manufacturing the same
Patent Information
- Application Number
- CN202210148854.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2022-01-28
- Filing Date
- 2022-02-18
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2042-02-18
AI Technical Summary
[0006]1.8-1.9μm,且随着图形高度的增加,可以有效提升氮化镓的晶体质量,但是应用于背光产品,由于图形化原因,会减少背面出光,减少光的提取效率
[0019]The beneficial effects of the present application are that: sequentially growing an aluminum nitride film buffer layer, an undoped gallium nitride layer and an undoped aluminum gallium nitride layer on a substrate; growing a first heavily doped N-type gallium nitride layer on the undoped aluminum gallium nitride layer, roughening and edge processing the first heavily doped N-type gallium nitride layer, which can increase the light-emitting angle and release the stress in the first heavily doped N-type gallium nitride layer; growing a silicon dioxide layer on the first heavily doped N-type gallium nitride layer, performing patterned etching on the silicon dioxide layer and exposing the surface of the first heavily doped N-type gallium nitride layer, which can use the non-conductive characteristics of the silicon dioxide layer to move the carriers in the direction from N to P; growing a second heavily doped N-type gallium nitride layer on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer. Therefore, the stress can be released and the dislocation can be reduced through the first heavily doped N-type gallium nitride layer, and the current spreading capability can be improved by adding the silicon dioxide between the first heavily doped N-type gallium nitride layer and the second heavily doped N-type gallium nitride layer.
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Figure CN114551660B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor, in particular to a gallium nitride light-emitting diode epitaxial wafer and a preparation method thereof. BACKGROUND
[0002] With the development demand of small-pitch LED, the market demand of Mirco LED is getting larger and larger. Due to its technical advantages of high brightness, high contrast, high resolution and long service life, especially the mini backlight product, it will be fully applied in the fields of mobile phone screen, indoor and outdoor display screen, etc.
[0003] To realize Mirco LED, gallium nitride epitaxial technology is crucial. First of all, Mirco LED has high requirements for the electrical consistency of gallium nitride epitaxial wafer. At present, gallium nitride epitaxial wafer is grown on sapphire substrate for gallium nitride-based LED. Due to the problem of large mismatch between sapphire substrate and gallium nitride material, a large number of dislocations exist in the gallium nitride-based epitaxial structure, which results in poor consistency of volt-ampere characteristics. Therefore, reducing the dislocation density in the gallium nitride structure is a technical difficulty for Mirco LED epitaxial wafer.
[0004] At present, the methods for reducing the dislocation of gallium nitride epitaxial structure are divided into three types:
[0005] 1. The sapphire is made into PSS (Patterned Sapphire Substrate, patterned sapphire substrate), which can effectively reduce the screw dislocation of the gallium nitride layer. Generally, it is a conical pattern, and the height is generally
[0006] 1.8-1.9 μm. With the increase of the pattern height, the crystal quality of gallium nitride can be effectively improved. However, when applied to backlight products, due to the patterning, the back light extraction is reduced, and the light extraction efficiency is reduced.
[0007] 2. Before growing the gallium nitride structure, a thin film buffer layer of aluminum nitride is first sputtered on the sapphire. Then, in the reaction cavity of the MOCVD (Metal Organic Chemical Vapor Deposition) device, the cavity is kept at a certain pressure, and the non-doped gallium nitride epitaxial growth is carried out on the aluminum nitride thin film. Then, N-type gallium nitride is grown, which can reduce the dislocation in the N-type gallium nitride structure to a certain extent. However, due to the strong AL-N bond energy, it is difficult to make high-quality aluminum nitride thin film. At the same time, there is still a large lattice mismatch and thermal mismatch between aluminum nitride and gallium nitride, which will introduce a high dislocation density to the N-type gallium nitride material.
[0008] 3. After the non-doped gallium nitride is grown, and the electron-providing layer N-type gallium nitride is grown, a layer of aluminum gallium nitride is grown in the middle, and N-type gallium nitride is grown on the aluminum gallium nitride, which can also reduce the dislocations in the N-type gallium nitride structure to a certain extent, but a large number of dislocations between the bottom aluminum nitride and the non-doped gallium nitride still penetrate into the N-type gallium nitride layer through the aluminum gallium nitride layer, forming defects, when the epitaxial wafer is processed into a chip, and current is injected, because there are many defects in the N-type gallium nitride layer, the current will pass through the defects, causing poor current spreading, affecting the light-emitting efficiency of the LED. SUMMARY
[0009] The technical problem to be solved by the present application is to provide a gallium nitride light-emitting diode epitaxial wafer and a preparation method thereof, which can reduce the dislocation density in the gallium nitride structure while improving the current spreading capability.
[0010] To solve the above technical problems, the technical scheme adopted by the present application is:
[0011] A preparation method of a gallium nitride light-emitting diode epitaxial wafer, comprising the steps of:
[0012] growing an aluminum nitride thin film buffer layer, a non-doped gallium nitride layer and a non-doped aluminum gallium nitride layer on a substrate in sequence;
[0013] growing a first heavily doped N-type gallium nitride layer on the non-doped aluminum gallium nitride layer, and performing roughening and edge treatment on the first heavily doped N-type gallium nitride layer;
[0014] growing a silicon dioxide layer on the first heavily doped N-type gallium nitride layer, and performing patterned etching on the silicon dioxide layer to expose the surface of the first heavily doped N-type gallium nitride layer;
[0015] growing a second heavily doped N-type gallium nitride layer on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer.
[0016] To solve the above technical problems, the technical scheme adopted by the present application is:
[0017] A gallium nitride light-emitting diode epitaxial wafer, comprising an aluminum nitride thin film buffer layer, a non-doped gallium nitride layer, a non-doped aluminum gallium nitride layer and a heavily doped N-type gallium nitride layer grown on a substrate in sequence;
[0018] The heavily doped N-type gallium nitride layer comprises a first heavily doped N-type gallium nitride layer subjected to roughening and edge treatment, a patterned etched silicon dioxide layer, and a second heavily doped N-type gallium nitride layer grown on the surface of the first heavily doped N-type gallium nitride layer and the silicon dioxide layer.
[0019] The beneficial effects of the present application are that: sequentially growing an aluminum nitride film buffer layer, an undoped gallium nitride layer and an undoped aluminum gallium nitride layer on a substrate; growing a first heavily doped N-type gallium nitride layer on the undoped aluminum gallium nitride layer, roughening and edge processing the first heavily doped N-type gallium nitride layer, which can increase the light-emitting angle and release the stress in the first heavily doped N-type gallium nitride layer; growing a silicon dioxide layer on the first heavily doped N-type gallium nitride layer, performing patterned etching on the silicon dioxide layer and exposing the surface of the first heavily doped N-type gallium nitride layer, which can use the non-conductive characteristics of the silicon dioxide layer to move the carriers in the direction from N to P; growing a second heavily doped N-type gallium nitride layer on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer. Therefore, the stress can be released and the dislocation can be reduced through the first heavily doped N-type gallium nitride layer, and the current spreading capability can be improved by adding the silicon dioxide between the first heavily doped N-type gallium nitride layer and the second heavily doped N-type gallium nitride layer. BRIEF DESCRIPTION OF DRAWINGS
[0020] Figure 1 A flow chart of a preparation method of a gallium nitride light-emitting diode epitaxial wafer according to an embodiment of the present application is shown in FIG. 1.
[0021] Figure 2 A structure diagram of a gallium nitride light-emitting diode epitaxial wafer is shown in FIG. 2.
[0022] Figure 3 A comparison diagram of light-emitting distribution of a gallium nitride light-emitting diode epitaxial wafer prepared in Embodiment 2 and a traditional gallium nitride light-emitting diode epitaxial wafer under 20 mA is shown in FIG. 3.
[0023] Figure 4 A comparison diagram of light-emitting distribution of a gallium nitride light-emitting diode epitaxial wafer prepared in Embodiment 2 and a traditional gallium nitride light-emitting diode epitaxial wafer under 40 mA is shown in FIG. 4.
[0024] REFERENCE NUMERALS:
[0025] 1, substrate; 2, aluminum nitride film buffer layer; 3, undoped gallium nitride layer; 4, undoped aluminum gallium nitride layer; 5, first heavily doped N-type gallium nitride layer; 6, silicon dioxide layer; 7, second heavily doped N-type gallium nitride layer; 8, low-doped N-type gallium nitride layer; 9, low-temperature stress release layer; 10, stress release cycle layer; 11, cooling transition layer; 12, active region; 13, low-temperature P-type indium gallium nitride layer; 14, electron blocking layer; 15, P-type gallium nitride hole providing layer; 16, heavily doped P-type indium gallium nitride contact layer. DETAILED DESCRIPTION
[0026] To make the technical content, the purposes and effects of the present application clear, the following will be described in detail in combination with the embodiments and the accompanying drawings.
[0027] Please refer to Figure 1 and Figure 2The embodiment of the present application provides a preparation method of a gallium nitride light emitting diode epitaxial wafer, comprising the following steps:
[0028] Growth of an aluminum nitride film buffer layer, an undoped gallium nitride layer and an undoped aluminum gallium nitride layer on a substrate in sequence;
[0029] Growth of a first heavily doped N-type gallium nitride layer on the undoped aluminum gallium nitride layer, roughening and edge processing of the first heavily doped N-type gallium nitride layer;
[0030] Growth of a silicon dioxide layer on the first heavily doped N-type gallium nitride layer, patterned etching of the silicon dioxide layer and exposure of the surface of the first heavily doped N-type gallium nitride layer;
[0031] Growth of a second heavily doped N-type gallium nitride layer on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer.
[0032] From the above description, the present application has the following beneficial effects: growth of an aluminum nitride film buffer layer, an undoped gallium nitride layer and an undoped aluminum gallium nitride layer on a substrate in sequence; growth of a first heavily doped N-type gallium nitride layer on the undoped aluminum gallium nitride layer, roughening and edge processing of the first heavily doped N-type gallium nitride layer, which can increase the light emitting angle and release the stress in the first heavily doped N-type gallium nitride layer; growth of a silicon dioxide layer on the first heavily doped N-type gallium nitride layer, patterned etching of the silicon dioxide layer and exposure of the surface of the first heavily doped N-type gallium nitride layer, which can use the non-conductive property of the silicon dioxide layer to move the carriers in the direction from N to P; growth of a second heavily doped N-type gallium nitride layer on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer. Therefore, the stress can be released and the dislocation can be reduced through the first heavily doped N-type gallium nitride layer, and the current spreading capability can be improved by adding the silicon dioxide between the first heavily doped N-type gallium nitride layer and the second heavily doped N-type gallium nitride layer.
[0033] Further, the growth of the second heavily doped N-type gallium nitride layer on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer comprises:
[0034] The second heavily doped N-type gallium nitride layer is grown on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer in a vertical direction with a growth speed greater than that in a horizontal direction.
[0035] From the above description, the second heavily doped N-type gallium nitride layer is grown in a vertical direction with a growth speed greater than that in a horizontal direction, compared with the traditional growth mode of continuously using the horizontal direction growth, the defect density can be effectively controlled and the leakage channel in the N-type gallium nitride can be reduced.
[0036] Further, after the growth of the second heavily doped N-type gallium nitride layer on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer, the method further comprises:
[0037] a low-doped N-type gallium nitride layer, a low-temperature stress release layer, a stress release cycle layer, a temperature transition layer, an active region, a low-temperature P-type indium gallium nitride layer, an electron blocking layer, a P-type gallium nitride hole providing layer and a heavily doped P-type indium gallium nitride contact layer are sequentially grown on the second heavily doped N-type gallium nitride layer.
[0038] As can be seen from the above description, other structures of the epitaxial layer are continuously grown on the second heavily doped N-type gallium nitride layer, so as to obtain a gallium nitride light-emitting diode epitaxial wafer with low dislocation density and excellent current expansion.
[0039] Further, the growing of the first heavily doped N-type gallium nitride layer on the undoped aluminum gallium nitride layer comprises:
[0040] In a metal organic chemical vapor deposition device, the first heavily doped N-type gallium nitride layer is grown on the undoped aluminum gallium nitride layer in an environment with a temperature of 900-1200℃, using trimethylgallium as a metal organic source, using silane gas as a doping gas, and using a mixed gas of ammonia, hydrogen and nitrogen.
[0041] As can be seen from the above description, the growing of the first heavily doped N-type gallium nitride layer in the metal organic chemical vapor deposition device facilitates the growing of other structures of the epitaxial wafer subsequently.
[0042] Further, the roughening and edge processing of the first heavily doped N-type gallium nitride layer comprises:
[0043] The first heavily doped N-type gallium nitride layer is annealed in an environment of ammonia and nitrogen.
[0044] The annealed first heavily doped N-type gallium nitride layer is cooled and cleaned, and is subjected to surface roughening and edge processing by etching liquid and hydrochloric acid.
[0045] As can be seen from the above description, the surface roughening and edge processing of the first heavily doped N-type gallium nitride layer by etching liquid and hydrochloric acid can increase the light-emitting angle of the LED through roughening, and can release the stress in the first heavily doped N-type gallium nitride layer, so as to ensure that the crystal quality of the second heavily doped N-type gallium nitride layer grown subsequently is good.
[0046] Further, the patterning etching of the silicon dioxide layer and exposing the surface of the first heavily doped N-type gallium nitride layer comprises:
[0047] The silicon dioxide layer is etched into patterns with a preset interval by a patterning technique and inductively coupled plasma etching, and the etching depth at the interval between the patterns is the height of the silicon dioxide layer.
[0048] As can be seen from the above description, the silicon dioxide layer is etched into a pattern with a preset interval, and the etching depth at the interval of the pattern is the height of the silicon dioxide layer, so that the surface of the first heavily doped N-type gallium nitride layer is exposed during the etching process, and the non-conductive property of the silicon dioxide layer can improve the current spreading capability during the movement of the carriers from N to P when the second heavily doped N-type gallium nitride layer is grown.
[0049] Further, the patterning of the silicon dioxide layer includes:
[0050] A pattern layer is deposited on the silicon dioxide layer, and a stamping glue is uniformly coated on the pattern layer;
[0051] The pattern is transferred to the pattern layer by nano-imprinting technology, and the pattern is transferred to the silicon dioxide layer by an inductively coupled plasma etching device;
[0052] The patterned silicon dioxide layer is cleaned after being manufactured.
[0053] As can be seen from the above description, the pattern layer is deposited on the silicon dioxide layer, and the stamping glue is coated, so that the pattern can be transferred to the pattern layer, and the silicon dioxide layer is etched based on the pattern layer.
[0054] Further, the patterning of the silicon dioxide layer includes:
[0055] The silicon dioxide layer is etched into a patterned material with a nanoscale concave periodic arrangement, the pattern includes a regular hexagon, a regular square, a regular circle or a regular cone, and the interval of the pattern is 0.15-0.5 μm.
[0056] As can be seen from the above description, the silicon dioxide layer is etched into a regular hexagon, a regular square, a regular circle or a regular cone, and the interval of the pattern is 0.15-0.5 μm, which is beneficial to the current spreading.
[0057] Please refer to Figure 2 Another embodiment of the present application provides a gallium nitride light-emitting diode epitaxial wafer, which includes an aluminum nitride film buffer layer, an undoped gallium nitride layer, an undoped aluminum gallium nitride layer and a heavily doped N-type gallium nitride layer which are sequentially grown on a substrate.
[0058] The heavily doped N-type gallium nitride layer includes a first heavily doped N-type gallium nitride layer which is roughened and edge-treated, a patterned and etched silicon dioxide layer, and a second heavily doped N-type gallium nitride layer which is grown on the surface of the first heavily doped N-type gallium nitride layer and the silicon dioxide layer.
[0059] As can be known from the above description, the aluminum nitride film buffer layer, the undoped gallium nitride layer and the undoped aluminum gallium nitride layer are sequentially grown on the substrate; the first heavily doped N-type gallium nitride layer is grown on the undoped aluminum gallium nitride layer, roughening and edge processing are performed on the first heavily doped N-type gallium nitride layer, which can increase the light-emitting angle and release the stress in the first heavily doped N-type gallium nitride layer; the silicon dioxide layer is grown on the first heavily doped N-type gallium nitride layer, the silicon dioxide layer is subjected to patterned etching to expose the surface of the first heavily doped N-type gallium nitride layer, which can utilize the non-conductive characteristic of the silicon dioxide layer to move the carriers in the direction from N to P; and the second heavily doped N-type gallium nitride layer is grown on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer. Therefore, the stress can be released and the dislocation can be reduced through the first heavily doped N-type gallium nitride layer, and the current spreading capability can be improved by adding the silicon dioxide between the first heavily doped N-type gallium nitride layer and the second heavily doped N-type gallium nitride layer.
[0060] Further, the silicon dioxide layer is a patterned silicon dioxide layer etched with a preset interval, and the etching depth at the pattern interval of the silicon dioxide layer is equal to the height of the silicon dioxide layer.
[0061] As can be known from the above description, the silicon dioxide layer is etched into a pattern with a preset interval, and the etching depth at the pattern interval of the silicon dioxide layer is equal to the height of the silicon dioxide layer, which can expose the surface of the first heavily doped N-type gallium nitride layer in the etching process, and the non-conductive characteristic of the silicon dioxide layer can improve the current spreading capability in the process of moving the carriers in the direction from N to P when the second heavily doped N-type gallium nitride layer is subsequently grown.
[0062] The gallium nitride light-emitting diode epitaxial wafer and the preparation method thereof disclosed by the present application are suitable for reducing the dislocation density of the gallium nitride light-emitting diode epitaxial wafer and improving the current spreading capability of the epitaxial wafer, and the following specific embodiments are described.
[0063] Embodiment one
[0064] Please refer to Figure 1 and Figure 2 A preparation method of a gallium nitride light-emitting diode epitaxial wafer, comprising the following steps:
[0065] S1, sequentially growing an aluminum nitride film buffer layer 2, an undoped gallium nitride layer 3 and an undoped aluminum gallium nitride layer 4 on a substrate 1.
[0066] Specifically, a CVD (chemical vapor deposition) device is used to sputter an aluminum nitride film buffer layer 2 with a thickness of 0.02-0.025 μm on a non-patterned sapphire (0001) surface.
[0067] A non-doped U-shaped gallium nitride layer with a thickness of 1-1.5 μm is grown on the grown aluminum nitride film buffer layer 2 by MOCVD (metal organic chemical vapor deposition), and a non-doped aluminum gallium nitride layer 4 is grown on the non-doped U-shaped gallium nitride layer.
[0068] S2, a first heavily doped N-type gallium nitride layer 5 is grown on the non-doped aluminum gallium nitride layer 4, and the first heavily doped N-type gallium nitride layer 5 is roughened and edge treated.
[0069] S21, in a metal organic chemical vapor deposition device, a first heavily doped N-type gallium nitride layer 5 is grown on the non-doped aluminum gallium nitride layer 4 by using trimethyl gallium as a metal organic source, using silane gas as a doping gas, and using a mixed gas of ammonia, hydrogen and nitrogen at a temperature of 900-1200 ℃.
[0070] Specifically, the first heavily doped N-type gallium nitride layer 5 with a thickness of 0.5-1 μm is grown by using a MOCVD device, at a temperature of 900-1200 ℃ during the growth, using a mixed gas of ammonia, hydrogen and nitrogen as the gas during the growth, the proportion of ammonia being greater than or equal to 40%, using trimethyl gallium as the metal organic source, and using silane gas as the doping gas.
[0071] S22, the first heavily doped N-type gallium nitride layer 5 is annealed in an ammonia and nitrogen atmosphere, the annealed first heavily doped N-type gallium nitride layer 5 is cooled and cleaned, and surface roughening and edge treatment are performed by using etching liquid and hydrochloric acid.
[0072] Specifically, the first heavily doped N-type gallium nitride layer 5 is annealed in an ammonia and nitrogen atmosphere, is removed from the MOCVD device, is cooled to room temperature and is cleaned, and then is subjected to surface roughening and edge roughening in a solution of a pre-set proportion of BOE (Buffered Oxide Etch) and hydrochloric acid.
[0073] S3, a silicon dioxide layer 6 is grown on the first heavily doped N-type gallium nitride layer 5, the silicon dioxide layer 6 is patterned and etched to expose the surface of the first heavily doped N-type gallium nitride layer 5.
[0074] S31, a silicon dioxide layer 6 with a thickness of 10-20 nm is sputtered on the first heavily doped N-type gallium nitride layer 5.
[0075] S32, the silicon dioxide layer 6 is etched into patterns with a pre-set interval by using a patterning technique and inductively coupled plasma etching, and the etching depth at the interval of the patterns is the height of the silicon dioxide layer 6 when the silicon dioxide layer 6 is etched.
[0076] Specifically, a pattern layer is deposited on the silicon dioxide, including one or more thin films, the material can be SiO2, SiNx, etc. organic glue material, the thickness is 30-150nm; a layer of imprinting glue is uniformly coated on the pattern layer, used for transferring the pattern; the pattern is transferred to the pattern layer by nano-imprinting technology; after cleaning and drying the epitaxial wafer, the pattern is transferred to the silicon dioxide by inductively coupled plasma etching equipment, forming a conical pattern; the patterned silicon dioxide layer 6 is cleaned after the fabrication is completed, exposing the first heavily doped N-type gallium nitride layer 5.
[0077] The silicon dioxide layer 6 is made into a patterned silicon dioxide layer 6 with nanoscale concave periodic arrangement, the pattern can be regular hexagon, regular square and regular circle, etc. shape, among which the regular conical pattern is preferred, the pattern spacing is controlled at 0.15-0.5μm, the pattern width is 15-50nm, and the height is 5-10nm.
[0078] S4, growing a second heavily doped N-type gallium nitride layer 7 on the first heavily doped N-type gallium nitride layer 5 and the silicon dioxide layer 6.
[0079] In step S4, it includes:
[0080] The second heavily doped N-type gallium nitride layer 7 is grown on the first heavily doped N-type gallium nitride layer 5 and the silicon dioxide layer 6 in a vertical direction with a growth speed greater than that in a horizontal direction.
[0081] Specifically, the second heavily doped N-type gallium nitride layer 7 with a thickness of 1.5-2μm is grown on the patterned silicon dioxide 6 and the first heavily doped N-type gallium nitride layer 5 exposed on the surface.
[0082] In the initial stage of the growth of the second heavily doped N-type gallium nitride layer 7, a stage of vertical direction growth greater than horizontal direction growth can be formed, compared with the traditional growth mode of continuous horizontal direction growth, the defect density can be effectively controlled, the leakage channel in the N-type gallium nitride is reduced, which is equivalent to performing epitaxial lateral growth again, the lateral growth can be effectively improved, part of the dislocations gradually merge in the process of lateral growth, and meanwhile, part of the dislocations generated by the sapphire and aluminum nitride thin film buffer layer 2 are bent and mutually annihilated in the process of lateral growth, effectively reducing the dislocation density of the N-type gallium nitride.
[0083] S5, sequentially growing a low-doped N-type gallium nitride layer 8, a low-temperature stress release layer 9, a stress release cycle layer 10, a cooling transition layer 11, an active region 12, a low-temperature P-type indium gallium nitride layer 13, an electron blocking layer 14, a P-type gallium nitride hole providing layer 15 and a heavily doped P-type indium gallium nitride contact layer 16 on the second heavily doped N-type gallium nitride layer 7.
[0084] Specifically, a low-doped N-type gallium nitride layer 8, a low-temperature stress release layer indium gallium nitride layer 9, a stress release layer GaN / InGaN cyclic layer 10, a low-temperature transition layer low-doped gallium nitride layer 11, an InGaN / GaN active region 12, a low-temperature P-type indium gallium nitride layer 13, an electron blocking layer non-doped aluminum gallium nitride layer 14, a P-type gallium nitride 15, and a heavily doped P-type indium gallium nitride contact layer 16 are sequentially grown on the second heavily doped N-type gallium nitride layer 7, so as to obtain a gallium nitride-based light-emitting diode epitaxial wafer with low dislocation density.
[0085] Embodiment Two
[0086] Please refer to Figure 3 and Figure 4 The difference between this embodiment and Embodiment One is that a specific application scenario is provided.
[0087] Step 1: A certain thickness of aluminum nitride film buffer layer 2 is sputtered on the (0001) plane non-patterned sapphire substrate 1 by using a magnetron sputtering method.
[0088] Specifically, first, the 4-inch sapphire is surface treated, high-temperature baking at 800℃ for 5-10min, then nitrogen is introduced, and plasma glow treatment is performed, and then the aluminum nitride film buffer layer 2 is grown by using a magnetron sputtering method, the temperature of magnetron sputtering is 500℃, and the thickness is 200nm.
[0089] Step 2: Deposit U-shaped gallium nitride in the MOCVD reaction chamber.
[0090] Specifically, when depositing U-shaped gallium nitride, the growth temperature is controlled at about 1050℃, the growth pressure is controlled at 150Torr, and the growth is performed at a rotation speed of 1000rpm; during the growth of U-shaped gallium nitride, the gas introduced into the reaction chamber is a mixed gas of nitrogen, hydrogen and ammonia, and the sum of the volumes of the mixed gas is less than 150L;
[0091] During the growth of U-shaped gallium nitride, the metal source introduced into the reaction chamber is trimethyl gallium, and the use amount of trimethyl gallium is determined by the molar flow ratio of ammonia and metal organic source, and the molar ratio of ammonia and metal source is 350.
[0092] Step 3: Grow a first heavily doped N-type gallium nitride layer 5 on the basis of U-shaped gallium nitride, with a thickness of about 1.5μm.
[0093] Step 4: Anneal the first heavily doped N-type gallium nitride layer 5 in an ammonia and nitrogen atmosphere, transfer out of the MOCVD, and then perform surface roughening and edge roughening in hydrochloric acid and BOE.
[0094] Step 5: After ultrasonic cleaning of the first heavily doped N-type gallium nitride layer 5, a 20 nm thick silicon dioxide layer 6 is sputtered on the first heavily doped N-type gallium nitride layer 5.
[0095] Step 6: The second heavily doped N-type gallium nitride layer 7 is grown on the first heavily doped N-type gallium nitride layer 5 and the patterned silicon dioxide 6, and the low-doped N-type GaN layer 8, the low-temperature stress release InGaN layer 9, the stress release GaN / InGaN cycle layer 10, the low-doped GaN layer 11, the InGaN / GaN active region 12, the low-temperature P-type InGaN layer 13, the electron blocking layer undoped ALGaN layer 14, the P-type GaN 15, and the heavily doped P-type InGaN contact layer 16 are sequentially grown on the second heavily doped N-type gallium nitride layer 7, to obtain a gallium nitride-based Mirco LED epitaxial wafer with low dislocation density.
[0096] Please refer to Figure 3 and Figure 4 After the LED epitaxial wafer grown in this embodiment is made into a 9 μm*45 μm size chip, and the brightness of the chip is compared with that of a chip made in a traditional way, the brightness of the LED chip prepared in this embodiment and in the traditional way is 40.09 mW and 38.49 mW respectively under 20 mA test. The light emission distribution test is simultaneously conducted under 20 mA and 40 mA. From the light emission distribution graph, it can be seen that the light emission distribution of the LED grown in the traditional way is basically concentrated in the electrode and finger edge, and the LED grown in this embodiment has a larger light emission area and better brightness. Therefore, the preparation method in this embodiment obviously improves the crystal quality of the LED epitaxial wafer, and the current spreading is better, the light emission distribution is better, and the brightness is better.
[0097] Embodiment Three
[0098] Please refer to Figure 2 A gallium nitride light emitting diode epitaxial wafer includes an aluminum nitride thin film buffer layer 2 with a thickness of 0.02-0.025 μm, a non-doped gallium nitride layer 3 with a thickness of 1-1.5 μm, a non-doped aluminum gallium nitride layer 4, and a heavily doped N-type gallium nitride layer, which are sequentially grown on a substrate 1.
[0099] The heavily doped N-type gallium nitride layer includes a first heavily doped N-type gallium nitride layer 5 with a thickness of 0.5-1 μm for roughening and edge treatment, a patterned silicon dioxide layer 6 with a thickness of 10-20 nm for etching, and a second heavily doped N-type gallium nitride layer 7 with a thickness of 1.5-2 μm grown on the surface of the first heavily doped N-type gallium nitride layer 5 and the silicon dioxide layer 6.
[0100] The second heavily doped N-type gallium nitride layer 7 comprises a low-doped N-type gallium nitride layer 8, a low-temperature stress release layer 9, a stress release cycle layer 10, a temperature transition layer 11, an active region 12, a low-temperature P-type indium gallium nitride layer 13, an electron blocking layer 14, a P-type gallium nitride hole providing layer 15 and a heavily doped P-type indium gallium nitride contact layer 16 grown in sequence.
[0101] The silicon dioxide layer 6 is a patterned silicon dioxide layer 6 etched with a preset interval, and the etching depth of the interval of the silicon dioxide layer 6 is equal to the height of the silicon dioxide layer 6.
[0102] In summary, the gallium nitride light emitting diode epitaxial wafer and the preparation method thereof provided by the application can grow an aluminum nitride film buffer layer, an undoped gallium nitride layer and an undoped aluminum gallium nitride layer on a substrate in sequence. A first heavily doped N-type gallium nitride layer is grown on the undoped aluminum gallium nitride layer, roughening and edge processing are performed on the first heavily doped N-type gallium nitride layer, which can increase the light emission angle and release the stress in the first heavily doped N-type gallium nitride layer, thereby ensuring that the crystal quality of a second N-type gallium nitride layer grown subsequently is good. A silicon dioxide layer is grown on the first heavily doped N-type gallium nitride layer, the silicon dioxide layer is patterned and etched to expose the surface of the first heavily doped N-type gallium nitride layer, which can use the non-conductive property of the silicon dioxide layer to make the carriers move in the direction from N to P, thereby improving the current spreading capability. A second heavily doped N-type gallium nitride layer is grown on the first heavily doped N-type gallium nitride layer and the silicon dioxide layer, wherein the second heavily doped N-type gallium nitride layer is grown with a vertical growth speed greater than a horizontal growth speed, which can effectively control the defect density and reduce the leakage channel in the N-type gallium nitride, compared with the conventional growth mode of continuously using the horizontal growth.
[0103] The above description is only an embodiment of the application, and does not limit the patent range of the application, and any equivalent transformation or direct or indirect application in the related technical field based on the content of the specification and the drawings is also included in the patent protection range of the application.
Claims
1. A method of fabricating a gallium nitride light emitting diode epitaxial wafer, comprising: The method comprises the steps of: growing a buffer layer of aluminum nitride, a non-doped gallium nitride layer and a non-doped aluminum gallium nitride layer on a substrate in sequence; growing a first heavily-doped N-type gallium nitride layer on the non-doped aluminum gallium nitride layer, roughening and edge processing the first heavily-doped N-type gallium nitride layer; growing a silicon dioxide layer on the first heavily-doped N-type gallium nitride layer, performing patterned etching on the silicon dioxide layer and exposing the surface of the first heavily-doped N-type gallium nitride layer; growing a second heavily-doped N-type gallium nitride layer on the first heavily-doped N-type gallium nitride layer and the silicon dioxide layer; growing a second heavily-doped N-type gallium nitride layer on the first heavily-doped N-type gallium nitride layer and the silicon dioxide layer comprises: growing a second heavily-doped N-type gallium nitride layer on the first heavily-doped N-type gallium nitride layer and the silicon dioxide layer at a vertical growth rate greater than a horizontal growth rate.
2. The method for fabricating a gallium nitride light-emitting diode epitaxial wafer according to claim 1, characterized in that, growing a second heavily-doped N-type gallium nitride layer on the first heavily-doped N-type gallium nitride layer and the silicon dioxide layer comprises: growing a low-doped N-type gallium nitride layer, a low-temperature stress release layer, a stress release cycle layer, a temperature drop transition layer, an active region, a low-temperature P-type indium gallium nitride layer, an electron blocking layer, a P-type gallium nitride hole providing layer and a heavily-doped P-type indium gallium nitride contact layer on the second heavily-doped N-type gallium nitride layer in sequence.
3. The method for fabricating a gallium nitride light-emitting diode epitaxial wafer according to claim 1, characterized in that, growing a first heavily-doped N-type gallium nitride layer on the non-doped aluminum gallium nitride layer comprises: growing a first heavily-doped N-type gallium nitride layer on the non-doped aluminum gallium nitride layer in a metal organic chemical vapor deposition device at a temperature of 900-1200℃, using trimethyl gallium as a metal organic source, using silane gas as a doping gas, and using a mixed gas of ammonia, hydrogen and nitrogen.
4. The method for fabricating a gallium nitride light-emitting diode epitaxial wafer according to claim 1, characterized in that, roughening and edge processing the first heavily-doped N-type gallium nitride layer comprises: annealing the first heavily-doped N-type gallium nitride layer in an ammonia and nitrogen environment; annealing the first heavily-doped N-type gallium nitride layer, cooling and cleaning the annealed first heavily-doped N-type gallium nitride layer, and performing surface roughening and edge processing on the first heavily-doped N-type gallium nitride layer by etching liquid and hydrochloric acid.
5. The method for fabricating a gallium nitride light-emitting diode epitaxial wafer according to claim 1, characterized in that, performing patterned etching on the silicon dioxide layer and exposing the surface of the first heavily-doped N-type gallium nitride layer comprises: etching the silicon dioxide layer into patterns with a preset interval by a patterning technique and an inductively coupled plasma etching, and the etching depth at the pattern interval is the height of the silicon dioxide layer when etching the silicon dioxide layer.
6. The method for fabricating a gallium nitride light-emitting diode epitaxial wafer according to claim 5, characterized in that, etching the silicon dioxide layer by a patterning technique and an inductively coupled plasma etching comprises: depositing a pattern layer on the silicon dioxide layer, uniformly coating a stamping glue on the pattern layer; transferring a pattern to the pattern layer by a nano-imprint technique, and transferring the pattern to the silicon dioxide layer by an inductively coupled plasma etching device; cleaning the patterned silicon dioxide layer after fabrication.
7. The method for fabricating a gallium nitride light-emitting diode epitaxial wafer according to claim 5, characterized in that, etching the silicon dioxide layer into patterns with a preset interval comprises: etching the silicon dioxide layer into a patterned material with a nanoscale concave periodic arrangement, the pattern comprising a regular hexagon, a regular square, a regular circle or a regular circular cone, and the interval of the pattern being 0.15-0.5μm.
8. A gallium nitride light emitting diode epitaxial wafer, prepared by the method of any one of claims 1-7, characterized in that, The aluminum nitride thin film buffer layer, the non-doped gallium nitride layer, the non-doped aluminum gallium nitride layer and the heavily doped N-type gallium nitride layer are sequentially grown on the substrate; The heavily doped N-type gallium nitride layer comprises a first heavily doped N-type gallium nitride layer for roughening and edge processing, a patterned silicon dioxide layer for etching and a second heavily doped N-type gallium nitride layer grown on the surface of the first heavily doped N-type gallium nitride layer and the silicon dioxide layer.
9. The GaN-based light emitting diode epitaxial wafer of claim 8, wherein the GaN-based light emitting diode epitaxial wafer is grown on a sapphire substrate. The silicon dioxide layer is a patterned silicon dioxide layer etched with a preset interval, and the etching depth at the interval of the silicon dioxide layer is equal to the height of the silicon dioxide layer.
Citation Information
Patent Citations
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