Logical qubit encoding surface

Abstract

A quantum computing device is provided, comprising a logic qubit encoding surface including a plurality of lattices. Each lattice in the plurality of lattices may include a plurality of measurement-based qubits. The plurality of measurement-based qubits may include four data qubits and a first ancillary qubit. The first ancillary qubit may be electrically connected to the four data qubits and a second ancillary qubit included in the logic qubit encoding surface.

Description

Background Art

[0001] Errors often occur when performing calculations using quantum computing devices. For the results of such calculations to be accurate, the errors must typically be corrected at a rate faster than the rate at which they occur.

[0002] The error rate for a quantum computation depends on the structural properties of the quantum computing device. For example, increasing the number of physical qubits used to implement a logical qubit can increase the error rate. The error rate of a physical qubit can also increase with the degree of connectivity of the physical qubit (the number of other physical qubits to which it is connected).

[0003] The architecture of a quantum computing device also affects what error correction methods can be used. Therefore, it is beneficial for a quantum computing device to have an architecture that has both low error rates and allows the use of effective error correction methods. Summary of the Invention

[0004] According to one aspect of the present disclosure, a quantum computing device is provided that includes a logic qubit encoding surface, the logic qubit encoding surface including a plurality of lattices. Each lattice in the plurality of lattices may include a plurality of measurement-based qubits. The plurality of measurement-based qubits may include four data qubits and a first auxiliary qubit. The first auxiliary qubit may be electrically connected to the four data qubits and a second auxiliary qubit included in the logic qubit encoding surface.

[0005] This summary is provided to introduce in simplified form a series of concepts that will be further described in the detailed description below. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that solve any or all disadvantages noted in any part of this disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1A-1B An example logical qubit encoding surface comprising a plurality of CNOT-based qubits is shown, comprising a 5x5 grid of data qubits.

[0007] Figure 2 An example logical qubit encoding surface comprising a plurality of measurement-based qubits is shown, comprising a 5x5 grid of data qubits.

[0008] Figure 3 An example logical qubit encoding surface comprising a plurality of measurement-based qubits is shown, comprising a 3x3 grid of data qubits.

[0009] Figure 4An example logical qubit encoding surface comprising a plurality of measurement-based qubits is shown, comprising a 7x7 grid of data qubits.

[0010] Figure 5 Schematically shows the Figure 2 An example quantum computing device of an embodiment of the present invention.

[0011] Figure 6 Shown according to Figure 2 An example measurement sequence of a controlled NOT (CNOT) gate may be implemented by embodiments of the present invention.

[0012] Figure 7 Shown according to Figure 2 A stabilizer operator measurement sequence of an embodiment may be used to measure an XXXX stabilizer operator.

[0013] Figure 8 Shown according to Figure 2 The embodiment can implement a measurement sequence of a dual-target CNOT gate.

[0014] Figure 9 Shown according to Figure 2 Another stabilizer operator measurement sequence of an embodiment may be used to measure an XXXX stabilizer operator.

[0015] Figure 10 Shown Figure 9 Generalization of the stabilizer operator measurement sequence.

[0016] Figure 11 Shown according to Figure 2 An example measurement sequence of an embodiment of the present invention that can be used to measure Pauli XXX operators.

[0017] Figure 12 Shown according to Figure 2 An example measurement sequence of embodiments of the present invention may measure multiple two-qubit CNOT gates.

[0018] Figure 13 Another example configuration of a logic qubit encoding surface including a plurality of measurement-based qubits is shown, comprising a 5x5 grid of data qubits.

[0019] Figure 14 Another example configuration of a logic qubit encoding surface including a plurality of measurement-based qubits is shown, comprising a 5x5 grid of data qubits.

[0020] Figure 15A A flow chart illustrating an example method for performing measurements of logical qubits using a quantum computing device is shown.

[0021] Figure 15Bshows that it is possible to perform when measuring the stabilizer operator Figure 15A Additional steps of the method.

[0022] Figure 16 A flow chart of an example method for performing surface code error correction at a quantum computing device is shown.

[0023] Figure 17 Shows that it can be implemented Figure 5 Schematic diagram of an example computing environment for a quantum computing device. DETAILED DESCRIPTION

[0024] Surface code error correction is an existing error correction method that has been developed for use in quantum computing devices. Surface code error correction can be used in quantum computing devices that include physical qubits that have controlled-not (CNOT) gates and are arranged in a substantially planar layout. Surface codes can allow error correction to be performed on physical qubits with high error rates. Furthermore, surface codes can be implemented entirely using single-qubit gates and nearest neighbor operations.

[0025] Figure 1A An example conventional logic qubit encoding surface 10 is shown where surface codes can be used. Figure 1A Each physical qubit in the logical qubit encoding surface 10 is a CNOT-based qubit. Figure 1A The logic qubit encoding surface 10 includes a plurality of plaquettes 12, each plaquette 12 including four data qubits 14. Each data qubit 14 can be electrically connected to its vertical and horizontal neighbors to form a rectangular grid. Figure 1A As shown in FIG, the plurality of data qubits 14 included in the logic qubit encoding surface 10 may form a square grid. In addition, the data qubits 14 included in each element 12 may be arranged in a square shape.

[0026] Each metacell 12 may also include an auxiliary qubit 16 , which may be electrically coupled to each of the four data qubits 14 included in the metacell 12 . Figure 1A Each electrical connection 18 between a data qubit 14 and an auxiliary qubit 16 shown in comprises a CNOT gate 20. Furthermore, a plurality of auxiliary qubits 16 may be located outside the edges of the rectangular grid formed by the plurality of data qubits 14. Such auxiliary qubits 16 may be electrically connected to pairs of data qubits 14 such that each data qubit 14 located at an edge of the rectangular grid is connected to one auxiliary qubit 16 located outside the edge of the rectangular grid. Figure 1B The diagram shows a plurality of auxiliary qubits 16. Figure 1A Conventional logical qubit encoding surface 10.

[0027] When performing surface code error correction, stabilizer operators XXXX and ZZZZ may be measured at ancillary qubits 16 of logical qubit encoding surface 10. The XXXX stabilizer operator comprises a Pauli X operator applied to each data qubit 14 in meta-lattice 12, and the ZZZZ stabilizer operator comprises a Pauli Z operator applied to each data qubit 14 in meta-lattice 12. The XXXX stabilizer operator and the ZZZZ stabilizer operator may be measured at ancillary qubits 16 having alternating positions in a rectangular grid. Figure 1B A plurality of XXXX ancillary qubits 16A are shown alternating with a plurality of ZZZZ ancillary qubits 16B. Thus, logical qubit encoding surface 10 may include a plurality of XXXX cells 12A, each of which includes an XXXX ancillary qubit 16A, and a plurality of ZZZZ cells 12B, each of which includes a ZZZZ ancillary qubit 16B. Furthermore, the XX stabilizer operator and the ZZ stabilizer operator may be measured at ancillary qubits 16A and 16B, respectively, which are located outside the edges of the rectangular grid and are each connected to only two data qubits 14.

[0028] The corresponding measurement of each stabilizer operator can output a bit, called a syndrome bit. Thus, multiple syndrome bits can be measured for different locations on the logical qubit encoding surface. The multiple syndrome bits can be communicated to a classical computing device, where a decoder can determine the location on the logical qubit encoding surface where an error has occurred based on the multiple syndrome bits.

[0029] exist Figure 1A-1B In the example of FIG1 , for each data qubit 14 included in meta-lattice 12, a corresponding CNOT gate 20 is applied to that data qubit 14 along electrical connection 18 between that data qubit 14 and an auxiliary qubit 16 of meta-lattice 12. CNOT gate 20 entangles data qubit 14 and ancillary qubit 16 such that a measurement performed on ancillary qubit 16 is a joint measurement of data qubit 14 and ancillary qubit 16.

[0030] Measurement-based qubits are physical qubits for which the available measurements are single-qubit and two-qubit measurements of the X, Y, and Z Pauli operators. For example, a measurement-based qubit can be constructed from multiple Majorana zero modes (MZMs). The Pauli operators of a measurement-based qubit can be measured by measuring the joint fermionic parity of an appropriate set of multiple MZMs. Such measurements of Pauli operators can be topologically protected, thereby reducing the error rate of the measurement.

[0031] Although measurement-based qubits do not have native CNOT gates, CNOT gates can be constructed from multiple Pauli measurements, as discussed in further detail below. Figure 1A-1B If one were to use CNOT-based data qubits 14 in the configuration shown in , the resulting logical qubit encoding surface 10 would include too few auxiliary qubits 16 to enable error correction using the surface code.

[0032] To form a CNOT gate 20 when using a measurement-based qubit, one can Figure 1B Each of the electrical connections 18 of the logical qubit encoding surface 10 shown in FIG adds an additional auxiliary qubit 16. However, such a configuration would include 104 auxiliary qubits 16, while Figure 1B The configuration includes only 24 auxiliary qubits 16. Increasing the number of auxiliary qubits 16 will significantly increase the error rate and cost of manufacturing the logical qubit encoding surface 10.

[0033] In order to solve the Figure 1A and Figure 1B As an alternative to the configuration in which additional auxiliary qubits 16 are included for each CNOT gate 20, the logic qubit encoding surface 110 according to the present disclosure is provided. Figure 2 is shown in . Figure 2 The logical qubit encoding surface 110 includes a plurality of cells 112. Each cell 112 in the plurality of cells 112 includes a plurality of measurement-based qubits, including four data qubits 114 and a first auxiliary qubit 116. The first auxiliary qubit 116 can be electrically connected to the four data qubits 114. Figure 1A-1B The electrical connections 118 shown in FIG. Figure 2 The electrical connections 118 shown in FIG. 1 do not include the native CNOT gate 20 .

[0034] In some embodiments, as Figure 2 As shown in the example of FIG, the four data qubits 114 of the element 112 can be arranged in a square. In such an embodiment, the first auxiliary qubit 116 can be located within the square. The corresponding data qubits 114 included in the plurality of elements 112 can also be arranged in a rectangular grid. Figure 2 In the example above, the rectangular grid is a 5x5 square grid.

[0035] First ancillary qubit 116 may be electrically connected to second ancillary qubit 126. Second ancillary qubit 126 may be included in logic qubit encoding surface 110 outside of metacell 112 in which first ancillary qubit 116 is located. Second ancillary qubit 126 may also be electrically connected to two of the four data qubits 114 of metacell 112. For example, second ancillary qubit 126 may be included in an adjacent metacell 112. Alternatively, in embodiments where a plurality of data qubits 114 form a rectangular grid, second ancillary qubit 126 may be located outside an edge of the rectangular grid.

[0036] In embodiments where plurality of data qubits 114 form a rectangular grid, electrical connections 118 between first auxiliary qubit 116 and second auxiliary qubit 126 may form a "pinwheel" pattern centered about the middle of the rectangular grid. In such embodiments, for each elementary cell 112 in plurality of elementary cells 112, electrical connection 118 between first auxiliary qubit 116 and second auxiliary qubit 126 may extend in a direction perpendicular to the edge of the rectangular grid closest to the midpoint between first auxiliary qubit 116 and second auxiliary qubit 126.

[0037] Figure 2 The logical qubit encoding surface 110 includes a total of 24 auxiliary qubits. Therefore, Figure 2 The configuration allows the use of measurement-based qubits instead of CNOT-based qubits, whereas Figure 1A-1B The logical qubit encoding surface 10 of FIG. 1 does not increase the total number of auxiliary qubits included in the logical qubit encoding surface 110 .

[0038] Figure 3 Another example logic qubit encoding surface 210 is shown, comprising a 3x3 square grid of data qubits 114. Figure 3 In the example of FIG, the logical qubit encoding surface 210 includes four elementary cells 112 and eight auxiliary qubits. Figure 4 Another example logic qubit encoding surface 310 comprising a 7x7 square grid of data qubits 114 is shown. Figure 4 The logical qubit encoding surface 310 includes 36 elementary cells 112 and 48 auxiliary qubits. Figure 3 The logical qubit encoding surface 210 and Figure 4 The logical qubit encoding surfaces 310 each include and will be included in Figure 1A-1B The CNOT-based logical qubit encoding surface 10 has the same total number of auxiliary qubits in both the 3x3 and 7x7 versions.

[0039] Now turn Figure 5 , schematically depicting a quantum computing device 100. Figure 5 As shown in FIG, a quantum computing device 100 may include one or more logical qubit encoding surfaces 110, with which quantum computations may be performed. Figure 5 The quantum computing device 100 depicted in FIG. 1 may include Figure 2 One or more copies of the logical qubit encoding surface 110, but the quantum computing device 100 may alternatively include Figure 3 logical qubit encoding surface 210, Figure 4 , or one or more copies of a logical qubit encoding surface 310 having some other configuration.

[0040] Figure 5 The quantum computing device 100 may also include a measurement device 130. Measurement device 130 may be, for example, a circuit electrically connected to the logical qubit encoding surface 110. For each measurement qubit encoding surface 110, measurement device 130 may be configured to perform a measurement of the logical qubit encoded by that logical qubit encoding surface 110. Additionally, as discussed in further detail below, measurement device 130 may also be configured to measure the corresponding stabilizer operator of each elemental lattice 112 included in the logical qubit encoding surface 110. Each measurement of the stabilizer operator of an elemental lattice 112 may generate a bit, referred to as a syndrome bit 132.

[0041] like Figure 5 As shown in the example of , quantum computing device 100 may also include a classical computing device 140. Classical computing device 140 may include a processor 142 and a memory 144 that may be communicatively coupled. In some embodiments, the classical computing device may also include one or more input devices, one or more output devices, and / or one or more communication devices. In some embodiments, the functionality of classical computing device 140 may be distributed across multiple physical computing devices that are communicatively coupled via their respective communication devices.

[0042] The classical computing device 140 may be configured to receive one or more syndrome bits 132 from the measurement device 130. The one or more syndrome bits 132 may be received at a decoder 150 executed by a processor 142 of the classical computing device 140. At the decoder 150, the processor 142 may be configured to identify an error 152 in the measurement of the logical qubit based on the one or more syndrome bits 132 obtained as a corresponding measurement result of the stabilizer operator. For example, the decoder 150 may use a union-find decoding algorithm to identify the error 152 based on the one or more syndrome bits 132. Since the union-find decoding algorithm is nearly linear in complexity as a function of the number of physical qubits, the union-find algorithm may allow the classical computing device 140 to efficiently identify the error 152.

[0043] As discussed above, for each lattice 112 that measures a stabilizer operator, the stabilizer operator may be a product of four Pauli X operators or four Pauli Z operators for the four corresponding data qubits 114 included in the lattice 112. When measuring the stabilizer operator of a lattice 112 included in the logical qubit encoding surface 110, the measurement device 130 may be configured to alternate between measuring the XXXX stabilizer operator and the ZZZZ stabilizer operator. Figure 2 , the measurement device 130 may be configured to measure the product of four Pauli X operators for each cell in the first component cell 112A and to measure the product of four Pauli Z operators for each cell in the second component cell 112B. Figure 2 In the example of FIG, each elementary cell 112A included in the first set of elementary cells 112A includes an XXXX auxiliary qubit 116A. Additionally, each elementary cell 112B included in the second set of elementary cells 112B includes a ZZZZ auxiliary qubit 116B.

[0044] Measuring the stabilizer operator at the logic qubit encoding surface 110 may include applying a CNOT gate to at least one auxiliary qubit. Although measurement-based qubits do not have a native CNOT operation, a CNOT gate can be constructed using a series of Pauli operator measurements. Figure 6 , which shows that a measurement sequence 160 for a single target CNOT gate 120 can be implemented using measurement-based qubits. The gate is performed with a first qubit 1 used as a control qubit, a second qubit 2 used as an auxiliary qubit, and a third qubit 3 used as a target qubit. Figure 6 When measuring the XXXX stabilizer operator for the element lattice 112, the two auxiliary qubits used in the measurement may correspond to Figure 6 , and when measuring the ZZZZ stabilizer operator, the two auxiliary qubits used in the measurement can correspond to the second qubit 2 and the third qubit 3.

[0045] In some embodiments, third qubit 3 may be second auxiliary qubit 126 of elemental lattice 112. In such embodiments, applying CNOT gate 120 may include performing a plurality of first auxiliary measurements of at least first auxiliary qubit 116. Each first auxiliary measurement may be a single-qubit measurement or a two-qubit measurement.

[0046] Figure 6 The measurement sequence 160 shown in FIG. 1 includes a plurality of measurements of the Pauli X operator and the Pauli Z operator, each of which is Figure 6 Each measurement can be a single-qubit measurement or a two-qubit measurement. Figure 6The measurement sequence 160 shown in also includes multiple Pauli updates, which are shown as rounded squares. Each Pauli update can apply a Pauli operator to one or a pair of qubits in the case where the previous measurement had a non-trivial result. Figure 6 The example in defines a non-trivial result as the result of the measurement of |->, which is returned when error 152 has occurred. Figure 6 In an example, each Pauli update applies the Pauli X operator or the Pauli Z operator. In an embodiment where third qubit 3 is second auxiliary qubit 126, implementing CNOT gate 120 may include, for each first auxiliary measurement, performing a Pauli update on at least first auxiliary qubit 126 after the first auxiliary measurement.

[0047] Figure 7 A stabilizer operator measurement sequence 162 is shown that can be used to measure the XXXX stabilizer operator at meta-lattice 112. The physical qubits of meta-lattice 112 are labeled first qubit 1, second qubit 2, third qubit 3, fourth qubit 4, fifth qubit 5, and sixth qubit 6. Fifth qubit 5 and sixth qubit 6 are first auxiliary qubit 116 and control qubit, respectively, and the other four qubits are data qubits 114. Figure 7 The measurement sequence 162 comprises sixteen measurement time steps in which measurements and corresponding Pauli updates are performed.

[0048] When measurement device 130 measures the stabilizer operator for elemental lattice 112, measurement device 130 may be configured to convert second auxiliary qubit 126 ( Figure 7 The sixth qubit 6 in the example of is prepared to have a |+> state before performing the measurement. Alternatively, the measurement device may prepare the second ancillary qubit 126 to have a |-> state. The measurement device 130 may also be configured to apply one or more corresponding CNOT gates 120 to the element 112. The first ancillary qubit 116 may be used as an ancillary qubit for a CNOT gate 120 and may correspond to Figure 7 5. Additionally, one of the four data qubits 114 can be the target qubit of the CNOT gate 120. The second auxiliary qubit 126 of the element 112 can be used as a control qubit. Figure 7 In the example of , measuring the XXXX stabilizer operator includes applying four CNOT gates 120 , where each CNOT gate 120 has a different one of the four data qubits 114 as a target qubit.

[0049] After applying one or more CNOT gates 120 to the elemental lattice 112, measuring the stabilizer operator may further include performing a second auxiliary measurement at the second auxiliary qubit 126. The second auxiliary measurement performed at the second auxiliary qubit 126 may be a measurement of the Pauli X operator when measuring the XXXX stabilizer operator or a measurement of the Pauli Z operator when measuring the ZZZZ stabilizer operator. The final measurement result is obtained from the measurement of the sixth qubit 6, as shown in FIG. Figure 7 Indicated by the vertical lines in the example.

[0050] Figure 8 A measurement sequence 164 is shown with which a dual-target CNOT gate 122 can be implemented. Figure 8 In the example of , first qubit 1 and second qubit 2 are target qubits, third qubit 3 is an auxiliary qubit, and fourth qubit 4 is a control qubit.

[0051] Figure 9 Another stabilizer operator measurement sequence 166 is shown, by which the measurement device 130 can be configured to measure the XXXX stabilizer operator. Figure 9 In the example of FIG, CNOT gate 120 is implemented by applying two dual-target CNOT gates 122 to cell 112. Figure 9 The first dual-target CNOT gate 122 in the measurement sequence 166 has as its target qubits the first qubit 1 and the second qubit 2. The second dual-target CNOT gate 122 included in the measurement sequence 166 has as its target qubits the third qubit 3 and the fourth qubit 4. Figure 9 The stabilizer operator measurement sequence 164 includes ten measurement time steps, instead of being included in Figure 7 The sixteen measurement time steps in the measurement sequence 162 of . Figure 7 Compared with the measurement sequence 162, Figure 9 The measurement sequence 166 allows for measuring the XXXX stabilizer operator faster and with lower error rates.

[0052] Figure 10 A stabilizer operator measurement sequence 168 is shown which converts Figure 9 The XXXX stabilizer operator measurement sequence generalizes to architectures including any even number n ≥ 2 data qubits 114. Figure 10 In the measurement sequence 168 of FIG, a dual-target CNOT gate 122 is performed on each pair of target qubits that are adjacent in numerical order, so that each data qubit 114 is used as a target qubit in one dual-target CNOT gate 122. The first qubit 1 and the second qubit 2 are Figure 10 The first and second auxiliary qubits in the example of FIG.

[0053] Figure 11 An example measurement sequence 170 is shown that may be used to measure the Pauli XXX operator 124. Figure 12 As shown in the example of , the Pauli XXX operator 124 may be used, for example, when measuring the stabilizer operator in the Pauli X basis for a lattice having an odd number n≥3 data qubits 114. Figure 12 In the measurement sequence 172 shown in FIG. Figure 10 The first qubit 1 and the second qubit 2 are measured in the same manner as in the measurement sequence 168 of FIG. Figure 12 After measuring dual-target CNOT gate 122, measurement device 130 may also be configured to measure Pauli XXX operators 124 for qubits n, n+1, and n+2.

[0054] Thus, measurement device 130 can measure the corresponding stabilizer operators for a lattice 112 of logic qubit encoding surface 110 in order to perform error detection at decoder 150. These stabilizer operators 114 can be measured for a lattice comprising any number of measurement-based data qubits greater than or equal to two. Figure 6-Figure 12 shows the measurement sequence for measuring the Pauli X operator, but Figure 6-Figure 12 A measurement sequence can be modified to measure the Pauli Z operator. A measurement sequence in which the Pauli X operator is measured can be adapted to measure the Pauli Z operator by switching all Pauli X operators and Pauli Z operators in the measurement sequence, and switching all Pauli X updates and Pauli Z updates.

[0055] Figure 13 An alternative configuration of logic qubit encoding surface 410 is shown according to an example embodiment. Figure 13 The logical qubit encoding surface 410 includes a plurality of cells 412. Figure 13 In the example of FIG, logical qubit encoding surface 410 includes sixteen cells 412. Each cell 412 in the plurality of cells 412 includes a plurality of measurement-based qubits. The plurality of measurement-based qubits in each cell 412 includes four data qubits 114, a first auxiliary qubit 416, and a second auxiliary qubit 426. Similar to FIG. Figure 2 in Figure 13 , the corresponding data qubits 114 included in the plurality of cells 412 are arranged in a 5x5 rectangular grid. Additionally, the four data qubits 114 of each cell 412 are arranged in a square.

[0056] exist Figure 13In each element 412 of the logical qubit encoding surface 410, a first auxiliary qubit 416 is electrically connected to four data qubits 114 and a second auxiliary qubit 426. However, each second auxiliary qubit 426 is not electrically connected to any measurement-based qubit other than the first auxiliary qubit 416. Figure 2 Compared to the 24 auxiliary qubits in the logical qubit encoding surface 110, the Figure 13 Each auxiliary qubit in the logical qubit encoding surface 410 is used by only one element 412, so the total number of auxiliary qubits increases to 48. Figure 13 The total number of auxiliary qubits in the embodiment is greater than Figure 2 In the embodiment of

[15] , the maximum connectivity of each qubit (the total number of other qubits electrically connected to it) is at most four rather than five. This reduction in the maximum connectivity can reduce the amount of time elapsed per measurement cycle by a factor of two.

[0057] Figure 13 The logical qubit encoding surface 410 may be included in a quantum computing device 100, which may include a measurement device 130 and a classical computing device 140. Figure 2 The logical qubit encoding surface 110, Figure 13 4. A logical qubit encoding surface 410 alternates between a first set of lattices 412A, for which measurement device 130 is configured to measure an XXXX stabilizer operator, and a second set of lattices 412B, for which measurement device 130 is configured to measure a ZZZZ stabilizer operator. Each lattice 412A of the first set of lattices 412A may include a first XXXX ancillary qubit 416A and a second XXXX ancillary qubit 426A. Additionally, each lattice 412B of the second set of lattices 412B may include a first ZZZZ ancillary qubit 416B and a second ZZZZ ancillary qubit 426B.

[0058] According to another exemplary embodiment, Figure 14 The logical qubit encoding surface 510 is shown in FIG. Figure 14 In the embodiment of FIG5 , each elementary cell 512 includes four data qubits 514 arranged in a square. Each elementary cell 512 also includes a first auxiliary qubit 516, a second auxiliary qubit 526, and a third auxiliary qubit 536. First auxiliary qubit 516 and second auxiliary qubit 526 are each electrically connected to two of data qubits 514 and third auxiliary qubit 536. Figure 14Each data qubit 514 and each third auxiliary qubit 536 of each elementary cell 512 shown in FIG is connected to two first auxiliary qubits 516 and two second auxiliary qubits 526.

[0059] Figure 14 The logical qubit encoding surface 510 of the embodiment of the present invention can be included in a quantum computing device 100, which can include a measurement device 130 and a classical computing device 140. In addition, the logical qubit encoding surface 510 can include a first component lattice 512A and a second component lattice 512B. The measurement device 130 can be configured to measure the XXXX stabilizer operator at the first component lattice 512A, and the measurement device 130 can be configured to measure the ZZZZ stabilizer operator at the second component lattice 512B. Each component 512A of the first component lattice 512A can include a first XXXX ancillary qubit 516A and a second XXXX ancillary qubit 526A. In addition, each component 512B of the second component lattice 512B can include a first ZZZZ ancillary qubit 516B and a second ZZZZ ancillary qubit 526B.

[0060] Figure 15A A flow chart of an example method 600 for use with a quantum computing device is shown. For example, the method 600 may be used with Figure 5 The method 600 may be used with a quantum computing device 100 or with a quantum computing device having some other configuration. At step 602, the method 600 may include performing a measurement on a logical qubit encoded by a logical qubit encoding surface comprising a plurality of lattices. The measurement may be performed using a measurement device included in the quantum computing device. Each of the plurality of lattices may include a plurality of measurement-based qubits. In some embodiments, the plurality of measurement-based qubits included in each lattice include four data qubits and a first auxiliary qubit. The data qubits included in the logical qubit encoding surface may be arranged in a rectangular grid. The four data qubits may be arranged in a square, and the first auxiliary qubit may be located within the square. In such an embodiment, the first auxiliary qubit may be electrically connected to the four data qubits and a second auxiliary qubit included in the logical qubit encoding surface. The second auxiliary qubit may be located inside or outside the lattice.

[0061] At step 604, method 600 may further include measuring a corresponding stabilizer operator for each lattice included in the logical qubit encoding surface. Each stabilizer operator may include a product of four Pauli X operators or four Pauli Z operators.

[0062] At step 606, method 600 may further include identifying an error in the measurement of the logical qubit based on the corresponding measurement result of the stabilizer operator. The error in the measurement may be identified at a classical computing device communicatively coupled to the measurement device. A decoding algorithm, such as a union-lookup decoding algorithm, may be executed at the classical computing device to detect the error.

[0063] Figure 15B Additional steps of method 600 are shown that may be performed in some embodiments when measuring a stabilizer operator for a meta-lattice. At step 608, method 600 may further include: preparing a second auxiliary qubit to have a |+> state. In other embodiments, the second auxiliary qubit may be prepared to have a |-> state. At step 610, method 600 may further include: applying one or more corresponding CNOT gates to the meta-lattice. For each CNOT gate, one of the four data qubits may be a target qubit. The first auxiliary qubit of the meta-lattice may be an auxiliary qubit for the CNOT gate. The second auxiliary qubit connected to the meta-lattice may be a control qubit for the CNOT gate.

[0064] Applying the CNOT gate may include, at step 612, performing a plurality of first auxiliary measurements of at least the first auxiliary qubit. Each first auxiliary measurement may be a single-qubit measurement or a two-qubit measurement. Applying the CNOT gate may also include, at step 614, performing a Pauli update on at least the first auxiliary qubit for each first auxiliary measurement. The Pauli update may include applying a Pauli X operator or a Pauli Z operator to the first auxiliary qubit. Each Pauli update may be performed after its corresponding first auxiliary measurement. In some embodiments, the Pauli update after the first auxiliary measurement may be performed if the first auxiliary measurement has a measurement result of |->.

[0065] Method 600 may also include, at step 616, performing a second auxiliary measurement on the second auxiliary qubit after applying the one or more CNOT gates. In such embodiments, the second auxiliary qubit may be used as a control qubit. In some embodiments, the second auxiliary measurement may be a measurement of the Pauli X operator or the Pauli Z operator. The second auxiliary measurement may return a value of a stabilizer operator for the lattice.

[0066] In some embodiments, method 600 may further include, at step 618, measuring the product of four Pauli X operators for each cell in the first set of cells and the product of four Pauli Z operators for each cell in the second set of cells included in the logical qubit encoding surface. In such embodiments, the plurality of cells may be arranged in a rectangular grid. The rectangular grid may include a first plurality of corresponding grid positions of the first set of cells alternating with a second plurality of corresponding grid positions of the second set of cells.

[0067] Figure 16 A flowchart of another example method 700 that can be performed using a quantum computing device is shown. The quantum computing device that performs the method 700 here can be Figure 5 Quantum computing device 100. Figure 15A Method 700 may be performed in addition or alternatively to method 600. At step 702, method 700 may include: performing surface code error correction at a logical qubit encoding surface including a plurality of measurement-based physical qubits. Figure 15A In embodiments where method 700 is performed in addition to method 600 , surface code error correction may be performed after identifying errors in the measurement of the logical qubits at step 606 .

[0068] At step 704, method 700 may include implementing one or more two-qubit logic gates. For example, the one or more two-qubit logic gates may include one or more two-qubit Pauli gates. In addition to the one or more two-qubit logic gates, performing surface error code correction may also include implementing one or more single-qubit logic gates.

[0069] At step 706, implementing one or more two-qubit logic gates may include performing a plurality of measurements. Each measurement in the plurality of measurements may be a single-qubit measurement or a two-qubit measurement. Thus, each two-qubit logic gate in the one or more two-qubit logic gates may be implemented without having to perform measurements on three or more qubits. In some embodiments, for each measurement-based physical qubit included in the logical qubit encoding surface, performing surface code error correction may include performing up to five two-qubit measurements at the physical qubit, as shown at step 708. Additionally, for each measurement-based physical qubit included in the logical qubit encoding surface, performing surface code error correction may include performing up to four two-qubit measurements at the physical qubit, as shown at step 710.

[0070] The above-described apparatus and method allow surface codes to be used for error correction at logical qubit encoding surfaces constructed from measurement-based qubits. Previously, surface codes could only be used with CNOT-based qubits. Furthermore, the above-described apparatus and method allow the construction of surface-code-compatible logical qubit encoding surfaces using a small number of physical qubits and a low degree of connectivity between the qubits. Consequently, the above-described apparatus and method enable quantum computations to be performed with low error rates and efficient error correction.

[0071] In some embodiments, the methods and processes described herein may be bound to a computing system of one or more computing devices. In particular, such methods and processes may be implemented as computer applications or services, application programming interfaces (APIs), libraries, and / or other computer program products.

[0072] Figure 17 A non-limiting embodiment of a computing system 800 is schematically shown, which can implement one or more of the above methods and processes. The computing system 800 is shown in simplified form. The computing system 800 can include the above-described and Figure 5 The computing system 800 may take the form of one or more personal computers, server computers, tablet computers, home entertainment computers, network computing devices, gaming devices, mobile computing devices, mobile communication devices (e.g., smartphones), and / or other computing devices, as well as wearable computing devices such as smart watches and head-mounted augmented reality devices.

[0073] The computing system 800 includes a logic processor 802, a volatile memory 804, and a non-volatile storage device 806. The computing system 800 may optionally include a display subsystem 808, an input subsystem 810, a communication subsystem 812, and / or Figure 17 Other components not shown.

[0074] Logical processor 802 includes one or more physical devices configured to execute instructions. For example, a logical processor can be configured to execute instructions that are part of one or more applications, programs, routines, libraries, objects, components, data structures, or other logical constructs. Such instructions can be implemented to perform a task, implement a data type, transform the state of one or more components, achieve a technical effect, or otherwise achieve a desired result.

[0075] The logical processor may include one or more physical processors (hardware) configured to execute software instructions. Additionally or alternatively, the logical processor may include one or more hardware logic circuits or firmware devices that are configured to execute hardware-implemented logic or firmware instructions. The processor of the logical processor 802 may be single-core or multi-core, and the instructions executed thereon may be configured for sequential, parallel and / or distributed processing. The individual components of the logical processor may optionally be distributed between two or more separate devices that may be remotely located and / or configured for coordinated processing. Various aspects of the logical processor may be virtualized and executed by a remotely accessible networked computing device configured in a cloud computing configuration. In this case, it will be understood that these virtualized aspects run on different physical logical processors of various different machines.

[0076] The non-volatile storage device 806 includes one or more physical devices configured to store instructions executable by a logical processor to implement the methods and processes described herein. When implementing such methods and processes, the state of the non-volatile storage device 806 can be transformed—for example, to store different data.

[0077] The non-volatile storage device 806 may include a removable and / or built-in physical device. The non-volatile storage device 806 may include an optical memory (e.g., CD, DVD, HD-DVD, Blu-ray disc, etc.), a semiconductor memory (e.g., ROM, EPROM, EEPROM, flash memory, etc.), and / or a magnetic memory (e.g., a hard disk drive, a floppy disk drive, a tape drive, MRAM, etc.), or other mass storage device technology. The non-volatile storage device 806 may include a non-volatile, dynamic, static, read / write, read-only, sequential access, location addressable, file addressable, and / or content addressable device. It should be understood that the non-volatile storage device 806 is configured to save instructions even when power to the non-volatile storage device 806 is cut off.

[0078] Volatile memory 804 may include physical devices that include random access memory. Volatile memory 804 is typically utilized by logical processor 802 to temporarily store information during the processing of software instructions. It should be understood that when power is removed from volatile memory 804, volatile memory 804 typically does not continue to store instructions.

[0079] Aspects of the logic processor 802, volatile memory 804, and non-volatile storage device 806 may be integrated together into one or more hardware logic components. For example, such hardware logic components may include field programmable gate arrays (FPGAs), program and application specific integrated circuits (PASIC / ASICs), program and application specific standard products (PSSP / ASSPs), systems on chips (SOCs), and complex programmable logic devices (CPLDs).

[0080] The terms "module," "program," and "engine" may be used to describe an aspect of computing system 800 that is typically implemented in software by a processor to use portions of volatile memory to perform a specific function, which involves conversion processes specifically configured to configure the processor to perform that function. Thus, a module, program, or engine may be instantiated by logical processor 802 executing instructions stored by non-volatile storage device 806 using portions of volatile memory 804. It should be understood that different modules, programs, and / or engines may be instantiated from the same application, service, code block, object, library, routine, API, function, etc. Similarly, the same module, program, and / or engine may be instantiated by different applications, services, code blocks, objects, routine instantiations, APIs, functions, etc. The terms "module," "program," and "engine" may include a single executable file or a group of executable files, data files, libraries, drivers, scripts, database records, etc.

[0081] When included, the display subsystem 808 can be used to present a visual representation of the data stored by the non-volatile storage device 806. The visual representation can take the form of a graphical user interface (GUI). Since the methods and processes described herein change the data stored by the non-volatile storage device and thereby convert the state of the non-volatile storage device, the state of the display subsystem 808 can also be converted to visually represent the changes in the underlying data. The display subsystem 808 can include one or more display devices utilizing almost any type of technology. Such a display device can be combined with the logical processor 802, the volatile memory 804, and / or the non-volatile storage device 806 in a shared housing, or such a display device can be a peripheral display device.

[0082] When included, the input subsystem 810 may include or interface with one or more user input devices such as a keyboard, mouse, touch screen, or game controller. In some embodiments, the input subsystem may include or interface with selected natural user input (NUI) components. Such components may be integrated or peripheral, and the transformation and / or processing of input actions may be handled on-board or off-board. Example NUI components may include a microphone for speech and / or voice recognition; an infrared camera, color camera, stereo camera, and / or depth camera for machine vision and / or gesture recognition; a head tracker, eye tracker, accelerometer, and / or gyroscope for motion detection and / or intent recognition; and an electric field sensing component for assessing brain activity; and / or any other suitable sensor.

[0083] When included, the communication subsystem 812 can be configured to communicatively couple the various computing devices described herein to each other and to communicate with other devices. The communication subsystem 812 may include wired and / or wireless communication devices compatible with one or more different communication protocols. As non-limiting examples, the communication subsystem can be configured to communicate via a wireless telephone network, or a wired network, or a wireless local area network or wide area network (such as an HDMI connected via Wi-Fi). In some embodiments, the communication subsystem can allow the computing system 800 to send and / or receive messages to other devices via a network such as the Internet.

[0084] According to one aspect of the present disclosure, a quantum computing device is provided that includes a logic qubit encoding surface, the logic qubit encoding surface including a plurality of lattices. Each lattice in the plurality of lattices may include a plurality of measurement-based qubits. The plurality of measurement-based qubits may include four data qubits and a first auxiliary qubit. The first auxiliary qubit may be electrically connected to the four data qubits and a second auxiliary qubit included in the logic qubit encoding surface.

[0085] According to this aspect, the four data qubits of a metalattice may be arranged in a square.

[0086] According to this aspect, the first auxiliary qubit may be located within a square.

[0087] According to this aspect, the respective data qubits included in the plurality of metacells may be arranged in a rectangular grid.

[0088] According to this aspect, for each elemental cell in the plurality of elemental cells, the electrical connection between the first auxiliary qubit and the second auxiliary qubit may extend in a direction perpendicular to an edge of the rectangular grid closest to a midpoint between the first auxiliary qubit and the second auxiliary qubit.

[0089] According to this aspect, the quantum computing device may further include a measurement device configured to perform measurements on logical qubits encoded by the logical qubit encoding surface. The measurement device may further be configured to measure a corresponding stabilizer operator for each element included in the logical qubit encoding surface. The quantum computing device may further include a classical computing device configured to identify errors in the measurements of the logical qubits based on corresponding measurement results of the stabilizer operators.

[0090] According to this aspect, each stabilizer operator may be the product of four Pauli X operators or four Pauli Z operators of four corresponding data qubits included in the lattice.

[0091] According to this aspect, the measurement device can be configured to measure a product of four Pauli X operators for each cell in a first component cell and to measure a product of four Pauli Z operators for each cell in a second component cell. The plurality of cells can be arranged in a rectangular grid comprising a first plurality of corresponding grid positions of the first component cells alternating with a second plurality of corresponding grid positions of the second component cells.

[0092] According to this aspect, for each elemental lattice, the measurement device can be configured to measure a corresponding stabilizer operator of the elemental lattice at least in part by preparing a second ancillary qubit to have a |+> state. Measuring the stabilizer operator can also include applying one or more corresponding controlled-not (CNOT) gates to the elemental lattice. For each CNOT gate, one of the four data qubits is a target qubit. Measuring the stabilizer operator can also include performing a second auxiliary measurement at the second ancillary qubit after applying the one or more CNOT gates.

[0093] According to this aspect, the second auxiliary measurement may be a measurement of the Pauli X operator or the Pauli Z operator.

[0094] According to this aspect, applying each CNOT gate can include performing a plurality of first auxiliary measurements on at least a first auxiliary qubit. Each first auxiliary measurement can be a single-qubit measurement or a two-qubit measurement. Applying the CNOT gate can also include, for each first auxiliary measurement, performing a Pauli update on at least a second first qubit after the first auxiliary measurement.

[0095] According to another aspect of the present disclosure, a method for use with a quantum computing device is provided. The method may include, at a measurement device, performing a measurement on a logical qubit encoded by a logical qubit encoding surface comprising a plurality of lattices. Each lattice in the plurality of lattices may include a plurality of measurement-based qubits. The method may also include measuring a corresponding stabilizer operator for each lattice included in the logical qubit encoding surface. The method may also include, at a classical computing device, identifying an error in the logical qubit measurement based on the corresponding measurement result of the stabilizer operator.

[0096] According to this aspect, each elemental lattice can include a first auxiliary qubit and can be electrically connected to a second auxiliary qubit. The measurement stabilizer operator can include preparing the second auxiliary qubit to have a |+> state. The measurement stabilizer operator can also include applying one or more corresponding controlled-not (CNOT) gates to the elemental lattice, wherein for each CNOT gate, one of the four data qubits is a target qubit. The measurement stabilizer operator can also include performing a second auxiliary measurement at the second auxiliary qubit after applying the one or more CNOT gates.

[0097] According to this aspect, the second auxiliary measurement may be a measurement of the Pauli X operator or the Pauli Z operator.

[0098] According to this aspect, applying each CNOT gate can include performing a plurality of first auxiliary measurements of at least a first auxiliary qubit. Each first auxiliary measurement can be a single-qubit measurement or a two-qubit measurement. For each first auxiliary measurement, applying the CNOT gate can further include performing a Pauli updating on the at least first auxiliary qubit after the first auxiliary measurement.

[0099] According to this aspect, the plurality of measurement-based qubits included in each elementary lattice may include four data qubits and a first auxiliary qubit. The first auxiliary qubit may be electrically connected to the four data qubits and a second auxiliary qubit included in the logic qubit encoding surface.

[0100] According to this aspect, the stabilizer operator may comprise a product of four Pauli X operators or four Pauli Z operators.

[0101] According to another aspect of the present disclosure, a method for use with a quantum computing device is provided. The method may include performing surface code error correction on a logical qubit encoding surface comprising a plurality of measurement-based physical qubits. Performing the surface code error correction may include implementing one or more two-qubit logic gates. Implementing each two-qubit logic gate may include performing multiple measurements. Each measurement may be a single-qubit measurement or a two-qubit measurement.

[0102] According to this aspect, for each measurement-based physical qubit included in the logical qubit encoding surface, performing surface code error correction may include performing up to five two-qubit measurements at that physical qubit.

[0103] According to this aspect, for each measurement-based physical qubit included in the logical qubit encoding surface, performing surface code error correction may include performing up to four two-qubit measurements at that physical qubit.

[0104] It should be understood that the configuration and / or method described herein are exemplary in nature, and these specific embodiments or examples should not be considered to have limiting significance, because many variations are possible. The specific routines or methods described herein can represent one or more of any number of processing strategies. Thus, the various actions illustrated and / or described can be performed in the order illustrated and / or described, performed in other orders, performed in parallel, or omitted. Likewise, the order of the above-mentioned processing can be changed.

[0105] The subject matter of the present disclosure includes all novel and non-obvious combinations and sub-combinations of the various processes, systems and configurations, and other features, functions, acts, and / or properties disclosed herein, as well as any and all equivalents thereof.

Claims

1. A quantum computing device comprising: A logical qubit encoding surface comprising a plurality of element lattices, wherein: Each of the plurality of lattices comprises a plurality of measurement-based qubits; The plurality of measurement-based qubits includes four data qubits and a first ancillary qubit; and The first auxiliary qubit is electrically connected to the four data qubits and a second auxiliary qubit included in the logic qubit encoding surface via separate corresponding electrical connections.

2. The quantum computing device of claim 1 , wherein the four data qubits of the elementary lattice are arranged in a square.

3. The quantum computing device of claim 2 , wherein the first auxiliary qubit is located within the square.

4. The quantum computing device of claim 2 , wherein the respective data qubits included in the plurality of cells are arranged in a rectangular grid.

5. The quantum computing device of claim 4 , wherein for each of the plurality of elementary cells, the electrical connection between the first auxiliary qubit and the second auxiliary qubit extends in a direction perpendicular to an edge of the rectangular grid closest to a midpoint between the first auxiliary qubit and the second auxiliary qubit.

6. The quantum computing device of claim 1 , further comprising: A measuring device, the measuring device being configured to: performing a measurement on a logical qubit encoded by the logical qubit encoding surface; as well as measuring a corresponding stabilizer operator of each lattice element included in the logical qubit encoding surface; as well as A classical computing device is configured to identify an error in the measurement of the logical qubit based on a corresponding measurement result of the stabilizer operator.

7. The quantum computing device of claim 6, wherein each stabilizer operator is a product of four Pauli X operators or four Pauli Z operators of the corresponding four data qubits included in the elemental lattice.

8. The quantum computing device of claim 7, wherein: The measuring device is configured to measure a product of four Pauli X operators for each cell in the first set of cells and to measure a product of four Pauli Z operators for each cell in the second set of cells; and The plurality of cells are arranged in a rectangular grid comprising a first plurality of corresponding grid positions of the first set of cells alternating with a second plurality of corresponding grid positions of the second set of cells.

9. The quantum computing device of claim 6 , wherein for each lattice, the measurement device is configured to measure the corresponding stabilizer operator of the lattice at least in part by: preparing the second auxiliary qubit to have a |+> state; applying one or more corresponding controlled non-CNOT gates to the elementary lattice, wherein for each CNOT gate, one of the four data qubits is a target qubit; and After applying the one or more CNOT gates, a second auxiliary measurement is performed at the second auxiliary qubit.

10. The quantum computing device of claim 9, wherein the second auxiliary measurement is a measurement of the Pauli X operator or the Pauli Z operator.

11. The quantum computing device of claim 9, wherein applying each CNOT gate comprises: performing a plurality of first auxiliary measurements of at least the first auxiliary qubit, wherein each first auxiliary measurement is a single-qubit measurement or a two-qubit measurement; as well as For each first auxiliary measurement, a Pauli updating is performed on at least the first auxiliary qubit following the first auxiliary measurement.

12. A method for use with a quantum computing device, the method comprising: At the measuring device: A measurement is performed on a logical qubit encoded by a logical qubit encoding surface comprising a plurality of lattices, wherein: Each of the plurality of lattices comprises a plurality of measurement-based qubits; The plurality of measurement-based qubits includes four data qubits and a first ancillary qubit; and the first auxiliary qubit being electrically connected to the four data qubits and a second auxiliary qubit included in the logic qubit encoding surface via separate corresponding electrical connections; and measuring a corresponding stabilizer operator for each lattice included in the logical qubit encoding surface; and At a classical computing device, errors in the logical qubit measurements are identified based on corresponding measurement results of the stabilizer operator.

13. The method of claim 12, wherein measuring the stabilizer operator comprises: preparing the second auxiliary qubit to have a |+> state; applying one or more corresponding controlled non-CNOT gates to the elementary lattice, wherein for each CNOT gate, one of the four data qubits is a target qubit; and After applying the one or more CNOT gates, a second auxiliary measurement is performed at the second auxiliary qubit. The method according to claim 13 , wherein the second auxiliary measurement is a measurement of the Pauli X operator or the Pauli Z operator.

15. The method of claim 13, wherein applying each CNOT gate comprises: performing a plurality of first auxiliary measurements of at least the first auxiliary qubit, wherein each first auxiliary measurement is a single-qubit measurement or a two-qubit measurement; as well as For each first auxiliary measurement, a Pauli updating is performed on at least the first auxiliary qubit following the first auxiliary measurement.

16. The method of claim 12, wherein the stabilizer operator comprises a product of four Pauli X operators or four Pauli Z operators.

17. A method for use with a quantum computing device, the method comprising: Surface code error correction is performed at a logical qubit encoding surface comprising a plurality of measurement-based physical qubits, wherein: The plurality of measurement-based qubits includes four data qubits, a first ancillary qubit, and a second ancillary qubit; and The first ancillary qubit is electrically connected to the four data qubits and the second ancillary qubit via separate corresponding electrical connections; Performing said surface code error correction comprises implementing one or more two-qubit logic gates; and Implementing each two-qubit logic gate includes performing multiple measurements, where each measurement is either a single-qubit measurement or a two-qubit measurement.

18. The method of claim 17 , wherein for each measurement-based physical qubit included in the logical qubit encoding surface, performing the surface code error correction comprises: At most five two-qubit measurements are performed at that physical qubit.

19. The method of claim 18, wherein for each measurement-based physical quantum included in the logical qubit encoding surface, performing the surface code error correction comprises: At most four two-qubit measurements are performed at that physical qubit.

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