Hbt devices and methods of fabricating the same
By employing a window electroplating process involving a seed layer and a photoresist layer during HBT device fabrication, the fabrication process is simplified, solving the problems of complex procedures and high costs in existing technologies, and achieving efficient HBT device fabrication.
Patent Information
- Application Number
- CN202210216077.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-07
- Publication Date
- 2026-01-20
- Estimated Expiration
- 2042-03-07
AI Technical Summary
The existing HBT devices involve complex and cumbersome processes in fabricating the pads and lead metals, resulting in high costs and requiring the use of photomasks multiple times.
By forming a seed layer on the passivation layer and coating it with a photoresist layer, etching to form a window, forming an electroplated metal layer inside the window using an electroplating process, evaporating a top metal layer on top of the window, and finally stripping off the photoresist layer, the use of photomasks is reduced and the fabrication process is simplified.
This effectively reduces the fabrication steps of HBT devices, improves fabrication efficiency, and lowers costs.
Smart Images

Figure CN114582745B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and more specifically, to an HBT device and its fabrication method. Background Technology
[0002] Heterojunction bipolar transistors (HBTs), such as gallium arsenide and indium phosphide heterojunction bipolar transistors, have advantages such as high frequency, high efficiency, high linearity, high power density, and single-supply operation, and are widely used in wireless communication, satellite, radar, electronic warfare and other fields.
[0003] In the fabrication of HBT devices, the pads and lead metals are typically prepared through electroplating. However, existing HBT device fabrication involves numerous steps, is complex, and requires the use of multiple photomasks. Therefore, providing a fabrication method for HBT devices that reduces the number of steps, improves fabrication efficiency, and lowers fabrication costs has become a pressing technical challenge. Summary of the Invention
[0004] The purpose of this invention is to provide an HBT device and its fabrication method, which can reduce the fabrication steps of the HBT device and improve the fabrication efficiency.
[0005] The embodiments of the present invention are implemented as follows:
[0006] In one aspect, the present invention provides a method for fabricating an HBT device, the method comprising: providing a substrate, the substrate including an active region and a passive region located outside the active region; forming an active device of the HBT device in the active region and forming pads in the passive region to obtain a first device; forming a passivation layer on the first device and etching the passivation layer located in the passive region to form a first window exposing the pads; forming a seed layer on the passivation layer, the seed layer being in contact with the pads through the first window; coating a photoresist layer on the seed layer and etching the photoresist layer located in the passive region to form a second window exposing the seed layer; forming an electroplated metal layer in the second window by an electroplating process, and depositing a top metal layer on the electroplated metal layer by vapor deposition; removing the photoresist layer; and removing the exposed seed layer. This method for fabricating an HBT device can reduce the number of fabrication steps and improve fabrication efficiency.
[0007] Optionally, a seed layer is formed on the passivation layer, including: forming a TiW layer on the passivation layer; and forming an Au layer on the TiW layer.
[0008] Optionally, the thickness of the TiW layer is 600 angstroms; and / or, the thickness of the Au layer is 1200 angstroms.
[0009] Optionally, removing the exposed seed layer includes: wet etching the Au layer with potassium iodide solution; and wet etching the TiW layer with ammonia solution.
[0010] Optionally, the top metal layer is made of Ti.
[0011] Optionally, both the electroplated metal layer and the solder pads are made of Au.
[0012] Optionally, the passivation layer is made of SiN.
[0013] Optionally, the projections of the top metal layer, the electroplated metal layer, and the pads on the substrate overlap in pairs.
[0014] Optionally, the thickness of the electroplated metal layer is between 3 μm and 5 μm.
[0015] In another aspect, the present invention provides an HBT device, which is prepared by the above-described method for preparing an HBT device.
[0016] The beneficial effects of this invention include:
[0017] The method for fabricating an HBT device provided in this application includes: providing a substrate, the substrate including an active region and a passive region located outside the active region; forming an active device of the HBT device in the active region and forming a pad in the passive region to obtain a first device; forming a passivation layer on the first device and etching the passivation layer located in the passive region to form a first window exposing the pad; forming a seed layer on the passivation layer, the seed layer being in contact with the pad through the first window; coating a photoresist layer on the seed layer and etching the photoresist layer located in the passive region to form a second window exposing the seed layer; forming an electroplated metal layer in the second window by an electroplating process, and evaporating a top metal layer on the electroplated metal layer; removing the photoresist layer; and removing the exposed seed layer. This application coats a photoresist layer on the seed layer and etches it to form the second window, then forms an electroplated metal layer in the second window, and after the electroplated metal layer is formed, the photoresist layer is not stripped off immediately, but the top metal layer is directly evaporated, and the photoresist layer is stripped off after the top metal layer is evaporated. This saves on the use of photomasks, effectively reduces the fabrication steps of HBT devices, and improves the fabrication efficiency of devices. Attached Figure Description
[0018] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 This is one of the schematic flowcharts of a method for fabricating an HBT device according to some embodiments of the present invention;
[0020] Figure 2 This is a second schematic flowchart illustrating the fabrication method of an HBT device provided in some embodiments of the present invention.
[0021] Figure 3 This is the third schematic flowchart illustrating the fabrication method of an HBT device provided in some embodiments of the present invention.
[0022] Figure 4 One of the schematic diagrams illustrating the fabrication process of an HBT device provided in some embodiments of the present invention;
[0023] Figure 5 This is a second schematic diagram illustrating the fabrication process of an HBT device provided in some embodiments of the present invention;
[0024] Figure 6 The third schematic diagram illustrates the fabrication process of the HBT device provided in some embodiments of the present invention;
[0025] Figure 7 Fourth schematic diagram of the fabrication process of the HBT device provided in some embodiments of the present invention;
[0026] Figure 8 Fifth schematic diagram illustrating the fabrication process of the HBT device provided in some embodiments of the present invention;
[0027] Figure 9 Sixth schematic diagram illustrating the fabrication process of an HBT device provided in some embodiments of the present invention;
[0028] Figure 10 This is the seventh schematic diagram illustrating the fabrication process of an HBT device provided in some embodiments of the present invention.
[0029] Icons: A - Active region; B - Passive region; C - Isolation region; 11 - Substrate; 12 - Channel layer; 13 - Barrier layer; 20 - Active device; 30 - Pad; 40 - First device; 50 - Passivation layer; 51 - First window; 60 - Seed layer; 70 - Photoresist layer; 71 - Second window; 80 - Electroplated metal layer; 90 - Top metal layer. Detailed Implementation
[0030] The embodiments described below represent the information necessary for those skilled in the art to practice the embodiments and illustrate the best mode for practicing the embodiments. After reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of the invention and will recognize the application of these concepts not specifically set forth herein. It should be understood that these concepts and applications fall within the scope of the invention and the appended claims.
[0031] It should be understood that while the terms first, second, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of the invention, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0032] It should be understood that when an element (such as a layer, region, or substrate) is referred to as "on another element" or "extending to another element," it may be directly on or directly extended to the other element, or there may be an intermediate element. Conversely, when an element is referred to as "directly on another element" or "directly extending to another element," there is no intermediate element. Similarly, it should be understood that when an element (such as a layer, region, or substrate) is referred to as "above another element" or "extending above another element," it may be directly on or directly extended to the other element, or there may be an intermediate element. Conversely, when an element is referred to as "directly on another element" or "extending directly to another element," there is no intermediate element. It should also be understood that when an element is referred to as "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be an intermediate element. Conversely, when an element is referred to as "directly connected" or "directly coupled" to another element, there is no intermediate element.
[0033] Related terms such as “below”, “above”, “upper”, “lower”, “horizontal”, or “vertical” are used herein to describe the relationship of one element, layer, or region to another, as illustrated in the figures. It should be understood that these terms, and those discussed above, are intended to cover different orientations of the device other than those depicted in the figures.
[0034] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that, when used herein, the term “comprising” indicates the presence of the stated features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups of the foregoing.
[0035] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that the terms used herein should be interpreted as having the same meaning as they would in the context of this specification and related fields, and not in an idealized or overly formal sense, unless expressly defined herein.
[0036] Please refer to Figure 1 This embodiment provides a method for fabricating an HBT device, the method comprising:
[0037] S100, a substrate 11 is provided, the substrate 11 including an active region A and a passive region B located outside the active region A, such as Figure 4 As shown.
[0038] The active region A and the passive region B mentioned above can be isolated by the isolation region C, which will not be elaborated on in this application.
[0039] S200, an active device 20 of an HBT device is formed in the active region A, and a pad 30 is formed in the passive region B to obtain a first device 40.
[0040] The active device 20 in the active region A includes a channel layer 12, a barrier layer 13, a base, a collector, and an emitter located on the substrate 11. Since the hierarchical structure of the active device 20 of the HBT device is well known to those skilled in the art, it will not be described in detail here.
[0041] In this embodiment, the pad 30 located on the passive region B is connected to the active device 20 via a metal interconnect, wherein the pad 30 is used for lead testing.
[0042] S300, a passivation layer 50 is formed on the first device 40, and the passivation layer 50 located in the passive region B is etched to form a first window 51 exposing the pad 30, as shown. Figure 5 As shown.
[0043] Furthermore, in this embodiment, in addition to forming a passivation layer 50 on the first device 40, a passivation layer can also be pre-formed before forming the pad 30, such as... Figure 5 As shown.
[0044] The first window 51 is located in the passive region B. The size of the first window 51 can be determined by those skilled in the art as needed, and this application does not impose any restrictions.
[0045] Optionally, in this embodiment, the passivation layer 50 can be made of SiN.
[0046] S400, a seed layer 60 is formed on the passivation layer 50. The seed layer 60 is connected to the pad 30 through the first window 51. Figure 6 As shown.
[0047] For example, please refer to Figure 2 As shown, step S400, forming a seed layer 60 on the passivation layer 50, may specifically include the following steps:
[0048] S410, A TiW layer is formed on the passivation layer 50.
[0049] S420, An Au layer is formed on the TiW layer.
[0050] That is, the seed layer 60 comprises a stack of TiW layers as the bottom layer and Au layers as the top layer. Optionally, the thickness of the TiW layer is 600 angstroms and the thickness of the Au layer is 1200 angstroms. Of course, the thicknesses of the TiW and Au layers are merely examples given in this application, and those skilled in the art can choose other suitable thicknesses or thickness ratios in other embodiments.
[0051] S500, a photoresist layer 70 is coated on the seed layer 60, and the photoresist layer 70 located in the passive region B is etched to form a second window 71 exposing the seed layer 60, as shown. Figure 7 As shown.
[0052] That is, a photoresist layer 70 is first coated on the seed layer 60, and then the photoresist layer 70 located in the passive region B is etched to obtain the second window 71. The second window 71 is used to subsequently form the electroplated metal layer 80 and the top metal layer 90. Therefore, the size of the second window 71 should be determined according to the size of the electroplated metal layer 80 and the top metal layer 90.
[0053] S600, an electroplated metal layer 80 is formed in the second window 71 by electroplating, and a top metal layer 90 is deposited on the electroplated metal layer 80 by vapor deposition, such as Figure 8 and Figure 9 As shown.
[0054] Optionally, the top metal layer 90 is made of Ti. The top metal layer 90 can increase the adhesion between the electroplated metal layer 80 and the passivation layer 50, preventing the passivation layer 50 from peeling off later.
[0055] In one feasible embodiment, the electroplated metal layer 80 and the solder pad 30 are both made of Au.
[0056] Alternatively, the thickness of the electroplated metal layer 80 may be between 3 μm and 5 μm. For example, the thickness of the electroplated metal layer 80 may be 3 μm, 4 μm, or 5 μm, etc. The thickness of the top metal layer 90 is not specifically limited in this application; those skilled in the art can determine it according to their needs.
[0057] Optionally, the projections of the top metal layer 90, the electroplated metal layer 80, and the pads 30 onto the substrate 11 overlap in pairs, such as... Figure 10 As shown. Exemplarily, the projections of the top metal layer 90, the electroplated metal layer 80, and the pads 30 onto the substrate 11 can completely overlap; alternatively, the projections of the top metal layer 90 and the electroplated metal layer 80 onto the substrate 11 can overlap, while the projection of the pads 30 onto the substrate 11 lies within the projection range of the electroplated metal layer 80 onto the substrate 11, as shown. Figure 10 As shown.
[0058] S700, Remove photoresist layer 70.
[0059] S800, Remove the exposed seed layer 60.
[0060] In this way, HBT devices can be obtained, such as Figure 10 As shown, this application coats a photoresist layer 70 on a seed layer 60 and forms a second window 71; then forms an electroplated metal layer 80 within the second window 71, and finally forms a top metal layer 90 on the electroplated metal layer 80 before peeling off the photoresist layer 70. This approach saves on photomasks and simplifies the process compared to forming the electroplated metal layer 80 through an electroplating process, followed by peeling off the photoresist layer 70, etching the seed layer 60, and then fabricating the top metal layer 90.
[0061] Please refer to Figure 3 As shown, optionally, step S800 above, removing the exposed seed layer 60, can be implemented in the following ways:
[0062] S810. The Au layer is removed by wet etching using potassium iodide solution;
[0063] S820. The TiW layer is removed by wet etching using an ammonia solution.
[0064] The exposed seed layer 60 is removed by the above method, which can quickly remove the exposed seed layer 60 and is not easy to leave any residue.
[0065] In summary, the method for fabricating an HBT device provided in this application includes: providing a substrate 11, the substrate 11 including an active region A and a passive region B located outside the active region A; forming an active device 20 of the HBT device in the active region A and forming a pad 30 in the passive region B to obtain a first device 40; forming a passivation layer 50 on the first device 40 and etching the passivation layer 50 located in the passive region B to form a first window 51 exposing the pad 30; forming a seed layer 60 on the passivation layer 50, the seed layer 60 being contacted and connected to the pad 30 through the first window 51; coating a photoresist layer 70 on the seed layer 60 and etching the photoresist layer 70 located in the passive region B to form a second window 71 exposing the seed layer 60; forming an electroplated metal layer 80 in the second window 71 by an electroplating process, and evaporating a top metal layer 90 on the electroplated metal layer 80; removing the photoresist layer 70; and removing the exposed seed layer 60. This application involves coating a photoresist layer 70 onto a seed layer 60 and etching to form a second window 71. Then, an electroplated metal layer 80 is formed within the second window 71. After the electroplated metal layer 80 is formed, the photoresist layer 70 is not stripped immediately; instead, a top metal layer 90 is directly deposited by vapor deposition. The photoresist layer 70 is then stripped after the top metal layer 90 is deposited. This saves on the use of a photomask, effectively reducing the fabrication steps of the HBT device and improving the device fabrication efficiency.
[0066] In another aspect, the present invention provides an HBT device, which is prepared by the above-described method for preparing an HBT device. Since the specific steps and beneficial effects of the preparation method for this HBT device have been described in detail above, they will not be repeated here.
[0067] The above description is merely an optional embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention can have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
[0068] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not describe the various possible combinations separately.
Claims
1. A method for fabricating an HBT device, characterized in that, include: A substrate is provided, the substrate including an active region and a passive region located outside the active region; An active device of an HBT device is formed in the active region, and a pad is formed in the passive region to obtain a first device, wherein the pad is used to connect the active device via a metal interconnect. A passivation layer is formed on the first device, and the passivation layer located in the passive region is etched to form a first window exposing the pad; A seed layer is formed on the passivation layer, and the seed layer is in contact with the pad through the first window; A photoresist layer is coated on the seed layer, and the photoresist layer located in the passive region is etched to form a second window exposing the seed layer; An electroplated metal layer is formed in the second window by electroplating, and a top metal layer is deposited on the electroplated metal layer by vapor deposition. Remove the photoresist layer; Remove the exposed seed layer; The material of the top metal layer is Ti.
2. The method for fabricating an HBT device according to claim 1, characterized in that, Forming a seed layer on the passivation layer includes: A TiW layer is formed on the passivation layer; An Au layer is formed on the TiW layer.
3. The method for fabricating an HBT device according to claim 2, characterized in that, The thickness of the TiW layer is 600 angstroms; and / or, the thickness of the Au layer is 1200 angstroms.
4. The method for fabricating an HBT device according to claim 2, characterized in that, The removal of the exposed seed layer includes: The Au layer was removed by wet etching using potassium iodide solution; The TiW layer was removed by wet etching using an ammonia solution.
5. The method for fabricating an HBT device according to claim 1, characterized in that, Both the electroplated metal layer and the solder pads are made of Au.
6. The method for fabricating an HBT device according to claim 1, characterized in that, The passivation layer is made of SiN.
7. The method for fabricating an HBT device according to claim 1, characterized in that, The projections of the top metal layer, the electroplated metal layer, and the solder pads on the substrate overlap in pairs.
8. The method for fabricating an HBT device according to claim 1, characterized in that, The thickness of the electroplated metal layer is between 3 μm and 5 μm.
9. An HBT device, characterized in that, include: First device; The first device includes: A substrate, the substrate including an active region and a passive region located outside the active region; The active device of the HBT device is located in the active region; The pads are located in the passive region and are used to connect the active device via metal interconnects. The HBT device also includes: A passivation layer is located on the first device, and a first window is formed on the passivation layer located in the passive region to expose the pads; A seed layer, which is in contact with the pad within the first window; An electroplated metal layer is in contact with the seed layer; The top metal layer is made of Ti and is in contact with the electroplated metal layer. The electroplated metal layer and the top metal layer are formed by the same photoresist layer.
Citation Information
Patent Citations
Method for forming solder bump
CN102496580A
Semiconductor chip, method for mounting semiconductor chip, and module in which semiconductor chip is packaged
CN108461467A