An electrical test structure and method for monitoring Fin pitch drift in FinFET processes

Abstract

The present invention discloses an electrical test structure and a test method for monitoring Fin spacing drift in a FinFET process. The electrical test structure is formed with at least two Fins, one of which is a non-test Fin and is marked as Fin0, and at least one of the remaining Fins is selected as a Fin to be tested and is marked as Fin n ;Fin n Arranged in parallel with Fin0, Fin n There is a certain distance between it and Fin0, forming a first spacing; wherein n is a positive integer; at least one first connection portion is recorded as Link_A, and at least one second connection portion is recorded as Link_B; Link_A and Fin n Electrical connection, Link_B is electrically connected to Fin0. The electrical test structure provided by the present invention is simple and easy to manufacture, and is suitable for monitoring the pitch walking problem generated in the Fin manufacturing process during the FinFET process production process, and can timely discover process production defects and effectively correct the semiconductor production process, thereby improving the product yield.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device testing, and particularly relates to an electrical test structure and a test method for monitoring Fin Pitch Walking in the FinFET process. Background Art

[0002] With the continuous development of large-scale integrated circuit process technology, the integration density of circuits has been continuously improved. When the process technology node is less than 28 nm, there is a trend that traditional planar MOS devices are gradually replaced by three-dimensional fin field-effect transistors (FinFETs) due to the sharp degradation of performance. Compared with planar transistors, a FinFET generally includes a semiconductor substrate, an oxide layer, and a gate structure. A protruding structure is formed on the semiconductor substrate, and the oxide layer covers the surface of the semiconductor substrate and a part of the sidewalls of the protruding structure. The part of the protruding structure that extends beyond the oxide layer becomes the fin of the FinFET. The gate structure straddles the fin and covers the top and sidewalls of the fin. The gate structure includes a gate dielectric layer and a gate electrode located on the gate dielectric layer. For a FinFET, the parts of the top and both sidewalls of the fin that are in contact with the gate structure all become channel regions, that is, there are multiple gates, which is beneficial to increasing the drive current and improving device performance.

[0003] The most critical step in the FinFET process is the preparation of fins. In order to increase the integration density of semiconductor devices, process methods such as self-aligned double patterning (SADP) and self-aligned quadruple patterning (SAQP) are used in the prior art to prepare fins. When the FinFET process technology node enters below 7 nm, the SAQP technology replaces the SADP technology, and the complexity of the process increases by at least one time accordingly. In the SAQP technology, one Mandrel deposits 2 Spacers 1, and 2 Spacers 1 deposit 4 Spacers 2. Finally, 4 fins can be obtained through pattern transfer. In the self-aligned double patterning technology, the distance between fins is respectively controlled by the width of the Mandrel and the distance between Spacers. In the self-aligned quadruple patterning technology, the distance between fins is respectively controlled by the width of the Mandrel, the distance between Mandrels, and the width of Spacers. If these variables are not accurately controlled and the distances between fins are inconsistent, the problem of Pitch Walking will occur.

[0004] Currently, there are two main methods for detecting Pitch Walking problems: one is optical measurement, which directly measures the distance between different Fins through optical means to find abnormal points. This detection method is slow, inefficient, requires a small number of samples, and relies on the selection of the measurement area, which is easily affected by random fluctuations. The other is transistor performance testing, which measures the performance of a large number of transistors. When the transistor performance degrades, it slices and observes whether there is an abnormality in the distance between Fins. This method takes a long time to detect, and because there are many factors that affect transistor performance, it cannot be determined whether the abnormality is caused by Pitch Walking. Summary of the invention

[0005] In view of all or part of the deficiencies of the prior art mentioned above, the purpose of the present invention is to provide an electrical test structure and a test method for monitoring Fin pitch drift in FinFET process. The electrical test structure provided by the present invention is simple and easy to manufacture. The test method is suitable for monitoring the pitch drift (Pitch Walking) problem generated in the Fin manufacturing process during the FinFET process production process. It can timely discover process production defects and effectively correct the semiconductor production process, thereby improving the product yield.

[0006] In order to achieve the above-mentioned invention object, the present invention provides the following technical solutions:

[0007] The present invention provides an electrical test structure for monitoring Fin spacing drift in FinFET process, which is formed with: at least two Fins, one of which is a non-test Fin and is marked as Fin0, and at least one of the remaining Fins is selected as a Fin to be tested and is marked as Fin n ;Fin n Arranged in parallel with Fin0, Fin n There is a certain distance between it and Fin0, forming a first spacing; wherein n is a positive integer; at least one first connection portion is recorded as Link_A, and at least one second connection portion is recorded as Link_B; Link_A and Fin n Electrical connection, Link_ B is electrically connected to Fin0.

[0008] The Fin extension direction is defined as the horizontal direction, and the direction perpendicular to the Fin extension direction is defined as the vertical direction. n Link_A and Fin0 are arranged in parallel in the vertical direction. When there are multiple Fins to be tested, the multiple Fins to be tested are located above Fin0 in the vertical direction. The first Fin to be tested arranged from bottom to top in the vertical direction is recorded as Fin1, and Fin0 is located below Fin1 in the vertical direction. Link_A is electrically connected to Fin1, and Link_B is electrically connected to Fin0. Definition of Fin nAbove Fin0, the second connecting portion straddles Fin0, and the end above Fin0 is denoted as the terminal. According to the position of Link_B, it can be divided into the following three cases:

[0009] (1) When the terminal of Link_B moves to Fin1 and is exactly connected to Fin1, Link_A and Link_B are conducted through Fin1, and ideal electrical parameter values can be obtained during electrical testing;

[0010] (2) When the terminal of Link_B moves above Fin1 and is connected to Fin1, Link_A and Link_B are conducted through Fin1, and ideal electrical parameter values can be obtained during electrical testing;

[0011] (3) When the terminal of Link_B moves below Fin1 and is not connected to Fin1, Link_A and Link_B cannot be conducted through Fin1, and ideal electrical parameter values cannot be obtained during electrical testing.

[0012] For the convenience of description, assume that the offset between the position of Link_B and the initial position (for example, the lower end of Fin0, i.e., the end of Fin0 far from Fin n ) is the standard pitch. Whether there is pitch drift can be estimated by determining whether Link_B and Link_A are conducted. At least when Link_B and Link_A cannot be conducted, it can be known that there is pitch drift, that is, the first pitch is greater than the standard pitch. The electrical testing structure provided by the present invention can be used to test whether pitch drift occurs during the production of one or more Fins to be tested.

[0013] The standard pitch can be the standard pitch between adjacent Fins. Of course, according to actual needs, it can also refer to the standard pitch between non-adjacent Fins, and can be specially set according to different situations. The standard pitch between adjacent or non-adjacent Fins can be adjusted accordingly according to process requirements.

[0014] The "above" and "below" in the text are only for the convenience of description and do not limit the present invention.

[0015] In some technical solutions, the second connecting portion is at least two, denoted as Link_1_B and Link_2_B; Link_A is electrically connected to Fin0 and Fin n electrically, Link_1_B and Link_2_B are both electrically connected to Fin0, and define Fin nAbove Fin0, the second connecting part straddles Fin0, and the end above Fin0 is denoted as the terminal. The vertical distances between the terminals of Link_1_B and Link_2_B and the end of Fin0 far from Fin n are different. And the vertical distance between the terminals of the two second connecting parts can be a preset standard spacing. When at least two second connecting parts are provided, one of the second connecting parts can determine the starting position A, and the other second connecting part can determine the ending position B. The vertical distance between the terminals of the two second connecting parts is the offset S of Link_2_B. For the sake of convenience of description, assume that when the terminal of Link_1_B moves to the lower end of Fin0 and is exactly connected to Fin0, if Link_2_B and Link_A cannot be connected through Fin n conducted, it can be judged that there is a spacing drift.

[0016] In some technical solutions, there are at least two Fins to be measured, denoted as Fin1 and Fin2. Fin0, Fin1, and Fin2 are arranged in parallel in sequence. The distance between Fin0 and Fin1 is the first spacing, and there is a certain distance between Fin1 and Fin2, forming a second spacing. There are at least two second connecting parts, denoted as Link_1_B and Link_2_B. Link_A is electrically connected to Fin1 and Fin2, and Link_1_B and Link_2_B are both electrically connected to Fin0. It is defined that Fin1 is above Fin0. The second connecting part straddles Fin0, and the end above Fin0 is denoted as the terminal. The vertical distances between the terminals of Link_1_B and Link_2_B and the end of Fin0 far from Fin n are different. And the vertical distance between the terminals of the two second connecting parts can be a preset standard spacing. When there are two Fins to be measured, there are correspondingly two spacings to be measured. The first spacing is between Fin0 and Fin1, and the second spacing is between Fin1 and Fin2.

[0017] For the sake of convenience of description, assume that the offset between the position of Link_1_B and the initial position (such as the lower end of Fin0) is the standard spacing. It can be judged whether there is a spacing drift of Fin1 by judging whether Link_1_B and Link_A are conducted, and it can be judged whether there is a spacing drift by judging whether Link_2_B and Link_A are conducted. If Link_1_B and Link_A are not conducted, it can be known that the first spacing is less than the standard spacing. If Link_2_B and Link_A are not conducted and Link_1_B and Link_A are conducted, it can be known that the second spacing is less than the standard spacing.

[0018] In some technical solutions, there are at least three second connection parts, denoted as Link_1_B, Link_2_B, and Link_3_B; Link_A is electrically connected to Fin0, Fin1, and Fin2, Link_1_B, Link_2_B, and Link_3_B are all electrically connected to Fin0, and the vertical distances between the terminals of Link_1_B, Link_2_B, and Link_3_B and the end of Fin0 far from Fin n are all different. And the vertical distances between any two terminals can be a preset standard spacing. For the convenience of description, assume that when the terminal of Link_1_B moves to the lower end of Fin0 and just connects to Fin0, if Link_2_B and Link_A are not conducting, it can be known that the first spacing is less than the standard spacing; if Link_3_B and Link_A are not conducting and Link_3_B and Link_A are conducting, it can be known that the second spacing is less than the standard spacing.

[0019] In some technical solutions, the electrical test structure is an electrical test unit, and the electrical test unit includes Link_A, Link_1_B, Link_2_B, and Link_3_B. The vertical distances between the terminals of Link_1_B, Link_2_B, and Link_3_B and the lower end of Fin0 are all different, and the vertical distances between any two terminals can be a preset standard spacing, and the electrical test can be completed using one electrical test unit.

[0020] In some other technical solutions, the electrical test structure includes at least three electrical test units. The first electrical test unit includes Link_A and Link_1_B, the second electrical test unit includes Link_A and Link_2_B, and the third electrical test unit includes Link_A and Link_3_B.

[0021] In some other technical solutions, the electrical test structure includes at least three electrical test units. Each electrical test unit includes at least three first connection parts denoted as Link_1_A, Link_2_A, Link_3_A, and at least one second connection part; Link_1_A connects Fin0, Fin1, and Fin2, Link_2_A connects Fin1 and Fin2, Link_3_A connects Fin2; the first electrical test unit includes Link_1_B, the second electrical test unit includes Link_2_B, and the third electrical test unit includes Link_3_B.

[0022] In some technical solutions, different electrical test units may share part or all of the first connection portion. When there are multiple electrical test units in the electrical test structure, the multiple electrical test units need to be tested separately, wherein the positions of the second connection portions in different electrical test units are not exactly the same, while the positions of the first connection portions may be the same. In this case, when the positions of the second connection portions in different electrical test units are the same, the first connection portion may be shared.

[0023] In some technical solutions, with the same Fin n There are more than two first connection parts and / or second connection parts connected to Fin0. When the first connection part and the second connection part are connected to Fin, the first connection part and the second connection part may not be accurately connected to Fin due to connection deviation or deviation caused by the process itself. Providing more than two first connection parts and / or second connection parts can reduce the test result errors caused by this.

[0024] In some technical solutions, the etching process is used to etch all or part of the Fin to achieve Link_A and Link_B connecting the corresponding Fins. n and / or Fin0. The first connection portion and the second connection portion can form an ideal passage with the corresponding Fin.

[0025] In some technical solutions, a lead-out structure is further included, and Link_A and / or Link_ B are connected to the lead-out structure, and the lead-out structure is connected to Link_A and / or Link_ B via a connection structure. The lead-out structure can facilitate application of voltage or current to the first connection portion and the second connection portion.

[0026] In some technical solutions, Link_A and Link_B are located in the M0 layer, and the lead-out structure is located in the metal layer. Specifically, the connection structure may be a through hole filled with a metal medium to achieve connection between the first connection part, the second connection part and the lead-out structure.

[0027] Link_A and / or Link_B are perpendicular to the extending direction of the Fin.

[0028] The present invention also provides a test method for monitoring Fin spacing drift in a FinFET process, using any one of the electrical test structures in the above schemes, and the test method comprises the following steps:

[0029] S101: Preset the starting position A, the end position B, and define Fin nAbove Fin0, the second connecting portion straddles Fin0, and the end above Fin0 is denoted as the terminal. The terminal of Link_B is set at B, and the vertical distance between A and B is the offset S of Link_B;

[0030] S102: Apply current and / or voltage to Link_A and Link_B, perform electrical tests on the electrical test structure, and obtain corresponding electrical parameter values;

[0031] S103: According to the obtained electrical parameter values, determine whether Link_B is connected to Fin n to evaluate the pitch drift.

[0032] In some technical solutions, the electrical test structure adopted includes at least two of the second connecting portions denoted as Link_1_B and Link_2_B; in S101, the terminal of Link_1_B is set at A, the terminal of Link_2_B is set at B, and the vertical distance between A and B is S0, where S0 is a preset reference offset value. S0 can be set according to actual needs.

[0033] Furthermore, the electrical test structure adopted includes at least three of the second connecting portions denoted as Link_1_B, Link_2_B, and Link_3_B, and at least two of the Fins to be measured denoted as Fin1 and Fin2; Fin0, Fin1, and Fin2 are arranged in parallel in sequence; Link_A is electrically connected to Fin0, Fin1, and Fin2; in S101, the terminal of Link_1_B is set at A, the terminal of Link_2_B is set at B, the terminal of Link_3_B is set at C, the vertical distance between A and B is S0, the vertical distance between B and C is S0, and the vertical distance between A and C is 2S0.

[0034] In some technical solutions, the initial position A is the position of the end of Fin0 far from Fin n Of course, it can also be adjusted accordingly according to the specific measurement standard of the pitch between Fins.

[0035] In some technical solutions, the preset reference offset value S0 is the standard pitch between Fins. Specifically, the standard pitch can be the standard pitch between adjacent Fins or the standard pitch between non-adjacent Fins.

[0036] In some technical solutions, the electrical test structure adopted includes at least three electrical test units. The first electrical test unit includes Link_A and Link_1_B, the second electrical test unit includes Link_A and Link_2_B, and the third electrical test unit includes Link_A and Link_3_B; Link_A of at least three electrical test units is electrically connected to Fin0, Fin1, and Fin2; currents are applied to both ends of Link_A and Link_1_B, both ends of Link_A and Link_2_B, and both ends of Link_A and Link_3_B respectively, voltages are measured, and resistance values are calculated; a curve of the resistance value changing with the offset S is obtained, a mutation point of the resistance value is found, and at the mutation point of the resistance value, the corresponding target second connection part is known as Link_target_B and its offset S i ; where i is a positive integer and i ≤ n; the offset S between different Link_target_Bs is compared i differences to evaluate the severity of pitch drift.

[0037] In other technical solutions, the electrical test structure includes at least three electrical test units, and each electrical test unit includes at least three of the first connection parts denoted as Pin1, Pin2, and Pin3; the first electrical test unit includes Link_1_B, the second electrical test unit includes Link_2_B, and the third electrical test unit includes Link_3_B; voltages are applied to both ends of Pin1 and Link_1_B, both ends of Pin1 and Link_2_B, and both ends of Pin1 and Link_3_B; voltages are applied to both ends of Pin2 and Link_1_B, both ends of Pin2 and Link_2_B, and both ends of Pin2 and Link_3_B; voltages are applied to both ends of Pin3 and Link_1_B, both ends of Pin3 and Link_2_B, and both ends of Pin3 and Link_3_B; leakage currents are measured respectively, current values are obtained, and a curve M of the corresponding current value changing with the offset S is obtained j , j is a positive integer; a mutation point of the current value on the curve M is found j , and at the mutation point of the current value, the corresponding target second connection part is known as Link_target_B and its offset S i ; where i is a positive integer and i ≤ n; the offset S between different Link_target_Bs is compared i differences to evaluate the severity of pitch drift.

[0038] Compared with the prior art, the present invention has at least the following beneficial effects:

[0039] The present invention forms an electrical test structure through a first connection part and a second connection part to test the pitch between Fins, so as to evaluate the Fin pitch shift. The electrical test structure is simple and easy to manufacture. The electrical test structure and method for monitoring Fin pitch drift provided by the present invention are applicable to the FinFET process production process, and can monitor the pitch drift (Pitch Walking) problem generated during the Fin manufacturing process, timely detect process production defects, effectively correct the semiconductor production process, and improve the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the specific embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following described drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0041] Figure 1 is a schematic diagram of the electrical test structure in Embodiment 1 of the present invention;

[0042] Figure 2 is a curve diagram of the resistance and the offset S drawn after the electrical test in Embodiment 1 of the present invention;

[0043] Figure 3 is a schematic diagram of the electrical test structure in Embodiment 2 of the present invention;

[0044] Figure 4 is a curve diagram of the current and the offset S drawn after the electrical test in Embodiment 2 of the present invention.

[0045] Reference numerals: 1 - first connection part; 2 - second connection part; 3 - lead-out structure; 4 - connection structure; 5 - mandrel; 31 - first lead-out structure; 32 - second lead-out structure; 33 - third lead-out structure; 34 - fourth lead-out structure.

[0046] Figure 1 and Figure 3 The S in represents the vertical distance between the terminal of the second connection part and the lower end of Fin0 or the offset of the second connection part.

[0047] Figure 2 and Figure 4 The "three fins" in represents the case where the second connection part straddles and connects three Fins, the "two fins" represents the case where the second connection part straddles and connects two Fins, and the "one fin" represents the case where the second connection part straddles and connects one Fin. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0048] The technical solutions in the specific embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. The definitions of parameters such as the starting position, end position, offset, etc. involved in the following embodiments are understood according to the specific application of the embodiments, and are not limited to the one-to-one correspondence with the above-mentioned invention content.

[0049] Example 1

[0050] In one embodiment of the present invention, an electrical test structure and a test method thereof are provided for monitoring Fin Pitch Walking in a FinFET process.

[0051] like Figure 1 As shown, four mandrels 5 and eight fins distributed on both sides of the four mandrels 5 are formed. The extending direction of the fin is defined as the horizontal direction, and the direction perpendicular to the extending direction of the fin is defined as the vertical direction, and the fins are arranged in parallel in sequence along the vertical direction. The vertical direction and the horizontal direction described here are only for the convenience of describing the technical solution and are not intended to limit the present invention; similarly, the corresponding mandrels 5 and the number of fins are only examples for the convenience of description and cannot be understood as limiting the scope of protection of the present invention.

[0052] In this embodiment, the first three Fins from bottom to top in the vertical direction, the first mandrel 5, and the lower half of the second mandrel 5 are etched, the fourth Fin from bottom to top in the vertical direction is a non-test Fin (recorded as Fin0), the fifth Fin is the first Fin to be tested (recorded as Fin1), and the sixth Fin is the second Fin to be tested (recorded as Fin2). A first spacing is formed between Fin0 and Fin1, and a second spacing is formed between Fin1 and Fin2. It should be noted that in other embodiments, the number of Fins to be tested can be determined or evaluated according to actual conditions. In other embodiments, other Fins can also be selected as Fins to be tested or Fins not to be tested.

[0053] The electrical test structure includes at least three electrical test units ( Figure 1 Only one of the electrical test units is shown in the figure), each electrical test unit includes at least one first connection portion 1, at least one second connection portion 2 and at least four lead-out structures, and the first connection portion 1 and the second connection portion 2 are both perpendicular to the extension direction of the Fin. Figure 1Only one first connection part 1, one second connection part 2 and four lead-out structures of one electrical test unit are shown. Denote the second connection part 2 of the first electrical test unit as Link_1_B, the second connection part 2 of the second electrical test unit as Link_2_B, and the second connection part 2 of the third electrical test unit as Link_3_B. The vertical distances between the terminals of Link_1_B, Link_2_B, and Link_3_B and the lower end of Fin0 are all different, and the vertical distance between every two terminals is a preset standard pitch. Define Fin1 to be above Fin0. The second connection part straddles Fin0, and the end above Fin0 is denoted as the terminal. The lower end of Fin0 refers to the end of Fin0 far from Fin1.

[0054] In the FinFET process, a metal layer is formed. The first connection part 1 is formed in the M0 layer, i.e., the first metal layer, and the second connection part 2 is formed in the metal layer. The first connection part 1 and the second connection part 2 are connected to the lead-out structure through the connection structure 4. Specifically, in this embodiment, the connection structure 4 can be formed by filling a metal medium in the through hole after forming the through hole to realize the connection between the first connection part 1 and the second connection part 2 and the lead-out structure 3.

[0055] For convenience of description, the principle of this embodiment will be described below only by taking three electrical test units as an example. However, in the actual implementation of this embodiment, it is not limited to only using three electrical test units. Usually, N electrical test units are used, where N is a positive integer not less than 3. The following are all settings in the ideal case: such as Figure 1As shown, the first connection part 1 of the first electrical test unit, namely Link_A, straddles and connects Fin0, Fin1, and Fin2. Link_1_B connects to Fin0, and the vertical distance between the terminal of Link_1_B and the lower end of Fin0 is denoted as S1. The first connection part 1 of the second electrical test unit, namely Link_A, straddles and connects Fin0, Fin1, and Fin2. Link_2_B straddles and connects Fin0 and Fin1, and the vertical distance between the terminal of Link_2_B and the lower end of Fin0 is denoted as S2. The first connection part 1 of the third electrical test unit, namely Link_A, straddles and connects Fin0, Fin1, and Fin2. Link_3_B straddles and connects Fin0, Fin1, and Fin2, and the vertical distance between the terminal of Link_3_B and the lower end of Fin0 is denoted as S3. For example, in an ideal situation where there is no pitch drift, a preset starting position A, a first end position B, and a second end position C are set. The terminal of Link_1_B is set at A, the terminal of Link_2_B is set at B, and the terminal of Link_3_B is set at C. The vertical distance between A and B is S0, the vertical distance between B and C is S0, and the vertical distance between A and C is 2S0. Among them, S0 is the standard pitch between adjacent Fins. In this case, if the starting position A is the position of the end of Fin0 far from Fin1, then the offset of Link_1_B (the vertical distance between the terminal of Link_1_B and the lower end of Fin0) S1 = 0, the offset of Link_2_B (the vertical distance between the terminal of Link_2_B and the lower end of Fin0, that is, the vertical distance between A and B) S2 = S0, and the offset of Link_3_B (the vertical distance between the terminal of Link_3_B and the lower end of Fin0, that is, the vertical distance between A and C) S3 = 2S0. In fact, as Figure 1 shown, S1 is not equal to 0, that is, the starting position A (the terminal of Link_1_B) is not at the position of the end of Fin0 far from Fin1. The offset S2 is not equal to the vertical distance between A and B, and the offset S3 is not equal to the vertical distance between A and C. The first connection parts 1 in the above three electrical test units can be set separately or share the same first connection part 1. "Upper" and "lower" are only for the convenience of describing the technical solution and do not limit the present invention. Taking the three electrical test units as an example, and defining the vertical distance between the second connection part 2 in the three electrical test units and the lower end of Fin0 is also for the convenience of description. In practical applications, usually, the three second connection parts 2 respectively connected to different Fins are not directly preset in advance, but can only be known after a large number of tests for the second connection parts 2 connected to different Fins.

[0056] In practical applications, multiple electrical test units can be adopted according to needs. Of course, it can also be one electrical test unit. Taking different electrical test units as examples for illustration, during the electrical test process, preferably, the number of electrical test units exceeds three. On the one hand, in order to accurately know the severity of the pitch drift, a smaller offset needs to be preset, that is, the vertical distance between the terminals of the second connection parts 2 of different electrical test units and the lower end of Fin0 can be different and the difference is small. In this case, during the subsequent test process, it is possible to more accurately know when the electrical parameters mutate, and thus more accurately know the severity of the pitch drift. On the other hand, by setting the second connection parts 2 of different electrical test units at the same or similar positions, the influence of process or operation errors on the results can be reduced when detecting different electrical test units. In other embodiments, one electrical test unit can also include multiple first connection parts 1 and / or multiple second connection parts 2. The multiple first connection parts 1 in one electrical test unit can straddle and connect the same Fin, and the multiple second connection parts 2 can straddle and connect the same Fin. The influence of errors on the results can be reduced during the detection of the same electrical test unit. For the convenience of description, this embodiment describes taking each electrical test unit having one first connection part 1 and one second connection part 2 as an example, and the present invention is not limited to this. The corresponding Figure 1 Only one second connection part 2 in one electrical test unit is shown. In practice, multiple second connection parts 2 can be adopted in one electrical test unit according to needs.

[0057] In one electrical test unit, two lead-out structures are connected to the first connection part 1, denoted as the first lead-out structure 31 and the second lead-out structure 32; two lead-out structures are connected to the second connection part 2, denoted as the third lead-out structure 33 and the fourth lead-out structure 34. It should be particularly noted that when multiple first connection parts 1 or multiple second connection parts 2 are provided in one electrical test unit, each first connection part 1 is connected to the first lead-out structure 31 and the second lead-out structure 32, and multiple first connection parts 1 can commonly connect to one first lead-out structure 31 and the second lead-out structure 32; each second connection part 2 is connected to the third lead-out structure 33 and the fourth lead-out structure 34, and multiple second connection parts 2 can commonly connect to one third lead-out structure 33 and the fourth lead-out structure 34.

[0058] Its testing method includes: for each electrical testing unit, a power supply applies current to both ends of the second lead-out structure 32 and the third lead-out structure 33, measures the voltage from both ends of the first lead-out structure 31 and the fourth lead-out structure 34, and calculates the resistance value. Ideally, when there are only three electrical testing units, it is necessary to ensure that Link_1_B is connected to Fin0, Link_2_B is connected to Fin0 and Fin1, Link_3_B is connected to Fin0, Fin1, and Fin2, and the vertical distances between the terminals of the second connecting portion 2 and the lower end of Fin0 are different in order to obtain the corresponding results.

[0059] Attached Figure 2 shows the change curve of the offset S and the resistance value when there are multiple electrical testing units, that is, when there are multiple second connecting portions 2 with different offsets. As Figure 2 shown, there are three mutation positions in the curve. At the mutation points, the corresponding offsets S1, S2, and S3 are obtained, which respectively correspond to the preset vertical distances between the terminal of Link_1_B and the lower end of Fin0, the preset vertical distance between the terminal of Link_2_B and the lower end of Fin0, and the preset vertical distance between the terminal of Link_3_B and the lower end of Fin0. In this preset case, Link_1_B is the first target second connecting portion Link_target_B, Link_2_B is the second target second connecting portion Link_target_B, and Link_3_B is the third target second connecting portion Link_target_B.

[0060] Combined Figure 1 and Figure 2 , the intervals between Fin0 and Fin1, and between Fin1 and Fin2 can be obtained: the interval P1 between Fin0 and Fin1 = S2 - S1; the interval P2 between Fin1 and Fin2 = S3 - S2. By comparing the magnitudes of P1 and P2, the severity of pitch walking can be obtained. The larger the absolute value of the difference between P1 and P2, the more severe the pitch walking is evaluated.

[0061] Principle of this embodiment: When Link_1_B is connected to Fin0, there is one Fin connected between the first lead structure 31 and the fourth lead structure 34; when Link_2_B is connected to Fin0 and Fin1, two Fins are connected in parallel between the first lead structure 31 and the fourth lead structure 34; when Link_3_B is connected to Fin0, Fin1, and Fin2, three Fins are connected in parallel between the first lead structure 31 and the fourth lead structure 34. The more Fins connected in parallel between the first lead structure 31 and the fourth lead structure 34, the lower the resistance value. When the number of Fins connected in parallel between the first lead structure 31 and the fourth lead structure 34 increases by one, the resistance value at both ends will change. Through the mutation of the resistance value, it can be known that the number of Fins connected in parallel between the first lead structure 31 and the fourth lead structure 34 has changed, and thus it can be known that the Fins connected by the second connection part 2 have changed. By knowing how much offset has passed between adjacent mutations, the pitch between adjacent Fins can be obtained. After knowing the pitch between multiple Fins, the severity of pitch drift can be evaluated.

[0062] In this embodiment, only the pitch drift between three Fins (two of which are Fins to be measured) is measured. According to actual needs, in other embodiments, the pitch drift between more Fins can also be measured. This embodiment measures the pitch drift between three adjacent Fins. In other embodiments, of course, the pitch between non-adjacent Fins can also be measured to evaluate the severity of pitch drift over a large range.

[0063] The offset differences of the second connection parts 2 in the same or different electrical test units can be small. Especially when multiple second connection parts 2 are provided in the same electrical test unit, the offset differences can be small. Specifically, the vertical distance differences between the terminals of different second connection parts 2 and the lower end of Fin0 are small, less than the pitch between adjacent Fins to be measured, so that the subtle and / or local subtle migration caused by defects can be monitored. The multiple second connection parts 2 can be arranged at equal intervals, or can be arranged according to other needs. The present invention does not limit the length of the second connection part 2, and the lengths of the multiple second connection parts 2 can be the same or different.

[0064] Embodiment 2

[0065] Another embodiment of the present invention provides an electrical test structure and a test method for monitoring Fin pitch drift in a FinFET process.

[0066] As Figure 3As shown, three mandrels 5 are formed, and six Fins are distributed on both sides of the three mandrels 5. The extending direction of the Fin is defined as the horizontal direction, and the direction perpendicular to the extending direction of the Fin is defined as the vertical direction. The Fins are arranged parallel to each other in sequence along the vertical direction. The vertical direction and the horizontal direction described herein are only for the convenience of describing the technical solution and do not limit the present invention; similarly, the number of the corresponding mandrels 5 and Fins is only an example for convenient description and cannot be construed as a limitation of the protection scope of the present invention.

[0067] The electrical test structure includes at least three electrical test units ( Figure 3 only one of the electrical test units is shown therein), and each electrical test unit includes at least three first connection portions 1, at least one second connection portion 2, and at least one lead-out structure 3. Both the first connection portion 1 and the second connection portion 2 are perpendicular to the extending direction of the Fin. In Figure 3 only three first connection portions 1, two second connection portions 2, and one lead-out structure 3 of one electrical test unit are shown. Denote the second connection portion 2 of the first electrical test unit as Link_1_B, the second connection portion 2 of the second electrical test unit as Link_2_B, and the second connection portion 2 of the third electrical test unit as Link_3_B. The vertical distances between the terminals of Link_1_B, Link_2_B, and Link_3_B and the lower end of Fin0 are all different, and the vertical distances between the terminals of any two of them are preset standard spacings.

[0068] In the FinFET process, a metal layer is formed. The first connection portion 1 is formed in the M0 layer, i.e., the first metal layer, and the second connection portion 2 is formed in the metal layer. The second connection portion 2 is connected to the lead-out structure 3 through a connection structure 4. Specifically, in this embodiment, the connection structure 4 may be formed by filling a metal medium in a through hole after forming the through hole to realize the connection between the second connection portion 2 and the lead-out structure 3. In this embodiment, the three first connection portions 1 do not need to be led out through the lead-out structure 3 but are directly connected to the Pin, and the three first connection portions 1 are defined as Pin1, Pin2, and Pin3 respectively. In other embodiments, according to actual needs, the first connection portion 1 may also be connected to the lead-out structure 3.

[0069] In this embodiment, in the area where Pin1 is located, the first three Fins from bottom to top in the vertical direction, the first mandrel 5, and the lower half of the second mandrel 5 are etched, the fourth Fin from bottom to top in the vertical direction is a non-test Fin (recorded as Fin0), the fifth Fin is the first Fin to be tested (recorded as Fin1), and the sixth Fin is the second Fin to be tested (recorded as Fin2). In the area where Pin2 is located, the first four Fins from bottom to top in the vertical direction, the first mandrel 5, and the second mandrel 5 are etched. In the area where Pin3 is located, the first five Fins from bottom to top in the vertical direction, the first mandrel 5, the second mandrel 5, and the lower half of the third mandrel 5 are etched. A first spacing is formed between Fin0 and Fin1, and a second spacing is formed between Fin1 and Fin2.

[0070] For the convenience of description, the following only takes three electrical test units as an example to illustrate the principle of this embodiment, but this embodiment is not limited to using only three electrical test units in the actual implementation process, and usually uses N electrical test units, where N is a positive integer not less than 3. The following are all ideal settings: Figure 3 As shown, the first electrical test unit includes Pin1, Pin2, and Pin3, Pin1 spans and connects Fin0, Fin1, and Fin2, Pin2 spans and connects Fin1 and Fin2, and Pin3 spans and connects Fin2. Figure 3As shown in the figure, Link_1_B is connected to Fin0, and the vertical distance between the terminal of Link_1_B and the lower end of Fin0 is denoted as S1. Link_2_B straddles and connects Fin0 and Fin1, and the vertical distance between the terminal of Link_2_B and the lower end of Fin0 is denoted as S2. Link_3_B straddles and connects Fin0, Fin1, and Fin2, and the vertical distance between the terminal of Link_3_B and the lower end of Fin0 is denoted as S3. For example, in an ideal situation where there is no pitch drift, a preset starting position A, a first end position B, and a second end position C are set. The terminal of Link_1_B is set at A, the terminal of Link_2_B is set at B, and the terminal of Link_3_B is set at C. The vertical distance between A and B is S0, the vertical distance between B and C is S0, and the vertical distance between A and C is 2S0. Among them, S0 is the standard pitch between adjacent Fins. In this case, if the starting position A is the position of the end of Fin0 far from Fin1, then the offset of Link_1_B (the vertical distance between the terminal of Link_1_B and the lower end of Fin0) S1 = 0, the offset of Link_2_B (the vertical distance between the terminal of Link_2_B and the lower end of Fin0, that is, the vertical distance between A and B) S2 = S0, and the offset of Link_3_B (the vertical distance between the terminal of Link_3_B and the lower end of Fin0, that is, the vertical distance between A and C) S3 = 2S0. In fact, as Figure 1 shown, S1 is not equal to 0, that is, the starting position A (the terminal of Link_1_B) is not at the position of the end of Fin0 far from Fin1, the offset S2 is not equal to the vertical distance between A and B, and the offset S3 is not equal to the vertical distance between A and C. The three first connection parts 1 in the above three electrical test units can be set separately or share the three first connection parts 1. Taking the three electrical test units as an example, and defining the vertical distance between the second connection part 2 in the three electrical test units and the lower end of Fin0 is also for convenience of description. In actual applications, usually, the three second connection parts 2 respectively connected to different Fins are not directly set in advance, but can only be known after a large number of tests which second connection part 2 is connected to which Fin.

[0071] In an electrical test unit, multiple second connection parts 2 are commonly connected to an extraction structure 3. It should be particularly noted that when more first connection parts 1 or more second connection parts 2 are set in an electrical test unit, each second connection part 2 can be connected to the same extraction structure 3.

[0072] The test method includes: for each electrical test unit, the power supply applies voltages to Pin1, Pin2, Pin3 and the lead-out structure 3, and leakage currents are measured from Pin1, Pin2, Pin3 and the lead-out structure 3 to obtain current values. Ideally, when there are only three electrical test units, it is necessary to ensure that Link_1_B is connected to Fin0, Link_2_B is connected to Fin0 and Fin1, Link_3_B is connected to Fin0, Fin1 and Fin2, and the vertical distances between the terminals of the second connecting part 2 and the lower end of Fin0 are different in order to obtain the corresponding results.

[0073] Appendix Figure 4 shows the change curve of the offset S and the current value when there are multiple electrical test units, that is, when there are multiple second connecting parts 2 with different offsets. As Figure 4 shown, there are a total of three curves, which respectively represent the leakage current change curve between Pin1 and the lead-out structure 3, the leakage current change curve between Pin2 and the lead-out structure 3, and the leakage current change curve between Pin3 and the lead-out structure 3. Each curve has a mutation position, Figure 4 and there are a total of three mutation positions in . The corresponding offsets S1, S2, S3 are obtained at the mutation points, which respectively correspond to the vertical distances between the terminals of Link_1_B and the lower end of Fin0, the vertical distances between the terminals of Link_2_B and the lower end of Fin0, and the vertical distances between the terminals of Link_3_B and the lower end of Fin0. In this preset case, Link_1_B is the first target second connecting part Link_target_B, Link_2_B is the second target second connecting part Link_target_B, and Link_3_B is the third target second connecting part Link_target_B.

[0074] Combined with Figure 3 and Figure 4 , the intervals between Fin0 and Fin1, and between Fin1 and Fin2 can be obtained: the interval P1 between Fin0 and Fin1 = S2 - S1; the interval P2 between Fin1 and Fin2 = S3 - S2. By comparing the magnitudes of P1 and P2, the severity of pitch walking can be obtained. The larger the absolute value of the difference between P1 and P2, the more severe the pitch walking is evaluated.

[0075] Principle of this embodiment: When Link_1_B is connected to Fin0, Pin1 is conducted with the lead-out structure 3, while Pin2 and Pin3 cannot be conducted with the lead-out structure 3; when Link_2_B is connected to Fin0 and Fin1, Pin1 and Pin2 are conducted with the lead-out structure 3, while Pin3 cannot be conducted with the lead-out structure 3; when Link_3_B is connected to Fin0, Fin1, and Fin2, Pin1, Pin2, Pin3, and the lead-out structure 3 are conducted. The corresponding leakage current can be measured in the conducting case. If not conducted, the current value drops significantly. Through the mutation of the current value, it can be known that during the change of the offset S of the second connecting portion 2, when the number of Fins spanned and connected by the second connecting portion 2 changes from three to two, the current value corresponding to Pin3 will drop; when the number of Fins spanned and connected by the second connecting portion 2 changes from two to one, the current value corresponding to Pin2 will drop; when the number of Fins spanned and connected by the second connecting portion 2 changes from one to zero, the current value corresponding to Pin1 will drop. Therefore, the curve mutation point corresponding to Pin1 is S1, the curve mutation point corresponding to Pin2 is S2, and the curve mutation point corresponding to Pin3 is S3. By knowing how much offset has passed between adjacent mutations, the distance between adjacent Fins can be obtained. After knowing the distances between multiple Fins, the severity of the pitch drift can be evaluated. Actually, the selection of the Fins to be measured, the selection of the offset, the length of the second connecting portion 2, etc. are similar to the relevant descriptions in Embodiment 1 and will not be elaborated here.

[0076] Embodiment 3

[0077] Another embodiment of the present invention provides an electrical test structure and a test method for monitoring Fin pitch walking in the FinFET process.

[0078] The difference between the electrical test structure provided in this embodiment and those in Embodiment 1 and Embodiment 2 is that: in this embodiment, there is only one electrical test unit, that is, multiple electrical test units in Embodiment 1 and Embodiment 2 are combined into one electrical test unit. Link_1_B, Link_2_B, and Link_3_B are arranged in the same electrical test unit.

[0079] Its test method is the same as or similar to that in Embodiment 1 or Embodiment 2. The difference is that: in Embodiment 1 and Embodiment 2, electrical tests need to be performed on different electrical test units respectively, while in this embodiment, all electrical tests can be completed in one electrical test unit. During the test process, the curve of the corresponding electrical parameters and the offset S can be directly obtained in one electrical test unit, and the distances between different Fins can be obtained from the curve mutation points, so as to evaluate the severity of the pitch drift.

[0080] Embodiment 4

[0081] Another embodiment of the present invention provides an electrical test structure and a test method for monitoring Fin pitch walking in a FinFET process.

[0082] The difference between the electrical test structure provided in this embodiment and that in Embodiment 1 is as follows: In this embodiment, there is only one Fin to be measured, denoted as Fin1, and one non-Fin to be measured, denoted as Fin0. Fin1 and Fin0 are arranged in parallel. A first pitch is formed between Fin0 and Fin1. The electrical test structure includes at least one first connection part 1 (denoted as Link_A), at least one second connection part 2, and a lead-out structure 3. For the convenience of description, the principle of this embodiment will be described below by taking two second connection parts 2 (denoted as Link_1_B and Link_2_B) as an example. Of course, actually more second connection parts 2 can be set, and the offset S between each two second connection parts 2 is relatively small. Link_A connects Fin0 and Fin1, Link_1_B connects Fin0, and Link_2_B is preset to connect Fin0 and Fin1. The following is the setting in the ideal case: The vertical distances between the terminals of Link_1_B and Link_2_B and the end of Fin0 far from Fin1 (i.e., the lower end of Fin0) are different. When the terminal of Link_1_B is located at the lower end of Fin0, the offset S of Link_2_B is the vertical distance between the terminal of Link_2_B and the lower end of Fin0.

[0083] The difference in the test method is as follows: In this embodiment, instead of judging the pitch drift between three Fins (two Fins to be measured and one non-Fin to be measured) by comparing the difference in the offset S between the mutation positions obtained from the electrical parameter curves, it is to judge whether Link_2_B is connected to Fin1 according to whether the corresponding electrical parameters can be obtained, so as to judge whether there is a gap between the preset difference in the offsets of Link_2_B and Link_1_B (set as the standard pitch) and the first pitch, and evaluate the pitch drift. Specifically: A starting position A and an ending position B are preset. It is defined that Fin1 is above Fin0. The second connection part 2 straddles Fin0, and the end above Fin0 is denoted as the terminal. The terminal of Link_1_B is set at A, and the terminal of Link_2_B is set at B. The vertical distance between A and B is S0, and S0 is the preset reference offset value; when A is the lower end of Fin0, S0 (the offset of Link_2_B) is the standard pitch and is directly compared with the first pitch. In this embodiment, A is set as the lower end of Fin0. Currents are applied to both ends of Link_A and Link_2_B respectively, and the voltage is measured to obtain the resistance value, so as to judge whether Link_A and Link_2_B are conducting. If not, it means that the first pitch is less than the standard pitch and there is pitch drift.

[0084] The second connecting part 2 can also be one. Taking the example of monitoring whether the pitch drift occurs between two adjacent Fins, a preset starting position A and an end position B are set. It is defined that Fin1 is located above Fin0, and Link_B straddles Fin0. The end located above Fin0 is denoted as the terminal. The terminal of Link_B is set at B, and the vertical distance between A and B; the vertical distance between the terminal of Link_B and the lower end of Fin0 is the offset S of Link_B. When the offset S of Link_B and the initial position A are determined, and the initial position A is the lower end of Fin0, the vertical distance between A and B is the offset S of Link_B. Assume that the offset S is a preset reference offset S0 (set as the standard pitch between adjacent Fins). If the second connecting part 2 is not conducting with Fin1, that is, the corresponding electrical parameters are not measured, it is preliminarily evaluated that there is pitch drift. In other embodiments, the initial position A can also be selected at other positions, and the offset S can also not be the standard pitch between adjacent Fins.

[0085] In some specific solutions, it is also possible to randomly monitor the pitch drift between two non-adjacent Fins, or the pitch offset between multiple adjacent or non-adjacent Fins. Just when setting the offset S, adjust and select an appropriate preset reference offset S0, and it is possible to randomly monitor whether there is a widespread pitch drift in a large range.

[0086] The description of the above embodiments is only used to help understand the method and core idea of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of the claims of the present invention.

Claims

1. An electrical test structure for monitoring Fin pitch drift in the FinFET process, characterized in that Formed with: At least two Fins, one of which is a non-Fin to be measured denoted as Fin0, and at least one of the remaining Fins is selected as the Fin to be measured denoted as Fin n ; Fin n and Fin0 are arranged in parallel, and Fin n has a certain distance from Fin0, forming a first spacing; where n is a positive integer; At least one first connection part is denoted as Link_A, and at least one second connection part is denoted as Link_B; Link_A is electrically connected to Fin n electrically, and Link_B is electrically connected to Fin0.

2. The electrical test structure for monitoring the drift of Fin pitch in the FinFET process according to claim 1, wherein The second connecting part is at least two, denoted as Link_1_B and Link_2_B; Link_A is electrically connected to Fin0 and Fin n electrically, both Link_1_B and Link_2_B are electrically connected to Fin0, and it is defined that Fin n is located above Fin0, the second connecting part straddles Fin0, and the end located above Fin0 is denoted as the terminal, and the vertical distances between the terminals of Link_1_B and Link_2_B and the end of Fin0 far from Fin n are different.

3. An electrical test structure for monitoring the drift of Fin pitch in a FinFET process according to claim 1, wherein There are at least two Fins to be measured, denoted as Fin1 and Fin2. Fin0, Fin1, and Fin2 are arranged in parallel in sequence. The distance between Fin0 and Fin1 is the first pitch. There is a certain distance between Fin1 and Fin2, forming a second pitch. There are at least two second connection parts, denoted as Link_1_B and Link_2_B. Link_A is electrically connected to Fin1 and Fin2. Both Link_1_B and Link_2_B are electrically connected to Fin0. It is defined that Fin1 is above Fin0. The second connection part straddles Fin0, and the end above Fin0 is denoted as the terminal. The vertical distances between the terminals of Link_1_B and Link_2_B and the end of Fin0 far from Fin n are different.

4. An electrical test structure for monitoring the drift of Fin pitch in the FinFET process according to claim 3, characterized in that The second connection part is at least three, denoted as Link_1_B, Link_2_B, and Link_3_B; Link_A is electrically connected to Fin0, Fin1, and Fin2, Link_1_B, Link_2_B, and Link_3_B are all electrically connected to Fin0, and the vertical distances between the terminals of Link_1_B, Link_2_B, and Link_3_B and the end of Fin0 far from Fin n are all different.

5. An electrical test structure for monitoring the drift of Fin pitch in the FinFET process according to claim 4, characterized in that, The electrical test structure is an electrical test unit, and the electrical test unit includes Link_A, Link_1_B, Link_2_B, and Link_3_B.

6. An electrical test structure for monitoring the drift of fin pitch in FinFET process according to claim 4, characterized in that, The electrical test structure includes at least three electrical test units, the first electrical test unit includes Link_A and Link_1_B, the second electrical test unit includes Link_A and Link_2_B, and the third electrical test unit includes Link_A and Link_3_B.

7. An electrical test structure for monitoring the drift of Fin pitch in a FinFET process according to claim 4, characterized in that, The electrical test structure includes at least three electrical test units, each of which includes at least three first connection parts, recorded as Link_1_A, Link_2_A, Link_3_A, and at least one second connection part; Link_1_A connects Fin0, Fin1 and Fin2, Link_2_A connects Fin1 and Fin2, and Link_3_A connects Fin2; the first electrical test unit includes Link_1_B, the second electrical test unit includes Link_2_B, and the third electrical test unit includes Link_3_B.

8. An electrical test structure for monitoring the drift of Fin pitch in a FinFET process according to claim 6 or 7, characterized in that, Different electrical test units may share part or all of the first connection portion.

9. An electrical test structure for monitoring the drift of Fin pitch in the FinFET process according to claim 1, characterized in that, With the same Fin n The first connecting part and / or the second connecting part connected to the Fin0 is more than two.

10. An electrical test structure for monitoring the drift of Fin pitch in the FinFET process according to claim 1, characterized in that, Etch all or part of the Fin using an etching process to implement the connection of Link_A and Link_B to the corresponding Fin n and / or Fin0.

11. An electrical test structure for monitoring the drift of fin pitch in a FinFET process according to claim 1, characterized in that, It also includes a lead-out structure, Link_A and / or Link_B are connected to the lead-out structure, and the lead-out structure is connected to Link_A and / or Link_B via a connecting structure.

12. An electrical test structure for monitoring the drift of Fin pitch in a FinFET process according to claim 11, characterized in that, Link_A and Link_B are located in the M0 layer, and the lead-out structure is located in the metal layer.

13. An electrical test structure for monitoring the drift of fin pitch in a FinFET process according to claim 1, characterized in that Link_A and / or Link_B are perpendicular to the extending direction of the Fin.

14. A test method for monitoring the drift of Fin pitch in the FinFET process, characterized in that, The electrical test structure according to any one of claims 1 to 13 is used, and the test method thereof comprises the following steps: S101: Preset the starting position A and the ending position B, and define Fin n is located above Fin0. The second connecting part straddles Fin0, and the end located above Fin0 is denoted as the terminal. The terminal of Link_B is set at B, and the vertical distance between A and B is the offset S of Link_B; S102: applying current and / or voltage to Link_A and Link_B, performing electrical testing on the electrical test structure, and obtaining corresponding electrical parameter values; S103: Determine whether Link_B is connected to Fin according to the obtained electrical parameter values, and determine whether there is a gap between the preset standard spacing and the first spacing, so as to evaluate the spacing drift; n connected, and determine whether there is a gap between the preset standard spacing and the first spacing, so as to evaluate the spacing drift; The standard spacing is the difference between the offsets of Link_2_B and Link_1_B.

15. A test method for monitoring the drift of fin pitch in a FinFET process according to claim 14, characterized in that, The electrical test structure used includes at least two of the second connection parts, which are marked as Link_1_B and Link_2_B. In S101, the terminal of Link_1_B is set at A, and the terminal of Link_2_B is set at B. The vertical distance between A and B is S0, and S0 is a preset reference offset value.

16. A test method for monitoring the drift of Fin pitch in a FinFET process according to claim 15, characterized in that, The electrical test structure adopted includes at least three second connection parts recorded as Link_1_B, Link_2_B and Link_3_B, and at least two Fins to be tested recorded as Fin1 and Fin2; Fin0, Fin1, and Fin2 are arranged in parallel in sequence; Link_A is electrically connected to Fin0, Fin1, and Fin2; in S101, the terminal of Link_1_B is set at A, the terminal of Link_2_B is set at B, the terminal of Link_3_B is set at C, the vertical distance between A and B is S0, the vertical distance between B and C is S0, and the vertical distance between A and C is 2S0.

17. A test method for monitoring the drift of Fin pitch in a FinFET process according to claim 14 or 15 or 16, characterized in that, The initial position A is the position on Fin0 far from one end of Fin n where it is located.

18. A test method for monitoring the drift of Fin pitch in a FinFET process according to claim 15 or 16, characterized in that, The preset reference offset value S0 is the standard spacing between Fins.

19. A test method for monitoring the drift of Fin pitch in a FinFET process according to claim 16, characterized in that The electrical test structure adopted includes at least three electrical test units. The first electrical test unit includes Link_A and Link_1_B, the second electrical test unit includes Link_A and Link_2_B, and the third electrical test unit includes Link_A and Link_3_B; Link_A of at least three electrical test units is electrically connected to Fin0, Fin1, and Fin2; currents are respectively applied to both ends of Link_A and Link_1_B, both ends of Link_A and Link_2_B, and both ends of Link_A and Link_3_B, voltages are measured, and resistance values are calculated; a curve of the resistance value varying with the offset S is obtained, a mutation point of the resistance value is found, and at the mutation point of the resistance value, the corresponding target second connection part is known as Link_target_B and its offset S i ; where i is a positive integer and i ≤ n; the offset S between different Link_target_Bs is compared i differences to evaluate the severity of pitch drift.

20. A test method for monitoring the drift of Fin pitch in a FinFET process according to claim 16, characterized in that, The electrical test structure includes at least three electrical test units, and each of the electrical test units includes at least three of the first connection parts denoted as Pin1, Pin2, and Pin3; the first electrical test unit includes Link_1_B, the second electrical test unit includes Link_2_B, and the third electrical test unit includes Link_3_B; voltages are applied across both ends of Pin1 and Link_1_B, both ends of Pin1 and Link_2_B, and both ends of Pin1 and Link_3_B; voltages are applied across both ends of Pin2 and Link_1_B, both ends of Pin2 and Link_2_B, and both ends of Pin2 and Link_3_B; voltages are applied across both ends of Pin3 and Link_1_B, both ends of Pin3 and Link_2_B, and both ends of Pin3 and Link_3_B; the leakage currents are measured respectively to obtain current values, and curves M of the corresponding current values varying with the offset S are obtained. j , where j is a positive integer; find the curve M j for the mutation point of the current value thereon, and obtain the corresponding target second connection part denoted as Link_target_B and its offset S at the mutation point of the current value. i ; where i is a positive integer and i ≤ n; compare the offset S i differences between different Link_target_B to evaluate the severity of the pitch drift.

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