Display substrate, display panel, and display device

Abstract

The present invention relates to a display substrate, a display panel, and a display device. The display substrate includes a gate line, a data line, and an oxide thin film transistor; the oxide thin film transistor has an oxide channel layer, the oxide channel layer includes a main body and a connection part, the projection of the main body of the oxide channel layer on the data line is located within the data line, and the connection part of the oxide channel layer extends from the main body to an opening area on the display substrate. The data line in the above-mentioned display substrate can completely block and wrap the main body of the oxide channel layer in the longitudinal direction and in the entire longitudinal area of ​​the oxide channel layer, thereby achieving a better light-shielding effect. Based on the better light-shielding effect of the data line on the main body of the oxide channel layer, the oxide thin film transistor in the display substrate will have better NBTIS performance, thereby improving the negative drift of the threshold voltage and thus improving the afterimage problem during the display process.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display substrate, a display panel, and a display device. Background Art

[0002] For existing display panels, oxide thin-film transistors (OTTs) are an important component that they rely on to achieve display. Oxide TFTs generally include a gate, an oxide channel layer, a source, and a drain. The oxide channel layer in the OTT is sensitive to light, which can lead to poor negative bias temperature illumination stability (NBTIS) of the OTT. Under the influence of NBTIS stress, the threshold voltage of the OTT will have a large negative drift, which will cause afterimage problems during the display process.

[0003] To this end, a light shielding layer (LS layer) is generally provided at the oxide thin film transistor to block light irradiated from the bottom side onto the oxide channel layer, thereby improving the NBTIS performance of the oxide thin film transistor.

[0004] However, the existing light shielding layer set in the oxide thin film transistor has limited effect on wrapping and shielding the oxide channel layer. The width of the light shielding layer protruding from the gate line on one side in the vertical direction is less than 1.5 microns, and it cannot completely wrap and shield the oxide channel layer in the entire vertical area of ​​the oxide channel layer. Therefore, the performance improvement of the NBTIS of the oxide thin film transistor brought about by the provision of the light shielding layer is limited. Moreover, on the other hand, the light shielding layer protrudes from the gate line in the vertical direction, which will also squeeze the opening area of ​​the display panel, reduce the area of ​​the opening area, and reduce the aperture ratio. Summary of the Invention

[0005] The present invention provides a display substrate, a display panel and a display device to solve the technical problem of poor NBTIS performance of oxide thin film transistors in the prior art.

[0006] The display substrate provided by the present invention includes a gate line, a data line and an oxide thin film transistor; the oxide thin film transistor has an oxide channel layer, the oxide channel layer includes a main portion and a connecting portion, the projection of the main portion of the oxide channel layer on the data line is located within the data line, and the connecting portion of the oxide channel layer extends from the main portion to an opening area on the display substrate.

[0007] The oxide channel layer is located above the data line, and an insulating layer is formed between the oxide channel layer and the data line; a first via hole is formed on the insulating layer, and the main body of the oxide channel layer and the data line are connected through the first via hole.

[0008] The projection of a partial area of ​​the main body of the oxide channel layer onto the gate line is located within the gate line.

[0009] Wherein, the width of the gate line ranges from 1 to 5 microns.

[0010] The width of the data line is in the range of 0.5 to 3 micrometers, and the width of the main body of the oxide channel layer is in the range of 0.5 to 3 micrometers.

[0011] Wherein, the distance between the edge of the oxide channel layer and the edge of the data line ranges from 0 to 2 micrometers.

[0012] Wherein, a region where the data line and the gate line overlap has a protrusion, and the protrusion is in a protruding shape along the extending direction of the gate line.

[0013] In which, the display substrate also includes a pixel electrode, which is arranged in the opening area; there is a layer structure between the pixel electrode and the oxide channel layer, and a second via hole is arranged on the layer structure between the pixel electrode and the oxide channel layer, and the connecting part of the pixel electrode and the oxide channel layer is connected through the second via hole.

[0014] In which, the display substrate also includes a pixel electrode and a transfer layer, and the pixel electrode and the transfer layer are arranged in the opening area; there is a layer structure between the transfer layer and the oxide channel layer, and a second via is formed on the layer structure between the transfer layer and the oxide channel layer, and the connecting part of the transfer layer and the oxide channel layer is connected through the second via; there is a layer structure between the pixel electrode and the transfer layer, and a third via is formed on the layer structure between the pixel electrode and the transfer layer, and the pixel electrode and the transfer layer are connected through the third via.

[0015] Wherein, the transfer layer is made of transparent material.

[0016] Wherein, the transfer layer is ITO.

[0017] Wherein, the display substrate further includes a light shielding layer, which is arranged along the direction of the gate line and is located below the oxide channel layer.

[0018] The width of the light shielding layer is not less than the width of the gate line, so that the projection of the gate line on the light shielding layer does not exceed the light shielding layer.

[0019] Wherein, the distance between the edge of the gate line and the edge of the light shielding layer ranges from 0 to 3 micrometers.

[0020] Wherein, the light shielding layer is connected to the gate driving circuit in the non-display area of ​​the display substrate.

[0021] The display panel provided by the present invention includes the above-mentioned display substrate.

[0022] The display device provided by the present invention includes the above-mentioned display panel.

[0023] The display substrate, display panel, and display device provided by the embodiments of the present invention have the following advantages over the prior art:

[0024] In a display substrate provided by an embodiment of the present invention, an oxide channel layer in an oxide thin-film transistor has a main portion and a connecting portion. The projection of the main portion of the oxide channel layer on the data line is located within the data line, that is, the main portion of the oxide channel layer and the data line overlap correspondingly in a direction perpendicular to the substrate. In this case, the data line can shield the main portion of the oxide channel layer from light. Furthermore, the data line generally extends longitudinally, and can completely shield and wrap the main portion of the oxide channel layer in the longitudinal direction and in the entire longitudinal region of the oxide channel layer, thereby achieving a better light-shielding effect. Based on the better light-shielding effect of the data line on the main portion of the oxide channel layer, the oxide thin-film transistor in the display substrate will have better NBTIS performance, thereby improving the negative drift of the threshold voltage and thus improving the afterimage problem during the display process.

[0025] The display panel provided by the present invention includes the above-mentioned display substrate and has the same beneficial effects as the above-mentioned display substrate, which will not be described in detail.

[0026] The display device provided by the present invention includes the above-mentioned display panel and has the same beneficial effects as the above-mentioned display panel, which will not be described in detail. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0029] Figure 1 Schematic diagram of the structure of the display substrate in Example 1 of the present invention;

[0030] Figure 2 for Figure 1 The diagram shows a cross-sectional view of the layer structure of the display substrate;

[0031] Figure 3 for Figure 1 A schematic structural diagram of an alternative embodiment of the display substrate is shown;

[0032] Figure 4 for Figure 1 A schematic structural diagram of another alternative embodiment of the display substrate is shown;

[0033] Figure 5 for Figure 4 The diagram shows a cross-sectional view of the layer structure of the display substrate;

[0034] Figure 6 Schematic diagram of the structure of the display substrate in Example 2 of the present invention;

[0035] Figure 7 for Figure 6 The figure shows a schematic cross-sectional view of the layer structure of the display substrate.

[0036] In the picture:

[0037] 10-substrate; 11-underlay;

[0038] 20 - gate line; 21 - data line; 22 - oxide channel layer; 23 - transfer layer; 24 - pixel electrode; 25 - first via hole; 26 - second via hole; 27 - third via hole; 28 - light shielding layer;

[0039] 220-main body; 221-connecting part. DETAILED DESCRIPTION

[0040] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0041] Embodiments of the display substrate, display panel, and display device provided by the present invention are described below with reference to the accompanying drawings.

[0042] (1) Example 1 of Display Substrate

[0043] Figure 1Schematic diagram of the structure of the display substrate in Example 1 of the present invention; Figure 2 For the Figure 1 The dashed line is a schematic cross-sectional view of the layer structure of the display substrate (excluding the pixel electrode 24 and the third via hole 27). Figure 1 and Figure 2 The display substrate provided in this embodiment includes a substrate 10 and structures such as a substrate 11, a gate line 20, a data line 21 and an oxide thin film transistor formed on the substrate 10.

[0044] The oxide thin film transistor has an oxide channel layer 22, which includes a main portion 220 and a connecting portion 221. The projection of the main portion 220 of the oxide channel layer 22 on the data line 21 is located within the data line 21, and the connecting portion 221 of the oxide channel layer 22 extends from the main portion 220 to the opening area on the display substrate.

[0045] The projection of the main portion 220 of the oxide channel layer 22 onto the data line 21 is located within the data line 21. In other words, the main portion 220 of the oxide channel layer 22 overlaps with the data line 21 in a direction perpendicular to the substrate 10. In this case, the data line 21 can shield the main portion 220 of the oxide channel layer 22 from light. Moreover, since the data line 21 generally extends longitudinally, it can completely shield and wrap the main portion 220 of the oxide channel layer 22 in the longitudinal direction and across the entire longitudinal area of ​​the oxide channel layer 22, thereby achieving a better light-shielding effect. Therefore, in this embodiment, based on the better light-shielding effect of the data line 21 on the main portion 220 of the oxide channel layer 22, the oxide thin-film transistor in the display substrate will have better NBTIS performance.

[0046] At the same time, based on the shading effect of the data line 21 on the main part 220 of the oxide channel layer 22, a separate shading layer does not need to be set in the display substrate, thereby avoiding the loss of the aperture ratio of the display substrate caused by setting a separate shading layer, thereby improving the aperture ratio of the display substrate.

[0047] The connection portion 221 of the oxide channel layer 22 extends from the main body 220 to the opening region of the display substrate, and forms a connection with a related layer structure in the opening region, for example, the transfer layer 23 or the pixel electrode 24 .

[0048] In this embodiment, the oxide channel layer 22 is located above the data line 21, and an insulating layer is formed between the oxide channel layer 22 and the data line 21. A first via hole 25 is formed in the insulating layer, and the main portion 220 of the oxide channel layer 22 is connected to the data line 21 through the first via hole 25.

[0049] In this embodiment, the projection of a portion of the main portion 220 of the oxide channel layer 22 onto the gate line 20 is located within the gate line 20. In other words, the main portion 220 of the oxide channel layer 22 overlaps with the gate line 20 in a direction perpendicular to the substrate 10. That is, at least a portion of the main portion 220 of the oxide channel layer 22 is located in the region where the gate line 20 and the data line 21 overlap. For the portion of the main portion 220 of the oxide channel layer 22 located in the region where the gate line 20 and the data line 21 overlap, both the gate line 20 and the data line 21 can shield light from the main portion 220 of the oxide channel layer 22, and shield light from the main portion 220 of the oxide channel layer 22 in different directions. This can achieve a better light shielding effect, thereby enabling the oxide thin film transistor in the display substrate to have better NBTIS performance.

[0050] Furthermore, if Figure 3 As shown, the data line 21 has a protrusion in the area where it overlaps the gate line 20, and the protrusion is in a protruding shape along the extending direction of the gate line 20. In other words, the data line 21 has a wider width in the area where it overlaps the gate line 20, which can provide a better light shielding effect for the oxide channel layer 22, further improving the NBTIS performance of the oxide thin film transistor in the display substrate.

[0051] The display substrate further includes a pixel electrode 24, which is disposed in the opening region. In this embodiment, the pixel electrode 24 and the oxide channel layer 22 (specifically, the connection portion 221 of the oxide channel layer 22) can be directly connected. Specifically, as Figure 4 and Figure 5 As shown, Figure 4 for Figure 1 A schematic structural diagram of another alternative embodiment of the display substrate is shown; Figure 5 For the Figure 4 The dashed line shown is a schematic cross-sectional view of the layer structure of the display substrate; a layer structure is provided between the pixel electrode 24 and the oxide channel layer 22, and a second via hole 26 is provided in the layer structure between the pixel electrode 24 and the oxide channel layer 22. When the pixel electrode 24 is patterned, the material of the pixel electrode 24 is formed within the second via hole 26, thereby achieving a connection between the formed pixel electrode 24 and the connecting portion 221 of the oxide channel layer 22 through the second via hole 26.

[0052] In addition, the pixel electrode 24 and the oxide channel layer 22 may be indirectly connected via other structures. Figure 1 、 Figure 2 and Figure 3As shown, a transfer layer 23 can be formed between the pixel electrode 24 and the oxide channel layer 22. The transfer layer 23 is disposed in the opening region and can conduct electrical signals. An insulating layer or other layer structure is formed between the transfer layer 23 and the oxide channel layer 22, and an insulating layer or other layer structure is also formed between the transfer layer 23 and the pixel electrode 24. A second via 26 is formed in the layer structure between the transfer layer 23 and the oxide channel layer 22. When the transfer layer 23 is patterned, the material of the transfer layer 23 is formed within the second via 26, thereby establishing a connection between the transfer layer 23 and the connecting portion 221 of the oxide channel layer 22. A third via 27 is formed in the layer structure between the transfer layer 23 and the pixel electrode 24. When the pixel electrode 24 is patterned, the material of the pixel electrode 24 is formed within the via, thereby establishing a connection between the pixel electrode 24 and the transfer layer 23. Thus, the connection between the oxide channel layer 22 and the pixel electrode 24 is achieved through the transfer layer 23 .

[0053] Furthermore, the transfer layer 23 can be made of a transparent material. Compared to a transfer layer 23 formed of a non-transparent material, this configuration increases the area of ​​the display substrate that can transmit light, thereby improving the aperture ratio of the display substrate. Specifically, the transfer layer 23 can be an ITO (indium tin oxide) transfer layer, that is, the material of the transfer layer 23 can be ITO.

[0054] In this embodiment, the distance between the edge of the oxide channel layer 22 and the edge of the data line 21 ranges from 0 to 2 microns. That is, the width of the data line 21, even at its narrowest, is equal to the width of the oxide channel layer 22. No area on the oxide channel layer 22 protrudes beyond the edge of the data line 21, thereby completely wrapping the oxide channel layer 22 with the data line 21. Generally, the width of the data line 21 can be set to be greater than the width of the oxide channel layer 22 to achieve better wrapping and light shielding effects.

[0055] In this embodiment, specifically, the width of the gate line 20 ranges from 1 to 5 microns. The width of the main portion 220 of the oxide channel layer 22 ranges from 0.5 to 3 microns, and the width of the data line 21 ranges from 0.5 to 3 microns. The widths of the data line 21 and the main portion 220 of the oxide channel layer 22 are selected within the aforementioned ranges. Furthermore, the selected values ​​meet the following requirements: the width of the data line 21 is no less than the width of the main portion 220 of the oxide channel layer 22, and the width of the main portion 220 of the data line 21 protruding from the oxide channel layer 22 on a single edge is no more than 2 microns. For example, the width of the main portion 220 of the oxide channel layer 22 is selected to be 1 micron, and the width of the data line 21 is selected to be 3 microns. At this time, the width of the data line 21 can meet the requirement of completely covering and wrapping the main portion 220 of the oxide channel layer 22, and the width of the data line 21 can protrude from the main portion 220 of the oxide channel layer 22 on a single edge to a value of 1 micron (calculated based on the equal values ​​of the protrusions on both sides of the edges. If the values ​​of the protrusions on both sides are not equal, the value of the protrusion on one side of the edge can be close to 2 microns).

[0056] (2) Example 2 of Display Substrate

[0057] In this embodiment, the display substrate also includes structures such as gate lines 20, data lines 21 and oxide thin film transistors. For the sake of simplicity, the similarities between the structures such as the gate lines 20, data lines 21 and oxide thin film transistors in this embodiment and the structures such as the gate lines 20, data lines 21 and oxide thin film transistors in the above-mentioned embodiment 1 are not repeated.

[0058] Only the differences between this embodiment and the above-mentioned embodiment 1 are described in detail below.

[0059] In this embodiment, if Figure 6 and Figure 7 As shown, Figure 6 Schematic diagram of the structure of the display substrate in Example 2 of the present invention; Figure 7 For the Figure 6 The dashed line shows a schematic cross-sectional view of the layer structure of the display substrate (excluding the pixel electrode 24 and the third via 27). The display substrate further includes a light shielding layer 28 disposed along the gate line 20 and below the oxide channel layer 22.

[0060] Providing a separate light shielding layer 28 can further enhance the light shielding effect of the oxide channel layer 22 on the basis of the above-mentioned embodiment 1, thereby further improving the NBTIS performance of the oxide thin film transistor in the display substrate.

[0061] The width of the light shielding layer 28 is no less than the width of the gate line 20, so that the projection of the gate line 20 on the light shielding layer 28 does not extend beyond the light shielding layer 28. In other words, the width of the light shielding layer 28 is greater than the width of the gate line 20. Due to the presence of the portion of the light shielding layer 28 protruding from the gate line 20, this configuration reduces the aperture ratio of the display panel. However, when the light shielding layer 28 is wider, the light shielding layer 28 provides a better light shielding effect on the oxide channel layer 22. Specifically, the distance between the edge of the gate line 20 and the edge of the light shielding layer 28 ranges from 0 to 3 microns.

[0062] In this embodiment, the light shielding layer 28 is further connected to the gate drive circuit (GOA unit) in the non-display area of ​​the display substrate. The light shielding layer 28 is usually made of a conductive metal material. By connecting the light shielding layer 28 to the gate drive circuit, the light shielding layer 28 can actually serve as a gate line 20, thereby forming a dual-gate structure in the display substrate together with the gate line 20. This can increase the turn-on current I of the oxide thin film transistor in the display substrate. on , thereby improving the pixel charging rate.

[0063] In summary, the display substrate provided by the present invention has an oxide channel layer 22 in its oxide thin film transistor having a main portion 220 and a connecting portion 221, wherein the projection of the main portion 220 of the oxide channel layer 22 on the data line 21 is located within the data line 21. In other words, the main portion 220 of the oxide channel layer 22 overlaps with the data line 21 in a direction perpendicular to the substrate. In this case, the data line 21 can play a role in shielding the main portion 220 of the oxide channel layer 22; and the data line 21 generally extends in the longitudinal direction, which can completely shield and wrap the main portion 220 of the oxide channel layer 22 in the longitudinal direction and in the entire longitudinal area of ​​the oxide channel layer 22, thereby achieving a better light shielding effect. Based on the better light shielding effect of the data line 21 on the main portion 220 of the oxide channel layer 22, the oxide thin film transistor in the display substrate will have better NBTIS performance, thereby improving the negative drift of the threshold voltage and thus improving the afterimage problem during the display process.

[0064] (3) Embodiments of Display Panel

[0065] In this embodiment, the display panel includes the display substrate described in the above embodiment of the display substrate.

[0066] The display panel provided in this embodiment includes the display substrate described in the above embodiment and has the same beneficial effects as the above display substrate, which will not be described in detail.

[0067] (4) Embodiments of Display Device

[0068] In this embodiment, the display device includes the display panel described in the above embodiment of the display panel.

[0069] The display device in this embodiment can be various devices with display functions, such as a mobile phone, a tablet computer, a smart terminal, a television, a laptop computer, and a car display screen.

[0070] The display device provided in this embodiment includes the display panel described in the above embodiment and has the same beneficial effects as the above display panel, which will not be described in detail.

[0071] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0072] The foregoing description is intended only to provide specific embodiments of the present invention, which will enable those skilled in the art to understand and implement the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not intended to be limited to the embodiments shown herein, but is intended to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A display substrate, characterized in that: The display substrate includes gate lines, data lines and oxide thin film transistors; The oxide thin film transistor has an oxide channel layer, the oxide channel layer includes a main portion and a connecting portion, the projection of the main portion of the oxide channel layer on the data line is located within the data line, and the connecting portion of the oxide channel layer extends from the main portion to the opening area on the display substrate; The oxide channel layer is located above the data line, and an insulating layer is formed between the oxide channel layer and the data line; A first via hole is formed on the insulating layer, and the main body of the oxide channel layer is connected to the data line through the first via hole; The display substrate further includes a light shielding layer, which is arranged along the gate line direction and is located below the oxide channel layer; The light shielding layer is connected to the gate driving circuit in the non-display area of ​​the display substrate.

2. The display substrate according to claim 1, wherein: A projection of a partial area of ​​the main body of the oxide channel layer on the gate line is located within the gate line.

3. The display substrate according to claim 1, wherein The width of the gate line is in the range of 1 to 5 micrometers.

4. The display substrate according to claim 1, wherein The width of the data line is in the range of 0.5 to 3 micrometers, and the width of the main body of the oxide channel layer is in the range of 0.5 to 3 micrometers.

5. The display substrate according to claim 1, wherein The distance between the edge of the oxide channel layer and the edge of the data line is in the range of 0 to 2 micrometers.

6. The display substrate according to claim 2, wherein: A region where the data line and the gate line overlap has a protrusion, and the protrusion is in a protruding shape along the extending direction of the gate line.

7. The display substrate according to claim 1, wherein: The display substrate further includes a pixel electrode, and the pixel electrode is arranged in the opening area; A layer structure is provided between the pixel electrode and the oxide channel layer. A second via hole is provided on the layer structure between the pixel electrode and the oxide channel layer. The connecting portion of the pixel electrode and the oxide channel layer is connected through the second via hole.

8. The display substrate according to claim 1, wherein: The display substrate further includes a pixel electrode and a transfer layer, wherein the pixel electrode and the transfer layer are arranged in the opening area; There is a layer structure between the transfer layer and the oxide channel layer, a second via hole is formed on the layer structure between the transfer layer and the oxide channel layer, and a connecting portion of the transfer layer and the oxide channel layer is connected through the second via hole; A layer structure is formed between the pixel electrode and the switching layer. A third via hole is formed on the layer structure between the pixel electrode and the switching layer. The pixel electrode and the switching layer are connected through the third via hole.

9. The display substrate according to claim 8, wherein: The transfer layer is made of transparent material.

10. The display substrate according to claim 9, wherein: The transfer layer is ITO.

11. The display substrate according to claim 1, wherein The width of the light shielding layer is not less than the width of the gate line, so that the projection of the gate line on the light shielding layer does not exceed the light shielding layer.

12. The display substrate according to claim 11, wherein: The distance between the edge of the gate line and the edge of the light shielding layer is in the range of 0 to 3 micrometers.

13. A display panel, characterized in that: The display panel includes the display substrate according to any one of claims 1 to 12.

14. A display device, characterized in that: The display device includes the display panel according to claim 13.

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