Control device and method for adjusting thermal stress

Abstract

The present invention provides a control device and method for adjusting thermal stress. The control device includes a monitor and a controller. The monitor monitors temperatures of a plurality of semiconductor switching devices and provides a temperature difference between two of the semiconductor switching devices. The controller provides a zero sequence component based on the temperature difference, the zero sequence component being used to adjust a turn-on duration of each of the semiconductor switching devices.

Description

Technical Field

[0001] This invention relates to managing thermal stress in multiphase voltage source inverter circuits, and more particularly to reducing unbalanced stress in the switching of multiphase voltage source inverter circuits. Background Technology

[0002] In electric vehicles or hybrid vehicles, electric motors drive the wheels. When the vehicle is stopped on an uphill slope, the electric motor provides a torque with a frequency equal to or close to zero, thus keeping the vehicle stationary; this is known as hill-hold operation. A traction inverter is typically used to drive the electric motor. Figure 1 This is a schematic diagram of the circuit architecture for a three-phase voltage source inverter 100 to drive an electric motor 106, wherein the three-phase voltage source inverter 100 can be used as a traction inverter.

[0003] like Figure 1 As shown, the power module (or power stage) 101 of the three-phase voltage source inverter 100 includes a DC-side capacitor 102 and switches 103-1 to 103-6, wherein the DC-side capacitor 102 serves as a voltage source. Each of the switches 103-1 to 103-6 may include an IGBT (insulated-gate bipolar transistor) and a diode, wherein the diode is connected across the emitter and collector of the IGBT in reverse polarity. Each of the switches 103-1 to 103-6 may also be other suitable semiconductor elements, such as a MOSFET (metal-oxide-semiconductor field-effect transistor). Terminals 104-1 (the common point between switches 103-1 and 103-2), 104-2 (the common point between switches 103-3 and 103-4), and 104-3 (the common point between switches 103-5 and 103-6) provide three output phase currents, denoted as phases A, B, and C, respectively. For ease of explanation, switches 103-1, 103-3, and 103-5 will be referred to as "upper switches" and switches 103-2, 103-4, and 103-6 as "lower switches."

[0004] During ramp-up operation, the output phase current (e.g., DC current or low-frequency AC current) with a frequency equal to or approximately zero will increase the stress on the three-phase voltage source inverter 100. Typically, the period of the output current of each phase is greater than the thermal time constant of the power module 101 of the three-phase voltage source inverter 100. To perform ramp-up operation, the modulation method used in the three-phase voltage source inverter 100 can be, for example, SVPWM (space vector pulse-width modulation) or DPWM (discontinuous pulse-width modulation). However, regardless of the modulation method used, switches 103-1 to 103-6 are subjected to unbalanced thermal stress.

[0005] Figure 2 The diagram shows the positive output phase current modulated by SVPWM and originating from terminal 104-1 (i.e., phase A). In SVPWM, the upper and lower switches in each phase are driven by complementary signals. Accordingly, as... Figure 2 As shown, the IGBT of switch 103-1 is in the ON state, while the IGBT of switch 103-2 is in the OFF state. When the IGBT of switch 103-2 is in the OFF state, the diode of switch 103-2 is forward-biased, causing the output phase current of phase A supplied by terminal 104-1 to flow into the electric motor 106. The positive phase current can support the torque with a frequency equal to or approximately zero during ramp-fixed operation. In this example, the output phase current of phase A is greater than the output phase current of phase B or C. Figure 3 The on-time of switches 103-1, 103-3 and 103-5 under SVPWM is shown. When the on-time is a proportion of the total time, it can be regarded as the duty cycle. The duty cycles of switches 103-1, 103-3 and 103-5 are 301, 302 and 303 respectively.

[0006] like Figure 3 As shown, the duty cycle of phase A (i.e., duty cycle 301) is d, which is greater than the duty cycle of phase B or C (i.e., duty cycle 302 or 303). During ramp fixing operations, as... Figure 2 As shown, the energy loss of the IGBT attributable to the switch (e.g., switch 103-1) is equal to the sum of its conduction loss and switching loss, i.e., equal to V. CE_IGBT ×I A ×d+P SW_IGBT V CE_IGBT I represents the voltage drop between the collector and emitter terminals of the IGBT. A Where d is the phase current (e.g., 300A), d is the duty cycle, and P is the phase current. SW_IGBT This refers to the switching losses of the IGBT. For example... Figure 2As shown, in each phase, when the IGBT of any switch (e.g., lower switch 103-2) is in the off state, the positive current is carried by the diode of the switch. Therefore, the conduction and switching losses in the diode are equal to V f_diode x I A x (1 - d) + P SW_diode where V f_diode is the voltage drop of the diode of the switch during conduction, and PSW diode is the switching loss of the diode. In this example, if the duty cycle of the switches in phase A is greater than the duty cycle of the switches in phase B or C, the switches (i.e., switches 103-1 and 103-2) in phase A will have greater losses and, thus, will experience greater thermal stress. Furthermore, in each phase, if the currents through the upper and lower switches are not equal, the upper and lower switches will also experience unbalanced thermal stress.

[0007] Even though DPWM is substantially different from SVPWM, the problem of unbalanced thermal stress generated when using SVPWM will also occur in applications using DPWM. SUMMARY

[0008] It is an object of the present application to provide a control device and method for use in a multiphase voltage source inverter and configured to balance the thermal stress in the semiconductor switching devices of the multiphase voltage source inverter.

[0009] To achieve the above object, the present application provides a control device for adjusting thermal stress, the control device comprising a monitor and a controller. The monitor is configured to monitor the temperatures of a plurality of semiconductor switching devices and to provide a temperature difference between two of the semiconductor switching devices. The controller is configured to provide a zero sequence component based on the temperature difference, the zero sequence component being used to adjust the conduction time of each of the semiconductor switching devices.

[0010] In some embodiments, the temperature difference is between the upper and lower switches in any phase of the multiphase voltage source inverter, and one of the switches corresponding to the temperature difference has the highest temperature among all the semiconductor switching devices.

[0011] In some embodiments, the multiphase voltage source inverter can be a three-phase voltage source inverter.

[0012] In some embodiments, the conduction time of any semiconductor switching device can be adjusted by increasing or decreasing the duty cycle of the semiconductor switching device.

[0013] In some embodiments, any phase of the multiphase voltage source inverter can provide an output phase signal having a frequency equal to or approximately equal to zero.

[0014] In some embodiments, the output phase signal comprises an output phase current, and the magnitude of the output phase current is substantially unaffected by the zero sequence component.

[0015] To achieve the above object, the present application provides a control method for balancing thermal stress among a plurality of semiconductor switching devices. The control method comprises: (a) monitoring temperatures of all semiconductor switching devices and providing a temperature difference between two of the semiconductor switching devices; and (b) providing a zero sequence component for adjusting a turn-on duration of each semiconductor switching device according to the temperature difference. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 Circuit architecture diagram for driving a motor 106 with a three-phase voltage source inverter 100, which can be used as a traction inverter.

[0017] Figure 2 A positive output phase current provided by the end point 104-1 (i.e., phase A) is shown modulated with SVPWM.

[0018] Figure 3 The turn-on durations (i.e., duty cycles 301, 302 and 303) of the switches 103-1, 103-3 and 103-5 under SVPWM are shown.

[0019] Figure 4 Circuit architecture diagram of the control circuit 400 of the preferred embodiment of the present application, in which there is a temperature difference between the upper and lower switches in the phase providing the maximum output phase current, according to which the control circuit 400 can actively balance thermal stress among all switches in a multi-phase voltage source inverter by performing a method.

[0020] Figure 5 Adjusting the duty cycles d A , d B and d C (i.e., d Figure 3 ) in SVPWM by the zero sequence component Δd to provide adjusted duty cycles d A + Δd, d B + Δd and d C + Δd in the duty cycle signals 501, 502 and 503, respectively.

[0021] Figure 6 Related waveform diagram for implementing ramp hold operation (with torque of 0 Hz) of a motor with a three-phase voltage source inverter in the preferred embodiment of the present application.

[0022] Figure 7 Related waveform diagram for implementing ramp hold operation with an output frequency of 0.1 Hz with a three-phase voltage source inverter in the preferred embodiment of the present application.

[0023] REFERENCE SIGNS:

[0024] 100: three-phase voltage source inverter

[0025] 106: electric motor

[0026] 101: power module

[0027] 102: DC side capacitor

[0028] 103-1, 103-2, 103-3, 103-4, 103-5, 103-6: switch

[0029] 104-1, 104-2, 104-3: terminal

[0030] A, B, C: phase

[0031] 301, 302, 303, d, d A , d B , d C : duty cycle

[0032] 501, 502, 503: duty cycle signal

[0033] Ad: zero sequence component

[0034] 400: control circuit

[0035] 401: temperature monitoring and phase selection circuit

[0036] 402: operator

[0037] 403: controller

[0038] 404: adder

[0039] 405: motor control circuit

[0040] 407: temperature signal

[0041] 601, 602: duty cycle waveform

[0042] 611, 612, 701, 702, 703, 704, 705, 706: temperature waveform

[0043] t0, t1, t2, t3: time DETAILED DESCRIPTION

[0044] Some exemplary embodiments embodying features and advantages of the present application are described in detail in the following description. It should be understood that the application can be practiced in a variety of embodiments other than those noted and that the description and drawings should be considered as illustrative only and not as limiting the scope of the application.

[0045] In one embodiment of the present invention, in a multiphase voltage source inverter operating at an output frequency close to zero, there is a temperature difference between the upper and lower switches in the phase that provides the maximum output phase current. Based on this temperature difference, the control circuit can actively balance the thermal stress on all switches in the multiphase voltage source inverter by executing a method (the control method of the present invention). Figure 4 For three-phase voltage source inverters (e.g.) Figure 1 The diagram shows the circuit architecture of the control circuit 400 executing this method in the three-phase voltage source inverter 100 shown. In the three-phase voltage source inverter, its switches are controlled by corresponding duty cycle signals, and the control circuit 400 performs zero-sequence adjustment for each duty cycle signal. For each duty cycle signal (i.e., the duty cycle d corresponding to phases A, B, and C respectively),... A d B and d C The zero-order adjustment is performed by adder 404. Figure 4 In this circuit, the preset duty cycle signal can be provided, for example, by a conventional motor control circuit 405.

[0046] like Figure 4 As shown, the control circuit 400 receives multiple temperature signals 407 from the temperature sensor, but is not limited to this; it can also obtain the temperature signals 407 through estimation. Each temperature signal 407 represents the temperature of one of the switches in the three-phase voltage source inverter. The temperature monitoring and phase selection circuit 401 receives and monitors these temperature signals 407, and selects the phase of the switch with the highest temperature based on these temperature signals 407. In the selected phase, the temperature difference between the upper and lower switches is calculated by the arithmetic unit 402 and provided to the controller 403, where the controller 403 can be any suitable proportional controller or proportional-integral controller. The controller 403 provides a zero-sequence component Δd, and as... Figure 4 As shown, the zero-sequence component Δd is compared with each duty cycle d A d B and d C Add them together.

[0047] Figure 5 This demonstrates how the duty cycle d is adjusted using the zero-sequence component Δd. A d B and d C( Right now Figure 3 The duty cycles 301, 302, and 303 in the signal are used to provide the adjusted duty cycle d in the duty cycle signals 501, 502, and 503, respectively. A +Δd、d B +Δd and d C +Δd. For example... Figure 5As shown, the zero-sequence component Δd can be positive or negative, corresponding to increasing or decreasing the duty cycle. This method allows adjustment of the on-time of the existing upper and lower switches in each phase, thereby adjusting the thermal stress of each switch. As is well known to those skilled in the art, the output phase current can be maintained constant even when adjusting each phase using the zero-sequence component.

[0048] Figure 6 This is a schematic diagram of the relevant waveforms when a three-phase voltage source inverter is used to realize the fixed operation of an electric motor on a ramp (with a torque of 0Hz) in a preferred embodiment of the present invention. Figure 6 Part (a) shows the duty cycles of the upper switches in phases A, B and C of the three-phase voltage source inverter, where waveform 601 represents the duty cycle of the upper switch in phase A and waveform 602 represents the duty cycles of the upper switches in phases B and C. Figure 6 Part (b) shows the temperatures 611 and 612 of the upper and lower switches in phase A over the same duration. Figure 6 Section (c) shows the output phase current of phase A during the same duration.

[0049] like Figure 6 As shown, initially at time t0, the duty cycle of phase A is 0.55, and the peak value of the output phase current of phase A is 300A. The duty cycles of phases B and C are both 0.45. Due to the influence of the duty cycle of each phase, and because the output phase current of phase A is positive, the current flowing through the IGBT of the upper switch in phase A is larger than that of other switches in the three-phase voltage source inverter, resulting in greater thermal stress on the upper switch of phase A. Therefore, as... Figure 6 As shown in section (b), at time t0, temperature 611 (i.e., the temperature of the upper switch in phase A) is 30°C higher than temperature 612 (i.e., the temperature of the lower switch in phase A). Then, at time t1, approximately 1.2 seconds after time t0, the control method of the present invention reduces the duty cycle of the upper switches in all phases by the same amount. Because the current flowing through the IGBTs of the upper switches in phase A decreases, the temperatures of the upper and lower switches in phase A approach each other (the temperature difference approaches zero), and the highest temperature of the upper switches in phase A decreases from 95°C to 80°C. Then, at time t2, the control method of the present invention is stopped, causing the temperature difference between the upper and lower switches in phase A to widen again and return to 30°C. At time t3, the control method of the present invention is executed again. As expected, during the execution of the control method of the present invention (i.e., between times t1 and t2), no change occurs in the output phase current of phase A.

[0050] Figure 7 This is a schematic diagram of the relevant waveforms in a preferred embodiment of the present invention, showing the operation of a ramp with an output frequency of 0.1Hz using a three-phase voltage source inverter. In this embodiment, as...Figure 7 The peak value of the output phase current of phase A is also 300 A (and Figure 6 The peak value of the output phase current of phase A is also 300 A (and Figure 7 Part (a) of FIG. 10 shows the temperatures of the six switches in a three-phase voltage source inverter, in which the temperatures of the six switches reach their respective peak values at specified times. In each phase, when the temperature of the upper switch reaches a peak value, the temperature of the lower switch also reaches a peak value, and at this time the temperature of the lower switch is 30°C lower than the temperature of the upper switch. As shown in part (a) of FIG. 10, at time tl, the control method of the present application is performed, thereby reducing the difference between the peak temperatures of the upper and lower switches, and thereby balancing the stresses of the upper and lower switches. In addition, as shown in part (b) of FIG. 10, during the performance of the control method of the present application, the output phase current of phase A does not change as a result. Figure 7 Figure 7

[0051] Compared with the prior art using SVPWM and DPWM, the control method of the present application can actively balance the thermal stresses of the upper and lower switches in each phase, and the reduced thermal stresses can prolong the service life of the switches of the multi-phase voltage source inverter. In addition, the control method of the present application can improve the output torque in the slope fixation operation.

[0052] It should be noted that the above merely illustrates the preferred embodiments of the present application, and the present application is not limited to the described embodiments, and the scope of the present application is determined by the appended claims. The present application can be modified in various ways by those skilled in the art without departing from the protection scope of the appended claims.​​

Claims

1. A control device for balancing the thermal stress of multiple semiconductor switching devices in a multiphase voltage source inverter, comprising: A monitor is used to monitor the temperature of the plurality of semiconductor switching devices, select one phase of the multiphase voltage source inverter, and provide a temperature difference between two of the semiconductor switching devices in the phase, wherein the phase is associated with the semiconductor switching device with the highest temperature among the plurality of semiconductor switching devices. A controller provides a zero-sequence component based on the temperature difference, wherein the zero-sequence component is used to adjust the on-time of the plurality of semiconductor switching devices.

2. The control device as claimed in claim 1, wherein the temperature difference is the temperature difference between an upper switch and a lower switch in the phase.

3. The control device of claim 1, wherein one of the semiconductor switching devices corresponding to the temperature difference has the highest temperature among the plurality of semiconductor switching devices monitored by the monitor.

4. The control device as described in claim 1, wherein the multiphase voltage source inverter may be a three-phase voltage source inverter.

5. The control device of claim 1, wherein the on-time of the semiconductor switching device can be adjusted by increasing or decreasing the duty cycle of any of the semiconductor switching devices.

6. The control device of claim 1, wherein any phase of the multiphase voltage source inverter can provide an output phase signal having a frequency of not more than 0.1 Hz.

7. The control device of claim 6, wherein the output phase signal includes an output phase current, and the magnitude of the output phase current is substantially unaffected by the zero-sequence component.

8. A control method for balancing the thermal stress of multiple semiconductor switching devices in a multiphase voltage source inverter, comprising: Monitor the temperature of the plurality of semiconductor switching devices, select one phase of the multiphase voltage source inverter, and provide a temperature difference between two of the semiconductor switching devices in that phase, wherein the phase is associated with the semiconductor switching device with the highest temperature among the plurality of semiconductor switching devices; and A zero-sequence component is provided based on the temperature difference, wherein the zero-sequence component is used to adjust the on-time of each semiconductor switching device.

9. The control method of claim 8, wherein the temperature difference is the temperature difference between an upper switch and a lower switch in the phase.

10. The control method of claim 8, wherein one of the semiconductor switching devices corresponding to the temperature difference has the highest temperature among the monitored plurality of semiconductor switching devices.

11. The control method as described in claim 8, wherein the multiphase voltage source inverter may be a three-phase voltage source inverter.

12. The control method of claim 8, wherein the on-time of the semiconductor switching device can be adjusted by increasing or decreasing the duty cycle of any of the semiconductor switching devices.

13. The control method of claim 8, wherein any phase of the multiphase voltage source inverter can provide an output phase signal with a frequency not greater than 0.1 Hz.

14. The control method of claim 13, wherein the output phase signal includes an output phase current, and the magnitude of the output phase current is substantially unaffected by the zero-sequence component.

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