Fingerprint collection device and display panel

Abstract

The application discloses a fingerprint collection device and a display panel. The fingerprint collection device comprises a substrate, a driving circuit layer, a first passivation layer, a photodiode, a second passivation layer and an electrode layer. The driving circuit layer comprises a control transistor and a plurality of signal traces, and the plurality of signal traces comprises a first signal trace and a second signal trace. The photodiode is electrically connected with the control transistor through a first via. The first electrode part of the electrode layer is electrically connected with the photodiode through a second via. Compared with the prior art, the first signal trace and the second signal trace are electrically connected through a via penetrating a gate insulating layer. In the application, the second electrode part of the electrode layer is electrically connected with the first signal trace and the second signal trace through a third via and a fourth via respectively to form a bridging structure. The third via and the fourth via are prepared through the same process as the second via. Therefore, one process can be saved, and the cost can be saved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a fingerprint acquisition device and a display panel. Background Technology

[0002] With the rapid development of the panel industry, in addition to requirements for high resolution, wide viewing angle, and low power consumption, enriching panel functions and increasing human-computer interaction are among the main development directions for display panels. Optical fingerprint recognition utilizes the difference in light reflection between the ridges and valleys of a finger to convert light signals into electrical signals, achieving fingerprint identification. However, current fingerprint acquisition devices involve numerous manufacturing processes, resulting in high costs. Summary of the Invention

[0003] This invention provides a fingerprint acquisition device and a display panel to solve the technical problem that existing fingerprint acquisition devices have many manufacturing processes, resulting in high costs.

[0004] To solve the above problems, the technical solution provided by the present invention is as follows:

[0005] This invention provides a fingerprint acquisition device, comprising:

[0006] Substrate;

[0007] A driving circuit layer is disposed on one side of the substrate. The driving circuit layer includes a control transistor and multiple signal traces. The control transistor includes a gate, a gate insulating layer, an active layer and a source drain metal layer stacked sequentially in a direction away from the substrate. The multiple signal traces include a first signal trace disposed in the same layer as the gate and a second signal trace disposed in the same layer as the source drain metal layer.

[0008] A first passivation layer is applied to the side of the driving circuit layer away from the substrate.

[0009] A photodiode is disposed on the side of the first passivation layer away from the substrate, and the photodiode is electrically connected to the control transistor through a first via penetrating the first passivation layer;

[0010] A second passivation layer is applied to the side of the photodiode away from the substrate; and

[0011] An electrode layer is disposed on the side of the second passivation layer away from the substrate. The electrode layer includes a first electrode portion and a second electrode portion. The first electrode portion is electrically connected to the photodiode through a second via penetrating the second passivation layer. The second electrode portion is electrically connected to the first signal trace and the second signal trace through a third via and a fourth via, respectively, to form a bridging structure. The third via penetrates the second passivation layer, the first passivation layer, and the gate insulating layer. The fourth via penetrates the second passivation layer and the first passivation layer.

[0012] According to the fingerprint acquisition device provided by the present invention, the active layer is made of amorphous silicon; the control transistor further includes an ohmic contact layer, which is disposed on the side of the active layer away from the substrate.

[0013] According to the fingerprint acquisition device provided by the present invention, the fingerprint acquisition device further includes a light-shielding layer, which is disposed on the side of the first passivation layer away from the substrate and is disposed corresponding to the control transistor; the light-shielding layer is disposed on the same layer as the photodiode.

[0014] According to the fingerprint acquisition device provided by the present invention, the light-shielding layer includes at least a first light-shielding layer and a second light-shielding layer stacked in sequence, and the photodiode includes at least a first semiconductor layer and an intrinsic semiconductor layer stacked in sequence; the first light-shielding layer and the first semiconductor layer are disposed on the same layer, and the second light-shielding layer and the intrinsic semiconductor layer are disposed on the same layer.

[0015] According to the fingerprint acquisition device provided by the present invention, the orthogonal projection of the light-shielding layer on the substrate covers the orthogonal projection of the active layer on the substrate.

[0016] In the fingerprint acquisition device provided by the present invention, the active layer is made of metal oxide.

[0017] According to the fingerprint acquisition device provided by the present invention, the electrode layer further includes a third electrode portion, and the driving circuit layer further includes a bonding terminal disposed on the same layer as the source and drain metal layers. The third electrode portion is electrically connected to the bonding terminal through a fifth via penetrating the second passivation layer.

[0018] This invention provides a display panel including the fingerprint acquisition device described above;

[0019] Optical path structure; and

[0020] The panel body has an optical path structure located on the non-display side of the panel body, and a fingerprint collection device located on the side of the optical path structure away from the panel body.

[0021] According to the display panel provided by the present invention, the fingerprint acquisition device includes a substrate, a driving circuit layer, a first passivation layer, a photodiode, a second passivation layer, and an electrode layer; wherein,

[0022] The substrate is located on the side of the optical path structure away from the panel body;

[0023] The driving circuit layer is located on the side of the substrate away from the panel body;

[0024] The first passivation layer covers the side of the driving circuit layer away from the panel body;

[0025] The photodiode is located on the side of the first passivation layer away from the panel body;

[0026] The second passivation layer covers the side of the photodiode away from the panel body; and

[0027] The electrode layer is located on the side of the second passivation layer away from the panel body.

[0028] According to the display panel provided by the present invention, the fingerprint acquisition device further includes a light-shielding layer, which is located on the side of the first passivation layer away from the panel body and is disposed corresponding to the control transistor of the driving circuit layer; the light-shielding layer is disposed on the same layer as the photodiode.

[0029] The beneficial effects of this invention are as follows: The fingerprint acquisition device and display panel provided by this invention include a substrate, a driving circuit layer, a first passivation layer, a photodiode, a second passivation layer, and an electrode layer. The first electrode portion of the electrode layer is electrically connected to the photodiode through a second via penetrating the second passivation layer. The driving circuit layer includes a control transistor and multiple signal traces. The first signal trace is disposed on the same layer as the gate of the control transistor, and the second signal trace is disposed on the same layer as the source and drain metal layers of the control transistor. Compared with the prior art where the first and second signal traces are electrically connected through vias penetrating the gate insulating layer, the second electrode portion of the electrode layer in this invention is electrically connected to the first and second signal traces through third and fourth vias respectively to form a bridging structure. The third via penetrates the second passivation layer, the first passivation layer, and the gate insulating layer, and the fourth via penetrates the second passivation layer and the first passivation layer. Since the third and fourth vias are formed in the same process as the second via, one process can be saved, which is beneficial for cost reduction. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a schematic cross-sectional view of the first fingerprint acquisition device provided in this embodiment of the invention;

[0032] Figure 2 This is a schematic cross-sectional view of the second fingerprint acquisition device provided in this embodiment of the invention;

[0033] Figure 3 This is a schematic diagram of a cross-sectional structure of a display panel provided in an embodiment of the present invention;

[0034] Figure 4 This is a flowchart of a method for preparing a fingerprint acquisition device according to an embodiment of the present invention;

[0035] Figures 4A to 4K This is a schematic diagram of the process structure of a fingerprint acquisition device fabrication method provided in an embodiment of the present invention.

[0036] Explanation of reference numerals in the attached figures:

[0037] 100. Fingerprint acquisition device; 200. Optical path structure; 300. Panel body;

[0038] 10. Substrate; 20. Driving circuit layer; 20a. Control transistor; 20b. Signal trace; 20c. Bridge structure; 30. First passivation layer; 40. Photodiode; 50. Light-shielding layer; 60. Second passivation layer; 70. Electrode layer; 701. First electrode portion; 702. Second electrode portion; 703. Third electrode portion; 201. Gate; 202. First signal trace; 203. Gate insulating layer; 204. Active layer; 205. Ohmic contact layer; 206. Source / drain metal layer; 207. Second signal trace; 208. Bonding terminal; 401. First semiconductor layer; 402. Intrinsic semiconductor layer; 501. First light-shielding layer; 502. Second light-shielding layer; 601. First via; 602. Second via; 603. Third via; 604. Fourth via; 605. Fifth via. Detailed Implementation

[0039] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Furthermore, it should be understood that the specific embodiments described herein are only for illustration and explanation of the present invention and are not intended to limit the present invention. In the present invention, unless otherwise stated, directional terms such as "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, specifically the drawing directions in the accompanying drawings; while "inner" and "outer" refer to the outline of the device.

[0040] Please see Figure 1 , Figure 1 This is a cross-sectional structural diagram of the first fingerprint acquisition device provided in this embodiment of the invention. The fingerprint acquisition device 100 provided in this embodiment includes a substrate 10, a driving circuit layer 20, a first passivation layer 30, a photodiode 40, a second passivation layer 60, and an electrode layer 70. The driving circuit layer 20 is disposed on one side of the substrate 10. The first passivation layer 30 covers the side of the driving circuit layer 20 away from the substrate 10. The photodiode 40 is disposed on the side of the first passivation layer 30 away from the substrate 10. The second passivation layer 60 covers the side of the photodiode 40 away from the substrate 10. The electrode layer 70 is disposed on the side of the second passivation layer 60 away from the substrate 10.

[0041] The driving circuit layer 20 includes a control transistor 20a and multiple signal lines 20b. The photodiode 40 is electrically connected to the control transistor 20a through a first via 601 penetrating the first passivation layer 30. The electrode layer 70 includes a first electrode portion 701, a second electrode portion 702, and a third electrode portion 703. The first electrode portion 701 is electrically connected to the photodiode 40 through a second via 602 penetrating the second passivation layer 60.

[0042] The control transistor 20a includes a gate 201, a gate insulating layer 203, an active layer 204, and a source-drain metal layer 206 stacked sequentially. The multiple signal traces include a first signal trace 202 disposed on the same layer as the gate 201 and a second signal trace 207 disposed on the same layer as the source-drain metal layer 206. The second electrode portion 702 is electrically connected to the first signal trace 202 and the second signal trace 207 through a third via 603 and a fourth via 604, respectively, to form a bridging structure 20c. The third via 603 penetrates the second passivation layer 60, the first passivation layer 30, and the gate insulating layer 203, and the fourth via 604 penetrates the second passivation layer 60 and the first passivation layer 30.

[0043] Compared to the prior art where the first signal trace 202 and the second signal trace 207 are electrically connected through vias penetrating the gate insulating layer 203, the present invention forms a bridging structure 20c by electrically connecting the second electrode portion 702 of the electrode layer 70 to the first signal trace 202 and the second signal trace 207 through the third via 603 and the fourth via 604, respectively. Since the third via 603 and the fourth via 604 are formed in the same process as the second via 602, one process can be saved, which is beneficial to cost reduction.

[0044] Specifically, the source-drain metal layer 206 includes a source and a drain. The negative terminal of the photodiode 40 is electrically connected to the drain, and the positive terminal of the photodiode 40 is grounded. The source can be electrically connected to the second signal trace 207, and the gate 201 of the control transistor 20a is electrically connected to the first signal trace 202. The first signal trace 202 can be a scan signal trace, and the second signal trace 207 can be a data signal trace. The first signal trace 202 needs to be connected to the second signal trace 207 via a jumper and then electrically connected to the driver chip (not shown in the figure). The driver chip transmits signals to the first signal trace 202 and the second signal trace 207.

[0045] When a finger presses the fingerprint acquisition device 100, the reflected light intensity of the valleys and ridges in the fingerprint is inconsistent, resulting in different voltage drops across the photodiode 40. Consequently, the photodiode 40 generates different current values. Based on these different current values, the fingerprint acquisition device 100 can identify the corresponding positions of the valleys and ridges, thus obtaining the fingerprint information of the subject.

[0046] For example, when the gate 201 of the control transistor 20a is turned on, a potential V1 is first charged to the negative terminal of the photodiode 40, and then the gate 201 of the control transistor 20a is turned off. At this time, the drain potential of the control transistor 20a is V1, and the photodiode 40 is in a reverse bias state. When a finger presses the surface of the fingerprint acquisition device 100, the reflected light from the valleys or ridges shines on the photodiode 40, and the photons cause the current value of the reverse biased photodiode 40 to change. Since the light intensity of the valleys and ridges is different, the change in current value is different. When the gate 201 of the photodiode 40 is turned on again, the drain of the control transistor 20a will output different current values. Finally, different current values ​​can be obtained by reading the second signal line 207, so as to identify the corresponding positions of the valleys and ridges, that is, to obtain the fingerprint information of the subject.

[0047] Optionally, the substrate 10 is a glass substrate. Compared with the fingerprint acquisition device 100 in the prior art which uses a single crystal silicon substrate 10, the cost of the glass substrate is reduced, which is beneficial to saving costs.

[0048] The photodiode 40 includes at least a first semiconductor layer 401 and an intrinsic semiconductor layer 402 stacked sequentially. The intrinsic semiconductor layer 402 is an undoped layer. Under reverse bias, the intrinsic semiconductor layer 402 is depleted, becoming a light absorption region, thus giving the photodiode 40 high quantum efficiency and a short response time. In this embodiment of the invention, the photodiode 40 includes the first semiconductor layer 401 and the intrinsic semiconductor layer 402. The first semiconductor layer 401 can be an N-type semiconductor layer. The material of the first semiconductor layer 401 is N+a-Si (amorphous silicon), and the material of the intrinsic semiconductor layer 402 is amorphous silicon a-Si.

[0049] In other embodiments, the photodiode 40 includes a first semiconductor layer 401, an intrinsic semiconductor layer 402, and a second semiconductor layer (not shown) stacked sequentially. The second semiconductor layer is disposed on the side of the intrinsic semiconductor layer 402 away from the substrate 10. The first semiconductor layer 401 is an N-type semiconductor layer, and the second semiconductor layer is a P-type semiconductor layer. The material of the first semiconductor layer 401 is N+a-Si (amorphous silicon), the material of the intrinsic semiconductor layer 402 is amorphous silicon a-Si, and the material of the second semiconductor layer is P+a-Si.

[0050] In existing fingerprint acquisition devices 100, a silicon substrate is used. This silicon substrate is typically external, and the fingerprint recognition area on the screen is only about the size of a thumb. Increasing the fingerprint recognition area would raise the cost of fingerprint recognition. In contrast, in this embodiment of the invention, the active layer 204 is made of amorphous silicon (a-Si), which can be fabricated over a large area on the display panel. It allows for selective opening of apertures in any area of ​​the screen to serve as fingerprint recognition areas, enabling both single-area and multi-area optical fingerprint recognition, and significantly reducing costs.

[0051] The control transistor 20a further includes an ohmic contact layer 205, which is disposed on the side of the active layer 204 away from the substrate 10, and is located between the active layer 204 and the source / drain metal layers 206. The material of the ohmic contact layer 205 may be N+a-Si, where N+a-Si refers to N-type doped a-Si material.

[0052] The electrode layer 70 is reused as a common electrode. The electrode layer 70 is a transparent electrode layer 70. The material of the electrode layer 70 includes ITO (Indium tin oxide).

[0053] It is understandable that, since amorphous silicon (a-Si) has a strong absorption of visible light, when visible light shines on the active layer 204, it will interfere with the active layer 204, causing the performance of the control transistor 20a to degrade, thereby affecting the sensitivity of the fingerprint acquisition device 100.

[0054] In view of this, in this embodiment of the invention, the fingerprint acquisition device 100 further includes a light-shielding layer 50, which is disposed on the side of the first passivation layer 30 away from the substrate 10 and is disposed corresponding to the control transistor 20a; the light-shielding layer 50 is disposed on the same layer as the photodiode 40. With this arrangement, the light-shielding layer 50 and the photodiode 40 can be formed by the same patterning process, thereby simplifying the manufacturing process of the fingerprint acquisition device 100 and helping to further reduce costs.

[0055] In this embodiment of the invention, the light-shielding layer 50 includes at least a first light-shielding layer 501 and a second light-shielding layer 502 stacked sequentially, and the photodiode 40 includes at least a first semiconductor layer 401 and an intrinsic semiconductor layer 402 stacked sequentially; the first light-shielding layer 501 and the first semiconductor layer 401 are disposed on the same layer, and the second light-shielding layer 502 and the intrinsic semiconductor layer 402 are disposed on the same layer. That is, the first light-shielding layer 501 and the first semiconductor layer 401 are formed by the same patterning process, and the second light-shielding layer 502 and the intrinsic semiconductor layer 402 are formed by the same patterning process. While achieving a light-shielding effect on the control transistor 20a, the manufacturing process of the fingerprint acquisition device 100 can be simplified, which is beneficial to further reduce costs.

[0056] Specifically, the first light-shielding layer 501 is made of the same material as the first semiconductor layer 401, which can be N+a-Si (amorphous silicon). The second light-shielding layer 502 is made of the same material as the intrinsic semiconductor layer 402, which can be amorphous silicon a-Si. Since amorphous silicon has a strong ability to absorb visible light, it can absorb incident light and reflected light reflected by a finger to the light-shielding layer 50, thereby preventing light from illuminating the control transistor 20a and avoiding adverse effects on its performance. In this embodiment, the first light-shielding layer 501 has the same thickness as the first semiconductor layer 401, and the second light-shielding layer 502 has the same thickness as the second semiconductor layer.

[0057] In other embodiments, when the photodiode 40 further includes a second semiconductor layer (not shown), the light-shielding layer 50 may also include a third light-shielding layer. The third light-shielding layer is disposed on the side of the second light-shielding layer 502 away from the substrate 10. The first light-shielding layer 501, the second light-shielding layer 502, and the third light-shielding layer are sequentially stacked in a direction away from the substrate 10. The third light-shielding layer and the second semiconductor layer are disposed in the same layer, that is, the third light-shielding layer and the second semiconductor layer are formed using the same patterning process. The third light-shielding layer and the second semiconductor layer are made of the same material, such as P+a-Si.

[0058] Furthermore, in order to better achieve the light-shielding effect, the orthogonal projection of the light-shielding layer 50 on the substrate 10 covers the orthogonal projection of the control transistor 20a on the substrate 10. Furthermore, the orthogonal projection of the light-shielding layer 50 on the substrate 10 covers the orthogonal projection of the active layer 204 on the substrate 10. Furthermore, the orthogonal projection of the light-shielding layer 50 on the substrate 10 coincides with the orthogonal projection of the active layer 204 on the substrate 10.

[0059] In one embodiment, please refer to Figure 2 , Figure 2 This is a schematic cross-sectional view of the second fingerprint acquisition device provided in this embodiment of the invention. Figure 2 and Figure 1 The difference lies in that the active layer 204 is made of a metal oxide. Optionally, the active layer 204 may be made of one of the following: IGZO (Indium gallium zinc oxide), IZO (Indium tin oxide), ITZO (Indium gallium tin oxide), and ZnO (Zinc oxide).

[0060] Similarly, by using metal oxide as the material of the active layer 204, the fingerprint acquisition device 100 can be fabricated over a large area on the display panel. It can selectively create openings in any area of ​​the screen to serve as fingerprint recognition areas, enabling both single-area and multi-area optical fingerprint recognition, significantly reducing costs. Furthermore, unlike amorphous silicon, metal oxide does not absorb visible light. Therefore, incident light and reflected light from the finger reflected to the light-shielding layer 50 will not interfere with the active layer 204 when irradiating the control transistor 20a, and will not adversely affect the performance of the control transistor 20a. Therefore, in this embodiment of the invention, the fingerprint acquisition device 100 does not require the light-shielding layer 50 above the control transistor 20a.

[0061] The driving circuit layer 20 also includes a bonding terminal 208 disposed on the same layer as the source-drain metal layer 206 for bonding and connecting with the driving chip. The third electrode portion 703 is electrically connected to the bonding terminal 208 through a fifth via 605 penetrating the second passivation layer 60. The driving chip is configured to apply a driving voltage to the third electrode portion 703 to drive the fingerprint acquisition device 100 to perform fingerprint recognition.

[0062] The second via 602, the third via 603, the fourth via 604, and the fifth via 605 are fabricated using the same photolithography process, which helps to reduce the number of processes and lower costs.

[0063] Please see Figure 3 , Figure 3This is a cross-sectional structural diagram of a display panel provided in an embodiment of the present invention; the present invention also provides a display panel, the display panel including the fingerprint acquisition device 100 in the above embodiment, the display panel being capable of recognizing single-area and multi-area optical fingerprints; the display panel further includes an optical path structure 200 and a panel body 300, the optical path structure 200 being disposed on the non-display side of the panel body 300, and the fingerprint acquisition device 100 being disposed on the side of the optical path structure 200 away from the panel body 300, that is, the optical path structure 200 being disposed on the side of the fingerprint acquisition device 100. On the light-incident side, the optical path structure 200 includes an optical fiber collimation layer to perform collimation. When fingerprint recognition is performed, a finger is pressed on one side of the display surface of the panel body 300. The light reflected back by the finger passes through the optical path structure 200 and is then focused onto the fingerprint acquisition device 100. The fingerprint acquisition device 100 can simultaneously receive the light reflected back by the finger. The driving chip in the fingerprint acquisition device 100 can convert the optical signal into electrical signals of different intensities, thereby processing and identifying the electrical signals containing fingerprint information of two or more fingers, thus realizing the function of two-finger or multi-finger fingerprint recognition.

[0064] In this embodiment, the fingerprint acquisition device 100 is flip-chip relative to the panel body 300 and the optical path structure 200. Specifically, the fingerprint acquisition device 100 includes a substrate 10, a driving circuit layer 20, a first passivation layer 30, a photodiode 40, a second passivation layer 60, and an electrode layer 70. The substrate 10 is located on the side of the optical path structure 200 away from the panel body 300; the driving circuit layer 20 is located on the side of the substrate 10 away from the panel body 300; the first passivation layer 30 covers the side of the driving circuit layer 20 away from the panel body 300; the photodiode 40 is located on the side of the first passivation layer 30 away from the panel body 300; the second passivation layer 60 covers the side of the photodiode 40 away from the panel body 300; and the electrode layer 70 is located on the side of the second passivation layer 60 away from the panel body 300.

[0065] Furthermore, the fingerprint acquisition device 100 also includes a light-shielding layer 50, which is used to block external light from the side away from the optical path structure 200, preventing it from mixing with the light reflected back from the finger and interfering with the normal recognition of the fingerprint acquisition device 100. Specifically, the light-shielding layer 50 is located on the side of the first passivation layer 30 away from the panel body 300 and is correspondingly disposed with respect to the control transistor 20a of the driving circuit layer 20; the light-shielding layer 50 is disposed on the same layer as the photodiode 40.

[0066] Please see Figure 4and Figures 4A to 4K , Figure 3 This is a flowchart of a method for preparing a fingerprint acquisition device according to an embodiment of the present invention; Figures 4A to 4K This is a schematic flowchart illustrating a method for fabricating a fingerprint acquisition device according to an embodiment of the present invention. The present invention also provides a method for fabricating a fingerprint acquisition device, comprising the following steps:

[0067] Step S10: Provide a substrate 10.

[0068] For details, please refer to Figure 4A The substrate 10 is a glass substrate.

[0069] Step S20: A driving circuit layer 20 is formed on one side of the substrate 10. The driving circuit layer 20 includes a control transistor 20a and multiple signal traces. The control transistor 20a includes a gate 201, a gate insulating layer 203, an active layer 204, and a source-drain metal layer 206 stacked sequentially in a direction away from the substrate 10. The multiple signal traces include a first signal trace 202 disposed on the same layer as the gate 201 and a second signal trace 207 disposed on the same layer as the source-drain metal layer 206.

[0070] Specifically, step S20 includes the following steps:

[0071] Step S201: The gate 201 and the first signal trace 202 are formed on the substrate 10.

[0072] Please see Figure 4B First, a gate material is deposited on the substrate 10. The gate material is then exposed, developed and etched using a photolithography process to form the gate 201 and the first signal trace 202.

[0073] Step S202: Form a gate insulating layer 203 covering the gate 201 and the first signal trace 202.

[0074] Please see Figure 4C An inorganic material is deposited on the substrate 10, the gate 201 and the first signal line 202 to form the gate insulating layer 203. The inorganic material may be one of silicon nitride, silicon oxide and silicon oxynitride.

[0075] Step S203: The active layer 204 is formed on the side of the gate insulating layer 203 away from the substrate 10.

[0076] Please see Figure 4DFirst, an active layer material is deposited on the gate insulating layer 203. Then, a photolithography process is used to expose, develop, and etch the active layer material to form the active layer 204. This embodiment of the invention uses amorphous silicon (a-Si) as an example to illustrate the process.

[0077] Furthermore, step S103 further includes: forming an ohmic contact layer 205 on the side of the active layer 204 away from the substrate 10, wherein the material of the ohmic contact layer 205 is N+a-Si, and the ohmic contact layer 205 and the active layer 204 are prepared by the same photolithography process.

[0078] Step S204: The source and drain metal layers 206, the second signal trace 207, and the bonding terminal 208 are formed on the side of the active layer 204 away from the substrate 10.

[0079] Please see Figure 4E First, a source / drain metal layer material is deposited on the active layer 204. Specifically, a source / drain metal layer material is formed covering the gate insulating layer 203, the active layer 204, and the ohmic contact layer 205. Next, a photolithography process is used to expose, develop, and etch the source / drain metal layer material to form the source / drain metal layer 206, the second signal trace 207, and the bonding terminal 208. The source / drain metal layer 206 includes a source and a drain, with a channel formed between the source and the drain. The material of the source / drain metal layer 206, the second signal trace 207, and the bonding terminal 208 is N+a-Si.

[0080] Step S30: Form a first passivation layer 30 on the side of the drive circuit layer 20 away from the substrate 10.

[0081] Please see Figure 4F The first passivation layer 30 is deposited on the gate insulating layer 203, the source and drain metal layer 206, the second signal trace 207 and the channel. The material of the first passivation layer 30 can be one of silicon nitride, silicon oxide or silicon oxynitride.

[0082] Step S40: Form a first via 601 that penetrates the first passivation layer 30.

[0083] Please see Figure 4G The first passivation layer 30 is exposed, developed and etched using a photolithography process to form a first via 601 that penetrates the first passivation layer 30.

[0084] Step S50: A photodiode 40 is formed on the side of the first passivation layer 30 away from the substrate 10. The photodiode 40 is electrically connected to the control transistor 20a through the first via 601.

[0085] Specifically, step S50 includes the following steps:

[0086] Step S501: A first semiconductor layer 401 and an intrinsic semiconductor layer 402 are formed in the first passivation layer 30 and the first via 601.

[0087] Please see Figure 4H First, a first semiconductor layer material and an intrinsic semiconductor layer material are deposited and formed on the source and drain metal layers 206 within the first passivation layer 30 and the first via 601. Next, a photolithography process is used to expose, develop, and etch the first semiconductor layer material and the intrinsic semiconductor layer material to form the first semiconductor layer 401. The material of the first semiconductor layer 401 can be N+a-Si, and the material of the intrinsic semiconductor layer 402 can be amorphous silicon a-Si.

[0088] Furthermore, step S501 further includes: forming a light-shielding layer 50 on the side of the first passivation layer 30 away from the substrate 10, wherein the light-shielding layer 50 is disposed corresponding to the control transistor 20a, and the light-shielding layer 50 and the photodiode 40 are formed using the same process.

[0089] Specifically, a first light-shielding layer 501 and a second light-shielding layer 502 are formed stacked on the side of the first passivation layer 30 away from the substrate 10. The first light-shielding layer 501 is disposed on the same layer as the first semiconductor layer 401, and the second light-shielding layer 502 is disposed on the same layer as the intrinsic semiconductor layer 402. The material of the first light-shielding layer 501 can be N+a-Si, and the material of the intrinsic semiconductor layer 402 can be amorphous silicon a-Si. The first light-shielding layer 501 and the second light-shielding layer 502 are fabricated using the same photolithography process as the first semiconductor layer 401 and the intrinsic semiconductor layer 402.

[0090] Step S60: Form a second passivation layer 60 on the side of the photodiode 40 away from the substrate 10.

[0091] Please see Figure 4I The second passivation layer 60 is deposited on the first passivation layer 30, the second light-shielding layer 502 and the intrinsic semiconductor layer 402. The material of the second passivation layer 60 can be one of silicon nitride, silicon oxide or silicon oxynitride.

[0092] Step S70: Form a second via 602, a third via 603 and a fourth via 604. The second via 602 penetrates the second passivation layer 60. The third via 603 penetrates the second passivation layer 60, the first passivation layer 30 and the gate insulating layer 203. The fourth via 604 penetrates the second passivation layer 60 and the first passivation layer 30.

[0093] Please see Figure 4J The second passivation layer 60 is exposed, developed and etched using a photolithography process to form the second via 602, the third via 603 and the fourth via 604. Since the third via 603 and the fourth via 604 are formed in the same process as the second via 602, one process can be saved, which is beneficial to saving costs.

[0094] Furthermore, step S70 further includes forming a fifth via 605 penetrating the second passivation layer 60. The second via 602, the third via 603, the fourth via 604, and the fifth via 605 are fabricated using the same photolithography process, which helps to reduce the number of processes and lower costs.

[0095] Step S80: An electrode layer 70 is formed on the side of the second passivation layer 60 away from the substrate 10. The electrode layer 70 includes a first electrode portion 701 and a second electrode portion 702. The first electrode portion 701 is electrically connected to the photodiode 40 through the second via 602. The second electrode portion 702 is electrically connected to the first signal trace 202 and the second signal trace 207 through the third via 603 and the fourth via 604, respectively, to form a bridging structure 20c.

[0096] For details, please refer to Figure 4K First, an electrode material is deposited on the second passivation layer 60, covering the second passivation layer 60, the second via 602, the third via 603, the fourth via 604, and the fifth via 605. Next, a photolithography process is used to expose, develop, and etch the electrode material to form the electrode layer 70. The material of the electrode layer 70 includes ITO.

[0097] As can be seen from the above, the method for fabricating the fingerprint acquisition device 100 provided in this embodiment of the invention requires a total of 7 photolithography processes to complete the fabrication of the fingerprint acquisition device 100, specifically: the gate 201 / the first signal trace 202 / the bonding terminal 208, the active layer 204 / the ohmic contact layer 205, the source-drain metal layer 206 / the second signal trace 207 / the bonding terminal 208, the first via 601, the photodiode 40 / the light-shielding layer 50, the second via 602 / the third via 603 / the fourth via 604 / the fifth via 605, and the electrode layer 70. Compared with the fingerprint acquisition device 100 using a silicon substrate in the prior art, the required processes are reduced, which is beneficial to reducing costs.

[0098] Furthermore, the active layer 204 in the fingerprint acquisition device 100 of the present invention is made of amorphous silicon, which can be fabricated on a large area of ​​the display panel. It can selectively open holes in any area of ​​the screen to serve as fingerprint recognition areas, enabling the recognition of single-area and multi-area optical fingerprints, and significantly reducing costs.

[0099] The beneficial effects are as follows: The fingerprint acquisition device and display panel provided in the embodiments of the present invention include a substrate, a driving circuit layer, a first passivation layer, a photodiode, a second passivation layer, and an electrode layer. The first electrode portion of the electrode layer is electrically connected to the photodiode through a second via penetrating the second passivation layer. The driving circuit layer includes a control transistor and multiple signal traces. The first signal trace is disposed on the same layer as the gate of the control transistor, and the second signal trace is disposed on the same layer as the source and drain metal layers of the control transistor. Compared with the prior art where the first and second signal traces are electrically connected through vias penetrating the gate insulating layer, the second electrode portion of the electrode layer in the present invention is electrically connected to the first and second signal traces through a third and a fourth via, respectively, to form a bridging structure. The third via penetrates the second passivation layer, the first passivation layer, and the gate insulating layer, and the fourth via penetrates the second passivation layer and the first passivation layer. Since the third and fourth vias are formed in the same process as the second via, one process can be saved, which is beneficial to cost saving.

[0100] In summary, although the present invention has been disclosed above with reference to preferred embodiments, the above preferred embodiments are not intended to limit the present invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope defined in the claims.

Claims

1. A fingerprint acquisition device, characterized in that, include: Substrate; A driving circuit layer is disposed on one side of the substrate. The driving circuit layer includes a control transistor and multiple signal traces. The control transistor includes a gate, a gate insulating layer, an active layer and a source drain metal layer stacked sequentially in a direction away from the substrate. The multiple signal traces include a first signal trace disposed in the same layer as the gate and a second signal trace disposed in the same layer as the source drain metal layer. A first passivation layer is applied to the side of the driving circuit layer away from the substrate. A photodiode is disposed on the side of the first passivation layer away from the substrate, and the photodiode is electrically connected to the control transistor through a first via penetrating the first passivation layer; A second passivation layer is applied to the side of the photodiode away from the substrate. as well as An electrode layer is disposed on the side of the second passivation layer away from the substrate. The electrode layer includes a first electrode portion and a second electrode portion. The first electrode portion is electrically connected to the photodiode through a second via penetrating the second passivation layer. The second electrode portion is electrically connected to the first signal trace and the second signal trace through a third via and a fourth via, respectively, to form a bridging structure. The third via penetrates the second passivation layer, the first passivation layer, and the gate insulating layer. The fourth via penetrates the second passivation layer and the first passivation layer. The first signal trace and the second signal trace are disposed on different layers, and the second signal trace is configured to be electrically connected to the driver chip. The third and fourth vias are formed in the same process as the second via.

2. The fingerprint acquisition device according to claim 1, characterized in that, The active layer is made of amorphous silicon; the control transistor further includes an ohmic contact layer disposed on the side of the active layer away from the substrate.

3. The fingerprint acquisition device according to claim 2, characterized in that, The fingerprint acquisition device further includes a light-shielding layer, which is disposed on the side of the first passivation layer away from the substrate and corresponding to the control transistor; the light-shielding layer is disposed on the same layer as the photodiode.

4. The fingerprint acquisition device according to claim 3, characterized in that, The light-shielding layer includes at least a first light-shielding layer and a second light-shielding layer stacked in sequence, and the photodiode includes at least a first semiconductor layer and an intrinsic semiconductor layer stacked in sequence; the first light-shielding layer and the first semiconductor layer are disposed in the same layer, and the second light-shielding layer and the intrinsic semiconductor layer are disposed in the same layer.

5. The fingerprint acquisition device according to claim 3, characterized in that, The orthogonal projection of the light-shielding layer on the substrate covers the orthogonal projection of the active layer on the substrate.

6. The fingerprint acquisition device according to claim 1, characterized in that, The active layer is made of metal oxide.

7. The fingerprint acquisition device according to any one of claims 1 to 6, characterized in that, The electrode layer further includes a third electrode portion, and the driving circuit layer further includes a bonding terminal disposed on the same layer as the source and drain metal layers. The third electrode portion is electrically connected to the bonding terminal through a fifth via penetrating the second passivation layer.

8. A display panel, characterized in that, Includes the fingerprint acquisition device according to any one of claims 1 to 7; Optical path structure; as well as The panel body has an optical path structure located on the non-display side of the panel body, and a fingerprint collection device located on the side of the optical path structure away from the panel body.

9. The display panel according to claim 8, characterized in that, The fingerprint acquisition device includes a substrate, a driving circuit layer, a first passivation layer, a photodiode, a second passivation layer, and an electrode layer; wherein, The substrate is located on the side of the optical path structure away from the panel body; The driving circuit layer is located on the side of the substrate away from the panel body; The first passivation layer covers the side of the driving circuit layer away from the panel body; The photodiode is located on the side of the first passivation layer away from the panel body; The second passivation layer covers the side of the photodiode away from the panel body; and The electrode layer is located on the side of the second passivation layer away from the panel body.

10. The display panel according to claim 9, characterized in that, The fingerprint acquisition device further includes a light-shielding layer, which is located on the side of the first passivation layer away from the panel body and is disposed corresponding to the control transistor of the driving circuit layer; the light-shielding layer is disposed on the same layer as the photodiode.

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