Swing tracking and control

Abstract

In certain aspects, an apparatus includes a transformer comprising an input inductor and an output inductor, wherein the input inductor is magnetically coupled to the output inductor. The apparatus also includes a transconductance driver configured to drive the input inductor based on an input signal. The apparatus also includes a feedback circuit configured to detect an output voltage swing at the output inductor, generate a regulated voltage at the input inductor, and control the regulated voltage based on the detected output voltage swing.

Description

[0001] This application is a Continuation-In-Part of the patent application entitled “Swing Tracking and Control” having an international application date of March 31, 2020, international application number PCT / US2020 / 025899, entered the Chinese national phase on September 29, 2021, Chinese national application number 202080026334.X. This patent application claims priority to U.S. Non-Provisional Application No. 16 / 375,765, entitled “Swing Tracking and Control” and filed on April 4, 2019, which is assigned to its assignee and hereby expressly incorporated by reference herein. TECHNICAL FIELD

[0002] Aspects of the disclosure relate generally to buffers, and more particularly to tracking and control of output swing of a buffer. BACKGROUND

[0003] In a wireless communication system (e.g., a millimeter wave (mmWave) system), a local oscillator (LO) network can be used to distribute LO signals from an LO to mixers in the system. The LO network can include buffers for driving the mixers with the LO signals. The buffers can each include a driver with a transformer as a load to improve power efficiency. SUMMARY

[0004] The following presents a simplified summary of one or more implementations in order to provide a basic understanding of such implementations. This summary is not an extensive overview of all contemplated implementations, and is intended to neither identify key or critical elements of all implementations nor delineate the scope of any or all implementations. Its sole purpose is to present some concepts of one or more implementations in a simplified form as a prelude to the more detailed description that is presented later.

[0005] A first aspect relates to an apparatus for buffering an input signal. The apparatus includes a transformer including an input inductor and an output inductor, where the input inductor is magnetically coupled to the output inductor. The apparatus also includes a transconductance driver configured to drive the input inductor based on the input signal. The apparatus further includes a feedback circuit configured to detect an output voltage swing at the output inductor, generate an adjusted voltage at the input inductor, and control the adjusted voltage based on the detected output voltage swing.

[0006] A second aspect relates to a method for controlling output voltage swing of a buffer. The buffer includes a transformer and a driver, the transformer including an input inductor and an output inductor, the input inductor driven by the driver, and the input inductor magnetically coupled to the output inductor. The method includes detecting an output voltage swing at the output inductor, and controlling a regulated voltage at the input inductor based on the detected output voltage swing.

[0007] A third aspect relates to an apparatus for buffering an input signal. The apparatus includes a transformer including an input inductor and an output inductor, wherein the input inductor is magnetically coupled to the output inductor. The apparatus also includes a transconductance driver configured to drive the input inductor based on the input signal. The apparatus further includes a feedback circuit configured to detect an output voltage swing at the output inductor, and control a bias current of the driver based on the detected output voltage swing.

[0008] A fourth aspect relates to an apparatus for buffering an input signal. The apparatus includes a transformer including an input inductor and an output inductor, wherein the input inductor is magnetically coupled to the output inductor. The apparatus also includes means for driving the input inductor based on the input signal; means for detecting an output voltage swing at the output inductor; means for generating a regulated voltage at the input inductor; and means for controlling the regulated voltage based on the detected output voltage swing.

[0009] To the accomplishment of the foregoing and related aspects, one or more implementations comprise the features recited in the following claims, and the following description discloses one or more implementations with the features. BRIEF DESCRIPTION OF DRAWINGS

[0010] Figure 1A An example of a buffer including a transconductance driver and a transformer is shown in accordance with certain aspects of the present disclosure.

[0011] Figure 1B An example implementation of a transconductance driver is shown in accordance with certain aspects of the present disclosure.

[0012] Figure 2 An example of a feedback circuit for tracking and controlling output voltage swing of a buffer is shown in accordance with certain aspects of the present disclosure.

[0013] Figure 3 An example implementation of a peak detector, control circuit, and voltage regulator is shown in accordance with certain aspects of the present disclosure.

[0014] Figure 4 An exemplary implementation of a replication circuit according to certain aspects of this disclosure is shown.

[0015] Figure 5 An example of a local oscillator (LO) network for distributing LO signals to multiple mixers, according to certain aspects of this disclosure, is shown.

[0016] Figure 6A An example of a feedback circuit capable of switching between multiple buffers according to certain aspects of this disclosure is shown.

[0017] Figure 6B Another example of a feedback circuit capable of switching between multiple buffers according to certain aspects of this disclosure is shown.

[0018] Figure 6C Another example of a feedback circuit capable of switching between multiple buffers according to certain aspects of this disclosure is shown.

[0019] Figure 7 An exemplary implementation of a transconductance driver according to certain aspects of this disclosure is shown.

[0020] Figure 8 Another example of a feedback circuit for tracking and controlling the output voltage swing of a buffer, according to certain aspects of this disclosure, is shown.

[0021] Figure 9 Other exemplary implementations of peak detectors and control circuitry according to certain aspects of this disclosure are shown.

[0022] Figure 10 This is a flowchart illustrating a method for controlling the output voltage swing of a buffer according to certain aspects of this disclosure.

[0023] Figure 11 An example of a receiver for a phased antenna array is shown according to certain aspects of this disclosure.

[0024] Figure 12 This illustrates a method for providing a LO signal according to certain aspects of this disclosure. Figure 11 An example of the LO network of the mixer in the receiver is shown.

[0025] Figure 13 Another example of a receiver for a phased antenna array according to certain aspects of this disclosure is shown.

[0026] Figure 14 This illustrates a method for providing a LO signal according to certain aspects of this disclosure. Figure 13An example of the LO network of the mixer in the receiver is shown.

[0027] Figure 15 An example of a transmitter for a phased antenna array is shown according to certain aspects of this disclosure.

[0028] Figure 16 This illustrates a method for providing a LO signal according to certain aspects of this disclosure. Figure 15 An example of the LO network of the mixer in the transmitter is shown.

[0029] Figure 17 Another example of a transmitter for a phased antenna array is shown, according to certain aspects of this disclosure.

[0030] Figure 18 This disclosure illustrates certain aspects of the method for providing... Figure 17 The mixer in the transmitter shown is an example of an LO network that provides the LO signal. Detailed Implementation

[0031] The specific embodiments described below with reference to the accompanying drawings are intended as descriptions of various configurations and are not intended to represent the only configuration in which the concepts described herein can be practiced. The specific embodiments include particular details to provide a thorough understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts can be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form to avoid obscuring these concepts.

[0032] In wireless communication systems (e.g., millimeter-wave systems), a local oscillator (LO) network can be used to distribute the LO signal from the LO to the mixer in the system. The LO network can include buffers for driving the mixer using the LO signal. For example, when the LO lacks the capability to directly drive the mixer, a buffer can be used to drive the mixer. Additionally, the buffer can provide high isolation to the LO from loads in the LO network (e.g., mixer loads) to prevent load degradation of the LO's performance. For example, the buffer can provide high isolation to the LO from load changes in the LO network to prevent load changes from causing large shifts in the LO's oscillator frequency, thereby degrading the LO signal.

[0033] Figure 1A An example of a buffer 105 according to certain aspects of this disclosure is shown. The buffer 105 includes a transconductance driver 110 and a transformer 120, wherein the transformer 120 serves as a load for the transconductance driver 110 to increase the output impedance and improve power efficiency. The transformer 120 includes an input inductor 125 and an output inductor 130, wherein the input inductor 125 is magnetically coupled to the output inductor 130.

[0034] The transconductance driver 110 drives the input inductor 125 based on the input signal. In one example, the input signal is a differential input voltage (Vin+ and Vin-). In this example, the transconductance driver 110 converts the differential input voltage (Vin+ and Vin-) into a drive current to drive the input inductor 125. The drive current is converted into a differential output voltage (Vp and Vm) at the output inductor 130, which is output to another device (e.g., a mixer). Figure 1A In the example, the center tap 127 of the input inductor 125 is coupled to the voltage supply rail.

[0035] Figure 1B An exemplary implementation of a transconductance driver 110 according to certain aspects of this disclosure is shown. In this example, the transconductance driver 110 has differential inputs configured to receive differential input voltages (Vin+ and Vin-). The differential inputs include a first input 172 and a second input 174, wherein the first input 172 receives the voltage Vin+ and the second input 174 receives the voltage Vin-. In this example, the transconductance driver 110 includes a first transistor 160 and a second transistor 165 forming a differential pair. The first transistor 160 and the second transistor 165 can be implemented using an n-type field-effect transistor (NFET), although other transistor types can be used in some implementations. In this example, the drain of the first transistor 160 is coupled to a first terminal 126 of an input inductor 125, the source of the first transistor 160 is coupled to ground, and the gate of the first transistor 160 is coupled to the first input 172 via a first coupling capacitor 170. The drain of the second transistor 165 is coupled to the second terminal 128 of the input inductor 125, the source of the second transistor 165 is coupled to ground, and the gate of the second transistor 165 is coupled to the second input 174 via the second coupling capacitor 175. The input inductor 125 is coupled between the drains of the first transistor 160 and the second transistor 165.

[0036] During operation, the first transistor 160 and the second transistor 165 convert the differential input voltage into a drive current for driving the input inductor 125. The transconductance driver 110 also includes a bias circuit 180 coupled to the gates of the first transistor 160 and the second transistor 165. The bias circuit 180 is configured to bias the gates of the first transistor 160 and the second transistor 165 using a gate bias voltage.

[0037] In this example, the inputs of buffer 105 correspond to the differential inputs 172 and 174 of transconductance driver 110, and the output of buffer 105 corresponds to the two ends 132 and 134 of output inductor 130. Buffer 105 can be used to provide high isolation (e.g., 20 dB or higher) between the inputs and outputs of buffer 105. In one example, buffer 105 can be used to provide high isolation between the LO coupled to the input of buffer 105 and the mixer coupled to the output of buffer 105.

[0038] In some aspects, buffer 105 serves as a buffer in the local oscillator (LO) path, providing the LO signal from the LO (not shown) to mixer 140. In these aspects, buffer 105 uses the LO signal (e.g., a sine wave) to drive mixer 140. Figure 1A and Figure 1B As shown, the LO signals are the differential voltages Vin+ and Vin- at the input of buffer 105 and the differential voltages Vp and Vm at the output of buffer 105. Mixer 140 is configured to mix the LO signals with the input signal 145 to frequency shift the input signal 145. For example, mixer 140 can be used in a receiver to down-convert the radio frequency (RF) input signal 145 to an intermediate frequency (IF) output signal 150. In another example, mixer 140 can be used in a transmitter to up-convert the IF input signal 145 to an RF output signal 150. Figure 1A and Figure 1B In the example shown, the LO signal is a differential signal. Input signal 145 and output signal 150 can also be differential signals.

[0039] Buffer 105 is capable of operating at very high frequencies (e.g., tens of GHz) in the millimeter-wave band. This makes Buffer 105 suitable for millimeter-wave systems, such as those used in fifth-generation (5G) wireless communication. However, a challenge in using Buffer 105 is that its output voltage swing can vary across the process-voltage-temperature (PTV) corner (e.g., exceeding 6 dB). This is because the output voltage swing is current-limited, not voltage-limited. The negative impacts of output voltage swing variations can include one or more of the following: excessive power consumption, changes in signal path gain, increased LO leakage, and reliability issues.

[0040] Regarding excessive power consumption, mixer 140 may require a minimum LO swing to drive it. To ensure that the minimum LO swing requirement is met across PVT corners, the bias current of transconductance driver 110 can be set so that the output voltage swing of buffer 105 meets the minimum LO swing requirement for the worst-case PVT corner. However, this approach may result in an output voltage swing significantly higher than the minimum LO swing requirement for some PVT corners. Therefore, for these PVT corners, the LO swing may be significantly higher than the swing required to drive mixer 140, leading to excessive power consumption at these PVT corners.

[0041] Regarding signal path gain variation, the signal path gain may vary with the LO swing at mixer 140. As a result, variations in the output voltage swing of buffer 105 across the PVT corner can cause variations in the signal path gain across the PVT corner. In this case, signal path gain calibration may be difficult to perform to accommodate variations in the LO swing over the temperature range.

[0042] Regarding LO leakage, a portion of the LO signal at mixer 140 leaks into the output of mixer 140. For some PVT corners, the output voltage swing (and therefore the LO swing at mixer 140) may increase significantly (e.g., by 6 dB), thus exacerbating LO leakage.

[0043] Regarding reliability, large output voltage swings at some PVT corners (and therefore large LO swings at mixer 140) can cause equipment failure (e.g., by exceeding the tolerances of these devices). This may force designers to avoid using the most efficient approach if less efficient approaches have higher tolerances for large LO swings.

[0044] To reduce the swing variations discussed above, aspects of this disclosure track and control the output voltage swing of buffer 105. In some implementations, a feedback circuit detects the output voltage swing of buffer 105 (e.g., using a peak detector) and adjusts the output voltage swing based on the detected swing to keep the output voltage swing close to a target voltage swing (i.e., approximately equal to the target voltage swing). To keep the output voltage swing close to the target voltage swing, the feedback circuit may reduce the output voltage swing when the detected output voltage swing is higher than the target voltage swing to make the output voltage swing closer to the target voltage swing, and increase the output voltage swing when the detected output voltage swing is lower than the target voltage swing to make the output voltage swing closer to the target voltage swing. The feedback circuit can adjust the output voltage swing of buffer 105 by adjusting parameters that affect the output voltage swing. These parameters may include the voltage at input inductor 125 and / or the bias current of transconductance driver 110, as further discussed below.

[0045] Figure 2 An example of a feedback circuit 205 for tracking and controlling the output voltage swing of a buffer 105, according to certain aspects of this disclosure, is shown. In this example, the feedback circuit 205 controls the output voltage swing by controlling a regulated voltage 235 at an input inductor 125 (e.g., the center tap 127 of the input inductor 125). The output voltage swing at the differential output of the buffer 105 is approximately a linear function of the regulated voltage 235, wherein the output voltage swing increases when the regulated voltage 235 increases and decreases when the regulated voltage 235 decreases. Therefore, the feedback circuit 205 is able to control the output voltage swing of the buffer 105 by controlling the regulated voltage 235.

[0046] In some aspects, feedback circuit 205 is configured to detect the output voltage swing at output inductor 130, generate a regulated voltage 235 at input inductor 125 (e.g., center tap 127 of input inductor 125), and control the regulated voltage 235 based on the detected output voltage swing. In these aspects, feedback circuit 205 can control the regulated voltage 235 based on the detected output voltage swing by comparing the detected output voltage swing with a target voltage swing and adjusting the regulated voltage 235 in a direction that reduces the difference between the output voltage swing and the target voltage swing. For example, if the detected output voltage swing is higher than the target voltage swing, feedback circuit 205 can decrease the regulated voltage 235 to reduce the output voltage swing. If the detected output voltage swing is lower than the target voltage swing, feedback circuit 205 can increase the regulated voltage 235 to increase the output voltage swing. Thus, feedback circuit 205 adjusts the regulated voltage 235 based on the detected output voltage swing to keep the output voltage swing of buffer 105 close to the target voltage swing.

[0047] exist Figure 2 In the example shown, feedback circuit 205 includes a peak detector 210, control circuitry 220, and voltage regulator 230 coupled in feedback loop 208. Peak detector 210 is configured to detect output voltage swings, voltage regulator 230 is configured to generate a regulated voltage 235, and control circuitry 220 is configured to control the regulated voltage 235 generated by voltage regulator 230 based on the detected output voltage swings, as further discussed below.

[0048] Peak detector 210 has a differential input coupled to the differential output of buffer 105. Peak detector 210 is configured to detect the output voltage swing at the differential output of buffer 105 and generate a swing detection signal 215 based on the detected output voltage swing. The output voltage swing can be approximately equal to the peak difference between the voltage Vp at the positive output of buffer 105 and the voltage Vm at the negative output of buffer 105. In some aspects, the swing detection signal 215 can be a voltage related to (e.g., proportional to) the output voltage swing of buffer 105, as further discussed below.

[0049] Control circuit 220 is configured to receive swing detection signal 215 from peak detector 210 and generate control signal 225 based on swing detection signal 215. Control signal 225 is input to voltage regulator 230 to control the regulated voltage 235 generated by voltage regulator 230.

[0050] Voltage regulator 230 is coupled to input inductor 125. In some aspects, voltage regulator 230 is coupled to center tap 127 of input inductor 125 (although there may be possible implementations where other tap points can be used). Voltage regulator 230 is configured to generate a regulated voltage 235 from the supply voltage and apply the regulated voltage 235 to input inductor 125 (e.g., at center tap 127). The regulated voltage 235 generated by voltage regulator 230 is controlled by control signal 225 from control circuitry 220.

[0051] In some aspects, control circuitry 220 generates control signal 225 by comparing swing detection signal 215 with a target reference signal corresponding to the target voltage swing, and generating control signal 225 based on the comparison. In these aspects, the target reference signal provides a reference point to which swing detection signal 215 is compared to evaluate whether the output voltage swing is higher or lower than the target voltage swing. In one example, the output voltage swing is approximately equal to the target voltage swing when swing detection signal 215 is approximately equal to the reference target signal. In this example, the reference target signal indicates the value (e.g., voltage) that swing detection signal 215 should have when the output voltage swing equals the target voltage swing. If swing detection signal 215 is higher than the reference target signal, the output voltage swing is higher than the target voltage swing, and if swing detection signal 215 is lower than the reference target signal, the output voltage swing is lower than the target voltage swing. In this example, control circuitry 220 maintains the output voltage swing close to the target voltage swing by adjusting the regulated voltage 235 in a direction that reduces the difference between swing detection signal 215 and the target reference signal.

[0052] Therefore, feedback circuit 205 adjusts the regulated voltage 235 based on feedback of the output voltage swing to keep the output voltage swing of buffer 105 close to the target voltage swing. Feedback circuit 205 is able to keep the output voltage swing close to the target voltage swing across the PVT corner, thus significantly reducing the variation in output voltage swing across the PVT corner compared to systems that do not use feedback to control the output voltage swing. This reduction in the variation in output voltage swing across the PVT corner mitigates the effects described in the above reference. Figure 1A and Figure 1B The issues discussed include excessive power consumption, signal path gain variations, increased LO leakage, and / or reliability problems.

[0053] For an example where buffer 105 is used in the LO path to provide the LO signal from LO to mixer 140, the target voltage swing can be set to be close to the minimum LO swing requirement for driving mixer 140 (e.g., to minimize power consumption). In this example, feedback circuitry 205 keeps the output voltage swing of buffer 105 close to the minimum LO swing across the PVT corner. This helps prevent the output voltage swing from being significantly higher than the minimum LO swing at some PVT corners, which would lead to excessive power consumption, increased LO leakage, and / or the aforementioned reliability issues.

[0054] In addition to buffer 105, the LO path from LO to mixer 140 may include one or more other devices. These other devices may include amplifiers, another buffer, a phase shifter, and / or a vector modulator. In this example, buffer 105 may be positioned just at the end of the LO path (also referred to as the LO chain) preceding mixer 140. Placing buffer 105 at the end of the LO path allows feedback circuitry 205 to control the LO swing at mixer 140. By controlling the LO swing at the end of the LO path, feedback circuitry 205 can eliminate swing variations caused by one or more other devices in the LO path preceding buffer 105. This is because feedback circuitry 205 keeps the output voltage swing of buffer 105 close to the target voltage swing, which helps prevent swing variations caused by one or more of the aforementioned devices in the LO path from propagating to mixer 140. In this example, swing variations from one or more of the aforementioned devices in the LO path may include amplitude modulation (AM) noise, swing variations due to PVT variations in one or more of the aforementioned devices, and / or non-ideals in one or more of the aforementioned devices.

[0055] Feedback circuit 205 adjusts the regulated voltage 235 at input inductor 125 based on feedback of the output voltage swing to keep the output voltage swing of buffer 105 close to the target voltage swing. Therefore, in this example, the regulated voltage 235 at input inductor 125 is a parameter of buffer 105 adjusted to control the output voltage swing. As discussed above, the output voltage swing of buffer 105 is approximately a linear function of the regulated voltage 235 at input inductor 125. This approximately linear relationship between the regulated voltage 235 and the output voltage swing helps provide good loop stability for feedback loop 208.

[0056] Figure 3 Exemplary implementations of a peak detector 210, control circuitry 220, and voltage regulator 230 according to certain aspects of this disclosure are shown. Figure 3 In this example, the peak detector 210 includes a first transistor 310, a second transistor 315, a current source 320, and a holding capacitor 325. The first transistor 310 and the second transistor 315 can be implemented using an n-type field-effect transistor (NFET), although in some implementations, a p-type transistor or other types of transistors are possible. In this example, the drain of the first transistor 310 is coupled to the voltage supply rail, the source of the first transistor 310 is coupled to node 322, and the gate of the first transistor 310 is coupled to the positive output of the buffer 105 via a first coupling capacitor 312. The gate of the first transistor 310 is DC biased by a bias voltage (labeled "Vbias") via a first bias resistor (labeled "Rb1"). The drain of the second transistor 315 is coupled to the voltage supply rail, the source of the second transistor 315 is coupled to node 322, and the gate of the second transistor 315 is coupled to the negative output of the buffer 105 via a second coupling capacitor 318. The gate of the second transistor 315 is DC biased by a bias voltage Vbias through a second bias resistor (labeled "Rb2"). A current source 320 is coupled between node 322 and ground, and a holding capacitor 325 is coupled between node 322 and ground.

[0057] The first transistor 310 and the second transistor 315 are configured as source followers, with the positive output Vp of the buffer 105 input to the gate of the first transistor 310, the negative output Vm of the buffer 105 input to the gate of the second transistor 315, and the output of the peak detector 210 coupled at node 322 to the sources of the first transistor 310 and the second transistor 315. In this configuration, the first transistor 310 and the second transistor 315 act as rectifiers, which, in combination with a holding capacitor 325, generate a sensed voltage (denoted as “Vsen”) at node 322 that is related (e.g., proportional) to the output voltage swing of the buffer 105. The holding capacitor 325 holds the sensed voltage Vsen at the output of the peak detector 210. In one example, the sensed voltage Vsen and the output voltage swing are proportionally related to a bias voltage Vbias. In this example, the sensed voltage Vsen is higher for higher output voltage swings and lower for lower output voltage swings over the range of output voltage swings. Therefore, the sensed voltage Vsen tracks changes in the output voltage swing. The sensed voltage Vsen changes slowly relative to the frequency of the LO signal and can therefore be considered approximately equal to the DC voltage relative to the LO signal. In this example, the sensed voltage Vsen corresponds to the swing detection signal 215 discussed above and is generated based on the bias voltage Vbias and the output voltage swing of the buffer 105.

[0058] Current source 320 provides bias current to first transistor 310 and second transistor 315. Current source 320 also helps peak detector 210 track changes in the output voltage swing of buffer 105. For example, if the output voltage swing decreases, current source 320 releases some of the charge on holding capacitor 325 to allow the sensed voltage Vsen to decrease in order to reflect the decrease in the output voltage swing.

[0059] exist Figure 3 In the example, control circuit 220 includes operational amplifier 330 and replication circuit 335. The structure of replication circuit 335 may be the same as or substantially the same as that of peak detector 210. As discussed further below, replication circuit 335 is used to set the target voltage swing of feedback circuit 205 and to counteract changes in sensed voltage Vsen caused by the PVT conditions in peak detector 210.

[0060] Figure 4An exemplary implementation of a replication circuit 335 according to certain aspects is shown. In this example, the replication circuit 335 includes a first transistor 410, a second transistor 415, a current source 420, and a holding capacitor 425. The drain of the first transistor 410 is coupled to a voltage supply rail, the source of the first transistor 410 is coupled to node 422, and the gate of the first transistor 410 is biased with a target voltage (denoted as "Vtarget"). The drain of the second transistor 415 is coupled to the voltage supply rail, the source of the second transistor 415 is coupled to node 422, and the gate of the second transistor 415 is biased with the target voltage Vtarget. The current source 420 is coupled between node 422 and ground, and the holding capacitor 425 is coupled between node 422 and ground.

[0061] The replication circuit 335 is structurally similar to the peak detector 210, wherein the first transistor 410, the second transistor 415, the current source 420, and the holding capacitor 425 of the replication circuit 335 correspond to the first transistor 310, the second transistor 315, the current source 320, and the holding capacitor 325 of the peak detector 210, respectively. Unlike the peak detector 210, the gates of the first transistor 410 and the second transistor 415 of the replication circuit 335 are not coupled to the differential output of the buffer 105. The gates of the first transistor 410 and the second transistor 415 are biased with a target voltage Vtarget, which is used to set the target voltage swing, as discussed further below. The replication circuit 335 generates a DC reference voltage Vref at node 422 based on the target voltage Vtarget. In this example, the reference voltage Vref corresponds to the target reference signal discussed above.

[0062] Back Figure 3 The sensed voltage Vsen is input to the negative input of amplifier 330, and the reference voltage Vref is input to the positive input of amplifier 330. The output of amplifier 330 provides a control signal 225 to voltage regulator 230.

[0063] During operation, amplifier 330 adjusts control signal 225 in a direction that reduces the difference between the sensed voltage Vsen and the reference voltage Vref input to amplifier 330. For example, if the sensed voltage Vsen is lower than the reference voltage Vref, amplifier 330 adjusts control signal 225 in a direction that causes voltage regulator 230 to increase the regulated voltage 235. Increasing the regulated voltage 235 increases the output voltage swing of buffer 105, which in turn increases the sensed voltage Vsen. If the sensed voltage Vsen is higher than the reference voltage Vref, amplifier 330 adjusts control signal 225 in a direction that causes voltage regulator 230 to decrease the regulated voltage 235. Decreasing the regulated voltage 235 decreases the output voltage swing of buffer 105, which in turn decreases the sensed voltage Vsen.

[0064] Therefore, amplifier 330 forces the sensed voltage Vsen to be approximately equal to the reference voltage Vref (i.e., approximately balancing Vsen and Vref). This occurs when the output voltage swing of buffer 105 is approximately equal to the target voltage Vtarget minus the bias voltage Vbias (i.e., Vtarget - Vbias). As a result, feedback circuit 205 adjusts the regulated voltage 235 such that the output voltage swing of buffer 105 is approximately equal to Vtarget - Vbias. Therefore, in this example, the target voltage swing of feedback circuit 205 is approximately equal to Vtarget - Vbias.

[0065] Therefore, the target voltage swing can be set according to the desired target voltage swing by setting the bias voltages (i.e., Vbias and Vtarget) of the peak detector 210 and the replication circuit 335. For example, for a given bias voltage Vbias, the target voltage swing can be set by setting the target voltage Vtarget at the replication circuit 335 such that Vtarget - Vbias equals the desired target voltage swing. At this point, the bias voltage Vbias and the target voltage Vtarget can be generated by the voltage generator 350. The voltage generator 350 can be configured to set the voltage levels of the bias voltage Vbias and the target voltage Vtarget such that Vtarget - Vbias equals the desired target voltage swing.

[0066] As discussed above, the replication circuit 335 also serves to counteract the variation in the sensed voltage Vsen caused by the PVT conditions in the peak detector 210. In this respect, the replication circuit 335 can be integrated on the same chip (i.e., die) as the peak detector 210. In some aspects, the replication circuit 335 can be located very close to the peak detector 210 so that the replication circuit 335 is subjected to approximately the same PVT conditions as the peak detector 210. As a result, the variation in the reference voltage Vref caused by the PVT conditions is approximately the same as the variation in the sensed voltage Vsen caused by the PVT conditions. Since the amplifier 330 uses the difference between the sensed voltage Vsen and the reference voltage Vref at its input, the variation in the reference voltage Vref caused by the PVT conditions approximately cancels out the variation in the sensed voltage Vsen caused by the PVT conditions. This reduces the PVT effect on the control signal 225, resulting in more accurate control of the output voltage swing.

[0067] exist Figure 3 In this example, voltage regulator 230 is implemented using transistor 340 (e.g., an NFET) having a drain coupled to a voltage supply rail, a source coupled to an input inductor 125 (e.g., at center tap 127), and a gate coupled to a control signal 225. In this example, transistor 340 supplies current from the voltage supply rail to the input inductor 125. The regulated voltage 235 is approximately equal to the voltage at the supply rail minus the voltage drop across transistor 340. In this example, control circuitry 220 controls the regulated voltage 235 by controlling the channel conductance of transistor 340, which in turn controls the voltage drop across transistor 340. For example, to increase the regulated voltage 235, control circuitry 220 increases the channel conductance of transistor 340 (i.e., decreases the resistance of transistor 340). Increasing the channel conductance reduces the voltage drop across transistor 340, thereby increasing the regulated voltage 235. To reduce the regulated voltage 235, control circuit 220 reduces the channel conductance of transistor 340 (i.e., increases the resistance of transistor 340). Reducing the channel conductance increases the voltage drop across transistor 340, thereby lowering the regulated voltage 235.

[0068] For transistor 340 via NFET ( Figure 3 In an example implementation shown in the example, control circuit 220 increases the channel conductance of transistor 340 by increasing the voltage level of control signal 225 and decreases the channel conductance of transistor 340 by decreasing the voltage level of control signal 225. For Figure 3 In an exemplary implementation of the control circuit 220 shown, the control signal 225 is provided by the output of the operational amplifier 330.

[0069] As discussed above, buffer 105 can be used in the LO path to provide the LO signal to mixer 140. In some aspects, multiple instances (i.e., copies) of buffer 105 can be used to distribute the LO signal to the LO network of multiple mixers. In this respect, Figure 5 An example is shown of a LO network that distributes the LO signal from the LO (not shown) to the first mixer 140-1 and the second mixer 140-2. Although in Figure 5 The example shows two mixers; it should be understood that the LO network can distribute the LO signal to more than two mixers. In this example, the LO network includes a first buffer 105-1 configured to buffer the LO signal for the first mixer 140-1; and a second buffer 105-2 configured to buffer the LO signal for the second mixer 140-2. Each of buffers 105-1 and 105-2 is... Figure 3 The buffer 105 shown is a separate instance and includes corresponding transconductance drivers 110-1 and 110-2 and corresponding transformers 120-1 and 120-2.

[0070] In one example, a first mixer 140-1 is used by a transmitter to up-convert an intermediate frequency (IF) signal to an radio frequency (RF) signal for transmission, and a second mixer 140-2 is used by a receiver to down-convert the received signal back to an IF signal. In this example, the receiver and transmitter may be part of a transceiver that switches between transmitting and receiving (e.g., half-duplex) but does not transmit and receive simultaneously. Therefore, in this example, only one of the first mixer 140-1 and the second mixer 140-2 is used at a given time.

[0071] Figure 6A An example of a feedback circuit for tracking and controlling the output voltage swings of a first buffer 105-1 and a second buffer 105-2 one at a time is shown. In this example, the feedback circuit includes a first peak detector 210-1 and a second peak detector 210-2, a first replication circuit 335-1 and a second replication circuit 335-2, a multiplexer 610, an operational amplifier 330, and a voltage regulator 230. In this example, the operational amplifier 330 and the regulator 230 are shared for both the first buffer 105-1 and the second buffer 105-2. Because only one of the mixers, the first mixer 140-1 and the second mixer 140-2, is used at a time, the feedback circuit can use the same operational amplifier 330 and regulator 230 for both the first buffer 105-1 and the second buffer 105-2. The first peak detector 210-1 and the second peak detector 210-2 can each be used individually. Figure 3The exemplary peak detector 210 shown is used for implementation, and the first replication circuit 335-1 and the second replication circuit 335-2 can each be used. Figure 4 The exemplary replication circuit 335 shown is used to implement this.

[0072] A first peak detector 210-1 is configured to detect the output voltage swing of the first buffer 105-1 and generate a first sense voltage (labeled "Vsen_1") based on the detected output voltage swing. A first replication circuit 335-1 is configured to generate a first reference voltage (labeled "Vref_1") based on a target voltage. A second peak detector 210-2 is configured to detect the output voltage swing of the second buffer 105-2 and generate a second sense voltage (labeled "Vsen_2") based on the detected output voltage swing. A second replication circuit 335-2 is configured to generate a second reference voltage (labeled "Vref_2") based on a target voltage.

[0073] A first sense voltage Vsen_1 and a second sense voltage Vsen_2, along with a first reference voltage Vref_1 and a second reference voltage Vref_2, are input to multiplexer 610. Multiplexer 610 selects one sense voltage from the sense voltages and one reference voltage from the reference voltages based on which mixer 140-1 or 140-2 is currently in use. For example, if the first mixer 140-1 is currently in use, multiplexer 610 selects the first sense voltage Vsen_1 and the first reference voltage Vref_1. Multiplexer 610 couples the selected sense voltage to the negative input of amplifier 330 and the selected reference voltage to the positive input of amplifier 330. At this point, multiplexer 610 may receive a selection signal (labeled “Sel”) indicating the sense voltage from the sense voltages and the reference voltage from the reference voltages, and select the sense voltage and reference voltage indicated by the selection signal Sel.

[0074] Operational amplifier 330 generates control signal 225 based on a comparison of the selected sense voltage and reference voltage, and outputs control signal 225 to regulator 230. Control signal 225 controls regulated voltage 235 generated by regulator 230, wherein regulated voltage 235 is provided to the input inductor of first buffer 105-1 (e.g., at the center tap of the input inductor of first buffer 105-1) and the input inductor of second buffer 105-2 (e.g., at the center tap of the input inductor of second buffer 105-2).

[0075] During operation, the feedback circuit adjusts the regulated voltage 235 based on feedback corresponding to the output voltage swing of the buffer 105-1 or 105-2 of the currently used mixer 140-1 or 140-2, such that the output voltage swing is approximately equal to the target voltage swing. Figure 6A In the example, each peak detector in peak detectors 210-1 and 210-2 is biased with a bias voltage Vbias, each replication circuit in replication circuits 335-1 to 335-2 is biased with a target voltage Vtarget, and the target voltage swing is approximately equal to the target voltage Vtarget minus the bias voltage Vbias (i.e., Vtarget - Vbias).

[0076] Although Figure 6A An example is shown in which the feedback circuitry includes separate replication circuits 335-1 and 335-2 for the first buffer 105-1 and the second buffer 105-2; however, it should be understood that this disclosure is not limited to this example. For example, Figure 6B The feedback circuit shown includes a common replication circuit 335 for the first buffer 105-1 and the second buffer 105-2, rather than... Figure 6A Examples of individual replication circuits 335-1 and 335-2 are shown. In this example, the reference voltage (labeled "Vref") generated by replication circuit 335 is coupled to the positive input of amplifier 330. Figure 6A Similar to multiplexer 610 in the example, multiplexer 620 selects one of the sensed voltages (labeled "Vsen_1" and "Vsen_2") based on a selection signal (labeled "Sel") and couples the selected sensed voltage to the negative input of amplifier 330. In this example, since buffers 105-1 and 105-2 share the replication circuit 335, multiplexer 620 does not need to... Figure 6A Choose between the reference voltages shown (labeled "Vref_1" and "Vref_2").

[0077] Figure 6CAnother example is shown where the feedback circuitry includes a common peak detector 210 for buffers 105-1 and 105-2. In this example, the sensed voltage generated by the peak detector 210 is coupled to the negative input of amplifier 330. In this example, the feedback circuitry includes a multiplexer 630 configured to selectively couple the differential output of one of the first buffers 105-1 and the second buffer 105-2 to the peak detector 210. The multiplexer 630 includes a first differential input coupled to the differential output of the first buffer 105-1, a second differential input coupled to the differential output of the second buffer 105-2, and a differential output coupled to the differential input of the peak detector 210. In operation, the multiplexer 630 selects the differential output of one of the first buffers 105-1 and the second buffer 105-2 based on a selection signal (labeled “Sel”) and couples the selected differential output to the peak detector 210. In some respects, the selection signal selects the differential output of the buffer corresponding to the mixer currently in use.

[0078] Figure 7 An exemplary implementation of a bias circuit 180 in a transconductance driver 110 according to certain aspects of this disclosure is shown. In this example, the bias circuit 180 includes a current source 725 and a current mirror transistor 730 (e.g., an NFET) for setting a bias current for the transconductance driver 110. The current source 725 is configured to provide a source of current (e.g., DC current). The current source 725 is coupled between a power rail and the drain of the current mirror transistor 730. The drain and gate of the current mirror transistor 730 are tethered together, and the source of the current mirror transistor 730 is coupled to ground. The gate of the current mirror transistor 730 is coupled to the gate of a first transistor 160 via a first gate resistor (labeled "Rg1") and to the gate of a second transistor 165 via a second gate resistor (labeled "Rg2"). The current mirror transistor 730, together with the first transistor 160 and the second transistor 165, forms a current mirror, wherein the current mirror biases the gate of the first transistor 160 and the gate of the second transistor 165 such that the current flowing from the current source 725 into the current mirror transistor 730 is mirrored at the first transistor 160 and the second transistor 165.

[0079] During operation, the current from current source 725 flows into current mirror transistor 730 and is mirrored at first transistor 160 and second transistor 165. As a result, the bias current at first transistor 160 is equal to or proportional to the current supplied by current source 725, and the bias current at second transistor 165 is equal to or proportional to the current supplied by current source 725. Therefore, in this example, the bias current of transconductance driver 110 is set by the current from current source 725. As discussed further below, current source 725 may have an adjustable current to allow adjustment of the bias current of transconductance driver 110.

[0080] Figure 8 Another example of a feedback circuit 805 for tracking and controlling the output voltage swing of buffer 105, according to certain aspects of this disclosure, is shown. The feedback circuit 805 adjusts the output voltage swing of buffer 105 by adjusting the bias current of transconductance driver 110. Thus, in this example, the bias current of transconductance driver 110 is a parameter adjusted to control the output voltage swing rather than the regulated voltage 235 at input inductor 125.

[0081] exist Figure 8 In the example, the center tap 127 of the input inductor 125 is coupled to the voltage supply rail. Furthermore, the current source 725 in the transconductance driver 110 has an adjustable current that allows the feedback circuit 805 to electrically adjust the bias current of the transconductance driver 110, as discussed further below. Figure 8 In this example, current source 725 is implemented via current source transistor 830 (e.g., NFET), where the drain of current source transistor 830 is coupled to the power rail, and the source of current source transistor 830 is coupled to the drain of current mirror transistor 730. In this example, the current of current source 725 is controlled by the gate voltage of current source transistor 830. Since the current of current source 725 is mirrored at first transistor 160 and second transistor 165 through current mirror transistor 730, the gate voltage of current source transistor 830 controls the bias current at first transistor 160 and second transistor 165. In this example, the current bias can increase when the gate voltage increases and decrease when the gate voltage decreases.

[0082] In some aspects, the feedback circuit 805 is configured to detect the output voltage swing at the output inductor 130 and control the bias current of the transconductance driver 110 based on the detected output voltage swing. In these aspects, the feedback circuit 805 can control the bias current based on the detected output voltage swing by comparing the detected output voltage swing with a target voltage swing and adjusting the bias current in a direction that reduces the difference between the output voltage swing and the target voltage swing. Figure 8In the example, as discussed above, the feedback circuit 805 controls the bias current of the transconductance driver 110 by controlling the gate voltage of the current source transistor 830.

[0083] exist Figure 8 In the example, feedback circuit 805 includes a peak detector 810 and control circuitry 820 coupled in feedback loop 808. Peak detector 810 has a differential input coupled to the differential output of buffer 105. Peak detector 810 is configured to detect the output voltage swing at the differential output of buffer 105 and generate a swing detection signal 815 based on the detected output voltage swing. The output voltage swing can be approximately equal to the peak difference between the voltage Vp at the positive output of buffer 105 and the voltage Vm at the negative output of buffer 105. In some aspects, the swing detection signal 815 can be a voltage related to (e.g., proportional to) the output voltage swing of buffer 105.

[0084] Control circuit 820 is configured to receive a swing detection signal 815 from peak detector 810 and generate a control signal 825 based on the swing detection signal 815. Control signal 825 is input to transconductance driver 110 to control the current bias of transconductance driver 110. In the example of implementing current source 725 using current source transistor 830, control signal 825 is input to the gate of current source transistor 830 and controls the current of current source transistor 830 by controlling the gate voltage of current source transistor 830. Since the current of current source transistor 830 is mirrored at first transistor 160 and second transistor 165, control signal 825 controls the bias current at first transistor 160 and second transistor 165.

[0085] In some aspects, control circuitry 820 generates control signal 825 by comparing swing detection signal 815 with a target reference signal corresponding to the target voltage swing, and generates control signal 825 based on this comparison. In these aspects, the target reference signal provides a reference point to which swing detection signal 815 is compared to evaluate whether the output voltage swing is higher or lower than the target voltage swing. In one example, the output voltage swing is approximately equal to the target voltage swing when swing detection signal 815 is approximately equal to the reference target signal. In this example, the reference target signal indicates the value (e.g., voltage) that swing detection signal 815 should have when the output voltage swing equals the target voltage swing. If swing detection signal 815 is higher than the reference target signal, the output voltage swing is higher than the target voltage swing; if swing detection signal 815 is lower than the reference target signal, the output voltage swing is lower than the target voltage swing. In this example, control circuitry 820 adjusts the output voltage swing to be closer to the target voltage swing by adjusting the bias current of transconductance driver 110 in a direction that reduces the difference between swing detection signal 815 and the target reference signal.

[0086] Therefore, the feedback circuit 805 adjusts the bias current of the transconductance driver 110 based on the feedback of the output voltage swing to keep the output voltage swing of the buffer 105 close to the target voltage swing. The feedback circuit 805 is able to keep the output voltage swing close to the target voltage swing across the PVT corner, thereby significantly reducing the variation in output voltage swing across the PVT corner. Reducing the swing variation across the PVT corner mitigates the excessive power consumption, signal path gain variation, increased LO leakage, and / or reliability issues discussed above with reference to Figure 1. Furthermore, when the buffer 105 is placed at the end of the LO path, the feedback circuit 805 is able to eliminate swing variations caused by one or more other devices (e.g., amplifiers, phase shifters, etc.) in the LO path preceding the buffer 105, as discussed above.

[0087] The output voltage swing of buffer 105 can increase exponentially with the bias current, causing a sharp change in the loop gain of feedback loop 808, especially at low output swing. As a result, feedback loop 808 may be more difficult to achieve good loop stability compared to feedback loop 208, where the approximately linear relationship between the regulated voltage 235 and the output voltage swing provides better loop stability.

[0088] Figure 9 Exemplary implementations of a peak detector 810 and a control circuit 820 according to certain aspects of this disclosure are shown. Figure 9 In the example, the peak detector 810 includes the use of Figure 3 The exemplary peak detector 210 shown implements a peak detector 905. Therefore,Figure 3 The description of the exemplary peak detector 210 is applicable Figure 9 The peak detector 905 is used, and therefore will not be described further in this paper for the sake of brevity. The peak detector 905 generates a sense voltage Vsen at node 322 based on the output voltage swing. As described above, the sense voltage Vsen is related to the output voltage swing (e.g., by a proportion that depends on the bias voltage Vbias).

[0089] In this example, the peak detector 810 also includes an operational amplifier 910 and a replication circuit 920. The operational amplifier 910 and replication circuit 920 are used to reduce the PVT effect on the sensed voltage Vsen to generate a more accurate swing detection signal 815, as discussed further below. The replication circuit 920 can... Figure 4 The example shown is implemented using a replication circuit 335. However, in this example, the gate of the first transistor 410 and the second transistor 415 (as shown) Figure 4 The gate of the operational amplifier 910 (as shown) is coupled to the output 915 instead of biasing the target voltage Vtarget. The replication circuit 920 generates a reference voltage Vref based on the output voltage of the operational amplifier 910. It should be noted that the replication circuit 920 in this example is not used to set the target voltage swing.

[0090] The sensed voltage Vsen is input to the negative input of operational amplifier 910, and the reference voltage Vref is input to the positive input of operational amplifier 910. The output 915 of operational amplifier 910 provides the swing detection signal 815 discussed above. The output 915 of operational amplifier 910 is also coupled to the gate of the first transistor 410 and the second transistor 415 of the replication circuit 920 (e.g., ...). Figure 4 The gate (as shown).

[0091] As discussed above, the replication circuit 920 is used to cancel the variation in the sensed voltage Vsen caused by the PVT condition. In this respect, the replication circuit 920 can be integrated on the same chip (i.e., die) as the peak detector 905. In one aspect, the replication circuit 920 can be located very close to the peak detector 905 so that the replication circuit 920 is subjected to approximately the same PVT condition as the peak detector 905. As a result, the variation in the reference voltage Vref caused by the PVT condition is approximately the same as the variation in the sensed voltage Vsen caused by the PVT condition. Since the operational amplifier 910 uses the difference between the sensed voltage Vsen and the reference voltage Vref at its input, the variation in the reference voltage Vref caused by the PVT condition approximately cancels out the variation in the sensed voltage Vsen caused by the PVT condition. This reduces the PVT effect on the output voltage 915 of the operational amplifier 910. The output 915 of the operational amplifier 910 provides the swing detection signal 815 discussed above, where the replication circuit 920 reduces the PVT effect on the swing detection signal 815.

[0092] Control circuitry 820 includes control amplifier 940 (e.g., operational amplifier). The output voltage 915 of operational amplifier 910 is input to the negative input of control amplifier 940, and the target voltage Vtarget is input to the positive input of control amplifier 940. The output of control amplifier 940 provides a control signal 825 to the current source 725 of transconductance driver 110. In this example, the target voltage Vtarget corresponds to the target reference signal discussed above.

[0093] During operation, the control amplifier 940 adjusts the control signal 825 in the direction of reducing the difference between the output voltage 915 of the operational amplifier 910 and the target voltage Vtarget (i.e., adjusting the output voltage 915 to be closer to the target voltage Vtarget). As a result, the control amplifier 940 forces the output voltage 915 of the operational amplifier 910 to be approximately equal to the target voltage Vtarget. This occurs when the output voltage swing of the buffer 105 is approximately equal to α*(Vtarget - Vbias), where α is a linearity coefficient. Consequently, the feedback circuit 805 adjusts the bias current so that the output voltage swing of the buffer 105 is approximately equal to α*(Vtarget - Vbias). Therefore, in this example, the target voltage swing of the feedback circuit 805 is approximately equal to α*(Vtarget - Vbias).

[0094] Therefore, for a given bias voltage Vbias, the target voltage swing can be set by adjusting the target voltage Vtarget input to the control amplifier 940 according to the desired target voltage swing. The bias voltages Vbias and Vtarget can be determined by... Figure 3The voltage generator 350 shown generates the voltage. The voltage generator 350 can be configured to set the voltage levels of the bias voltage Vbias and the target voltage Vtarget such that α*(Vtarget-Vbias) equals the desired target voltage swing. α can be determined by running an analog circuit on the feedback circuit 805 and the buffer 105 and / or performing a measurement.

[0095] It should be pointed out that, in Figure 9 In the example, the reference voltage Vref is used to offset the PVT effect on the sensed voltage Vsen. Figure 3 In the example, the reference voltage Vref is used to set the target voltage swing and counteract the PVT effect.

[0096] Figure 10 An exemplary method 1000 for controlling the output voltage swing of a buffer according to certain aspects of this disclosure is shown. The buffer (e.g., buffer 105) includes a transformer (e.g., transformer 120) and a driver (e.g., transconductance driver 110). The transformer includes an input inductor (e.g., input inductor 125) and an output inductor (e.g., output inductor 130), the input inductor being driven by the driver and magnetically coupled to the output inductor. Method 1000 can be performed by a feedback circuit 205.

[0097] At box 1010, output voltage swings are detected at the output inductor. For example, a peak detector (e.g., peak detector 210) can be used to detect output voltage swings.

[0098] At block 1020, a regulated voltage at the input inductor is controlled based on the detected output voltage swing. The regulated voltage (e.g., regulated voltage 235) can be applied to the center tap of the input inductor.

[0099] In some aspects, controlling the regulated voltage based on a detected output voltage swing may include comparing the detected output voltage swing with a target voltage swing, and controlling the regulated voltage based on the comparison. Controlling the regulated voltage based on the comparison may include adjusting the regulated voltage in a direction that reduces the difference between the output voltage swing and the target voltage swing.

[0100] The buffers according to aspects of this disclosure can be employed in wireless communication devices (e.g., wireless mobile devices, base stations, customer premises equipment (CPE), etc.) to buffer one or more LO signals allocated to a mixer in the device. In some aspects, the wireless communication device (e.g., a 5G device) includes a phased antenna array that allows the device to use beamforming to receive and / or transmit signals with high directivity to increase range. In these aspects, the mixer can be used as a receiver and / or transmitter of the phased antenna array.

[0101] On this point, Figure 11 An example of a receiver 1105 configured to receive signals from antennas 1115-1 to 1115-n in a phased antenna array is shown. In this example, receiver 1105 includes a plurality of receiver chains 1112-1 to 1112-n, each receiver chain 1112-1 to 1112-n being coupled to a corresponding antenna in antennas 1115-1 to 1115-n. Each receiver chain 1112-1 to 1112-n includes a corresponding low-noise amplifier (LNA) 1110-1 to 1110-n and a corresponding mixer 1140-1 to 1140-n. In each receive chain 1112-1 to 1112-n, the corresponding LNAs 1110-1 to 1110-n are configured to amplify signals from the corresponding antennas 1115-1 to 1115-n in the array, and the corresponding mixers 1140-1 to 1140-n are configured to mix the signals from the corresponding LNAs 1110-1 to 1110-n with the corresponding LO signals to down-convert the frequency of the signals. In this example, the LO signals to each mixer 1140-1 to 1140-n are phase-shifted before mixing to use beamforming to set the receiving direction of the phased antenna array. For each mixer 1140-1 to 1140-n, the phase shift of the corresponding LO signal can be set based on the desired receiving direction of the phased antenna array. It should be understood that each receive chain may include one or more additional components (not shown).

[0102] Receiver 1105 also includes combiner 1150 and combined receiving circuitry 1155. Combiner 1150 is configured to combine the output signals of receive chains 1112-1 to 1112-n into a combined signal. Combiner 1150 outputs the combined signal to combined receiving circuitry 1155, which processes the combined signal. The processing performed by combined receiving circuitry 1155 may include amplification, filtering, analog-to-digital conversion, etc. Combined receiving circuitry 1155 outputs the processed combined signal to baseband processor 1160, which can process the signal from combined receiving circuitry 1155 to recover data from the signal. The recovered data may be stored in the memory of the wireless communication device and / or sent to another processor (e.g., a central processing unit (CPU)) for further processing.

[0103] Figure 12 An example of an LO network for providing an LO signal to mixer 1140-1 in receive chain 1112-1 is shown. In this example, the LO network includes LO 1210, phase shifter 1220, and buffer 105 coupled to mixer 1140-1. The output voltage swing of buffer 105 can be used... Figure 2The exemplary feedback circuit 205 shown or Figure 8 The exemplary feedback circuit 805 shown is controlled. In this example, LO 1210 is coupled to phase shifter 1220, and phase shifter 1220 is coupled to the input of buffer 105. In operation, LO 1210 generates an LO signal, and phase shifter 1220 shifts the phase of the LO signal based on the desired reception direction of the phased array antenna. Buffer 105 receives the phase-shifted LO signal from phase shifter 1220 and drives mixer 1140-1 based on the phase-shifted LO signal. It should be understood that the LO network may include one or more additional components (not shown) in the LO path between LO 1210 and mixer 1140-1.

[0104] It should be understood that Figure 11 The LO signal of each of the other mixers 1140-2 to 1140-n shown can be generated by a similar method. Figure 12 The corresponding LO network is provided for the illustrated LO network. In one example, the LO networks may share a common LO1210, where each LO network phase-shifts the LO signal from LO1210 accordingly based on the desired receiving direction of the phased antenna array.

[0105] Figure 13 Another example of a receiver 1305 configured to receive signals from antennas 1115-1 to 1115-n in a phased antenna array is shown. In this example, frequency conversion is performed after signal combination, as discussed further below. In this example, receiver 1305 includes a plurality of receive chains 1312-1 to 1312-n, each of which is coupled to a corresponding antenna in antennas 1115-1 to 1115-n. Each receive chain 1312-1 to 1312-n includes a corresponding LNA 1310-1 to 1310-n and a corresponding phase shifter 1330-1 to 1330-n. In each receive chain 1312-1 to 1312-n, the corresponding LNAs 1310-1 to 1310-n are configured to amplify the signal from the corresponding antennas 1115-1 to 1115-n in the array, and the corresponding phase shifters 1330-1 to 1330-n are configured to shift the phase of the signal from the corresponding LNAs 1310-1 to 1310-n accordingly. The phase shift of each phase shifter 1330-1 to 1330-n can be set using beamforming based on the desired receiving direction of the phased antenna array. It should be understood that each receive chain may include one or more additional components (not shown).

[0106] Receiver 1305 also includes combiner 1350, mixer 1340, and combined receiver circuitry 1315. Combiner 1350 is configured to combine the output signals of receive chains 1312-1 to 1312-n into a combined signal. Combiner 1350 outputs the combined signal to mixer 1340. Mixer 1340 mixes the combined signal with an LO signal to down-convert the frequency of the combined signal. Mixer 1340 outputs the down-converted signal to combined receiver circuitry 1355, which processes the combined signal. The processing performed by combined receiver circuitry 1355 may include amplification, filtering, analog-to-digital conversion, etc. Combined receiver circuitry 1355 outputs the combined signal to baseband processor 1160, which can process the combined signal from combined receiver circuitry 1355 to recover data from the signal. The recovered data may be stored in the memory of the wireless communication device and / or sent to another processor (e.g., CPU) for further processing.

[0107] Figure 14 An example of an LO network for providing a LO signal to mixer 1340 in receiver 1305 is shown. In this example, the LO network includes LO 1410 and a buffer 105 coupled to mixer 1340. It can be used... Figure 2 The exemplary feedback circuit 205 shown or Figure 8 The exemplary feedback circuit 805 shown controls the output voltage swing of buffer 105. In this example, LO 1410 is coupled to the input of buffer 105. In operation, LO 1410 generates an LO signal, which is input to the input of buffer 105. Buffer 105 receives the LO signal and drives mixer 1340 based on the LO signal. It should be understood that the LO network may include one or more additional components (not shown) in the LO path between LO 1410 and mixer 1340.

[0108] Figure 15 An example of a transmitter 1505 for a phased antenna array according to aspects of this disclosure is shown. In this example, the transmitter 1505 includes a transmitting circuit 1555, a splitter 1550, and a plurality of transmitting chains 1512-1 to 1512-n. Each of the transmitting chains 1512-1 to 1512-n has an input coupled to the splitter 1550 and an output coupled to a corresponding antenna among the antennas 1515-1 to 1515-n in the phased antenna array.

[0109] During operation, the baseband processor 1560 outputs a signal to the transmitting circuit 1555. The transmitting circuit 1555 processes the received signal for transmission. The processing performed by the transmitting circuit 1555 may include digital-to-analog conversion, amplification, etc. The transmitting circuit 1555 outputs the processed signal to the splitter 1550. The splitter 1550 divides the signal from the transmitting circuit 1555 into multiple signals, and inputs each of the multiple signals into the corresponding transmitting chain in the transmitting chains 1512-1 to 1512-n.

[0110] Each of the transmit chains 1512-1 to 1512-n includes a corresponding mixer 1540-1 to 1540-n and a corresponding power amplifier (PA) 1510-1 to 1510-n. In each transmit chain 1512-1 to 1512-n, the corresponding mixer 1540-1 to 1540 mixes the corresponding signal from the splitter 1555 with the corresponding LO signal, and the corresponding PA 1510-1 to 1510-n amplifies the signal from the corresponding mixer. The output signal of each transmit chain 1512-1 to 1512-n is fed to the corresponding antenna 1515-1 to 1515-n in the phased antenna array. In this example, the LO signal to each mixer 1540-1 to 1540-n is phase-shifted before mixing to use beamforming to set the transmit direction of the phased antenna array. For each mixer 1540-1 to 1540-n, the phase shift of the corresponding LO signal can be set based on the desired transmission direction of the phased antenna array. It should be understood that each receiver chain may include one or more additional components (not shown).

[0111] Figure 16 An example of an LO network for providing a LO signal to mixer 1540-1 in transmit chain 1512-1 is shown. In this example, the LO network includes LO 1610, phase shifter 1620, and buffer 105 coupled to mixer 1540-1. The output voltage swing of buffer 105 can be used... Figure 2 The exemplary feedback circuit 205 shown or Figure 8 The exemplary feedback circuit 805 shown is used for control. In this example, LO 1610 is coupled to phase shifter 1620, and phase shifter 1620 is coupled to the input of buffer 105. In operation, LO 1610 generates an LO signal, and phase shifter 1620 shifts the phase of the LO signal based on the desired transmission direction of the phased array antenna. Buffer 105 receives the phase-shifted LO signal from phase shifter 1620 and drives mixer 1540-1 based on the phase-shifted LO signal. It should be understood that the LO network may include one or more additional components (not shown) in the LO path between LO 1610 and mixer 1540-1.

[0112] It should be understood thatFigure 15 The LO signal of each of the other mixers 1540-2 to 1540-n shown can be generated by a similar method. Figure 16 The corresponding LO network is provided for the illustrated LO network. In one example, the LO networks can share a common LO1610, where each LO network offsets the LO signal from the LO 1610 by a corresponding phase shift based on the desired transmission direction of the phased antenna array.

[0113] Figure 17 Another example of a transmitter 1705 for a phased antenna array according to various aspects of this disclosure is shown. In this example, frequency up-conversion is performed before signal separation, as discussed further below. The transmitter 1705 includes a transmitter circuit 1755, a mixer 1740, a splitter 1750, and a plurality of transmitter chains 1712-1 to 1712-n. Each of the transmitter chains 1712-1 to 1712-n has an input coupled to the splitter 1750 and an output coupled to a corresponding antenna among the antennas 1515-1 to 1515-n in the phased antenna array.

[0114] During operation, the baseband processor 1560 outputs a signal to the transmitter circuit 1755. The transmitter circuit 1755 processes the received signal for transmission. The processing performed by the transmitter circuit 1755 may include digital-to-analog conversion, amplification, etc. The transmitter circuit 1755 outputs the processed signal to the mixer 1740, which mixes the processed signal with the LO signal to up-convert the frequency of the processed signal. The mixer 1740 outputs the up-converted signal to the splitter 1750. The splitter 1750 splits the signal from the mixer 1740 into multiple signals, and each of the multiple signals is input to the corresponding transmitter chain in the transmitter chains 1712-1 to 1712-n.

[0115] Each of the transmit chains 1712-1 to 1712-n includes a corresponding phase shifter 1730-1 to 1730-n and a corresponding power amplifier (PA) 1710-1 to 1710-n. In each transmit chain 1712-1 to 1712-n, the corresponding phase shifter 1730-1 to 1730-n shifts the phase of the corresponding signal from the splitter 1750 by a corresponding phase shift, and the corresponding PA 1710-1 to 1710-n amplifies the signal from the corresponding phase shifter. The phase shift of each phase shifter 1730-1 to 1730-n can be set based on the desired transmission direction of the phased antenna array. The output signal of each transmit chain 1712-1 to 1712-n is fed to the corresponding antennas 1515-1 to 1515-n in the phased antenna array.

[0116] Figure 18An example of a LO network for providing a LO signal to a mixer 1740 in transmitter 1705 is shown. In this example, the LO network includes a LO 1810 and a buffer 105 coupled to mixer 1740. It can be used... Figure 2 The exemplary feedback circuit 205 shown or Figure 8 The exemplary feedback circuit 805 shown controls the buffer 105. In this example, LO 1810 is coupled to the input of buffer 105. In operation, LO 1810 generates an LO signal, which is input to the input of buffer 105. Buffer 105 receives the LO signal and drives mixer 1740 based on the LO signal. It should be understood that the LO network may include one or more additional components (not shown) in the LO path between LO 1810 and mixer 1740.

[0117] The control circuits 220 and 820 discussed above can be implemented using a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete hardware components (e.g., logic gates), or any combination thereof designed to perform the functions described herein. The processor can perform the functions described herein by executing software that includes code for performing the functions. The software can be stored on a computer-readable storage medium such as RAM, ROM, EEPROM, optical disk, and / or magnetic disk.

[0118] Any references to elements in this document using names such as "first," "second," etc., generally do not restrict the number or order of those elements. Rather, these names serve as a convenient way to distinguish two or more elements or instances of elements. Therefore, references to the first element and the second element do not imply that only two elements can be used, or that the first element must precede the second element.

[0119] In this disclosure, the term “exemplary” is used to mean “serving as an example, instance, or illustration.” Any implementation or aspect described herein as “exemplary” is not necessarily to be construed as superior to or advantageous to other aspects of this disclosure. Similarly, the term “aspect” does not require that all aspects of this disclosure include the features, advantages, or modes of operation discussed. The term “coupling” is used herein to refer to direct or indirect electrical coupling between two structures. As used herein, if one value (e.g., voltage) is within 90% to 110% of the other value, the two values ​​(e.g., voltage) are “approximately” equal. As used herein, controlling the regulated voltage 235 is understood to mean controlling the voltage level of the regulated voltage 235.

[0120] The prior description of this disclosure is provided to enable those skilled in the art to make or use this disclosure. Various modifications to this disclosure will be apparent to those skilled in the art, and other variations may be applied without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not intended to be limited to the examples described herein, but is accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A device for buffering input signals, comprising: A transformer, comprising an input inductor and an output inductor, wherein the input inductor is magnetically coupled to the output inductor; A transconductance driver is configured to drive the input inductor based on the input signal; as well as The feedback circuit is configured as follows: Detect the output voltage fluctuation at the output inductor; An regulated voltage is generated at the input inductor; as well as Controlling the regulated voltage based on a comparison between the detected output voltage swing and the target voltage swing includes: If the detected output voltage swing is higher than the target voltage swing, then the regulated voltage is reduced; as well as If the detected output voltage swing is lower than the target voltage swing, then the regulated voltage is increased.

2. The apparatus of claim 1, wherein the input signal comprises a differential input voltage, and the transconductance driver is configured to convert the differential input voltage into a current to drive the input inductor.

3. The apparatus of claim 2, wherein the transconductance driver comprises: The first transistor has a drain coupled to a first terminal of the input inductor, a gate coupled to a first input of the transconductance driver, and a source coupled to ground. as well as The second transistor has a drain coupled to a second terminal of the input inductor, a gate coupled to a second input of the transconductance driver, and a source coupled to the ground.

4. The apparatus of claim 3, wherein the transconductance driver further comprises a bias circuit configured to bias the gate of the first transistor and the gate of the second transistor by a gate bias voltage.

5. The apparatus of claim 1, further comprising a mixer coupled to the output inductor.

6. The apparatus of claim 1, wherein the feedback circuit comprises: A peak detector, coupled to the output inductor, wherein the peak detector is configured to detect the output voltage swing at the output inductor and generate a swing detection signal based on the detected output voltage swing; A voltage regulator coupled to the input inductor, wherein the voltage regulator is configured to generate the regulated voltage; as well as A control circuit, coupled to the peak detector and the voltage regulator, wherein the control circuit is configured to control the regulated voltage generated by the voltage regulator based on the swing detection signal.

7. The apparatus of claim 6, wherein the control circuit is configured to: compare the swing detection signal with a target reference signal corresponding to a target voltage swing; and The regulated voltage is adjusted based on the comparison.

8. The apparatus of claim 7, wherein the control circuit is configured to adjust the regulated voltage in a direction that reduces the difference between the oscillation detection signal and the target reference signal.

9. The apparatus of claim 7, wherein the control circuit comprises: A replication circuit is configured to generate the target reference signal; as well as An operational amplifier having a first input, a second input, and an output, wherein a swing detection signal is input to the first input, a target reference signal is input to the second input, and the output is configured to output a control signal to the voltage regulator, and the control signal controls the regulated voltage.

10. The apparatus of claim 9, wherein the replication circuit is a copy of the peak detector.

11. The apparatus according to claim 9, wherein: The peak detector includes: The first transistor has a gate coupled to a first output of the output inductor, a drain coupled to a power rail, and a source coupled to a first node, wherein the first node is coupled to the first input of the operational amplifier; The second transistor has a gate coupled to a second output of the output inductor, a drain coupled to the power rail, and a source coupled to the first node; and A first current source is coupled between the first node and ground; and The replication circuit includes: The third transistor has a gate coupled to a bias circuit, a drain coupled to the power rail, and a source coupled to a second node, wherein the second node is coupled to the second input of the operational amplifier; A fourth transistor has a gate coupled to the bias circuit, a drain coupled to the power rail, and a source coupled to the second node; and A second current source is coupled between the second node and the ground.

12. The apparatus of claim 9, wherein the oscillation detection signal includes a sensing voltage related to the oscillation of the output voltage, and the target reference signal includes a reference voltage.

13. The apparatus of claim 12, wherein the operational amplifier is configured to adjust the control signal in a direction that reduces the difference between the sensed voltage and the reference voltage.

14. The apparatus of claim 12, wherein the sensed voltage is approximately proportional to the swing of the output voltage.

15. The apparatus of claim 9, wherein the voltage regulator comprises a transistor coupled between a power rail and a center tap of the input inductor, and the control signal is input to the gate of the transistor.

16. The apparatus of claim 1, wherein the regulated voltage is applied to the center tap of the input inductor.

17. A method for controlling the output voltage swing of a buffer, wherein the buffer includes a transformer and a driver, the transformer including an input inductor and an output inductor, the input inductor being driven by the driver and the input inductor being magnetically coupled to the output inductor, the method comprising: Detect the output voltage swing at the output inductor; as well as Controlling the regulated voltage at the input inductor based on a comparison between the detected output voltage swing and the target voltage swing includes: If the detected output voltage swing is higher than the target voltage swing, then the regulated voltage is reduced; as well as If the detected output voltage swing is lower than the target voltage swing, then the regulated voltage is increased.

18. The method of claim 17, wherein comparing the detected output voltage swing with the target voltage swing comprises: A peak detector is used to generate a swing detection signal based on the detected output voltage swing; as well as The swing detection signal is compared with a target reference signal corresponding to the swing of the target voltage.

19. The method of claim 18, wherein the swing detection signal comprises a sensing voltage that is approximately proportional to the swing of the output voltage.

20. An apparatus for buffering an input signal, comprising: A transformer, comprising an input inductor and an output inductor, wherein the input inductor is magnetically coupled to the output inductor; A transconductance driver is configured to drive the input inductor based on the input signal; as well as The feedback circuit is configured as follows: Detect the output voltage fluctuation at the output inductor; as well as Controlling the bias current of the transconductance driver based on a comparison between the detected output voltage swing and the target voltage swing includes: If the detected output voltage swing is higher than the target voltage swing, then the bias current is reduced; as well as If the detected output voltage swing is lower than the target voltage swing, the bias current is increased.

21. The apparatus of claim 20, wherein the input signal comprises a differential input voltage, and the transconductance driver is configured to convert the differential input voltage into a current to drive the input inductor.

22. The apparatus of claim 21, wherein the transconductance driver comprises: The first transistor has a gate and a drain; The second transistor has a gate and a drain, wherein the input inductor is coupled between the drain of the first transistor and the drain of the second transistor, and the differential input voltage is input to the gate of the first transistor and the gate of the second transistor. The current source is configured to generate an adjustable current; as well as A current mirror transistor having a drain and a gate, the drain being coupled to the current source, the gate being coupled to the gate of the first transistor and the gate of the second transistor, wherein the feedback circuit controls the bias current of the driver by controlling the adjustable current of the current source.

23. The apparatus of claim 22, wherein the current source comprises a current source transistor, and the feedback circuit is configured to control the adjustable current by controlling the gate voltage of the current source transistor.

24. An apparatus for buffering an input signal, comprising: A transformer, comprising an input inductor and an output inductor, wherein the input inductor is magnetically coupled to the output inductor; Components for driving the input inductor based on the input signal; A component used to detect the output voltage fluctuation at the output inductor; A component for generating a regulated voltage at the input inductor; as well as A component for controlling the regulated voltage based on a comparison between a detected output voltage swing and a target voltage swing includes: A component for reducing the regulated voltage if the detected output voltage swing is higher than the target voltage swing; as well as A component for increasing the regulated voltage if the detected output voltage swing is lower than the target voltage swing.

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