An MCP-PMT readout circuit

Abstract

The present invention relates to an MCP-PMT readout circuit, which includes an MCP-PMT socket chip U1, a high-voltage socket chip U2, a signal socket pin unit U3, and the connection relationships between their respective pins; the output signal of the output electrode of the MCP-PMT is read through the pins of the MCP-PMT socket chip U1; the high-voltage socket chip U2 supplies power to each electrode of the MCP-PMT; the signal socket pin unit U3 receives the output signal of the output electrode of the MCP-PMT and transmits it to the front-end circuit. The readout circuit of the present invention can, to the greatest extent, avoid the phenomena of crosstalk and ringing when reading the MCP-PMT signal, improve the performance of the MCP-PMT, and make the performance of the MCP-PMT more stable.

Description

Technical Field

[0001] The present invention relates to the field of MCP-PMT readout circuits, and particularly to a low-crosstalk MCP-PMT readout circuit. Background Art

[0002] The microchannel plate photomultiplier tube (MCP-PMT) is a type of photomultiplier tube (PMT). Different from the traditional photomultiplier tube, it uses a microchannel plate (MCP) instead of discrete dynodes distributed in stages. It has a very fast time response. In addition, it also has characteristics such as a compact structure, high gain, high position resolution, and anti-magnetic field. Due to the excellent performance of the MCP-PMT, it has been widely used in many fields: particle physics experiments, medical imaging, national defense security, and so on.

[0003] According to different anode designs, MCP-PMTs can be divided into multi-anode types and single-anode types. The multi-anode MCP-PMT not only has all the advantages of the single-anode MCP-PMT but also has the characteristic of position sensitivity, and has become a hot spot in research and application. However, there has always been a common problem in the use of multi-anode MCP-PMTs - crosstalk and ringing phenomena. Crosstalk is manifested as when a channel detects a photon and generates a signal, other channels without photons can also show signals (crosstalk), which is shaped like the differential of a real signal and has a polarity opposite to that of the signal. Ringing is manifested as the presence of a decaying sine-wave ringing at the trailing edge of the signal generated when a channel detects a photon, and it will also be induced and appear on all channels. It should be noted that not only the signals excited by light will have crosstalk and ringing phenomena, but also the signals generated by thermal noise in a light-shielded environment exist. When multiple pixels have signals simultaneously, the amplitudes of the induced crosstalk and ringing will be superimposed. These properties cause the crosstalk and ringing phenomena to affect the signal shape, generate false signals, and greatly reduce the excellent performance of the MCP-PMT.

[0004] Technical solutions of the prior art: Taking the crosstalk suppression technology of the MCP-PMT with the model number Hamamatsu SL10 as an example, the Department of Physics of Nagoya University in Japan and the Electron Tube Division of Hamamatsu Corporation jointly studied a method of splitting the MCP for crosstalk suppression. As Figure 1As shown, the specific method is to divide the second-stage MCP into parts corresponding to the anodes one by one. Electrodes are set for each part, and voltages are separately provided for each MCP part electrode and the corresponding anode electrode on the voltage dividing circuit. The series amplitude ratio has decreased by 2 times (from 15% to 7%), and the ringing phenomenon has almost disappeared. However, the method of dividing the second-stage MCP can be achieved for MCP-PMTs with fewer anodes and larger anode induction areas, but it is very difficult to apply to MCP-PMTs with the number of anodes increased to dozens or hundreds and small anode induction areas. Therefore, the application of this division method is limited. In addition, although this division method reduces the series amplitude ratio to 7%, in the case of large signals or ignition of multiple anodes, the crosstalk phenomenon is still not negligible. Therefore, the series amplitude ratio is still relatively high, affecting the performance of the MCP-PMT. To address the above problems, the present invention proposes an MCP-PMT readout circuit. Summary of the Invention

[0005] The object of the present invention is to provide an MCP-PMT readout circuit applicable to multi-anode MCP-PMTs, which can, when reading MCP-PMT signals, avoid crosstalk and ringing phenomena to the greatest extent, improve the performance of the MCP-PMT, and make the performance of the MCP-PMT more stable.

[0006] To achieve the above object, the present invention provides the following solution:

[0007] An MCP-PMT readout circuit includes an MCP-PMT socket chip U1, a high-voltage socket chip U2, and a signal socket pin unit U3;

[0008] The MCP-PMT socket chip U1 includes a first K pin, a first In1 pin, a first Out1 pin, a first In2 pin, and a first Out2 pin;

[0009] The MCP-PMT socket chip U1 further includes a first A1 pin, a first A2 pin,..., a first Ai pin,..., and a first A16 pin;

[0010] The high-voltage socket chip U2 includes a second K pin, a second In1 pin, a second Out1 pin, a second In2 pin, a second Out2 pin, and a GND pin;

[0011] The signal socket pin unit U3 includes a second A1 pin, a second A2 pin,..., a second Ai pin,..., and a second A16 pin;

[0012] The first K pin is connected to the second K pin; the first In1 pin is connected to the second In1 pin, the first Out1 pin is connected to the second Out1 pin, and the first In2 pin is connected to the second In2 pin; the first Out2 pin is connected to the second Out2 pin; the first Out2 pin is also connected to the output electrode of the MCP-PMT; the GND pin is grounded;

[0013] The first A1 pin to the first A16 pins are connected to the second A1 pin to the second A16 pins in one-to-one correspondence;

[0014] The MCP-PMT socket chip U1 is used to read the output signal of the output electrode of the MCP-PMT;

[0015] The high-voltage socket chip U2 is used to receive the voltage provided by the MCP-PMT voltage-dividing circuit to supply power to each electrode of the MCP-PMT;

[0016] The signal socket pin unit U3 is used to receive the output signal of the output electrode of the MCP-PMT and transmit it to the front-end circuit.

[0017] Optionally, the first Out2 pin includes an Out2-1 pin, an Out2-2 pin, an Out2-3 pin, and an Out2-4 pin;

[0018] The Out2-1 pin, the Out2-2 pin, the Out2-3 pin, and the Out2-4 pin are all connected to the second Out2 pin.

[0019] Optionally, the readout circuit further includes decoupling capacitors C1, C2, C3, and C4;

[0020] One end of the decoupling capacitor C1 is connected to the Out2-4 pin, and the other end of the decoupling capacitor C1 is grounded;

[0021] One end of the decoupling capacitor C2 is connected to the Out2-3 pin, and the other end of the decoupling capacitor C2 is grounded;

[0022] One end of the decoupling capacitor C3 is connected to the Out2-2 pin, and the other end of the decoupling capacitor C3 is grounded;

[0023] One end of the decoupling capacitor C4 is connected to the Out2-1 pin, and the other end of the decoupling capacitor C4 is grounded.

[0024] Optionally, the readout circuit further includes decoupling capacitors C5, C6, C7, and C8;

[0025] One end of the decoupling capacitor C5 is connected to the connection line between the first Out2 pin and the second Out2 pin, and the other end of the decoupling capacitor C5 is connected to the connection line between the first In2 pin and the second In2 pin;

[0026] One end of the decoupling capacitor C6 is connected to the connection line between the first In2 pin and the second In2 pin, and the other end of the decoupling capacitor C6 is connected to the connection line between the first Out1 pin and the second Out1 pin;

[0027] One end of the decoupling capacitor C7 is connected to the connection line between the first Out1 pin and the second Out1 pin, and the other end of the decoupling capacitor C7 is connected to the connection line between the first In1 pin and the second In1 pin;

[0028] One end of the decoupling capacitor C8 is connected to the connection line between the first In1 pin and the second In1 pin, and the other end of the decoupling capacitor C8 is connected to the connection line between the first K pin and the second K pin.

[0029] Optionally, the decoupling capacitors C1, C2, C3, and C4 have the same capacitance value; the decoupling capacitors C5, C6, C7, and C8 have the same capacitance value; the capacitance value of the decoupling capacitor C1 is different from the capacitance value of the decoupling capacitor C5.

[0030] Optionally, damping resistors are respectively connected in series on the signal connection lines where the first A1 pin to the first A16 pins are respectively connected to the second A1 pin to the second A16 pins in a one-to-one correspondence.

[0031] Optionally, protection diodes are respectively connected to the signal connection lines where the first A1 pin to the first A16 pins are respectively connected to the second A1 pin to the second A16 pins in a one-to-one correspondence, and the cathode of each protection diode is connected to the corresponding connection line, and the anode of each protection diode is grounded.

[0032] Optionally, the readout circuit is arranged in a PCB board structure; the PCB board structure includes a Top layer, a Gnd1 layer, a Sig1 layer, a Sig2 layer, a Gnd2 layer, and a Bottom layer from top to bottom in sequence;

[0033] A part of the power supply electrode trace between the MCP-PMT socket chip U1 and the high-voltage socket chip U2 is arranged on the Top layer;

[0034] On the Bottom layer, another part of the power supply electrode trace between the MCP-PMT socket chip U1 and the high-voltage socket chip U2 is provided; the power supply electrode trace includes the power supply connection lines of the first K pin and the second K pin, the power supply connection lines of the first In1 pin and the second In1 pin, the power supply connection lines of the first Out1 pin and the second Out1 pin, the power supply connection lines of the first In2 pin and the second In2 pin, and the power supply connection lines of the first Out2 pin and the second Out2 pin;

[0035] On the Sig1 layer, a part of the output signal trace between the MCP-PMT socket chip U1 and the signal socket pin unit U3 is provided;

[0036] On the Sig2 layer, another part of the output signal trace between the MCP-PMT socket chip U1 and the signal socket pin unit U3 is provided; the output signal trace includes signal connection lines in which the first A1 pin to the first A16 pins are connected to the second A1 pin to the second A16 pins in a one-to-one correspondence;

[0037] The Gnd1 layer and the Gnd2 layer are ground planes.

[0038] Optionally, two adjacent signal connection lines in the output signal trace are provided on different layers, and two adjacent signal connection lines on the same layer are spaced apart.

[0039] Optionally, the adjacent sides of each pin in the signal socket pin unit U3 are all ground pins.

[0040] According to the specific embodiments provided by the present invention, the following technical effects are disclosed by the present invention:

[0041] The present invention relates to an MCP-PMT readout circuit, including an MCP-PMT socket chip U1, a high-voltage socket chip U2, and a signal socket pin unit U3; the MCP-PMT socket chip U1 is used to read the output signal of the output electrode of the MCP-PMT; the high-voltage socket chip U2 is used to receive the voltage provided by the MCP-PMT voltage division circuit to supply power to each electrode of the MCP-PMT; the signal socket pin unit U3 is used to receive the output signal of the output electrode of the MCP-PMT and transmit it to the front-end circuit. The readout circuit of the present invention is applicable to a multi-anode MCP-PMT, can avoid crosstalk and ringing phenomena to the greatest extent when reading MCP-PMT signals, improve the performance of the MCP-PMT, and make the performance of the MCP-PMT more stable. Description of the Drawings

[0042] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the accompanying drawings required in the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0043] Figure 1 It is a schematic diagram of the segmentation of the MCP-PMT structure in the prior art;

[0044] Figure 2 It is a schematic diagram of the principle of an MCP-PMT readout circuit provided in Embodiment 1 of the present invention;

[0045] Figure 3 It is a schematic diagram of the readout circuit PCB board provided in Embodiment 1 of the present invention;

[0046] Figure 4 It is a schematic diagram of the Top layer of the readout circuit PCB board provided in Embodiment 1 of the present invention;

[0047] Figure 5 It is a schematic diagram of the Gnd1 layer of the readout circuit PCB board provided in Embodiment 1 of the present invention;

[0048] Figure 6 It is a schematic diagram of the Sig1 layer of the readout circuit PCB board provided in Embodiment 1 of the present invention;

[0049] Figure 7 It is a schematic diagram of the Sig2 layer of the readout circuit PCB board provided in Embodiment 1 of the present invention;

[0050] Figure 8 It is a schematic diagram of the Gnd2 layer of the readout circuit PCB board provided in Embodiment 1 of the present invention;

[0051] Figure 9 It is a schematic diagram of the Bottom layer of the readout circuit PCB board provided in Embodiment 1 of the present invention;

[0052] Figure 10 It is a crosstalk waveform diagram of the excitation channel and other channels provided in Embodiment 1 of the present invention;

[0053] Figure 11 It is a relationship diagram of the crosstalk amplitude ratio varying with the signal amplitude in the simulation provided in Embodiment 1 of the present invention;

[0054] Figure 12 It is a relationship diagram of the amplitude ratio varying with the signal amplitude in the simulation provided in Embodiment 1 of the present invention;

[0055] Figure 13This is the signal and crosstalk ringing waveform diagram of the MCP-PMT when the readout circuit is not used and used in Embodiment 1 of the present invention. Detailed implementation manners

[0056] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0057] The object of the present invention is to provide an MCP-PMT readout circuit, which is applicable to a multi-anode MCP-PMT, can avoid crosstalk and ringing phenomena to the greatest extent when reading the MCP-PMT signal, improve the performance of the MCP-PMT, and make the performance of the MCP-PMT more stable.

[0058] To make the above objects, features, and advantages of the present invention more obvious and understandable, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0059] Embodiment 1

[0060] As Figure 2 shown, this embodiment provides an MCP-PMT readout circuit, including an MCP-PMT socket chip U1, a high-voltage socket chip U2, and a signal socket pin unit U3;

[0061] The MCP-PMT socket chip U1 includes a first K pin, a first In1 pin, a first Out1 pin, a first In2 pin, and a first Out2 pin; corresponding to Figure 2 K, In1, Out1, In2, Out2, and GND in the MCP-PMT socket chip U1.

[0062] The MCP-PMT socket chip U1 further includes a first A1 pin, a first A2 pin,..., a first Ai pin,..., and a first A16 pin; corresponding to Figure 2 A1 to A16 in the MCP-PMT socket chip U1.

[0063] The high-voltage socket chip U2 includes a second K pin, a second In1 pin, a second Out1 pin, a second In2 pin, a second Out2 pin, and a GND pin, corresponding to Figure 2 K, In1, Out1, In2, Out2, and GND in the high-voltage socket chip U2.

[0064] The signal socket pin unit U3 includes a second A1 pin, a second A2 pin, ..., a second Ai pin, ..., a second A16 pin, corresponding to Figure 2 MCP-PMT1-A1 to MCP-PMT1-A16 in

[0065] Among them, the first K pin is connected to the second K pin; the first In1 pin is connected to the second In1 pin, the first Out1 pin is connected to the second Out1 pin, the first In2 pin is connected to the second In2 pin; the first Out2 pin is connected to the second Out2 pin; the first Out2 pin is also connected to the output electrode of the MCP-PMT; the GND pin is grounded;

[0066] Due to structural reasons, the first Out2 pin is divided into four pins with the same potential, that is, the first Out2 pin includes an Out2-1 pin, an Out2-2 pin, an Out2-3 pin and an Out2-4 pin; among them, the Out2-1 pin, the Out2-2 pin, the Out2-3 pin and the Out2-4 pin are all connected to the second Out2 pin.

[0067] Then the connection between the first Out2 pin and the output electrode of the MCP-PMT is actually that the Out2-1 pin, the Out2-2 pin, the Out2-3 pin and the Out2-4 pin are respectively connected to the four output electrodes of the MCP-PMT. In this way, the MCP-PMT is connected to the readout circuit through the MCP-PMT socket chip U1.

[0068] In order to ensure that the induced charges on the anode surfaces of the output electrodes of the MCP-PMT induce crosstalk on other anodes, a decoupling capacitor can be connected in series with each output electrode, so that the induced charges on the surface of the second-stage MCP are stored by the decoupling capacitor in the first time. Therefore, the readout circuit further includes a decoupling capacitor C1, a decoupling capacitor C2, a decoupling capacitor C3 and a decoupling capacitor C4;

[0069] One end of the decoupling capacitor C1 is connected to the Out2-4 pin, and the other end of the decoupling capacitor C1 is grounded;

[0070] One end of the decoupling capacitor C2 is connected to the Out2-3 pin, and the other end of the decoupling capacitor C2 is grounded;

[0071] One end of the decoupling capacitor C3 is connected to the Out2-2 pin, and the other end of the decoupling capacitor C3 is grounded;

[0072] One end of the decoupling capacitor C4 is connected to the Out2-1 pin, and the other end of the decoupling capacitor C4 is grounded.

[0073] For the decoupling capacitors C1, C2, C3, and C4, their capacitance values are the same, and the capacitance value can be set to 470 pF.

[0074] Similarly, in order to avoid the mutual influence of the induced charges between the connection lines of the other pins of the high-voltage socket chip U2 and the MCP-PMT socket chip U1, it can be required that the readout circuit further includes decoupling capacitors C5, C6, C7, and C8;

[0075] One end of the decoupling capacitor C5 is connected to the connection line between the first Out2 pin and the second Out2 pin, and the other end of the decoupling capacitor C5 is connected to the connection line between the first In2 pin and the second In2 pin;

[0076] One end of the decoupling capacitor C6 is connected to the connection line between the first In2 pin and the second In2 pin, and the other end of the decoupling capacitor C6 is connected to the connection line between the first Out1 pin and the second Out1 pin;

[0077] One end of the decoupling capacitor C7 is connected to the connection line between the first Out1 pin and the second Out1 pin, and the other end of the decoupling capacitor C7 is connected to the connection line between the first In1 pin and the second In1 pin;

[0078] One end of the decoupling capacitor C8 is connected to the connection line between the first In1 pin and the second In1 pin, and the other end of the decoupling capacitor C8 is connected to the connection line between the first K pin and the second K pin.

[0079] Among them, the capacitance value of the decoupling capacitor C1 is different from that of the decoupling capacitor C5. The capacitance values of the decoupling capacitors C5, C6, C7, and C8 are the same, and the capacitance value can be set to 1 nF. The function of all the decoupling capacitors set in this embodiment is to store the accumulated charges.

[0080] Due to the different loads of the front-end circuit, in order to flexibly adjust the dynamic response state of the circuit, damping resistors can be set in the readout circuit, that is, damping resistors are respectively connected in series on the signal connection lines where the first A1 pin to the first A16 pins are connected to the second A1 pin to the second A16 pins one by one, corresponding to Figure 2 R1 to R16 in. The MCP-PMT signal is transmitted to the front-end circuit through the damping resistor, and the resistance value of the damping resistor is 50 ohms, so that the dynamic response of the signal to the load loop is exactly in the critically damped state, eliminating the ringing phenomenon.

[0081] Considering that the large signal of the MCP-PMT may damage the load circuit, in order to protect the load circuit (front-end circuit), a protection diode can be set in the readout circuit. Protection diodes are respectively connected to each signal connection line where the first A1 pin to the first A16 pins are connected to the second A1 pin to the second A16 pins in a one-to-one correspondence, and the cathode of each protection diode is connected to the corresponding connection line, and the anode of each protection diode is grounded. Corresponding Figure 2 to D1 to D16 in

[0082] The first A1 pin to the first A16 pins are connected to the second A1 pin to the second A16 pins in a one-to-one correspondence;

[0083] The MCP-PMT socket chip U1 is used to read the output signal of the output electrode of the MCP-PMT;

[0084] The high-voltage socket chip U2 is used to receive the voltage provided by the MCP-PMT voltage-dividing circuit to supply power to each electrode of the MCP-PMT, that is, to supply power to the MCP-PMT.

[0085] The high-voltage socket is a female socket, and the voltage-dividing circuit has a matching male plug, and the two are combined to complete the connection.

[0086] The signal socket pin unit U3 is used to receive the output signal of the output electrode of the MCP-PMT and transmit it to the front-end circuit, that is, to transmit the signals of each anode of the MCP-PMT to the front-end circuit.

[0087] The signal socket is a male plug, and there is a matching female socket on the front-end circuit, and the two are combined to complete the connection.

[0088] The readout circuit in this embodiment can be set as a PCB board structure, where, as Figures 3 to 9 shown. The PCB board structure of the readout circuit includes a Top layer, a Gnd1 layer, a Sig1 layer, a Sig2 layer, a Gnd2 layer, and a Bottom layer from top to bottom in sequence;

[0089] A part of the power supply electrode trace between the MCP-PMT socket chip U1 and the high-voltage socket chip U2 is set on the Top layer;

[0090] On the Bottom layer, another part of the power supply electrode trace between the MCP-PMT socket chip U1 and the high-voltage socket chip U2 is provided; the power supply electrode trace includes the power supply connection lines of the first K pin and the second K pin, the power supply connection lines of the first In1 pin and the second In1 pin, the power supply connection lines of the first Out1 pin and the second Out1 pin, the power supply connection lines of the first In2 pin and the second In2 pin, and the power supply connection lines of the first Out2 pin and the second Out2 pin;

[0091] On the Sig1 layer, a part of the output signal trace between the MCP-PMT socket chip U1 and the signal socket pin unit U3 is provided;

[0092] On the Sig2 layer, another part of the output signal trace between the MCP-PMT socket chip U1 and the signal socket pin unit U3 is provided; the output signal trace (the trace of the anode readout signal) includes the signal connection lines connecting the first A1 pin to the first A16 pins and the second A1 pin to the second A16 pins in one-to-one correspondence;

[0093] The signal connection line has a 50-ohm impedance, and the arc-shaped serpentine trace reduces impedance discontinuity points. It reduces the distributed capacitance-inductance ratio and improves the ringing phenomenon. The line spacing is greater than three times the line width, and the adjacent side of each signal pin of the signal socket is a ground pin. Adjacent signal lines are arranged at intervals on different layers to reduce crosstalk between channels.

[0094] The Gnd1 layer and the Gnd2 layer are ground planes. Holes are dug on the Gnd1 layer and the Gnd2 layer, and each pin or each device is grounded through the dug holes. For example, the GND pin in the high-voltage socket chip U2 is connected to the Gnd1 layer or the Gnd2 layer through a dug hole; the ground terminal of the decoupling capacitor is connected to the Gnd1 layer or the Gnd2 layer through a dug hole to achieve grounding; the anode of the protection diode is connected to the Gnd1 layer or the Gnd2 layer through a dug hole to achieve grounding. In order to ensure that the readout signal is not interfered by the outside world and the high-voltage trace, and also to ensure that the high voltage will not break down the Gnd1 layer or the Gnd2 layer, the hollowed-out parts of the Gnd1 layer or the Gnd2 layer are not arranged correspondingly.

[0095] Two adjacent signal connection lines in the output signal trace are arranged on different layers, and ground vias are added near the trace-changing layer to reduce the return area and avoid charge accumulation. Two adjacent signal connection lines on the same layer are arranged at intervals.

[0096] The adjacent sides of each pin in the signal socket pin unit U3 are all ground pins, that is, the adjacent sides of each pin in the signal socket pin unit U3 are connected to the Gnd1 layer or the Gnd2 layer through dug holes to achieve grounding.

[0097] When designing the PCB board, there are a total of 4 output electrodes around the second-stage MCP. A decoupling capacitor C1 - C4 with a capacitance value of 470 pF is connected in series to the ground at each output electrode. The capacitors are evenly distributed around the MCP - PMT on the PCB board, so that the induced charges on the surface of the second-stage MCP can be stored by the decoupling capacitors in the first time, avoiding crosstalk induced on other anodes.

[0098] The PCB board structure of the readout circuit in this embodiment can read signals from two MCP - PMTs simultaneously. In this case, two sets of readout circuits are arranged on the same PCB board.

[0099] For the divided voltage - dividing circuit and the signal readout circuit, the MCP - PMT voltage - dividing circuit is separated and another PCB board is used. The voltage division of each electrode is introduced into the readout circuit through the high - voltage socket chip U2, isolating the electromagnetic field interference on the voltage - dividing circuit.

[0100] In this embodiment, the readout circuit consists of three parts: (A) High - voltage socket and decoupling capacitors C1 - C8, which are used to receive the voltage provided by the voltage - dividing circuit and distribute it to each electrode of the MCP - PMT, that is, to supply power to the MCP - PMT. The decoupling capacitors are used to store the accumulated charges; (B) MCP - PMT socket, protection diodes D1 - D16 and damping resistors R1 - R16, which are used to connect to the electrodes and anodes of the MCP - PMT. The protection diodes are used to prevent large signals of the MCP - PMT from damaging the load circuit, and the damping resistors are used to adjust the dynamic response state of the circuit; (C) Signal socket, which is used to transmit the MCP - PMT signal to the front - end circuit. The MCP - PMT signal read by this circuit will have characteristics such as low crosstalk ringing, high time resolution, and high position resolution, ensuring the stability of the performance of the MCP - PMT. Therefore, it has significant advantages in weak - light detection, particle type discrimination, radiation particle energy and distribution imaging, etc. For example: (1) Applied to particle type identification in high - energy physics experiments, such as the TOP detector in the BELLEII experiment, the MCP - PMT signal is required to have characteristics such as high - fidelity, low crosstalk, and high signal - to - noise ratio. The readout circuit based on the present invention fully meets the experimental requirements without any modification to the internal structure of the MCP - PMT. (2) Applied to rare - event search experiments, such as the mTC detector in the NIST nuclear reactor for detecting anti - neutrinos. Using the present invention as the readout circuit of the MCP - PMT can reduce false signals and reduce false triggers. It solves the problem that the multi - anode MCP - PMT has very fast time response, compact structure, high gain, high position resolution, anti - magnetic field and other characteristics, but the crosstalk ringing phenomenon greatly reduces its performance. The readout circuit of this embodiment solves the crosstalk ringing phenomenon, making its application in many fields no longer limited.

[0101] The readout circuit design of this embodiment was simulated using ADS software below. Figure 10 (a) shows the crosstalk phenomenon of other channels when an excitation signal is set for the ch7 channel. The signal amplitude of the ch7 channel is 19 mV, and the maximum crosstalk amplitude of other channels is about 500 μV, with the maximum crosstalk amplitude ratio being 2.6%. Figure 10 (b) shows the crosstalk phenomenon of other channels when excitation signals are set for the ch6, 7, 10, and 11 channels. Four signal channels are simultaneously given an excitation with an amplitude of 19 mV, and the maximum crosstalk amplitude of other channels is about 700 μV, with the maximum crosstalk amplitude ratio being 3.6%.

[0102] Verification tests were carried out on the Hamamatsu R10754 model MCP-PMT. Figure 11 shows the relationship between the crosstalk amplitude ratio and the signal amplitude. The dots represent the original signals, and the squares represent the signals using the present invention. It can be seen from the figure that the crosstalk amplitude ratio drops from 12% to 4%. Figure 12 shows the relationship between the amplitude ratio and the signal amplitude. The dots represent the original signals (before improvement), and the squares represent the signals using the present invention (after improvement). It can be seen from the figure that the amplitude ratio drops from 15% to 5%. Figure 13 shows the signal and crosstalk ringing waveform diagrams of the MCP-PMT. Figure 13 (a) shows the signal and crosstalk ringing waveform diagrams of the MCP-PMT without using the readout circuit. Figure 13 (b) shows the signal and crosstalk ringing waveform diagrams of the MCP-PMT when using the readout circuit. Signal represents the signal waveform of the MCP-PMT, and Crosstalk is the crosstalk ringing waveform. After using the present invention, it can be seen that there is no longer a ringing phenomenon at the trailing edge of the signal, and the crosstalk ringing amplitude of other channels is greatly reduced.

[0103] In this article, specific examples were used to elaborate on the principle and implementation manner of the present invention. The descriptions of the above embodiments are only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. An MCP-PMT readout circuit, characterized in that, It includes an MCP-PMT socket chip U1, a high-voltage socket chip U2, and a signal socket pin unit U3; The MCP-PMT socket chip U1 includes a first K pin, a first In1 pin, a first Out1 pin, a first In2 pin, and a first Out2 pin; The MCP-PMT socket chip U1 further includes a first A1 pin, a first A2 pin,..., a first Ai pin,..., and a first A16 pin; The high-voltage socket chip U2 includes a second K pin, a second In1 pin, a second Out1 pin, a second In2 pin, a second Out2 pin, and a GND pin; The signal socket pin unit U3 includes a second A1 pin, a second A2 pin,..., a second Ai pin,..., and a second A16 pin; The first K pin is connected to the second K pin; the first In1 pin is connected to the second In1 pin, the first Out1 pin is connected to the second Out1 pin, the first In2 pin is connected to the second In2 pin; the first Out2 pin is connected to the second Out2 pin; the first Out2 pin is also connected to the output electrode of the MCP-PMT; the GND pin is grounded; The first A1 pin to the first A16 pin are connected to the second A1 pin to the second A16 pin in one-to-one correspondence; The MCP-PMT socket chip U1 is used to read the output signal of the output electrode of the MCP-PMT; The high-voltage socket chip U2 is used to receive the voltage provided by the MCP-PMT voltage division circuit to supply power to each electrode of the MCP-PMT; The signal socket pin unit U3 is used to receive the output signal of the output electrode of the MCP-PMT and transmit it to the front-end circuit; The first Out2 pin includes an Out2-1 pin, an Out2-2 pin, an Out2-3 pin, and an Out2-4 pin; The Out2-1 pin, the Out2-2 pin, the Out2-3 pin, and the Out2-4 pin are all connected to the second Out2 pin; Among them, the readout circuit further includes a decoupling capacitor C1, a decoupling capacitor C2, a decoupling capacitor C3, and a decoupling capacitor C4; One end of the decoupling capacitor C1 is connected to the Out2-4 pin, and the other end of the decoupling capacitor C1 is grounded; One end of the decoupling capacitor C2 is connected to the Out2-3 pin, and the other end of the decoupling capacitor C2 is grounded; One end of the decoupling capacitor C3 is connected to the Out2-2 pin, and the other end of the decoupling capacitor C3 is grounded; One end of the decoupling capacitor C4 is connected to the Out2-1 pin, and the other end of the decoupling capacitor C4 is grounded; Among them, the readout circuit further includes a decoupling capacitor C5, a decoupling capacitor C6, a decoupling capacitor C7, and a decoupling capacitor C8; One end of the decoupling capacitor C5 is connected to the connection line between the first Out2 pin and the second Out2 pin, and the other end of the decoupling capacitor C5 is connected to the connection line between the first In2 pin and the second In2 pin; One end of the decoupling capacitor C6 is connected to the wire connecting the first In2 pin and the second In2 pin, and the other end of the decoupling capacitor C6 is connected to the wire connecting the first Out1 pin and the second Out1 pin; One end of the decoupling capacitor C7 is connected to the wire connecting the first Out1 pin and the second Out1 pin, and the other end of the decoupling capacitor C7 is connected to the wire connecting the first In1 pin and the second In1 pin; One end of the decoupling capacitor C8 is connected to the wire connecting the first In1 pin and the second In1 pin, and the other end of the decoupling capacitor C8 is connected to the wire connecting the first K pin and the second K pin; Damping resistors are respectively connected in series on the signal connection wires where the first A1 pin to the first A16 pins are correspondingly connected to the second A1 pin to the second A16 pins one by one; The readout circuit is arranged as a PCB board structure; the PCB board structure sequentially includes a Top layer, a Gnd1 layer, a Sig1 layer, a Sig2 layer, a Gnd2 layer, and a Bottom layer from top to bottom; A part of the power supply electrode trace between the MCP-PMT socket chip U1 and the high-voltage socket chip U2 is arranged on the Top layer; Another part of the power supply electrode trace between the MCP-PMT socket chip U1 and the high-voltage socket chip U2 is arranged on the Bottom layer; the power supply electrode trace includes the power supply connection wires of the first K pin and the second K pin, the power supply connection wires of the first In1 pin and the second In1 pin, the power supply connection wires of the first Out1 pin and the second Out1 pin, the power supply connection wires of the first In2 pin and the second In2 pin, and the power supply connection wires of the first Out2 pin and the second Out2 pin; A part of the output signal trace between the MCP-PMT socket chip U1 and the signal socket pin unit U3 is arranged on the Sig1 layer; Another part of the output signal trace between the MCP-PMT socket chip U1 and the signal socket pin unit U3 is arranged on the Sig2 layer; the output signal trace includes the signal connection wires where the first A1 pin to the first A16 pins are correspondingly connected to the second A1 pin to the second A16 pins one by one; The Gnd1 layer and the Gnd2 layer are ground planes; The output signal trace between the MCP-PMT socket chip U1 and the signal socket pin unit U3 has a 50-ohm impedance and is an arc-shaped serpentine trace.

2. The readout circuit according to claim 1, wherein The capacitance values of the decoupling capacitor C1, the decoupling capacitor C2, the decoupling capacitor C3, and the decoupling capacitor C4 are the same; the capacitance values of the decoupling capacitor C5, the decoupling capacitor C6, the decoupling capacitor C7, and the decoupling capacitor C8 are the same; the capacitance value of the decoupling capacitor C1 is different from the capacitance value of the decoupling capacitor C5.

3. The readout circuit according to claim 1, wherein Protection diodes are respectively connected to each signal connection line where the first A1 pin to the first A16 pins are connected to the second A1 pin to the second A16 pins in a one-to-one correspondence, and the cathode of each protection diode is connected to the corresponding connection line, and the anode of each protection diode is grounded.

4. The readout circuit according to claim 3, wherein Among the adjacent two signal connection lines in the output signal trace, they are arranged on different layers, and the adjacent two signal connection lines on the same layer are arranged at intervals.

5. The readout circuit according to claim 4, characterized in that The adjacent sides of each pin in the signal socket pin unit U3 are all ground pins.

Images